blob: 53fdfa283ee2b823c58573e53636bbf8b5be9633 [file] [log] [blame]
Ben Skeggs94580292012-07-06 12:14:00 +10001/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
Ben Skeggs77145f12012-07-31 16:16:21 +100025#include <linux/console.h>
Lukas Wunnerc5fd9362015-04-19 17:18:01 +020026#include <linux/delay.h>
Ben Skeggs94580292012-07-06 12:14:00 +100027#include <linux/module.h>
28#include <linux/pci.h>
Dave Airlie5addcf02012-09-10 14:20:51 +100029#include <linux/pm_runtime.h>
30#include <linux/vga_switcheroo.h>
Ben Skeggsfdb751e2014-08-10 04:10:23 +100031
Masahiro Yamadaae956212017-04-24 13:50:29 +090032#include <drm/drmP.h>
33#include <drm/drm_crtc_helper.h>
Ben Skeggsfdb751e2014-08-10 04:10:23 +100034
Ben Skeggsebb945a2012-07-20 08:17:34 +100035#include <core/gpuobj.h>
Ilia Mirkinc33e05a2014-02-13 21:35:14 -050036#include <core/option.h>
Ben Skeggs7974dd12015-08-20 14:54:17 +100037#include <core/pci.h>
38#include <core/tegra.h>
Ben Skeggs94580292012-07-06 12:14:00 +100039
Ben Skeggs04b88672016-05-22 20:35:16 +100040#include <nvif/driver.h>
Ben Skeggsa7cf0182018-05-08 20:39:46 +100041#include <nvif/fifo.h>
Ben Skeggs37e1c452018-05-08 20:39:48 +100042#include <nvif/user.h>
Ben Skeggs04b88672016-05-22 20:35:16 +100043
Ben Skeggs923bc412015-11-08 12:23:16 +100044#include <nvif/class.h>
Ben Skeggs845f2722015-11-08 12:16:40 +100045#include <nvif/cl0002.h>
Ben Skeggs8ed17302015-11-08 11:28:26 +100046#include <nvif/cla06f.h>
Ben Skeggs538b2692015-11-08 10:34:50 +100047
Ben Skeggs4dc28132016-05-20 09:22:55 +100048#include "nouveau_drv.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100049#include "nouveau_dma.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100050#include "nouveau_ttm.h"
51#include "nouveau_gem.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100052#include "nouveau_vga.h"
Martin Peres8d021d72016-08-25 03:57:07 +030053#include "nouveau_led.h"
Ben Skeggsb9ed9192013-10-15 09:44:02 +100054#include "nouveau_hwmon.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100055#include "nouveau_acpi.h"
56#include "nouveau_bios.h"
57#include "nouveau_ioctl.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100058#include "nouveau_abi16.h"
59#include "nouveau_fbcon.h"
60#include "nouveau_fence.h"
Marcin Slusarz33b903e2013-02-08 21:42:13 +010061#include "nouveau_debugfs.h"
Ben Skeggs27111a22014-08-10 04:10:31 +100062#include "nouveau_usif.h"
Pierre Moreau703fa262014-08-18 22:43:24 +020063#include "nouveau_connector.h"
Alexandre Courbot055a65d2015-01-15 15:29:56 +090064#include "nouveau_platform.h"
Ben Skeggseeaf06ac2018-07-05 12:57:12 +100065#include "nouveau_svm.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100066
Ben Skeggs94580292012-07-06 12:14:00 +100067MODULE_PARM_DESC(config, "option string to pass to driver core");
68static char *nouveau_config;
69module_param_named(config, nouveau_config, charp, 0400);
70
71MODULE_PARM_DESC(debug, "debug string to pass to driver core");
72static char *nouveau_debug;
73module_param_named(debug, nouveau_debug, charp, 0400);
74
Ben Skeggsebb945a2012-07-20 08:17:34 +100075MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
76static int nouveau_noaccel = 0;
77module_param_named(noaccel, nouveau_noaccel, int, 0400);
78
Ben Skeggs94307382012-10-31 12:11:15 +100079MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
80 "0 = disabled, 1 = enabled, 2 = headless)");
81int nouveau_modeset = -1;
Ben Skeggs77145f12012-07-31 16:16:21 +100082module_param_named(modeset, nouveau_modeset, int, 0400);
83
Lyude Pauleb493fb2018-07-03 16:31:41 -040084MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)");
85static int nouveau_atomic = 0;
86module_param_named(atomic, nouveau_atomic, int, 0400);
87
Dave Airlie5addcf02012-09-10 14:20:51 +100088MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
Ben Skeggs321f5c52017-06-02 14:38:07 +100089static int nouveau_runtime_pm = -1;
Dave Airlie5addcf02012-09-10 14:20:51 +100090module_param_named(runpm, nouveau_runtime_pm, int, 0400);
91
David Herrmann915b4d12014-08-29 12:12:43 +020092static struct drm_driver driver_stub;
93static struct drm_driver driver_pci;
94static struct drm_driver driver_platform;
Ben Skeggs77145f12012-07-31 16:16:21 +100095
Ben Skeggs94580292012-07-06 12:14:00 +100096static u64
Alexandre Courbot420b9462014-02-17 15:17:26 +090097nouveau_pci_name(struct pci_dev *pdev)
Ben Skeggs94580292012-07-06 12:14:00 +100098{
99 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
100 name |= pdev->bus->number << 16;
101 name |= PCI_SLOT(pdev->devfn) << 8;
102 return name | PCI_FUNC(pdev->devfn);
103}
104
Alexandre Courbot420b9462014-02-17 15:17:26 +0900105static u64
106nouveau_platform_name(struct platform_device *platformdev)
107{
108 return platformdev->id;
109}
110
111static u64
112nouveau_name(struct drm_device *dev)
113{
114 if (dev->pdev)
115 return nouveau_pci_name(dev->pdev);
116 else
Laurent Pinchart76adb462016-12-18 00:01:19 +0200117 return nouveau_platform_name(to_platform_device(dev->dev));
Alexandre Courbot420b9462014-02-17 15:17:26 +0900118}
119
Ben Skeggs814a2322017-11-01 03:56:20 +1000120static inline bool
Ben Skeggs11e451e2018-05-08 20:39:47 +1000121nouveau_cli_work_ready(struct dma_fence *fence)
Ben Skeggs814a2322017-11-01 03:56:20 +1000122{
Ben Skeggs11e451e2018-05-08 20:39:47 +1000123 if (!dma_fence_is_signaled(fence))
124 return false;
Ben Skeggs814a2322017-11-01 03:56:20 +1000125 dma_fence_put(fence);
126 return true;
127}
128
129static void
Ben Skeggs11e451e2018-05-08 20:39:47 +1000130nouveau_cli_work(struct work_struct *w)
Ben Skeggs814a2322017-11-01 03:56:20 +1000131{
Ben Skeggs11e451e2018-05-08 20:39:47 +1000132 struct nouveau_cli *cli = container_of(w, typeof(*cli), work);
Ben Skeggs814a2322017-11-01 03:56:20 +1000133 struct nouveau_cli_work *work, *wtmp;
134 mutex_lock(&cli->lock);
135 list_for_each_entry_safe(work, wtmp, &cli->worker, head) {
Ben Skeggs11e451e2018-05-08 20:39:47 +1000136 if (!work->fence || nouveau_cli_work_ready(work->fence)) {
Ben Skeggs814a2322017-11-01 03:56:20 +1000137 list_del(&work->head);
138 work->func(work);
139 }
140 }
141 mutex_unlock(&cli->lock);
142}
143
144static void
145nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)
146{
147 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb);
148 schedule_work(&work->cli->work);
149}
150
151void
152nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
153 struct nouveau_cli_work *work)
154{
155 work->fence = dma_fence_get(fence);
156 work->cli = cli;
157 mutex_lock(&cli->lock);
158 list_add_tail(&work->head, &cli->worker);
Ben Skeggs814a2322017-11-01 03:56:20 +1000159 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
160 nouveau_cli_work_fence(fence, &work->cb);
Ben Skeggsb26a2312017-12-23 08:54:28 +1000161 mutex_unlock(&cli->lock);
Ben Skeggs814a2322017-11-01 03:56:20 +1000162}
163
164static void
Ben Skeggs20d8a882016-05-18 13:36:34 +1000165nouveau_cli_fini(struct nouveau_cli *cli)
Ben Skeggs94580292012-07-06 12:14:00 +1000166{
Ben Skeggs11e451e2018-05-08 20:39:47 +1000167 /* All our channels are dead now, which means all the fences they
168 * own are signalled, and all callback functions have been called.
169 *
170 * So, after flushing the workqueue, there should be nothing left.
171 */
172 flush_work(&cli->work);
173 WARN_ON(!list_empty(&cli->worker));
174
Ben Skeggs27111a22014-08-10 04:10:31 +1000175 usif_client_fini(cli);
Ben Skeggsbfe91af2019-02-19 17:21:48 +1000176 nouveau_vmm_fini(&cli->svm);
Ben Skeggs24e83752017-11-01 03:56:19 +1000177 nouveau_vmm_fini(&cli->vmm);
Ben Skeggs01670a72017-11-01 03:56:19 +1000178 nvif_mmu_fini(&cli->mmu);
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000179 nvif_device_fini(&cli->device);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000180 mutex_lock(&cli->drm->master.lock);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000181 nvif_client_fini(&cli->base);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000182 mutex_unlock(&cli->drm->master.lock);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000183}
184
185static int
186nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
187 struct nouveau_cli *cli)
188{
Ben Skeggs01670a72017-11-01 03:56:19 +1000189 static const struct nvif_mclass
Ben Skeggs7f507622017-11-01 03:56:20 +1000190 mems[] = {
191 { NVIF_CLASS_MEM_GF100, -1 },
192 { NVIF_CLASS_MEM_NV50 , -1 },
193 { NVIF_CLASS_MEM_NV04 , -1 },
194 {}
195 };
196 static const struct nvif_mclass
Ben Skeggs01670a72017-11-01 03:56:19 +1000197 mmus[] = {
198 { NVIF_CLASS_MMU_GF100, -1 },
199 { NVIF_CLASS_MMU_NV50 , -1 },
200 { NVIF_CLASS_MMU_NV04 , -1 },
201 {}
202 };
Ben Skeggs96da0bc2017-11-01 03:56:20 +1000203 static const struct nvif_mclass
204 vmms[] = {
205 { NVIF_CLASS_VMM_GP100, -1 },
206 { NVIF_CLASS_VMM_GM200, -1 },
207 { NVIF_CLASS_VMM_GF100, -1 },
208 { NVIF_CLASS_VMM_NV50 , -1 },
209 { NVIF_CLASS_VMM_NV04 , -1 },
210 {}
211 };
Ben Skeggs20d8a882016-05-18 13:36:34 +1000212 u64 device = nouveau_name(drm->dev);
213 int ret;
214
215 snprintf(cli->name, sizeof(cli->name), "%s", sname);
Ben Skeggse75c0912017-11-01 03:56:19 +1000216 cli->drm = drm;
Ben Skeggs20d8a882016-05-18 13:36:34 +1000217 mutex_init(&cli->mutex);
218 usif_client_init(cli);
219
Ben Skeggs814a2322017-11-01 03:56:20 +1000220 INIT_WORK(&cli->work, nouveau_cli_work);
221 INIT_LIST_HEAD(&cli->worker);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000222 mutex_init(&cli->lock);
223
224 if (cli == &drm->master) {
Ben Skeggs80e60972016-05-23 11:25:17 +1000225 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
226 cli->name, device, &cli->base);
227 } else {
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000228 mutex_lock(&drm->master.lock);
229 ret = nvif_client_init(&drm->master.base, cli->name, device,
Ben Skeggs80e60972016-05-23 11:25:17 +1000230 &cli->base);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000231 mutex_unlock(&drm->master.lock);
Ben Skeggs80e60972016-05-23 11:25:17 +1000232 }
Ben Skeggs20d8a882016-05-18 13:36:34 +1000233 if (ret) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000234 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000235 goto done;
236 }
237
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000238 ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE,
239 &(struct nv_device_v0) {
240 .device = ~0,
241 }, sizeof(struct nv_device_v0),
242 &cli->device);
243 if (ret) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000244 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret);
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000245 goto done;
246 }
247
Ben Skeggs01670a72017-11-01 03:56:19 +1000248 ret = nvif_mclass(&cli->device.object, mmus);
249 if (ret < 0) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000250 NV_PRINTK(err, cli, "No supported MMU class\n");
Ben Skeggs01670a72017-11-01 03:56:19 +1000251 goto done;
252 }
253
254 ret = nvif_mmu_init(&cli->device.object, mmus[ret].oclass, &cli->mmu);
255 if (ret) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000256 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret);
Ben Skeggs01670a72017-11-01 03:56:19 +1000257 goto done;
258 }
259
Ben Skeggs96da0bc2017-11-01 03:56:20 +1000260 ret = nvif_mclass(&cli->mmu.object, vmms);
261 if (ret < 0) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000262 NV_PRINTK(err, cli, "No supported VMM class\n");
Ben Skeggs96da0bc2017-11-01 03:56:20 +1000263 goto done;
264 }
265
266 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
267 if (ret) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000268 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret);
Ben Skeggs96da0bc2017-11-01 03:56:20 +1000269 goto done;
270 }
271
Ben Skeggs7f507622017-11-01 03:56:20 +1000272 ret = nvif_mclass(&cli->mmu.object, mems);
273 if (ret < 0) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000274 NV_PRINTK(err, cli, "No supported MEM class\n");
Ben Skeggs7f507622017-11-01 03:56:20 +1000275 goto done;
276 }
277
278 cli->mem = &mems[ret];
Ben Skeggs7f507622017-11-01 03:56:20 +1000279 return 0;
Ben Skeggs20d8a882016-05-18 13:36:34 +1000280done:
281 if (ret)
282 nouveau_cli_fini(cli);
283 return ret;
Ben Skeggs94580292012-07-06 12:14:00 +1000284}
285
Ben Skeggsebb945a2012-07-20 08:17:34 +1000286static void
Ben Skeggsf0eee9a2019-02-12 22:28:13 +1000287nouveau_accel_ce_fini(struct nouveau_drm *drm)
288{
289 nouveau_channel_idle(drm->cechan);
290 nvif_object_fini(&drm->ttm.copy);
291 nouveau_channel_del(&drm->cechan);
292}
293
294static void
295nouveau_accel_ce_init(struct nouveau_drm *drm)
296{
297 struct nvif_device *device = &drm->client.device;
298 int ret = 0;
299
300 /* Allocate channel that has access to a (preferably async) copy
301 * engine, to use for TTM buffer moves.
302 */
303 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
304 ret = nouveau_channel_new(drm, device,
305 nvif_fifo_runlist_ce(device), 0,
306 true, &drm->cechan);
307 } else
308 if (device->info.chipset >= 0xa3 &&
309 device->info.chipset != 0xaa &&
310 device->info.chipset != 0xac) {
311 /* Prior to Kepler, there's only a single runlist, so all
312 * engines can be accessed from any channel.
313 *
314 * We still want to use a separate channel though.
315 */
316 ret = nouveau_channel_new(drm, device, NvDmaFB, NvDmaTT, false,
317 &drm->cechan);
318 }
319
320 if (ret)
321 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
322}
323
324static void
325nouveau_accel_gr_fini(struct nouveau_drm *drm)
Ben Skeggsebb945a2012-07-20 08:17:34 +1000326{
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000327 nouveau_channel_idle(drm->channel);
Ben Skeggs0ad72862014-08-10 04:10:22 +1000328 nvif_object_fini(&drm->ntfy);
Ben Skeggsf027f492015-08-20 14:54:17 +1000329 nvkm_gpuobj_del(&drm->notify);
Ben Skeggs0ad72862014-08-10 04:10:22 +1000330 nvif_object_fini(&drm->nvsw);
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000331 nouveau_channel_del(&drm->channel);
Ben Skeggsf0eee9a2019-02-12 22:28:13 +1000332}
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000333
Ben Skeggsf0eee9a2019-02-12 22:28:13 +1000334static void
335nouveau_accel_gr_init(struct nouveau_drm *drm)
336{
337 struct nvif_device *device = &drm->client.device;
338 u32 arg0, arg1;
339 int ret;
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000340
Ben Skeggsf0eee9a2019-02-12 22:28:13 +1000341 /* Allocate channel that has access to the graphics engine. */
342 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
343 arg0 = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR);
344 arg1 = 1;
345 } else {
346 arg0 = NvDmaFB;
347 arg1 = NvDmaTT;
348 }
349
350 ret = nouveau_channel_new(drm, device, arg0, arg1, false,
351 &drm->channel);
352 if (ret) {
353 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
354 nouveau_accel_gr_fini(drm);
355 return;
356 }
357
358 /* A SW class is used on pre-NV50 HW to assist with handling the
359 * synchronisation of page flips, as well as to implement fences
360 * on TNT/TNT2 HW that lacks any kind of support in host.
361 */
362 if (device->info.family < NV_DEVICE_INFO_V0_TESLA) {
363 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
364 nouveau_abi16_swclass(drm), NULL, 0,
365 &drm->nvsw);
366 if (ret == 0) {
367 ret = RING_SPACE(drm->channel, 2);
368 if (ret == 0) {
369 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
370 OUT_RING (drm->channel, drm->nvsw.handle);
371 }
372 }
373
374 if (ret) {
375 NV_ERROR(drm, "failed to allocate sw class, %d\n", ret);
376 nouveau_accel_gr_fini(drm);
377 return;
378 }
379 }
380
381 /* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason,
382 * even if notification is never requested, so, allocate a ctxdma on
383 * any GPU where it's possible we'll end up using M2MF for BO moves.
384 */
385 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
386 ret = nvkm_gpuobj_new(nvxx_device(device), 32, 0, false, NULL,
387 &drm->notify);
388 if (ret) {
389 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
390 nouveau_accel_gr_fini(drm);
391 return;
392 }
393
394 ret = nvif_object_init(&drm->channel->user, NvNotify0,
395 NV_DMA_IN_MEMORY,
396 &(struct nv_dma_v0) {
397 .target = NV_DMA_V0_TARGET_VRAM,
398 .access = NV_DMA_V0_ACCESS_RDWR,
399 .start = drm->notify->addr,
400 .limit = drm->notify->addr + 31
401 }, sizeof(struct nv_dma_v0),
402 &drm->ntfy);
403 if (ret) {
404 nouveau_accel_gr_fini(drm);
405 return;
406 }
407 }
408}
409
410static void
411nouveau_accel_fini(struct nouveau_drm *drm)
412{
413 nouveau_accel_ce_fini(drm);
414 nouveau_accel_gr_fini(drm);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000415 if (drm->fence)
416 nouveau_fence(drm)->dtor(drm);
417}
418
419static void
420nouveau_accel_init(struct nouveau_drm *drm)
421{
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000422 struct nvif_device *device = &drm->client.device;
Ben Skeggs41a63402015-08-20 14:54:16 +1000423 struct nvif_sclass *sclass;
Ben Skeggs41a63402015-08-20 14:54:16 +1000424 int ret, i, n;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000425
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000426 if (nouveau_noaccel)
Ben Skeggsebb945a2012-07-20 08:17:34 +1000427 return;
428
Ben Skeggsf0eee9a2019-02-12 22:28:13 +1000429 /* Initialise global support for channels, and synchronisation. */
Ben Skeggseb47db42018-05-08 20:39:46 +1000430 ret = nouveau_channels_init(drm);
431 if (ret)
432 return;
433
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000434 /*XXX: this is crap, but the fence/channel stuff is a little
435 * backwards in some places. this will be fixed.
436 */
Ben Skeggs41a63402015-08-20 14:54:16 +1000437 ret = n = nvif_object_sclass_get(&device->object, &sclass);
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000438 if (ret < 0)
439 return;
440
Ben Skeggs41a63402015-08-20 14:54:16 +1000441 for (ret = -ENOSYS, i = 0; i < n; i++) {
442 switch (sclass[i].oclass) {
Ben Skeggsbbf89062014-08-10 04:10:25 +1000443 case NV03_CHANNEL_DMA:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000444 ret = nv04_fence_create(drm);
445 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000446 case NV10_CHANNEL_DMA:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000447 ret = nv10_fence_create(drm);
448 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000449 case NV17_CHANNEL_DMA:
450 case NV40_CHANNEL_DMA:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000451 ret = nv17_fence_create(drm);
452 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000453 case NV50_CHANNEL_GPFIFO:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000454 ret = nv50_fence_create(drm);
455 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000456 case G82_CHANNEL_GPFIFO:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000457 ret = nv84_fence_create(drm);
458 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000459 case FERMI_CHANNEL_GPFIFO:
460 case KEPLER_CHANNEL_GPFIFO_A:
Ben Skeggs63f8c9b2016-03-11 13:09:28 +1000461 case KEPLER_CHANNEL_GPFIFO_B:
Ben Skeggsa1020af2015-04-14 11:47:24 +1000462 case MAXWELL_CHANNEL_GPFIFO_A:
Ben Skeggse8ff9792016-07-09 10:41:01 +1000463 case PASCAL_CHANNEL_GPFIFO_A:
Ben Skeggs37e1c452018-05-08 20:39:48 +1000464 case VOLTA_CHANNEL_GPFIFO_A:
Ben Skeggs641d0b32018-12-11 14:50:02 +1000465 case TURING_CHANNEL_GPFIFO_A:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000466 ret = nvc0_fence_create(drm);
467 break;
468 default:
469 break;
470 }
471 }
472
Ben Skeggs41a63402015-08-20 14:54:16 +1000473 nvif_object_sclass_put(&sclass);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000474 if (ret) {
475 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
476 nouveau_accel_fini(drm);
477 return;
478 }
479
Ben Skeggsf0eee9a2019-02-12 22:28:13 +1000480 /* Volta requires access to a doorbell register for kickoff. */
481 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) {
482 ret = nvif_user_init(device);
Ben Skeggs49981042012-08-06 19:38:25 +1000483 if (ret)
Ben Skeggs898a2b32015-08-20 14:54:18 +1000484 return;
Ben Skeggs69a61462013-11-13 10:58:51 +1000485 }
486
Ben Skeggsf0eee9a2019-02-12 22:28:13 +1000487 /* Allocate channels we need to support various functions. */
488 nouveau_accel_gr_init(drm);
489 nouveau_accel_ce_init(drm);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000490
Ben Skeggsf0eee9a2019-02-12 22:28:13 +1000491 /* Initialise accelerated TTM buffer moves. */
Ben Skeggs49981042012-08-06 19:38:25 +1000492 nouveau_bo_move_init(drm);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000493}
494
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200495static int
Lyude Paulcfea88a2018-08-22 21:40:07 -0400496nouveau_drm_device_init(struct drm_device *dev)
Ben Skeggs94580292012-07-06 12:14:00 +1000497{
Ben Skeggs94580292012-07-06 12:14:00 +1000498 struct nouveau_drm *drm;
499 int ret;
500
Ben Skeggs20d8a882016-05-18 13:36:34 +1000501 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
502 return -ENOMEM;
503 dev->dev_private = drm;
504 drm->dev = dev;
505
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000506 ret = nouveau_cli_init(drm, "DRM-master", &drm->master);
507 if (ret)
Lyude Paulc4cee692018-08-22 21:40:06 -0400508 goto fail_alloc;
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000509
Ben Skeggs20d8a882016-05-18 13:36:34 +1000510 ret = nouveau_cli_init(drm, "DRM", &drm->client);
Ben Skeggs94580292012-07-06 12:14:00 +1000511 if (ret)
Lyude Paulc4cee692018-08-22 21:40:06 -0400512 goto fail_master;
Ben Skeggs94580292012-07-06 12:14:00 +1000513
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000514 dev->irq_enabled = true;
515
Ben Skeggs989aa5b2015-01-12 12:33:37 +1000516 nvxx_client(&drm->client.base)->debug =
Ben Skeggsbe83cd42015-01-14 15:36:34 +1000517 nvkm_dbgopt(nouveau_debug, "DRM");
Ben Skeggs77145f12012-07-31 16:16:21 +1000518
Ben Skeggs94580292012-07-06 12:14:00 +1000519 INIT_LIST_HEAD(&drm->clients);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000520 spin_lock_init(&drm->tile.lock);
Ben Skeggs94580292012-07-06 12:14:00 +1000521
Ben Skeggs77145f12012-07-31 16:16:21 +1000522 /* workaround an odd issue on nvc1 by disabling the device's
523 * nosnoop capability. hopefully won't cause issues until a
524 * better fix is found - assuming there is one...
525 */
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000526 if (drm->client.device.info.chipset == 0xc1)
527 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000528
Ben Skeggs77145f12012-07-31 16:16:21 +1000529 nouveau_vga_init(drm);
Ben Skeggscb75d972012-07-11 10:44:20 +1000530
Ben Skeggsebb945a2012-07-20 08:17:34 +1000531 ret = nouveau_ttm_init(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000532 if (ret)
Ben Skeggs77145f12012-07-31 16:16:21 +1000533 goto fail_ttm;
Ben Skeggs94580292012-07-06 12:14:00 +1000534
Ben Skeggs77145f12012-07-31 16:16:21 +1000535 ret = nouveau_bios_init(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000536 if (ret)
Ben Skeggs77145f12012-07-31 16:16:21 +1000537 goto fail_bios;
538
Ben Skeggsd7f9bb62019-02-12 22:28:13 +1000539 nouveau_accel_init(drm);
540
Ben Skeggs77145f12012-07-31 16:16:21 +1000541 ret = nouveau_display_create(dev);
542 if (ret)
543 goto fail_dispctor;
544
545 if (dev->mode_config.num_crtc) {
Ben Skeggs0f9976d2019-02-12 22:28:13 +1000546 ret = nouveau_display_init(dev, false, false);
Ben Skeggs77145f12012-07-31 16:16:21 +1000547 if (ret)
548 goto fail_dispinit;
549 }
550
Karol Herbstb126a202015-07-30 11:52:23 +0200551 nouveau_debugfs_init(drm);
Ben Skeggsb9ed9192013-10-15 09:44:02 +1000552 nouveau_hwmon_init(dev);
Ben Skeggseeaf06ac2018-07-05 12:57:12 +1000553 nouveau_svm_init(drm);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000554 nouveau_fbcon_init(dev);
Martin Peres8d021d72016-08-25 03:57:07 +0300555 nouveau_led_init(dev);
Dave Airlie5addcf02012-09-10 14:20:51 +1000556
Ben Skeggs8fa43382017-06-02 14:49:45 +1000557 if (nouveau_pmops_runtime()) {
Dave Airlie5addcf02012-09-10 14:20:51 +1000558 pm_runtime_use_autosuspend(dev->dev);
559 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
560 pm_runtime_set_active(dev->dev);
561 pm_runtime_allow(dev->dev);
562 pm_runtime_mark_last_busy(dev->dev);
563 pm_runtime_put(dev->dev);
564 }
Lyude Paul7326ead2018-08-15 15:15:13 -0400565
Ben Skeggs94580292012-07-06 12:14:00 +1000566 return 0;
567
Ben Skeggs77145f12012-07-31 16:16:21 +1000568fail_dispinit:
569 nouveau_display_destroy(dev);
570fail_dispctor:
Ben Skeggsd7f9bb62019-02-12 22:28:13 +1000571 nouveau_accel_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000572 nouveau_bios_takedown(dev);
573fail_bios:
Ben Skeggsebb945a2012-07-20 08:17:34 +1000574 nouveau_ttm_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000575fail_ttm:
Ben Skeggs77145f12012-07-31 16:16:21 +1000576 nouveau_vga_fini(drm);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000577 nouveau_cli_fini(&drm->client);
Lyude Paulc4cee692018-08-22 21:40:06 -0400578fail_master:
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000579 nouveau_cli_fini(&drm->master);
Lyude Paulc4cee692018-08-22 21:40:06 -0400580fail_alloc:
Ben Skeggs20d8a882016-05-18 13:36:34 +1000581 kfree(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000582 return ret;
583}
584
Gabriel Krisman Bertazi11b3c202017-01-06 15:57:31 -0200585static void
Lyude Paulcfea88a2018-08-22 21:40:07 -0400586nouveau_drm_device_fini(struct drm_device *dev)
Ben Skeggs94580292012-07-06 12:14:00 +1000587{
Ben Skeggs77145f12012-07-31 16:16:21 +1000588 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000589
Ben Skeggs8fa43382017-06-02 14:49:45 +1000590 if (nouveau_pmops_runtime()) {
Lukas Wunnerc1b16b42016-06-08 18:47:27 +0200591 pm_runtime_get_sync(dev->dev);
Lukas Wunner55c868a2016-06-08 18:47:27 +0200592 pm_runtime_forbid(dev->dev);
Lukas Wunnerc1b16b42016-06-08 18:47:27 +0200593 }
594
Martin Peres8d021d72016-08-25 03:57:07 +0300595 nouveau_led_fini(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000596 nouveau_fbcon_fini(dev);
Ben Skeggseeaf06ac2018-07-05 12:57:12 +1000597 nouveau_svm_fini(drm);
Ben Skeggsb9ed9192013-10-15 09:44:02 +1000598 nouveau_hwmon_fini(dev);
Karol Herbstb126a202015-07-30 11:52:23 +0200599 nouveau_debugfs_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000600
Ben Skeggs94307382012-10-31 12:11:15 +1000601 if (dev->mode_config.num_crtc)
Lyude Paul2f7ca782018-08-07 17:32:48 -0400602 nouveau_display_fini(dev, false, false);
Ben Skeggs77145f12012-07-31 16:16:21 +1000603 nouveau_display_destroy(dev);
604
Ben Skeggsd7f9bb62019-02-12 22:28:13 +1000605 nouveau_accel_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000606 nouveau_bios_takedown(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000607
Ben Skeggsebb945a2012-07-20 08:17:34 +1000608 nouveau_ttm_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000609 nouveau_vga_fini(drm);
Ben Skeggscb75d972012-07-11 10:44:20 +1000610
Ben Skeggs20d8a882016-05-18 13:36:34 +1000611 nouveau_cli_fini(&drm->client);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000612 nouveau_cli_fini(&drm->master);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000613 kfree(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000614}
615
Lyude Paulcfea88a2018-08-22 21:40:07 -0400616static int nouveau_drm_probe(struct pci_dev *pdev,
617 const struct pci_device_id *pent)
618{
619 struct nvkm_device *device;
620 struct drm_device *drm_dev;
621 struct apertures_struct *aper;
622 bool boot = false;
623 int ret;
624
625 if (vga_switcheroo_client_probe_defer(pdev))
626 return -EPROBE_DEFER;
627
628 /* We need to check that the chipset is supported before booting
629 * fbdev off the hardware, as there's no way to put it back.
630 */
631 ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device);
632 if (ret)
633 return ret;
634
635 nvkm_device_del(&device);
636
637 /* Remove conflicting drivers (vesafb, efifb etc). */
638 aper = alloc_apertures(3);
639 if (!aper)
640 return -ENOMEM;
641
642 aper->ranges[0].base = pci_resource_start(pdev, 1);
643 aper->ranges[0].size = pci_resource_len(pdev, 1);
644 aper->count = 1;
645
646 if (pci_resource_len(pdev, 2)) {
647 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
648 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
649 aper->count++;
650 }
651
652 if (pci_resource_len(pdev, 3)) {
653 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
654 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
655 aper->count++;
656 }
657
658#ifdef CONFIG_X86
659 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
660#endif
661 if (nouveau_modeset != 2)
662 drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot);
663 kfree(aper);
664
665 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
666 true, true, ~0ULL, &device);
667 if (ret)
668 return ret;
669
670 pci_set_master(pdev);
671
672 if (nouveau_atomic)
673 driver_pci.driver_features |= DRIVER_ATOMIC;
674
675 drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev);
676 if (IS_ERR(drm_dev)) {
677 ret = PTR_ERR(drm_dev);
678 goto fail_nvkm;
679 }
680
681 ret = pci_enable_device(pdev);
682 if (ret)
683 goto fail_drm;
684
685 drm_dev->pdev = pdev;
686 pci_set_drvdata(pdev, drm_dev);
687
688 ret = nouveau_drm_device_init(drm_dev);
689 if (ret)
690 goto fail_pci;
691
692 ret = drm_dev_register(drm_dev, pent->driver_data);
693 if (ret)
694 goto fail_drm_dev_init;
695
696 return 0;
697
698fail_drm_dev_init:
699 nouveau_drm_device_fini(drm_dev);
700fail_pci:
701 pci_disable_device(pdev);
702fail_drm:
703 drm_dev_put(drm_dev);
704fail_nvkm:
705 nvkm_device_del(&device);
706 return ret;
707}
708
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +0900709void
710nouveau_drm_device_remove(struct drm_device *dev)
Ben Skeggs94580292012-07-06 12:14:00 +1000711{
Lyude Paulcfea88a2018-08-22 21:40:07 -0400712 struct pci_dev *pdev = dev->pdev;
Ben Skeggs77145f12012-07-31 16:16:21 +1000713 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggsbe83cd42015-01-14 15:36:34 +1000714 struct nvkm_client *client;
Ben Skeggs76ecea52015-08-20 14:54:15 +1000715 struct nvkm_device *device;
Ben Skeggs77145f12012-07-31 16:16:21 +1000716
Lyude Paulcfea88a2018-08-22 21:40:07 -0400717 drm_dev_unregister(dev);
718
Ilia Mirkin7d3428c2014-01-29 19:53:00 -0500719 dev->irq_enabled = false;
Ben Skeggs989aa5b2015-01-12 12:33:37 +1000720 client = nvxx_client(&drm->client.base);
Ben Skeggs4e7e62d2015-08-20 14:54:15 +1000721 device = nvkm_device_find(client->device);
Ben Skeggs77145f12012-07-31 16:16:21 +1000722
Lyude Paulcfea88a2018-08-22 21:40:07 -0400723 nouveau_drm_device_fini(dev);
724 pci_disable_device(pdev);
725 drm_dev_put(dev);
Ben Skeggse781dc82015-08-20 14:54:15 +1000726 nvkm_device_del(&device);
Ben Skeggs94580292012-07-06 12:14:00 +1000727}
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +0900728
729static void
730nouveau_drm_remove(struct pci_dev *pdev)
731{
732 struct drm_device *dev = pci_get_drvdata(pdev);
733
734 nouveau_drm_device_remove(dev);
735}
Ben Skeggs94580292012-07-06 12:14:00 +1000736
Marcin Slusarzcd897832013-01-27 15:01:55 +0100737static int
Dave Airlie05c63c22014-03-26 14:10:06 +1000738nouveau_do_suspend(struct drm_device *dev, bool runtime)
Ben Skeggs94580292012-07-06 12:14:00 +1000739{
Ben Skeggs77145f12012-07-31 16:16:21 +1000740 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000741 int ret;
742
Ben Skeggseeaf06ac2018-07-05 12:57:12 +1000743 nouveau_svm_suspend(drm);
Martin Peres8d021d72016-08-25 03:57:07 +0300744 nouveau_led_suspend(dev);
745
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000746 if (dev->mode_config.num_crtc) {
Ben Skeggs2d38a532017-08-14 08:40:55 +1000747 NV_DEBUG(drm, "suspending console...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000748 nouveau_fbcon_set_suspend(dev, 1);
Ben Skeggs2d38a532017-08-14 08:40:55 +1000749 NV_DEBUG(drm, "suspending display...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000750 ret = nouveau_display_suspend(dev, runtime);
Ben Skeggs94307382012-10-31 12:11:15 +1000751 if (ret)
752 return ret;
753 }
Ben Skeggs94580292012-07-06 12:14:00 +1000754
Ben Skeggs2d38a532017-08-14 08:40:55 +1000755 NV_DEBUG(drm, "evicting buffers...\n");
Ben Skeggsebb945a2012-07-20 08:17:34 +1000756 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
757
Ben Skeggs2d38a532017-08-14 08:40:55 +1000758 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
Ben Skeggs81dff212013-05-07 08:33:10 +1000759 if (drm->cechan) {
760 ret = nouveau_channel_idle(drm->cechan);
761 if (ret)
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500762 goto fail_display;
Ben Skeggs81dff212013-05-07 08:33:10 +1000763 }
764
765 if (drm->channel) {
766 ret = nouveau_channel_idle(drm->channel);
767 if (ret)
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500768 goto fail_display;
Ben Skeggs81dff212013-05-07 08:33:10 +1000769 }
770
Ben Skeggs2d38a532017-08-14 08:40:55 +1000771 NV_DEBUG(drm, "suspending fence...\n");
Ben Skeggsebb945a2012-07-20 08:17:34 +1000772 if (drm->fence && nouveau_fence(drm)->suspend) {
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500773 if (!nouveau_fence(drm)->suspend(drm)) {
774 ret = -ENOMEM;
775 goto fail_display;
776 }
Ben Skeggsebb945a2012-07-20 08:17:34 +1000777 }
778
Ben Skeggs2d38a532017-08-14 08:40:55 +1000779 NV_DEBUG(drm, "suspending object tree...\n");
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000780 ret = nvif_client_suspend(&drm->master.base);
Ben Skeggs94580292012-07-06 12:14:00 +1000781 if (ret)
782 goto fail_client;
783
Ben Skeggs94580292012-07-06 12:14:00 +1000784 return 0;
785
786fail_client:
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500787 if (drm->fence && nouveau_fence(drm)->resume)
788 nouveau_fence(drm)->resume(drm);
789
790fail_display:
Ben Skeggs94307382012-10-31 12:11:15 +1000791 if (dev->mode_config.num_crtc) {
Ben Skeggs2d38a532017-08-14 08:40:55 +1000792 NV_DEBUG(drm, "resuming display...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000793 nouveau_display_resume(dev, runtime);
Ben Skeggs94307382012-10-31 12:11:15 +1000794 }
Ben Skeggs94580292012-07-06 12:14:00 +1000795 return ret;
796}
797
Marcin Slusarzcd897832013-01-27 15:01:55 +0100798static int
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000799nouveau_do_resume(struct drm_device *dev, bool runtime)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000800{
801 struct nouveau_drm *drm = nouveau_drm(dev);
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000802
Ben Skeggs2d38a532017-08-14 08:40:55 +1000803 NV_DEBUG(drm, "resuming object tree...\n");
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000804 nvif_client_resume(&drm->master.base);
Ben Skeggs94580292012-07-06 12:14:00 +1000805
Ben Skeggs2d38a532017-08-14 08:40:55 +1000806 NV_DEBUG(drm, "resuming fence...\n");
Ben Skeggs81dff212013-05-07 08:33:10 +1000807 if (drm->fence && nouveau_fence(drm)->resume)
808 nouveau_fence(drm)->resume(drm);
809
Ben Skeggs77145f12012-07-31 16:16:21 +1000810 nouveau_run_vbios_init(dev);
Ben Skeggs77145f12012-07-31 16:16:21 +1000811
Ben Skeggs94307382012-10-31 12:11:15 +1000812 if (dev->mode_config.num_crtc) {
Ben Skeggs2d38a532017-08-14 08:40:55 +1000813 NV_DEBUG(drm, "resuming display...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000814 nouveau_display_resume(dev, runtime);
Ben Skeggs2d38a532017-08-14 08:40:55 +1000815 NV_DEBUG(drm, "resuming console...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000816 nouveau_fbcon_set_suspend(dev, 0);
Ben Skeggs94307382012-10-31 12:11:15 +1000817 }
Dave Airlie5addcf02012-09-10 14:20:51 +1000818
Martin Peres8d021d72016-08-25 03:57:07 +0300819 nouveau_led_resume(dev);
Ben Skeggseeaf06ac2018-07-05 12:57:12 +1000820 nouveau_svm_resume(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000821 return 0;
Ben Skeggs94580292012-07-06 12:14:00 +1000822}
823
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000824int
825nouveau_pmops_suspend(struct device *dev)
826{
827 struct pci_dev *pdev = to_pci_dev(dev);
828 struct drm_device *drm_dev = pci_get_drvdata(pdev);
829 int ret;
830
831 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
832 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
833 return 0;
834
835 ret = nouveau_do_suspend(drm_dev, false);
836 if (ret)
837 return ret;
838
839 pci_save_state(pdev);
840 pci_disable_device(pdev);
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000841 pci_set_power_state(pdev, PCI_D3hot);
Lukas Wunnerc5fd9362015-04-19 17:18:01 +0200842 udelay(200);
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000843 return 0;
844}
845
846int
847nouveau_pmops_resume(struct device *dev)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000848{
849 struct pci_dev *pdev = to_pci_dev(dev);
850 struct drm_device *drm_dev = pci_get_drvdata(pdev);
851 int ret;
852
Dave Airlie5addcf02012-09-10 14:20:51 +1000853 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
854 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000855 return 0;
856
857 pci_set_power_state(pdev, PCI_D0);
858 pci_restore_state(pdev);
859 ret = pci_enable_device(pdev);
860 if (ret)
861 return ret;
862 pci_set_master(pdev);
863
Hans de Goede0b2fe652016-11-21 17:50:55 +0100864 ret = nouveau_do_resume(drm_dev, false);
865
866 /* Monitors may have been connected / disconnected during suspend */
867 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
868
869 return ret;
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000870}
871
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000872static int
873nouveau_pmops_freeze(struct device *dev)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000874{
875 struct pci_dev *pdev = to_pci_dev(dev);
876 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000877 return nouveau_do_suspend(drm_dev, false);
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000878}
879
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000880static int
881nouveau_pmops_thaw(struct device *dev)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000882{
883 struct pci_dev *pdev = to_pci_dev(dev);
884 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000885 return nouveau_do_resume(drm_dev, false);
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000886}
887
Ben Skeggs321f5c52017-06-02 14:38:07 +1000888bool
Arnd Bergmann54994732017-06-09 12:38:33 +0200889nouveau_pmops_runtime(void)
Ben Skeggs321f5c52017-06-02 14:38:07 +1000890{
891 if (nouveau_runtime_pm == -1)
892 return nouveau_is_optimus() || nouveau_is_v1_dsm();
893 return nouveau_runtime_pm == 1;
894}
895
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000896static int
897nouveau_pmops_runtime_suspend(struct device *dev)
898{
899 struct pci_dev *pdev = to_pci_dev(dev);
900 struct drm_device *drm_dev = pci_get_drvdata(pdev);
901 int ret;
902
Ben Skeggs321f5c52017-06-02 14:38:07 +1000903 if (!nouveau_pmops_runtime()) {
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000904 pm_runtime_forbid(dev);
905 return -EBUSY;
906 }
907
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000908 nouveau_switcheroo_optimus_dsm();
909 ret = nouveau_do_suspend(drm_dev, true);
910 pci_save_state(pdev);
911 pci_disable_device(pdev);
Dave Airlie8c863942014-12-08 10:33:52 +1000912 pci_ignore_hotplug(pdev);
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000913 pci_set_power_state(pdev, PCI_D3cold);
914 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
915 return ret;
916}
917
918static int
919nouveau_pmops_runtime_resume(struct device *dev)
920{
921 struct pci_dev *pdev = to_pci_dev(dev);
922 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000923 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000924 int ret;
925
Ben Skeggs321f5c52017-06-02 14:38:07 +1000926 if (!nouveau_pmops_runtime()) {
927 pm_runtime_forbid(dev);
928 return -EBUSY;
929 }
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000930
931 pci_set_power_state(pdev, PCI_D0);
932 pci_restore_state(pdev);
933 ret = pci_enable_device(pdev);
934 if (ret)
935 return ret;
936 pci_set_master(pdev);
937
938 ret = nouveau_do_resume(drm_dev, true);
Lyude Paulcae9ff02017-01-11 21:25:23 -0500939
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000940 /* do magic */
Ben Skeggsa01ca782015-08-20 14:54:15 +1000941 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000942 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
Hans de Goede0b2fe652016-11-21 17:50:55 +0100943
944 /* Monitors may have been connected / disconnected during suspend */
945 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
946
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000947 return ret;
948}
949
950static int
951nouveau_pmops_runtime_idle(struct device *dev)
952{
Ben Skeggs321f5c52017-06-02 14:38:07 +1000953 if (!nouveau_pmops_runtime()) {
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000954 pm_runtime_forbid(dev);
955 return -EBUSY;
956 }
957
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000958 pm_runtime_mark_last_busy(dev);
959 pm_runtime_autosuspend(dev);
960 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
961 return 1;
962}
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000963
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200964static int
Ben Skeggsebb945a2012-07-20 08:17:34 +1000965nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
966{
Ben Skeggsebb945a2012-07-20 08:17:34 +1000967 struct nouveau_drm *drm = nouveau_drm(dev);
968 struct nouveau_cli *cli;
Marcin Slusarza2896ce2012-12-09 15:45:21 +0100969 char name[32], tmpname[TASK_COMM_LEN];
Ben Skeggsebb945a2012-07-20 08:17:34 +1000970 int ret;
971
Dave Airlie5addcf02012-09-10 14:20:51 +1000972 /* need to bring up power immediately if opening device */
973 ret = pm_runtime_get_sync(dev->dev);
Alexandre Courbotb6c42852014-02-12 14:00:59 +0900974 if (ret < 0 && ret != -EACCES)
Dave Airlie5addcf02012-09-10 14:20:51 +1000975 return ret;
976
Marcin Slusarza2896ce2012-12-09 15:45:21 +0100977 get_task_comm(tmpname, current);
978 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
Ben Skeggsfa6df8c2012-09-12 13:09:23 +1000979
Lyude Paul922a8c82018-07-12 13:02:52 -0400980 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) {
981 ret = -ENOMEM;
982 goto done;
983 }
Alexandre Courbot420b9462014-02-17 15:17:26 +0900984
Ben Skeggs20d8a882016-05-18 13:36:34 +1000985 ret = nouveau_cli_init(drm, name, cli);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000986 if (ret)
Ben Skeggs20d8a882016-05-18 13:36:34 +1000987 goto done;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000988
Ben Skeggs0ad72862014-08-10 04:10:22 +1000989 cli->base.super = false;
990
Ben Skeggsebb945a2012-07-20 08:17:34 +1000991 fpriv->driver_priv = cli;
992
993 mutex_lock(&drm->client.mutex);
994 list_add(&cli->head, &drm->clients);
995 mutex_unlock(&drm->client.mutex);
Dave Airlie5addcf02012-09-10 14:20:51 +1000996
Ben Skeggs20d8a882016-05-18 13:36:34 +1000997done:
998 if (ret && cli) {
999 nouveau_cli_fini(cli);
1000 kfree(cli);
1001 }
1002
Dave Airlie5addcf02012-09-10 14:20:51 +10001003 pm_runtime_mark_last_busy(dev->dev);
1004 pm_runtime_put_autosuspend(dev->dev);
Dave Airlie5addcf02012-09-10 14:20:51 +10001005 return ret;
Ben Skeggsebb945a2012-07-20 08:17:34 +10001006}
1007
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +02001008static void
Daniel Vetterf0e73ff2017-05-08 10:26:30 +02001009nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
Ben Skeggsebb945a2012-07-20 08:17:34 +10001010{
1011 struct nouveau_cli *cli = nouveau_cli(fpriv);
1012 struct nouveau_drm *drm = nouveau_drm(dev);
1013
Dave Airlie5addcf02012-09-10 14:20:51 +10001014 pm_runtime_get_sync(dev->dev);
1015
Kamil Dudkaac8c7932015-07-15 17:18:15 +02001016 mutex_lock(&cli->mutex);
Ben Skeggsebb945a2012-07-20 08:17:34 +10001017 if (cli->abi16)
1018 nouveau_abi16_fini(cli->abi16);
Kamil Dudkaac8c7932015-07-15 17:18:15 +02001019 mutex_unlock(&cli->mutex);
Ben Skeggsebb945a2012-07-20 08:17:34 +10001020
1021 mutex_lock(&drm->client.mutex);
1022 list_del(&cli->head);
1023 mutex_unlock(&drm->client.mutex);
Dave Airlie5addcf02012-09-10 14:20:51 +10001024
Ben Skeggs20d8a882016-05-18 13:36:34 +10001025 nouveau_cli_fini(cli);
1026 kfree(cli);
Dave Airlie5addcf02012-09-10 14:20:51 +10001027 pm_runtime_mark_last_busy(dev->dev);
1028 pm_runtime_put_autosuspend(dev->dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +10001029}
1030
Rob Clarkbaa70942013-08-02 13:27:49 -04001031static const struct drm_ioctl_desc
Ben Skeggs77145f12012-07-31 16:16:21 +10001032nouveau_ioctls[] = {
Daniel Vetterf8c47142015-09-08 13:56:30 +02001033 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
1034 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1035 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
1036 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
1037 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
1038 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
1039 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
Ben Skeggseeaf06ac2018-07-05 12:57:12 +10001040 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT, nouveau_svmm_init, DRM_AUTH|DRM_RENDER_ALLOW),
Daniel Vetterf8c47142015-09-08 13:56:30 +02001041 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
1042 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
1043 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
1044 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
1045 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
Ben Skeggs77145f12012-07-31 16:16:21 +10001046};
1047
Ben Skeggs27111a22014-08-10 04:10:31 +10001048long
1049nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
Dave Airlie5addcf02012-09-10 14:20:51 +10001050{
Ben Skeggs27111a22014-08-10 04:10:31 +10001051 struct drm_file *filp = file->private_data;
1052 struct drm_device *dev = filp->minor->dev;
Dave Airlie5addcf02012-09-10 14:20:51 +10001053 long ret;
Dave Airlie5addcf02012-09-10 14:20:51 +10001054
1055 ret = pm_runtime_get_sync(dev->dev);
Alexandre Courbotb6c42852014-02-12 14:00:59 +09001056 if (ret < 0 && ret != -EACCES)
Dave Airlie5addcf02012-09-10 14:20:51 +10001057 return ret;
1058
Ben Skeggs27111a22014-08-10 04:10:31 +10001059 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
1060 case DRM_NOUVEAU_NVIF:
1061 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
1062 break;
1063 default:
1064 ret = drm_ioctl(file, cmd, arg);
1065 break;
1066 }
Dave Airlie5addcf02012-09-10 14:20:51 +10001067
1068 pm_runtime_mark_last_busy(dev->dev);
1069 pm_runtime_put_autosuspend(dev->dev);
1070 return ret;
1071}
Ben Skeggs27111a22014-08-10 04:10:31 +10001072
Ben Skeggs77145f12012-07-31 16:16:21 +10001073static const struct file_operations
1074nouveau_driver_fops = {
1075 .owner = THIS_MODULE,
1076 .open = drm_open,
1077 .release = drm_release,
Dave Airlie5addcf02012-09-10 14:20:51 +10001078 .unlocked_ioctl = nouveau_drm_ioctl,
Ben Skeggs77145f12012-07-31 16:16:21 +10001079 .mmap = nouveau_ttm_mmap,
1080 .poll = drm_poll,
Ben Skeggs77145f12012-07-31 16:16:21 +10001081 .read = drm_read,
1082#if defined(CONFIG_COMPAT)
1083 .compat_ioctl = nouveau_compat_ioctl,
1084#endif
1085 .llseek = noop_llseek,
1086};
1087
1088static struct drm_driver
David Herrmann915b4d12014-08-29 12:12:43 +02001089driver_stub = {
Ben Skeggs77145f12012-07-31 16:16:21 +10001090 .driver_features =
Peter Antoine0e975982015-06-23 08:18:49 +01001091 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
1092 DRIVER_KMS_LEGACY_CONTEXT,
Ben Skeggs77145f12012-07-31 16:16:21 +10001093
Ben Skeggs77145f12012-07-31 16:16:21 +10001094 .open = nouveau_drm_open,
Ben Skeggs77145f12012-07-31 16:16:21 +10001095 .postclose = nouveau_drm_postclose,
1096 .lastclose = nouveau_vga_lastclose,
1097
Marcin Slusarz33b903e2013-02-08 21:42:13 +01001098#if defined(CONFIG_DEBUG_FS)
Karol Herbst56c101a2015-07-31 00:35:42 +02001099 .debugfs_init = nouveau_drm_debugfs_init,
Marcin Slusarz33b903e2013-02-08 21:42:13 +01001100#endif
1101
Ben Skeggs51cb4b32013-10-03 07:02:29 +10001102 .enable_vblank = nouveau_display_vblank_enable,
1103 .disable_vblank = nouveau_display_vblank_disable,
Ben Skeggsd83ef852013-11-14 13:37:49 +10001104 .get_scanout_position = nouveau_display_scanoutpos,
Daniel Vetter1bf6ad62017-05-09 16:03:28 +02001105 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos,
Ben Skeggs77145f12012-07-31 16:16:21 +10001106
1107 .ioctls = nouveau_ioctls,
Rob Clarkbaa70942013-08-02 13:27:49 -04001108 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
Ben Skeggs77145f12012-07-31 16:16:21 +10001109 .fops = &nouveau_driver_fops,
1110
1111 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1112 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
Aaron Plattnerab9ccb92013-01-15 20:47:43 +00001113 .gem_prime_export = drm_gem_prime_export,
1114 .gem_prime_import = drm_gem_prime_import,
1115 .gem_prime_pin = nouveau_gem_prime_pin,
Maarten Lankhorst3aac4502014-07-01 12:57:26 +02001116 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
Maarten Lankhorst1af7c7d2013-06-27 13:38:19 +02001117 .gem_prime_unpin = nouveau_gem_prime_unpin,
Aaron Plattnerab9ccb92013-01-15 20:47:43 +00001118 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
1119 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1120 .gem_prime_vmap = nouveau_gem_prime_vmap,
1121 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
Ben Skeggs77145f12012-07-31 16:16:21 +10001122
Daniel Vettera51e6ac2016-05-30 19:53:00 +02001123 .gem_free_object_unlocked = nouveau_gem_object_del,
Ben Skeggs77145f12012-07-31 16:16:21 +10001124 .gem_open_object = nouveau_gem_object_open,
1125 .gem_close_object = nouveau_gem_object_close,
1126
1127 .dumb_create = nouveau_display_dumb_create,
1128 .dumb_map_offset = nouveau_display_dumb_map_offset,
Ben Skeggs77145f12012-07-31 16:16:21 +10001129
1130 .name = DRIVER_NAME,
1131 .desc = DRIVER_DESC,
1132#ifdef GIT_REVISION
1133 .date = GIT_REVISION,
1134#else
1135 .date = DRIVER_DATE,
1136#endif
1137 .major = DRIVER_MAJOR,
1138 .minor = DRIVER_MINOR,
1139 .patchlevel = DRIVER_PATCHLEVEL,
1140};
1141
Ben Skeggs94580292012-07-06 12:14:00 +10001142static struct pci_device_id
1143nouveau_drm_pci_table[] = {
1144 {
1145 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1146 .class = PCI_BASE_CLASS_DISPLAY << 16,
1147 .class_mask = 0xff << 16,
1148 },
1149 {
1150 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1151 .class = PCI_BASE_CLASS_DISPLAY << 16,
1152 .class_mask = 0xff << 16,
1153 },
1154 {}
1155};
1156
Pierre Moreau703fa262014-08-18 22:43:24 +02001157static void nouveau_display_options(void)
1158{
1159 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1160
1161 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1162 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1163 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1164 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1165 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1166 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1167 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1168 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1169 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1170 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
Ben Skeggsf3a8b662016-11-04 11:44:21 +10001171 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz);
Pierre Moreau703fa262014-08-18 22:43:24 +02001172}
1173
Dave Airlie2d8b9cc2012-11-02 11:04:28 +10001174static const struct dev_pm_ops nouveau_pm_ops = {
1175 .suspend = nouveau_pmops_suspend,
1176 .resume = nouveau_pmops_resume,
1177 .freeze = nouveau_pmops_freeze,
1178 .thaw = nouveau_pmops_thaw,
1179 .poweroff = nouveau_pmops_freeze,
1180 .restore = nouveau_pmops_resume,
Dave Airlie5addcf02012-09-10 14:20:51 +10001181 .runtime_suspend = nouveau_pmops_runtime_suspend,
1182 .runtime_resume = nouveau_pmops_runtime_resume,
1183 .runtime_idle = nouveau_pmops_runtime_idle,
Dave Airlie2d8b9cc2012-11-02 11:04:28 +10001184};
1185
Ben Skeggs94580292012-07-06 12:14:00 +10001186static struct pci_driver
1187nouveau_drm_pci_driver = {
1188 .name = "nouveau",
1189 .id_table = nouveau_drm_pci_table,
1190 .probe = nouveau_drm_probe,
1191 .remove = nouveau_drm_remove,
Dave Airlie2d8b9cc2012-11-02 11:04:28 +10001192 .driver.pm = &nouveau_pm_ops,
Ben Skeggs94580292012-07-06 12:14:00 +10001193};
1194
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001195struct drm_device *
Alexandre Courbote396ecd2015-09-04 19:59:31 +09001196nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1197 struct platform_device *pdev,
Ben Skeggs47b25052015-08-20 14:54:15 +10001198 struct nvkm_device **pdevice)
Alexandre Courbot420b9462014-02-17 15:17:26 +09001199{
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001200 struct drm_device *drm;
1201 int err;
Alexandre Courbot420b9462014-02-17 15:17:26 +09001202
Alexandre Courbote396ecd2015-09-04 19:59:31 +09001203 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
Ben Skeggs7974dd12015-08-20 14:54:17 +10001204 true, true, ~0ULL, pdevice);
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001205 if (err)
Ben Skeggse781dc82015-08-20 14:54:15 +10001206 goto err_free;
Alexandre Courbot420b9462014-02-17 15:17:26 +09001207
David Herrmann915b4d12014-08-29 12:12:43 +02001208 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
Tom Gundersen0f288602016-09-21 16:59:19 +02001209 if (IS_ERR(drm)) {
1210 err = PTR_ERR(drm);
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001211 goto err_free;
Alexandre Courbot420b9462014-02-17 15:17:26 +09001212 }
1213
Thierry Reding4ac0a802018-11-23 13:11:51 +01001214 err = nouveau_drm_device_init(drm);
1215 if (err)
1216 goto err_put;
1217
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001218 platform_set_drvdata(pdev, drm);
1219
1220 return drm;
1221
Thierry Reding4ac0a802018-11-23 13:11:51 +01001222err_put:
1223 drm_dev_put(drm);
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001224err_free:
Ben Skeggse781dc82015-08-20 14:54:15 +10001225 nvkm_device_del(pdevice);
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001226
1227 return ERR_PTR(err);
Alexandre Courbot420b9462014-02-17 15:17:26 +09001228}
1229
Ben Skeggs94580292012-07-06 12:14:00 +10001230static int __init
1231nouveau_drm_init(void)
1232{
David Herrmann915b4d12014-08-29 12:12:43 +02001233 driver_pci = driver_stub;
David Herrmann915b4d12014-08-29 12:12:43 +02001234 driver_platform = driver_stub;
David Herrmann915b4d12014-08-29 12:12:43 +02001235
Pierre Moreau703fa262014-08-18 22:43:24 +02001236 nouveau_display_options();
1237
Ben Skeggs77145f12012-07-31 16:16:21 +10001238 if (nouveau_modeset == -1) {
Ben Skeggs77145f12012-07-31 16:16:21 +10001239 if (vgacon_text_force())
1240 nouveau_modeset = 0;
Ben Skeggs77145f12012-07-31 16:16:21 +10001241 }
1242
1243 if (!nouveau_modeset)
1244 return 0;
1245
Alexandre Courbot055a65d2015-01-15 15:29:56 +09001246#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1247 platform_driver_register(&nouveau_platform_driver);
1248#endif
1249
Ben Skeggs77145f12012-07-31 16:16:21 +10001250 nouveau_register_dsm_handler();
Pierre Moreaudb1a0ae22016-12-08 00:57:08 +01001251 nouveau_backlight_ctor();
Daniel Vetter10631d72017-05-24 16:51:40 +02001252
1253#ifdef CONFIG_PCI
1254 return pci_register_driver(&nouveau_drm_pci_driver);
1255#else
1256 return 0;
1257#endif
Ben Skeggs94580292012-07-06 12:14:00 +10001258}
1259
1260static void __exit
1261nouveau_drm_exit(void)
1262{
Ben Skeggs77145f12012-07-31 16:16:21 +10001263 if (!nouveau_modeset)
1264 return;
1265
Daniel Vetter10631d72017-05-24 16:51:40 +02001266#ifdef CONFIG_PCI
1267 pci_unregister_driver(&nouveau_drm_pci_driver);
1268#endif
Pierre Moreaudb1a0ae22016-12-08 00:57:08 +01001269 nouveau_backlight_dtor();
Ben Skeggs77145f12012-07-31 16:16:21 +10001270 nouveau_unregister_dsm_handler();
Alexandre Courbot055a65d2015-01-15 15:29:56 +09001271
1272#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1273 platform_driver_unregister(&nouveau_platform_driver);
1274#endif
Ben Skeggs94580292012-07-06 12:14:00 +10001275}
1276
1277module_init(nouveau_drm_init);
1278module_exit(nouveau_drm_exit);
1279
1280MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
Ben Skeggs77145f12012-07-31 16:16:21 +10001281MODULE_AUTHOR(DRIVER_AUTHOR);
1282MODULE_DESCRIPTION(DRIVER_DESC);
Ben Skeggs94580292012-07-06 12:14:00 +10001283MODULE_LICENSE("GPL and additional rights");