blob: 232c3f6bc35b50da1c111ad46fc38232251d7c97 [file] [log] [blame]
Ben Skeggs94580292012-07-06 12:14:00 +10001/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
Ben Skeggs77145f12012-07-31 16:16:21 +100025#include <linux/console.h>
Lukas Wunnerc5fd9362015-04-19 17:18:01 +020026#include <linux/delay.h>
Ben Skeggs94580292012-07-06 12:14:00 +100027#include <linux/module.h>
28#include <linux/pci.h>
Dave Airlie5addcf02012-09-10 14:20:51 +100029#include <linux/pm_runtime.h>
30#include <linux/vga_switcheroo.h>
Ben Skeggsfdb751e2014-08-10 04:10:23 +100031
Masahiro Yamadaae956212017-04-24 13:50:29 +090032#include <drm/drmP.h>
33#include <drm/drm_crtc_helper.h>
Ben Skeggsfdb751e2014-08-10 04:10:23 +100034
Ben Skeggsebb945a2012-07-20 08:17:34 +100035#include <core/gpuobj.h>
Ilia Mirkinc33e05a2014-02-13 21:35:14 -050036#include <core/option.h>
Ben Skeggs7974dd12015-08-20 14:54:17 +100037#include <core/pci.h>
38#include <core/tegra.h>
Ben Skeggs94580292012-07-06 12:14:00 +100039
Ben Skeggs04b88672016-05-22 20:35:16 +100040#include <nvif/driver.h>
Ben Skeggsa7cf0182018-05-08 20:39:46 +100041#include <nvif/fifo.h>
Ben Skeggs37e1c452018-05-08 20:39:48 +100042#include <nvif/user.h>
Ben Skeggs04b88672016-05-22 20:35:16 +100043
Ben Skeggs923bc412015-11-08 12:23:16 +100044#include <nvif/class.h>
Ben Skeggs845f2722015-11-08 12:16:40 +100045#include <nvif/cl0002.h>
Ben Skeggs8ed17302015-11-08 11:28:26 +100046#include <nvif/cla06f.h>
Ben Skeggs538b2692015-11-08 10:34:50 +100047#include <nvif/if0004.h>
48
Ben Skeggs4dc28132016-05-20 09:22:55 +100049#include "nouveau_drv.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100050#include "nouveau_dma.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100051#include "nouveau_ttm.h"
52#include "nouveau_gem.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100053#include "nouveau_vga.h"
Martin Peres8d021d72016-08-25 03:57:07 +030054#include "nouveau_led.h"
Ben Skeggsb9ed9192013-10-15 09:44:02 +100055#include "nouveau_hwmon.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100056#include "nouveau_acpi.h"
57#include "nouveau_bios.h"
58#include "nouveau_ioctl.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100059#include "nouveau_abi16.h"
60#include "nouveau_fbcon.h"
61#include "nouveau_fence.h"
Marcin Slusarz33b903e2013-02-08 21:42:13 +010062#include "nouveau_debugfs.h"
Ben Skeggs27111a22014-08-10 04:10:31 +100063#include "nouveau_usif.h"
Pierre Moreau703fa262014-08-18 22:43:24 +020064#include "nouveau_connector.h"
Alexandre Courbot055a65d2015-01-15 15:29:56 +090065#include "nouveau_platform.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100066
Ben Skeggs94580292012-07-06 12:14:00 +100067MODULE_PARM_DESC(config, "option string to pass to driver core");
68static char *nouveau_config;
69module_param_named(config, nouveau_config, charp, 0400);
70
71MODULE_PARM_DESC(debug, "debug string to pass to driver core");
72static char *nouveau_debug;
73module_param_named(debug, nouveau_debug, charp, 0400);
74
Ben Skeggsebb945a2012-07-20 08:17:34 +100075MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
76static int nouveau_noaccel = 0;
77module_param_named(noaccel, nouveau_noaccel, int, 0400);
78
Ben Skeggs94307382012-10-31 12:11:15 +100079MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
80 "0 = disabled, 1 = enabled, 2 = headless)");
81int nouveau_modeset = -1;
Ben Skeggs77145f12012-07-31 16:16:21 +100082module_param_named(modeset, nouveau_modeset, int, 0400);
83
Lyude Pauleb493fb2018-07-03 16:31:41 -040084MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)");
85static int nouveau_atomic = 0;
86module_param_named(atomic, nouveau_atomic, int, 0400);
87
Dave Airlie5addcf02012-09-10 14:20:51 +100088MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
Ben Skeggs321f5c52017-06-02 14:38:07 +100089static int nouveau_runtime_pm = -1;
Dave Airlie5addcf02012-09-10 14:20:51 +100090module_param_named(runpm, nouveau_runtime_pm, int, 0400);
91
David Herrmann915b4d12014-08-29 12:12:43 +020092static struct drm_driver driver_stub;
93static struct drm_driver driver_pci;
94static struct drm_driver driver_platform;
Ben Skeggs77145f12012-07-31 16:16:21 +100095
Ben Skeggs94580292012-07-06 12:14:00 +100096static u64
Alexandre Courbot420b9462014-02-17 15:17:26 +090097nouveau_pci_name(struct pci_dev *pdev)
Ben Skeggs94580292012-07-06 12:14:00 +100098{
99 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
100 name |= pdev->bus->number << 16;
101 name |= PCI_SLOT(pdev->devfn) << 8;
102 return name | PCI_FUNC(pdev->devfn);
103}
104
Alexandre Courbot420b9462014-02-17 15:17:26 +0900105static u64
106nouveau_platform_name(struct platform_device *platformdev)
107{
108 return platformdev->id;
109}
110
111static u64
112nouveau_name(struct drm_device *dev)
113{
114 if (dev->pdev)
115 return nouveau_pci_name(dev->pdev);
116 else
Laurent Pinchart76adb462016-12-18 00:01:19 +0200117 return nouveau_platform_name(to_platform_device(dev->dev));
Alexandre Courbot420b9462014-02-17 15:17:26 +0900118}
119
Ben Skeggs814a2322017-11-01 03:56:20 +1000120static inline bool
Ben Skeggs11e451e2018-05-08 20:39:47 +1000121nouveau_cli_work_ready(struct dma_fence *fence)
Ben Skeggs814a2322017-11-01 03:56:20 +1000122{
Ben Skeggs11e451e2018-05-08 20:39:47 +1000123 if (!dma_fence_is_signaled(fence))
124 return false;
Ben Skeggs814a2322017-11-01 03:56:20 +1000125 dma_fence_put(fence);
126 return true;
127}
128
129static void
Ben Skeggs11e451e2018-05-08 20:39:47 +1000130nouveau_cli_work(struct work_struct *w)
Ben Skeggs814a2322017-11-01 03:56:20 +1000131{
Ben Skeggs11e451e2018-05-08 20:39:47 +1000132 struct nouveau_cli *cli = container_of(w, typeof(*cli), work);
Ben Skeggs814a2322017-11-01 03:56:20 +1000133 struct nouveau_cli_work *work, *wtmp;
134 mutex_lock(&cli->lock);
135 list_for_each_entry_safe(work, wtmp, &cli->worker, head) {
Ben Skeggs11e451e2018-05-08 20:39:47 +1000136 if (!work->fence || nouveau_cli_work_ready(work->fence)) {
Ben Skeggs814a2322017-11-01 03:56:20 +1000137 list_del(&work->head);
138 work->func(work);
139 }
140 }
141 mutex_unlock(&cli->lock);
142}
143
144static void
145nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)
146{
147 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb);
148 schedule_work(&work->cli->work);
149}
150
151void
152nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
153 struct nouveau_cli_work *work)
154{
155 work->fence = dma_fence_get(fence);
156 work->cli = cli;
157 mutex_lock(&cli->lock);
158 list_add_tail(&work->head, &cli->worker);
Ben Skeggs814a2322017-11-01 03:56:20 +1000159 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
160 nouveau_cli_work_fence(fence, &work->cb);
Ben Skeggsb26a2312017-12-23 08:54:28 +1000161 mutex_unlock(&cli->lock);
Ben Skeggs814a2322017-11-01 03:56:20 +1000162}
163
164static void
Ben Skeggs20d8a882016-05-18 13:36:34 +1000165nouveau_cli_fini(struct nouveau_cli *cli)
Ben Skeggs94580292012-07-06 12:14:00 +1000166{
Ben Skeggs11e451e2018-05-08 20:39:47 +1000167 /* All our channels are dead now, which means all the fences they
168 * own are signalled, and all callback functions have been called.
169 *
170 * So, after flushing the workqueue, there should be nothing left.
171 */
172 flush_work(&cli->work);
173 WARN_ON(!list_empty(&cli->worker));
174
Ben Skeggs27111a22014-08-10 04:10:31 +1000175 usif_client_fini(cli);
Ben Skeggs24e83752017-11-01 03:56:19 +1000176 nouveau_vmm_fini(&cli->vmm);
Ben Skeggs01670a72017-11-01 03:56:19 +1000177 nvif_mmu_fini(&cli->mmu);
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000178 nvif_device_fini(&cli->device);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000179 mutex_lock(&cli->drm->master.lock);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000180 nvif_client_fini(&cli->base);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000181 mutex_unlock(&cli->drm->master.lock);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000182}
183
184static int
185nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
186 struct nouveau_cli *cli)
187{
Ben Skeggs01670a72017-11-01 03:56:19 +1000188 static const struct nvif_mclass
Ben Skeggs7f507622017-11-01 03:56:20 +1000189 mems[] = {
190 { NVIF_CLASS_MEM_GF100, -1 },
191 { NVIF_CLASS_MEM_NV50 , -1 },
192 { NVIF_CLASS_MEM_NV04 , -1 },
193 {}
194 };
195 static const struct nvif_mclass
Ben Skeggs01670a72017-11-01 03:56:19 +1000196 mmus[] = {
197 { NVIF_CLASS_MMU_GF100, -1 },
198 { NVIF_CLASS_MMU_NV50 , -1 },
199 { NVIF_CLASS_MMU_NV04 , -1 },
200 {}
201 };
Ben Skeggs96da0bc2017-11-01 03:56:20 +1000202 static const struct nvif_mclass
203 vmms[] = {
204 { NVIF_CLASS_VMM_GP100, -1 },
205 { NVIF_CLASS_VMM_GM200, -1 },
206 { NVIF_CLASS_VMM_GF100, -1 },
207 { NVIF_CLASS_VMM_NV50 , -1 },
208 { NVIF_CLASS_VMM_NV04 , -1 },
209 {}
210 };
Ben Skeggs20d8a882016-05-18 13:36:34 +1000211 u64 device = nouveau_name(drm->dev);
212 int ret;
213
214 snprintf(cli->name, sizeof(cli->name), "%s", sname);
Ben Skeggse75c0912017-11-01 03:56:19 +1000215 cli->drm = drm;
Ben Skeggs20d8a882016-05-18 13:36:34 +1000216 mutex_init(&cli->mutex);
217 usif_client_init(cli);
218
Ben Skeggs814a2322017-11-01 03:56:20 +1000219 INIT_WORK(&cli->work, nouveau_cli_work);
220 INIT_LIST_HEAD(&cli->worker);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000221 mutex_init(&cli->lock);
222
223 if (cli == &drm->master) {
Ben Skeggs80e60972016-05-23 11:25:17 +1000224 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
225 cli->name, device, &cli->base);
226 } else {
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000227 mutex_lock(&drm->master.lock);
228 ret = nvif_client_init(&drm->master.base, cli->name, device,
Ben Skeggs80e60972016-05-23 11:25:17 +1000229 &cli->base);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000230 mutex_unlock(&drm->master.lock);
Ben Skeggs80e60972016-05-23 11:25:17 +1000231 }
Ben Skeggs20d8a882016-05-18 13:36:34 +1000232 if (ret) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000233 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000234 goto done;
235 }
236
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000237 ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE,
238 &(struct nv_device_v0) {
239 .device = ~0,
240 }, sizeof(struct nv_device_v0),
241 &cli->device);
242 if (ret) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000243 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret);
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000244 goto done;
245 }
246
Ben Skeggs01670a72017-11-01 03:56:19 +1000247 ret = nvif_mclass(&cli->device.object, mmus);
248 if (ret < 0) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000249 NV_PRINTK(err, cli, "No supported MMU class\n");
Ben Skeggs01670a72017-11-01 03:56:19 +1000250 goto done;
251 }
252
253 ret = nvif_mmu_init(&cli->device.object, mmus[ret].oclass, &cli->mmu);
254 if (ret) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000255 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret);
Ben Skeggs01670a72017-11-01 03:56:19 +1000256 goto done;
257 }
258
Ben Skeggs96da0bc2017-11-01 03:56:20 +1000259 ret = nvif_mclass(&cli->mmu.object, vmms);
260 if (ret < 0) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000261 NV_PRINTK(err, cli, "No supported VMM class\n");
Ben Skeggs96da0bc2017-11-01 03:56:20 +1000262 goto done;
263 }
264
265 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
266 if (ret) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000267 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret);
Ben Skeggs96da0bc2017-11-01 03:56:20 +1000268 goto done;
269 }
270
Ben Skeggs7f507622017-11-01 03:56:20 +1000271 ret = nvif_mclass(&cli->mmu.object, mems);
272 if (ret < 0) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000273 NV_PRINTK(err, cli, "No supported MEM class\n");
Ben Skeggs7f507622017-11-01 03:56:20 +1000274 goto done;
275 }
276
277 cli->mem = &mems[ret];
Ben Skeggs7f507622017-11-01 03:56:20 +1000278 return 0;
Ben Skeggs20d8a882016-05-18 13:36:34 +1000279done:
280 if (ret)
281 nouveau_cli_fini(cli);
282 return ret;
Ben Skeggs94580292012-07-06 12:14:00 +1000283}
284
Ben Skeggsebb945a2012-07-20 08:17:34 +1000285static void
286nouveau_accel_fini(struct nouveau_drm *drm)
287{
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000288 nouveau_channel_idle(drm->channel);
Ben Skeggs0ad72862014-08-10 04:10:22 +1000289 nvif_object_fini(&drm->ntfy);
Ben Skeggsf027f492015-08-20 14:54:17 +1000290 nvkm_gpuobj_del(&drm->notify);
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000291 nvif_notify_fini(&drm->flip);
Ben Skeggs0ad72862014-08-10 04:10:22 +1000292 nvif_object_fini(&drm->nvsw);
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000293 nouveau_channel_del(&drm->channel);
294
295 nouveau_channel_idle(drm->cechan);
Ben Skeggs0ad72862014-08-10 04:10:22 +1000296 nvif_object_fini(&drm->ttm.copy);
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000297 nouveau_channel_del(&drm->cechan);
298
Ben Skeggsebb945a2012-07-20 08:17:34 +1000299 if (drm->fence)
300 nouveau_fence(drm)->dtor(drm);
301}
302
303static void
304nouveau_accel_init(struct nouveau_drm *drm)
305{
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000306 struct nvif_device *device = &drm->client.device;
Ben Skeggs41a63402015-08-20 14:54:16 +1000307 struct nvif_sclass *sclass;
Ben Skeggs49981042012-08-06 19:38:25 +1000308 u32 arg0, arg1;
Ben Skeggs41a63402015-08-20 14:54:16 +1000309 int ret, i, n;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000310
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000311 if (nouveau_noaccel)
Ben Skeggsebb945a2012-07-20 08:17:34 +1000312 return;
313
Ben Skeggseb47db42018-05-08 20:39:46 +1000314 ret = nouveau_channels_init(drm);
315 if (ret)
316 return;
317
Ben Skeggs37e1c452018-05-08 20:39:48 +1000318 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) {
319 ret = nvif_user_init(device);
320 if (ret)
321 return;
322 }
323
Ben Skeggsebb945a2012-07-20 08:17:34 +1000324 /* initialise synchronisation routines */
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000325 /*XXX: this is crap, but the fence/channel stuff is a little
326 * backwards in some places. this will be fixed.
327 */
Ben Skeggs41a63402015-08-20 14:54:16 +1000328 ret = n = nvif_object_sclass_get(&device->object, &sclass);
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000329 if (ret < 0)
330 return;
331
Ben Skeggs41a63402015-08-20 14:54:16 +1000332 for (ret = -ENOSYS, i = 0; i < n; i++) {
333 switch (sclass[i].oclass) {
Ben Skeggsbbf89062014-08-10 04:10:25 +1000334 case NV03_CHANNEL_DMA:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000335 ret = nv04_fence_create(drm);
336 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000337 case NV10_CHANNEL_DMA:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000338 ret = nv10_fence_create(drm);
339 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000340 case NV17_CHANNEL_DMA:
341 case NV40_CHANNEL_DMA:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000342 ret = nv17_fence_create(drm);
343 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000344 case NV50_CHANNEL_GPFIFO:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000345 ret = nv50_fence_create(drm);
346 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000347 case G82_CHANNEL_GPFIFO:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000348 ret = nv84_fence_create(drm);
349 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000350 case FERMI_CHANNEL_GPFIFO:
351 case KEPLER_CHANNEL_GPFIFO_A:
Ben Skeggs63f8c9b2016-03-11 13:09:28 +1000352 case KEPLER_CHANNEL_GPFIFO_B:
Ben Skeggsa1020af2015-04-14 11:47:24 +1000353 case MAXWELL_CHANNEL_GPFIFO_A:
Ben Skeggse8ff9792016-07-09 10:41:01 +1000354 case PASCAL_CHANNEL_GPFIFO_A:
Ben Skeggs37e1c452018-05-08 20:39:48 +1000355 case VOLTA_CHANNEL_GPFIFO_A:
Ben Skeggs641d0b32018-12-11 14:50:02 +1000356 case TURING_CHANNEL_GPFIFO_A:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000357 ret = nvc0_fence_create(drm);
358 break;
359 default:
360 break;
361 }
362 }
363
Ben Skeggs41a63402015-08-20 14:54:16 +1000364 nvif_object_sclass_put(&sclass);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000365 if (ret) {
366 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
367 nouveau_accel_fini(drm);
368 return;
369 }
370
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000371 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000372 ret = nouveau_channel_new(drm, &drm->client.device,
Ben Skeggsa7cf0182018-05-08 20:39:46 +1000373 nvif_fifo_runlist_ce(device), 0,
Ben Skeggs85532bd2018-12-11 14:50:02 +1000374 true, &drm->cechan);
Ben Skeggs49981042012-08-06 19:38:25 +1000375 if (ret)
376 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
377
Ben Skeggsa7cf0182018-05-08 20:39:46 +1000378 arg0 = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR);
Ben Skeggs49469802012-11-22 13:43:55 +1000379 arg1 = 1;
Ben Skeggs00fc6f62013-07-09 14:20:15 +1000380 } else
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000381 if (device->info.chipset >= 0xa3 &&
382 device->info.chipset != 0xaa &&
383 device->info.chipset != 0xac) {
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000384 ret = nouveau_channel_new(drm, &drm->client.device,
Ben Skeggs85532bd2018-12-11 14:50:02 +1000385 NvDmaFB, NvDmaTT, false,
386 &drm->cechan);
Ben Skeggs00fc6f62013-07-09 14:20:15 +1000387 if (ret)
388 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
389
390 arg0 = NvDmaFB;
391 arg1 = NvDmaTT;
Ben Skeggs49981042012-08-06 19:38:25 +1000392 } else {
393 arg0 = NvDmaFB;
394 arg1 = NvDmaTT;
395 }
396
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000397 ret = nouveau_channel_new(drm, &drm->client.device,
Ben Skeggs85532bd2018-12-11 14:50:02 +1000398 arg0, arg1, false, &drm->channel);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000399 if (ret) {
400 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
401 nouveau_accel_fini(drm);
402 return;
403 }
404
Ben Skeggs512fa0b2018-05-08 20:39:47 +1000405 if (device->info.family < NV_DEVICE_INFO_V0_TESLA) {
406 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
407 nouveau_abi16_swclass(drm), NULL, 0,
408 &drm->nvsw);
Ben Skeggs69a61462013-11-13 10:58:51 +1000409 if (ret == 0) {
Ben Skeggs512fa0b2018-05-08 20:39:47 +1000410 ret = RING_SPACE(drm->channel, 2);
411 if (ret == 0) {
Ben Skeggs69a61462013-11-13 10:58:51 +1000412 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
Ben Skeggs512fa0b2018-05-08 20:39:47 +1000413 OUT_RING (drm->channel, drm->nvsw.handle);
414 }
415
416 ret = nvif_notify_init(&drm->nvsw,
417 nouveau_flip_complete,
418 false, NV04_NVSW_NTFY_UEVENT,
419 NULL, 0, 0, &drm->flip);
420 if (ret == 0)
421 ret = nvif_notify_get(&drm->flip);
422 if (ret) {
423 nouveau_accel_fini(drm);
424 return;
Ben Skeggs69a61462013-11-13 10:58:51 +1000425 }
426 }
Ben Skeggs898a2b32015-08-20 14:54:18 +1000427
Ben Skeggs898a2b32015-08-20 14:54:18 +1000428 if (ret) {
Ben Skeggs512fa0b2018-05-08 20:39:47 +1000429 NV_ERROR(drm, "failed to allocate sw class, %d\n", ret);
Ben Skeggs898a2b32015-08-20 14:54:18 +1000430 nouveau_accel_fini(drm);
431 return;
432 }
Ben Skeggs69a61462013-11-13 10:58:51 +1000433 }
434
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000435 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000436 ret = nvkm_gpuobj_new(nvxx_device(&drm->client.device), 32, 0,
437 false, NULL, &drm->notify);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000438 if (ret) {
439 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
440 nouveau_accel_fini(drm);
441 return;
442 }
443
Ben Skeggsa01ca782015-08-20 14:54:15 +1000444 ret = nvif_object_init(&drm->channel->user, NvNotify0,
Ben Skeggs4acfd702014-08-10 04:10:24 +1000445 NV_DMA_IN_MEMORY,
446 &(struct nv_dma_v0) {
447 .target = NV_DMA_V0_TARGET_VRAM,
448 .access = NV_DMA_V0_ACCESS_RDWR,
Ben Skeggsebb945a2012-07-20 08:17:34 +1000449 .start = drm->notify->addr,
450 .limit = drm->notify->addr + 31
Ben Skeggs4acfd702014-08-10 04:10:24 +1000451 }, sizeof(struct nv_dma_v0),
Ben Skeggs0ad72862014-08-10 04:10:22 +1000452 &drm->ntfy);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000453 if (ret) {
454 nouveau_accel_fini(drm);
455 return;
456 }
457 }
458
459
Ben Skeggs49981042012-08-06 19:38:25 +1000460 nouveau_bo_move_init(drm);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000461}
462
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200463static int
Lyude Paulcfea88a2018-08-22 21:40:07 -0400464nouveau_drm_device_init(struct drm_device *dev)
Ben Skeggs94580292012-07-06 12:14:00 +1000465{
Ben Skeggs94580292012-07-06 12:14:00 +1000466 struct nouveau_drm *drm;
467 int ret;
468
Ben Skeggs20d8a882016-05-18 13:36:34 +1000469 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
470 return -ENOMEM;
471 dev->dev_private = drm;
472 drm->dev = dev;
473
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000474 ret = nouveau_cli_init(drm, "DRM-master", &drm->master);
475 if (ret)
Lyude Paulc4cee692018-08-22 21:40:06 -0400476 goto fail_alloc;
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000477
Ben Skeggs20d8a882016-05-18 13:36:34 +1000478 ret = nouveau_cli_init(drm, "DRM", &drm->client);
Ben Skeggs94580292012-07-06 12:14:00 +1000479 if (ret)
Lyude Paulc4cee692018-08-22 21:40:06 -0400480 goto fail_master;
Ben Skeggs94580292012-07-06 12:14:00 +1000481
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000482 dev->irq_enabled = true;
483
Ben Skeggs989aa5b2015-01-12 12:33:37 +1000484 nvxx_client(&drm->client.base)->debug =
Ben Skeggsbe83cd42015-01-14 15:36:34 +1000485 nvkm_dbgopt(nouveau_debug, "DRM");
Ben Skeggs77145f12012-07-31 16:16:21 +1000486
Ben Skeggs94580292012-07-06 12:14:00 +1000487 INIT_LIST_HEAD(&drm->clients);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000488 spin_lock_init(&drm->tile.lock);
Ben Skeggs94580292012-07-06 12:14:00 +1000489
Ben Skeggs77145f12012-07-31 16:16:21 +1000490 /* workaround an odd issue on nvc1 by disabling the device's
491 * nosnoop capability. hopefully won't cause issues until a
492 * better fix is found - assuming there is one...
493 */
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000494 if (drm->client.device.info.chipset == 0xc1)
495 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000496
Ben Skeggs77145f12012-07-31 16:16:21 +1000497 nouveau_vga_init(drm);
Ben Skeggscb75d972012-07-11 10:44:20 +1000498
Ben Skeggsebb945a2012-07-20 08:17:34 +1000499 ret = nouveau_ttm_init(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000500 if (ret)
Ben Skeggs77145f12012-07-31 16:16:21 +1000501 goto fail_ttm;
Ben Skeggs94580292012-07-06 12:14:00 +1000502
Ben Skeggs77145f12012-07-31 16:16:21 +1000503 ret = nouveau_bios_init(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000504 if (ret)
Ben Skeggs77145f12012-07-31 16:16:21 +1000505 goto fail_bios;
506
Ben Skeggs77145f12012-07-31 16:16:21 +1000507 ret = nouveau_display_create(dev);
508 if (ret)
509 goto fail_dispctor;
510
511 if (dev->mode_config.num_crtc) {
512 ret = nouveau_display_init(dev);
513 if (ret)
514 goto fail_dispinit;
515 }
516
Karol Herbstb126a202015-07-30 11:52:23 +0200517 nouveau_debugfs_init(drm);
Ben Skeggsb9ed9192013-10-15 09:44:02 +1000518 nouveau_hwmon_init(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000519 nouveau_accel_init(drm);
520 nouveau_fbcon_init(dev);
Martin Peres8d021d72016-08-25 03:57:07 +0300521 nouveau_led_init(dev);
Dave Airlie5addcf02012-09-10 14:20:51 +1000522
Ben Skeggs8fa43382017-06-02 14:49:45 +1000523 if (nouveau_pmops_runtime()) {
Dave Airlie5addcf02012-09-10 14:20:51 +1000524 pm_runtime_use_autosuspend(dev->dev);
525 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
526 pm_runtime_set_active(dev->dev);
527 pm_runtime_allow(dev->dev);
528 pm_runtime_mark_last_busy(dev->dev);
529 pm_runtime_put(dev->dev);
530 }
Lyude Paul7326ead2018-08-15 15:15:13 -0400531
Ben Skeggs94580292012-07-06 12:14:00 +1000532 return 0;
533
Ben Skeggs77145f12012-07-31 16:16:21 +1000534fail_dispinit:
535 nouveau_display_destroy(dev);
536fail_dispctor:
Ben Skeggs77145f12012-07-31 16:16:21 +1000537 nouveau_bios_takedown(dev);
538fail_bios:
Ben Skeggsebb945a2012-07-20 08:17:34 +1000539 nouveau_ttm_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000540fail_ttm:
Ben Skeggs77145f12012-07-31 16:16:21 +1000541 nouveau_vga_fini(drm);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000542 nouveau_cli_fini(&drm->client);
Lyude Paulc4cee692018-08-22 21:40:06 -0400543fail_master:
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000544 nouveau_cli_fini(&drm->master);
Lyude Paulc4cee692018-08-22 21:40:06 -0400545fail_alloc:
Ben Skeggs20d8a882016-05-18 13:36:34 +1000546 kfree(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000547 return ret;
548}
549
Gabriel Krisman Bertazi11b3c202017-01-06 15:57:31 -0200550static void
Lyude Paulcfea88a2018-08-22 21:40:07 -0400551nouveau_drm_device_fini(struct drm_device *dev)
Ben Skeggs94580292012-07-06 12:14:00 +1000552{
Ben Skeggs77145f12012-07-31 16:16:21 +1000553 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000554
Ben Skeggs8fa43382017-06-02 14:49:45 +1000555 if (nouveau_pmops_runtime()) {
Lukas Wunnerc1b16b42016-06-08 18:47:27 +0200556 pm_runtime_get_sync(dev->dev);
Lukas Wunner55c868a2016-06-08 18:47:27 +0200557 pm_runtime_forbid(dev->dev);
Lukas Wunnerc1b16b42016-06-08 18:47:27 +0200558 }
559
Martin Peres8d021d72016-08-25 03:57:07 +0300560 nouveau_led_fini(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000561 nouveau_fbcon_fini(dev);
562 nouveau_accel_fini(drm);
Ben Skeggsb9ed9192013-10-15 09:44:02 +1000563 nouveau_hwmon_fini(dev);
Karol Herbstb126a202015-07-30 11:52:23 +0200564 nouveau_debugfs_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000565
Ben Skeggs94307382012-10-31 12:11:15 +1000566 if (dev->mode_config.num_crtc)
Lyude Paul2f7ca782018-08-07 17:32:48 -0400567 nouveau_display_fini(dev, false, false);
Ben Skeggs77145f12012-07-31 16:16:21 +1000568 nouveau_display_destroy(dev);
569
Ben Skeggs77145f12012-07-31 16:16:21 +1000570 nouveau_bios_takedown(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000571
Ben Skeggsebb945a2012-07-20 08:17:34 +1000572 nouveau_ttm_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000573 nouveau_vga_fini(drm);
Ben Skeggscb75d972012-07-11 10:44:20 +1000574
Ben Skeggs20d8a882016-05-18 13:36:34 +1000575 nouveau_cli_fini(&drm->client);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000576 nouveau_cli_fini(&drm->master);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000577 kfree(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000578}
579
Lyude Paulcfea88a2018-08-22 21:40:07 -0400580static int nouveau_drm_probe(struct pci_dev *pdev,
581 const struct pci_device_id *pent)
582{
583 struct nvkm_device *device;
584 struct drm_device *drm_dev;
585 struct apertures_struct *aper;
586 bool boot = false;
587 int ret;
588
589 if (vga_switcheroo_client_probe_defer(pdev))
590 return -EPROBE_DEFER;
591
592 /* We need to check that the chipset is supported before booting
593 * fbdev off the hardware, as there's no way to put it back.
594 */
595 ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device);
596 if (ret)
597 return ret;
598
599 nvkm_device_del(&device);
600
601 /* Remove conflicting drivers (vesafb, efifb etc). */
602 aper = alloc_apertures(3);
603 if (!aper)
604 return -ENOMEM;
605
606 aper->ranges[0].base = pci_resource_start(pdev, 1);
607 aper->ranges[0].size = pci_resource_len(pdev, 1);
608 aper->count = 1;
609
610 if (pci_resource_len(pdev, 2)) {
611 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
612 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
613 aper->count++;
614 }
615
616 if (pci_resource_len(pdev, 3)) {
617 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
618 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
619 aper->count++;
620 }
621
622#ifdef CONFIG_X86
623 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
624#endif
625 if (nouveau_modeset != 2)
626 drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot);
627 kfree(aper);
628
629 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
630 true, true, ~0ULL, &device);
631 if (ret)
632 return ret;
633
634 pci_set_master(pdev);
635
636 if (nouveau_atomic)
637 driver_pci.driver_features |= DRIVER_ATOMIC;
638
639 drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev);
640 if (IS_ERR(drm_dev)) {
641 ret = PTR_ERR(drm_dev);
642 goto fail_nvkm;
643 }
644
645 ret = pci_enable_device(pdev);
646 if (ret)
647 goto fail_drm;
648
649 drm_dev->pdev = pdev;
650 pci_set_drvdata(pdev, drm_dev);
651
652 ret = nouveau_drm_device_init(drm_dev);
653 if (ret)
654 goto fail_pci;
655
656 ret = drm_dev_register(drm_dev, pent->driver_data);
657 if (ret)
658 goto fail_drm_dev_init;
659
660 return 0;
661
662fail_drm_dev_init:
663 nouveau_drm_device_fini(drm_dev);
664fail_pci:
665 pci_disable_device(pdev);
666fail_drm:
667 drm_dev_put(drm_dev);
668fail_nvkm:
669 nvkm_device_del(&device);
670 return ret;
671}
672
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +0900673void
674nouveau_drm_device_remove(struct drm_device *dev)
Ben Skeggs94580292012-07-06 12:14:00 +1000675{
Lyude Paulcfea88a2018-08-22 21:40:07 -0400676 struct pci_dev *pdev = dev->pdev;
Ben Skeggs77145f12012-07-31 16:16:21 +1000677 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggsbe83cd42015-01-14 15:36:34 +1000678 struct nvkm_client *client;
Ben Skeggs76ecea52015-08-20 14:54:15 +1000679 struct nvkm_device *device;
Ben Skeggs77145f12012-07-31 16:16:21 +1000680
Lyude Paulcfea88a2018-08-22 21:40:07 -0400681 drm_dev_unregister(dev);
682
Ilia Mirkin7d3428c2014-01-29 19:53:00 -0500683 dev->irq_enabled = false;
Ben Skeggs989aa5b2015-01-12 12:33:37 +1000684 client = nvxx_client(&drm->client.base);
Ben Skeggs4e7e62d2015-08-20 14:54:15 +1000685 device = nvkm_device_find(client->device);
Ben Skeggs77145f12012-07-31 16:16:21 +1000686
Lyude Paulcfea88a2018-08-22 21:40:07 -0400687 nouveau_drm_device_fini(dev);
688 pci_disable_device(pdev);
689 drm_dev_put(dev);
Ben Skeggse781dc82015-08-20 14:54:15 +1000690 nvkm_device_del(&device);
Ben Skeggs94580292012-07-06 12:14:00 +1000691}
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +0900692
693static void
694nouveau_drm_remove(struct pci_dev *pdev)
695{
696 struct drm_device *dev = pci_get_drvdata(pdev);
697
698 nouveau_drm_device_remove(dev);
699}
Ben Skeggs94580292012-07-06 12:14:00 +1000700
Marcin Slusarzcd897832013-01-27 15:01:55 +0100701static int
Dave Airlie05c63c22014-03-26 14:10:06 +1000702nouveau_do_suspend(struct drm_device *dev, bool runtime)
Ben Skeggs94580292012-07-06 12:14:00 +1000703{
Ben Skeggs77145f12012-07-31 16:16:21 +1000704 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000705 int ret;
706
Martin Peres8d021d72016-08-25 03:57:07 +0300707 nouveau_led_suspend(dev);
708
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000709 if (dev->mode_config.num_crtc) {
Ben Skeggs2d38a532017-08-14 08:40:55 +1000710 NV_DEBUG(drm, "suspending console...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000711 nouveau_fbcon_set_suspend(dev, 1);
Ben Skeggs2d38a532017-08-14 08:40:55 +1000712 NV_DEBUG(drm, "suspending display...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000713 ret = nouveau_display_suspend(dev, runtime);
Ben Skeggs94307382012-10-31 12:11:15 +1000714 if (ret)
715 return ret;
716 }
Ben Skeggs94580292012-07-06 12:14:00 +1000717
Ben Skeggs2d38a532017-08-14 08:40:55 +1000718 NV_DEBUG(drm, "evicting buffers...\n");
Ben Skeggsebb945a2012-07-20 08:17:34 +1000719 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
720
Ben Skeggs2d38a532017-08-14 08:40:55 +1000721 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
Ben Skeggs81dff212013-05-07 08:33:10 +1000722 if (drm->cechan) {
723 ret = nouveau_channel_idle(drm->cechan);
724 if (ret)
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500725 goto fail_display;
Ben Skeggs81dff212013-05-07 08:33:10 +1000726 }
727
728 if (drm->channel) {
729 ret = nouveau_channel_idle(drm->channel);
730 if (ret)
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500731 goto fail_display;
Ben Skeggs81dff212013-05-07 08:33:10 +1000732 }
733
Ben Skeggs2d38a532017-08-14 08:40:55 +1000734 NV_DEBUG(drm, "suspending fence...\n");
Ben Skeggsebb945a2012-07-20 08:17:34 +1000735 if (drm->fence && nouveau_fence(drm)->suspend) {
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500736 if (!nouveau_fence(drm)->suspend(drm)) {
737 ret = -ENOMEM;
738 goto fail_display;
739 }
Ben Skeggsebb945a2012-07-20 08:17:34 +1000740 }
741
Ben Skeggs2d38a532017-08-14 08:40:55 +1000742 NV_DEBUG(drm, "suspending object tree...\n");
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000743 ret = nvif_client_suspend(&drm->master.base);
Ben Skeggs94580292012-07-06 12:14:00 +1000744 if (ret)
745 goto fail_client;
746
Ben Skeggs94580292012-07-06 12:14:00 +1000747 return 0;
748
749fail_client:
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500750 if (drm->fence && nouveau_fence(drm)->resume)
751 nouveau_fence(drm)->resume(drm);
752
753fail_display:
Ben Skeggs94307382012-10-31 12:11:15 +1000754 if (dev->mode_config.num_crtc) {
Ben Skeggs2d38a532017-08-14 08:40:55 +1000755 NV_DEBUG(drm, "resuming display...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000756 nouveau_display_resume(dev, runtime);
Ben Skeggs94307382012-10-31 12:11:15 +1000757 }
Ben Skeggs94580292012-07-06 12:14:00 +1000758 return ret;
759}
760
Marcin Slusarzcd897832013-01-27 15:01:55 +0100761static int
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000762nouveau_do_resume(struct drm_device *dev, bool runtime)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000763{
764 struct nouveau_drm *drm = nouveau_drm(dev);
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000765
Ben Skeggs2d38a532017-08-14 08:40:55 +1000766 NV_DEBUG(drm, "resuming object tree...\n");
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000767 nvif_client_resume(&drm->master.base);
Ben Skeggs94580292012-07-06 12:14:00 +1000768
Ben Skeggs2d38a532017-08-14 08:40:55 +1000769 NV_DEBUG(drm, "resuming fence...\n");
Ben Skeggs81dff212013-05-07 08:33:10 +1000770 if (drm->fence && nouveau_fence(drm)->resume)
771 nouveau_fence(drm)->resume(drm);
772
Ben Skeggs77145f12012-07-31 16:16:21 +1000773 nouveau_run_vbios_init(dev);
Ben Skeggs77145f12012-07-31 16:16:21 +1000774
Ben Skeggs94307382012-10-31 12:11:15 +1000775 if (dev->mode_config.num_crtc) {
Ben Skeggs2d38a532017-08-14 08:40:55 +1000776 NV_DEBUG(drm, "resuming display...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000777 nouveau_display_resume(dev, runtime);
Ben Skeggs2d38a532017-08-14 08:40:55 +1000778 NV_DEBUG(drm, "resuming console...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000779 nouveau_fbcon_set_suspend(dev, 0);
Ben Skeggs94307382012-10-31 12:11:15 +1000780 }
Dave Airlie5addcf02012-09-10 14:20:51 +1000781
Martin Peres8d021d72016-08-25 03:57:07 +0300782 nouveau_led_resume(dev);
783
Ben Skeggs77145f12012-07-31 16:16:21 +1000784 return 0;
Ben Skeggs94580292012-07-06 12:14:00 +1000785}
786
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000787int
788nouveau_pmops_suspend(struct device *dev)
789{
790 struct pci_dev *pdev = to_pci_dev(dev);
791 struct drm_device *drm_dev = pci_get_drvdata(pdev);
792 int ret;
793
794 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
795 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
796 return 0;
797
798 ret = nouveau_do_suspend(drm_dev, false);
799 if (ret)
800 return ret;
801
802 pci_save_state(pdev);
803 pci_disable_device(pdev);
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000804 pci_set_power_state(pdev, PCI_D3hot);
Lukas Wunnerc5fd9362015-04-19 17:18:01 +0200805 udelay(200);
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000806 return 0;
807}
808
809int
810nouveau_pmops_resume(struct device *dev)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000811{
812 struct pci_dev *pdev = to_pci_dev(dev);
813 struct drm_device *drm_dev = pci_get_drvdata(pdev);
814 int ret;
815
Dave Airlie5addcf02012-09-10 14:20:51 +1000816 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
817 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000818 return 0;
819
820 pci_set_power_state(pdev, PCI_D0);
821 pci_restore_state(pdev);
822 ret = pci_enable_device(pdev);
823 if (ret)
824 return ret;
825 pci_set_master(pdev);
826
Hans de Goede0b2fe652016-11-21 17:50:55 +0100827 ret = nouveau_do_resume(drm_dev, false);
828
829 /* Monitors may have been connected / disconnected during suspend */
830 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
831
832 return ret;
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000833}
834
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000835static int
836nouveau_pmops_freeze(struct device *dev)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000837{
838 struct pci_dev *pdev = to_pci_dev(dev);
839 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000840 return nouveau_do_suspend(drm_dev, false);
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000841}
842
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000843static int
844nouveau_pmops_thaw(struct device *dev)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000845{
846 struct pci_dev *pdev = to_pci_dev(dev);
847 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000848 return nouveau_do_resume(drm_dev, false);
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000849}
850
Ben Skeggs321f5c52017-06-02 14:38:07 +1000851bool
Arnd Bergmann54994732017-06-09 12:38:33 +0200852nouveau_pmops_runtime(void)
Ben Skeggs321f5c52017-06-02 14:38:07 +1000853{
854 if (nouveau_runtime_pm == -1)
855 return nouveau_is_optimus() || nouveau_is_v1_dsm();
856 return nouveau_runtime_pm == 1;
857}
858
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000859static int
860nouveau_pmops_runtime_suspend(struct device *dev)
861{
862 struct pci_dev *pdev = to_pci_dev(dev);
863 struct drm_device *drm_dev = pci_get_drvdata(pdev);
864 int ret;
865
Ben Skeggs321f5c52017-06-02 14:38:07 +1000866 if (!nouveau_pmops_runtime()) {
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000867 pm_runtime_forbid(dev);
868 return -EBUSY;
869 }
870
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000871 nouveau_switcheroo_optimus_dsm();
872 ret = nouveau_do_suspend(drm_dev, true);
873 pci_save_state(pdev);
874 pci_disable_device(pdev);
Dave Airlie8c863942014-12-08 10:33:52 +1000875 pci_ignore_hotplug(pdev);
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000876 pci_set_power_state(pdev, PCI_D3cold);
877 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
878 return ret;
879}
880
881static int
882nouveau_pmops_runtime_resume(struct device *dev)
883{
884 struct pci_dev *pdev = to_pci_dev(dev);
885 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000886 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000887 int ret;
888
Ben Skeggs321f5c52017-06-02 14:38:07 +1000889 if (!nouveau_pmops_runtime()) {
890 pm_runtime_forbid(dev);
891 return -EBUSY;
892 }
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000893
894 pci_set_power_state(pdev, PCI_D0);
895 pci_restore_state(pdev);
896 ret = pci_enable_device(pdev);
897 if (ret)
898 return ret;
899 pci_set_master(pdev);
900
901 ret = nouveau_do_resume(drm_dev, true);
Lyude Paulcae9ff02017-01-11 21:25:23 -0500902
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000903 /* do magic */
Ben Skeggsa01ca782015-08-20 14:54:15 +1000904 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000905 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
Hans de Goede0b2fe652016-11-21 17:50:55 +0100906
907 /* Monitors may have been connected / disconnected during suspend */
908 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
909
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000910 return ret;
911}
912
913static int
914nouveau_pmops_runtime_idle(struct device *dev)
915{
Ben Skeggs321f5c52017-06-02 14:38:07 +1000916 if (!nouveau_pmops_runtime()) {
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000917 pm_runtime_forbid(dev);
918 return -EBUSY;
919 }
920
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000921 pm_runtime_mark_last_busy(dev);
922 pm_runtime_autosuspend(dev);
923 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
924 return 1;
925}
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000926
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200927static int
Ben Skeggsebb945a2012-07-20 08:17:34 +1000928nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
929{
Ben Skeggsebb945a2012-07-20 08:17:34 +1000930 struct nouveau_drm *drm = nouveau_drm(dev);
931 struct nouveau_cli *cli;
Marcin Slusarza2896ce2012-12-09 15:45:21 +0100932 char name[32], tmpname[TASK_COMM_LEN];
Ben Skeggsebb945a2012-07-20 08:17:34 +1000933 int ret;
934
Dave Airlie5addcf02012-09-10 14:20:51 +1000935 /* need to bring up power immediately if opening device */
936 ret = pm_runtime_get_sync(dev->dev);
Alexandre Courbotb6c42852014-02-12 14:00:59 +0900937 if (ret < 0 && ret != -EACCES)
Dave Airlie5addcf02012-09-10 14:20:51 +1000938 return ret;
939
Marcin Slusarza2896ce2012-12-09 15:45:21 +0100940 get_task_comm(tmpname, current);
941 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
Ben Skeggsfa6df8c2012-09-12 13:09:23 +1000942
Lyude Paul922a8c82018-07-12 13:02:52 -0400943 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) {
944 ret = -ENOMEM;
945 goto done;
946 }
Alexandre Courbot420b9462014-02-17 15:17:26 +0900947
Ben Skeggs20d8a882016-05-18 13:36:34 +1000948 ret = nouveau_cli_init(drm, name, cli);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000949 if (ret)
Ben Skeggs20d8a882016-05-18 13:36:34 +1000950 goto done;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000951
Ben Skeggs0ad72862014-08-10 04:10:22 +1000952 cli->base.super = false;
953
Ben Skeggsebb945a2012-07-20 08:17:34 +1000954 fpriv->driver_priv = cli;
955
956 mutex_lock(&drm->client.mutex);
957 list_add(&cli->head, &drm->clients);
958 mutex_unlock(&drm->client.mutex);
Dave Airlie5addcf02012-09-10 14:20:51 +1000959
Ben Skeggs20d8a882016-05-18 13:36:34 +1000960done:
961 if (ret && cli) {
962 nouveau_cli_fini(cli);
963 kfree(cli);
964 }
965
Dave Airlie5addcf02012-09-10 14:20:51 +1000966 pm_runtime_mark_last_busy(dev->dev);
967 pm_runtime_put_autosuspend(dev->dev);
Dave Airlie5addcf02012-09-10 14:20:51 +1000968 return ret;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000969}
970
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200971static void
Daniel Vetterf0e73ff2017-05-08 10:26:30 +0200972nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
Ben Skeggsebb945a2012-07-20 08:17:34 +1000973{
974 struct nouveau_cli *cli = nouveau_cli(fpriv);
975 struct nouveau_drm *drm = nouveau_drm(dev);
976
Dave Airlie5addcf02012-09-10 14:20:51 +1000977 pm_runtime_get_sync(dev->dev);
978
Kamil Dudkaac8c7932015-07-15 17:18:15 +0200979 mutex_lock(&cli->mutex);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000980 if (cli->abi16)
981 nouveau_abi16_fini(cli->abi16);
Kamil Dudkaac8c7932015-07-15 17:18:15 +0200982 mutex_unlock(&cli->mutex);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000983
984 mutex_lock(&drm->client.mutex);
985 list_del(&cli->head);
986 mutex_unlock(&drm->client.mutex);
Dave Airlie5addcf02012-09-10 14:20:51 +1000987
Ben Skeggs20d8a882016-05-18 13:36:34 +1000988 nouveau_cli_fini(cli);
989 kfree(cli);
Dave Airlie5addcf02012-09-10 14:20:51 +1000990 pm_runtime_mark_last_busy(dev->dev);
991 pm_runtime_put_autosuspend(dev->dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000992}
993
Rob Clarkbaa70942013-08-02 13:27:49 -0400994static const struct drm_ioctl_desc
Ben Skeggs77145f12012-07-31 16:16:21 +1000995nouveau_ioctls[] = {
Daniel Vetterf8c47142015-09-08 13:56:30 +0200996 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
997 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
998 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
999 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
1000 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
1001 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
1002 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
1003 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
1004 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
1005 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
1006 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
1007 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
Ben Skeggs77145f12012-07-31 16:16:21 +10001008};
1009
Ben Skeggs27111a22014-08-10 04:10:31 +10001010long
1011nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
Dave Airlie5addcf02012-09-10 14:20:51 +10001012{
Ben Skeggs27111a22014-08-10 04:10:31 +10001013 struct drm_file *filp = file->private_data;
1014 struct drm_device *dev = filp->minor->dev;
Dave Airlie5addcf02012-09-10 14:20:51 +10001015 long ret;
Dave Airlie5addcf02012-09-10 14:20:51 +10001016
1017 ret = pm_runtime_get_sync(dev->dev);
Alexandre Courbotb6c42852014-02-12 14:00:59 +09001018 if (ret < 0 && ret != -EACCES)
Dave Airlie5addcf02012-09-10 14:20:51 +10001019 return ret;
1020
Ben Skeggs27111a22014-08-10 04:10:31 +10001021 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
1022 case DRM_NOUVEAU_NVIF:
1023 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
1024 break;
1025 default:
1026 ret = drm_ioctl(file, cmd, arg);
1027 break;
1028 }
Dave Airlie5addcf02012-09-10 14:20:51 +10001029
1030 pm_runtime_mark_last_busy(dev->dev);
1031 pm_runtime_put_autosuspend(dev->dev);
1032 return ret;
1033}
Ben Skeggs27111a22014-08-10 04:10:31 +10001034
Ben Skeggs77145f12012-07-31 16:16:21 +10001035static const struct file_operations
1036nouveau_driver_fops = {
1037 .owner = THIS_MODULE,
1038 .open = drm_open,
1039 .release = drm_release,
Dave Airlie5addcf02012-09-10 14:20:51 +10001040 .unlocked_ioctl = nouveau_drm_ioctl,
Ben Skeggs77145f12012-07-31 16:16:21 +10001041 .mmap = nouveau_ttm_mmap,
1042 .poll = drm_poll,
Ben Skeggs77145f12012-07-31 16:16:21 +10001043 .read = drm_read,
1044#if defined(CONFIG_COMPAT)
1045 .compat_ioctl = nouveau_compat_ioctl,
1046#endif
1047 .llseek = noop_llseek,
1048};
1049
1050static struct drm_driver
David Herrmann915b4d12014-08-29 12:12:43 +02001051driver_stub = {
Ben Skeggs77145f12012-07-31 16:16:21 +10001052 .driver_features =
Peter Antoine0e975982015-06-23 08:18:49 +01001053 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
1054 DRIVER_KMS_LEGACY_CONTEXT,
Ben Skeggs77145f12012-07-31 16:16:21 +10001055
Ben Skeggs77145f12012-07-31 16:16:21 +10001056 .open = nouveau_drm_open,
Ben Skeggs77145f12012-07-31 16:16:21 +10001057 .postclose = nouveau_drm_postclose,
1058 .lastclose = nouveau_vga_lastclose,
1059
Marcin Slusarz33b903e2013-02-08 21:42:13 +01001060#if defined(CONFIG_DEBUG_FS)
Karol Herbst56c101a2015-07-31 00:35:42 +02001061 .debugfs_init = nouveau_drm_debugfs_init,
Marcin Slusarz33b903e2013-02-08 21:42:13 +01001062#endif
1063
Ben Skeggs51cb4b32013-10-03 07:02:29 +10001064 .enable_vblank = nouveau_display_vblank_enable,
1065 .disable_vblank = nouveau_display_vblank_disable,
Ben Skeggsd83ef852013-11-14 13:37:49 +10001066 .get_scanout_position = nouveau_display_scanoutpos,
Daniel Vetter1bf6ad62017-05-09 16:03:28 +02001067 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos,
Ben Skeggs77145f12012-07-31 16:16:21 +10001068
1069 .ioctls = nouveau_ioctls,
Rob Clarkbaa70942013-08-02 13:27:49 -04001070 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
Ben Skeggs77145f12012-07-31 16:16:21 +10001071 .fops = &nouveau_driver_fops,
1072
1073 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1074 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
Aaron Plattnerab9ccb92013-01-15 20:47:43 +00001075 .gem_prime_export = drm_gem_prime_export,
1076 .gem_prime_import = drm_gem_prime_import,
1077 .gem_prime_pin = nouveau_gem_prime_pin,
Maarten Lankhorst3aac4502014-07-01 12:57:26 +02001078 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
Maarten Lankhorst1af7c7d2013-06-27 13:38:19 +02001079 .gem_prime_unpin = nouveau_gem_prime_unpin,
Aaron Plattnerab9ccb92013-01-15 20:47:43 +00001080 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
1081 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1082 .gem_prime_vmap = nouveau_gem_prime_vmap,
1083 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
Ben Skeggs77145f12012-07-31 16:16:21 +10001084
Daniel Vettera51e6ac2016-05-30 19:53:00 +02001085 .gem_free_object_unlocked = nouveau_gem_object_del,
Ben Skeggs77145f12012-07-31 16:16:21 +10001086 .gem_open_object = nouveau_gem_object_open,
1087 .gem_close_object = nouveau_gem_object_close,
1088
1089 .dumb_create = nouveau_display_dumb_create,
1090 .dumb_map_offset = nouveau_display_dumb_map_offset,
Ben Skeggs77145f12012-07-31 16:16:21 +10001091
1092 .name = DRIVER_NAME,
1093 .desc = DRIVER_DESC,
1094#ifdef GIT_REVISION
1095 .date = GIT_REVISION,
1096#else
1097 .date = DRIVER_DATE,
1098#endif
1099 .major = DRIVER_MAJOR,
1100 .minor = DRIVER_MINOR,
1101 .patchlevel = DRIVER_PATCHLEVEL,
1102};
1103
Ben Skeggs94580292012-07-06 12:14:00 +10001104static struct pci_device_id
1105nouveau_drm_pci_table[] = {
1106 {
1107 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1108 .class = PCI_BASE_CLASS_DISPLAY << 16,
1109 .class_mask = 0xff << 16,
1110 },
1111 {
1112 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1113 .class = PCI_BASE_CLASS_DISPLAY << 16,
1114 .class_mask = 0xff << 16,
1115 },
1116 {}
1117};
1118
Pierre Moreau703fa262014-08-18 22:43:24 +02001119static void nouveau_display_options(void)
1120{
1121 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1122
1123 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1124 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1125 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1126 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1127 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1128 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1129 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1130 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1131 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1132 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
Ben Skeggsf3a8b662016-11-04 11:44:21 +10001133 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz);
Pierre Moreau703fa262014-08-18 22:43:24 +02001134}
1135
Dave Airlie2d8b9cc2012-11-02 11:04:28 +10001136static const struct dev_pm_ops nouveau_pm_ops = {
1137 .suspend = nouveau_pmops_suspend,
1138 .resume = nouveau_pmops_resume,
1139 .freeze = nouveau_pmops_freeze,
1140 .thaw = nouveau_pmops_thaw,
1141 .poweroff = nouveau_pmops_freeze,
1142 .restore = nouveau_pmops_resume,
Dave Airlie5addcf02012-09-10 14:20:51 +10001143 .runtime_suspend = nouveau_pmops_runtime_suspend,
1144 .runtime_resume = nouveau_pmops_runtime_resume,
1145 .runtime_idle = nouveau_pmops_runtime_idle,
Dave Airlie2d8b9cc2012-11-02 11:04:28 +10001146};
1147
Ben Skeggs94580292012-07-06 12:14:00 +10001148static struct pci_driver
1149nouveau_drm_pci_driver = {
1150 .name = "nouveau",
1151 .id_table = nouveau_drm_pci_table,
1152 .probe = nouveau_drm_probe,
1153 .remove = nouveau_drm_remove,
Dave Airlie2d8b9cc2012-11-02 11:04:28 +10001154 .driver.pm = &nouveau_pm_ops,
Ben Skeggs94580292012-07-06 12:14:00 +10001155};
1156
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001157struct drm_device *
Alexandre Courbote396ecd2015-09-04 19:59:31 +09001158nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1159 struct platform_device *pdev,
Ben Skeggs47b25052015-08-20 14:54:15 +10001160 struct nvkm_device **pdevice)
Alexandre Courbot420b9462014-02-17 15:17:26 +09001161{
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001162 struct drm_device *drm;
1163 int err;
Alexandre Courbot420b9462014-02-17 15:17:26 +09001164
Alexandre Courbote396ecd2015-09-04 19:59:31 +09001165 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
Ben Skeggs7974dd12015-08-20 14:54:17 +10001166 true, true, ~0ULL, pdevice);
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001167 if (err)
Ben Skeggse781dc82015-08-20 14:54:15 +10001168 goto err_free;
Alexandre Courbot420b9462014-02-17 15:17:26 +09001169
David Herrmann915b4d12014-08-29 12:12:43 +02001170 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
Tom Gundersen0f288602016-09-21 16:59:19 +02001171 if (IS_ERR(drm)) {
1172 err = PTR_ERR(drm);
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001173 goto err_free;
Alexandre Courbot420b9462014-02-17 15:17:26 +09001174 }
1175
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001176 platform_set_drvdata(pdev, drm);
1177
1178 return drm;
1179
1180err_free:
Ben Skeggse781dc82015-08-20 14:54:15 +10001181 nvkm_device_del(pdevice);
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001182
1183 return ERR_PTR(err);
Alexandre Courbot420b9462014-02-17 15:17:26 +09001184}
1185
Ben Skeggs94580292012-07-06 12:14:00 +10001186static int __init
1187nouveau_drm_init(void)
1188{
David Herrmann915b4d12014-08-29 12:12:43 +02001189 driver_pci = driver_stub;
David Herrmann915b4d12014-08-29 12:12:43 +02001190 driver_platform = driver_stub;
David Herrmann915b4d12014-08-29 12:12:43 +02001191
Pierre Moreau703fa262014-08-18 22:43:24 +02001192 nouveau_display_options();
1193
Ben Skeggs77145f12012-07-31 16:16:21 +10001194 if (nouveau_modeset == -1) {
Ben Skeggs77145f12012-07-31 16:16:21 +10001195 if (vgacon_text_force())
1196 nouveau_modeset = 0;
Ben Skeggs77145f12012-07-31 16:16:21 +10001197 }
1198
1199 if (!nouveau_modeset)
1200 return 0;
1201
Alexandre Courbot055a65d2015-01-15 15:29:56 +09001202#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1203 platform_driver_register(&nouveau_platform_driver);
1204#endif
1205
Ben Skeggs77145f12012-07-31 16:16:21 +10001206 nouveau_register_dsm_handler();
Pierre Moreaudb1a0ae22016-12-08 00:57:08 +01001207 nouveau_backlight_ctor();
Daniel Vetter10631d72017-05-24 16:51:40 +02001208
1209#ifdef CONFIG_PCI
1210 return pci_register_driver(&nouveau_drm_pci_driver);
1211#else
1212 return 0;
1213#endif
Ben Skeggs94580292012-07-06 12:14:00 +10001214}
1215
1216static void __exit
1217nouveau_drm_exit(void)
1218{
Ben Skeggs77145f12012-07-31 16:16:21 +10001219 if (!nouveau_modeset)
1220 return;
1221
Daniel Vetter10631d72017-05-24 16:51:40 +02001222#ifdef CONFIG_PCI
1223 pci_unregister_driver(&nouveau_drm_pci_driver);
1224#endif
Pierre Moreaudb1a0ae22016-12-08 00:57:08 +01001225 nouveau_backlight_dtor();
Ben Skeggs77145f12012-07-31 16:16:21 +10001226 nouveau_unregister_dsm_handler();
Alexandre Courbot055a65d2015-01-15 15:29:56 +09001227
1228#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1229 platform_driver_unregister(&nouveau_platform_driver);
1230#endif
Ben Skeggs94580292012-07-06 12:14:00 +10001231}
1232
1233module_init(nouveau_drm_init);
1234module_exit(nouveau_drm_exit);
1235
1236MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
Ben Skeggs77145f12012-07-31 16:16:21 +10001237MODULE_AUTHOR(DRIVER_AUTHOR);
1238MODULE_DESCRIPTION(DRIVER_DESC);
Ben Skeggs94580292012-07-06 12:14:00 +10001239MODULE_LICENSE("GPL and additional rights");