blob: 50025e1ff857fe551a8b83be79ef099ed737b51b [file] [log] [blame]
Ben Skeggs94580292012-07-06 12:14:00 +10001/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
Ben Skeggs77145f12012-07-31 16:16:21 +100025#include <linux/console.h>
Lukas Wunnerc5fd9362015-04-19 17:18:01 +020026#include <linux/delay.h>
Ben Skeggs94580292012-07-06 12:14:00 +100027#include <linux/module.h>
28#include <linux/pci.h>
Dave Airlie5addcf02012-09-10 14:20:51 +100029#include <linux/pm_runtime.h>
30#include <linux/vga_switcheroo.h>
Ben Skeggsfdb751e2014-08-10 04:10:23 +100031
Masahiro Yamadaae956212017-04-24 13:50:29 +090032#include <drm/drmP.h>
33#include <drm/drm_crtc_helper.h>
Ben Skeggsfdb751e2014-08-10 04:10:23 +100034
Ben Skeggsebb945a2012-07-20 08:17:34 +100035#include <core/gpuobj.h>
Ilia Mirkinc33e05a2014-02-13 21:35:14 -050036#include <core/option.h>
Ben Skeggs7974dd12015-08-20 14:54:17 +100037#include <core/pci.h>
38#include <core/tegra.h>
Ben Skeggs94580292012-07-06 12:14:00 +100039
Ben Skeggs04b88672016-05-22 20:35:16 +100040#include <nvif/driver.h>
Ben Skeggsa7cf0182018-05-08 20:39:46 +100041#include <nvif/fifo.h>
Ben Skeggs37e1c452018-05-08 20:39:48 +100042#include <nvif/user.h>
Ben Skeggs04b88672016-05-22 20:35:16 +100043
Ben Skeggs923bc412015-11-08 12:23:16 +100044#include <nvif/class.h>
Ben Skeggs845f2722015-11-08 12:16:40 +100045#include <nvif/cl0002.h>
Ben Skeggs8ed17302015-11-08 11:28:26 +100046#include <nvif/cla06f.h>
Ben Skeggs538b2692015-11-08 10:34:50 +100047
Ben Skeggs4dc28132016-05-20 09:22:55 +100048#include "nouveau_drv.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100049#include "nouveau_dma.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100050#include "nouveau_ttm.h"
51#include "nouveau_gem.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100052#include "nouveau_vga.h"
Martin Peres8d021d72016-08-25 03:57:07 +030053#include "nouveau_led.h"
Ben Skeggsb9ed9192013-10-15 09:44:02 +100054#include "nouveau_hwmon.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100055#include "nouveau_acpi.h"
56#include "nouveau_bios.h"
57#include "nouveau_ioctl.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100058#include "nouveau_abi16.h"
59#include "nouveau_fbcon.h"
60#include "nouveau_fence.h"
Marcin Slusarz33b903e2013-02-08 21:42:13 +010061#include "nouveau_debugfs.h"
Ben Skeggs27111a22014-08-10 04:10:31 +100062#include "nouveau_usif.h"
Pierre Moreau703fa262014-08-18 22:43:24 +020063#include "nouveau_connector.h"
Alexandre Courbot055a65d2015-01-15 15:29:56 +090064#include "nouveau_platform.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100065
Ben Skeggs94580292012-07-06 12:14:00 +100066MODULE_PARM_DESC(config, "option string to pass to driver core");
67static char *nouveau_config;
68module_param_named(config, nouveau_config, charp, 0400);
69
70MODULE_PARM_DESC(debug, "debug string to pass to driver core");
71static char *nouveau_debug;
72module_param_named(debug, nouveau_debug, charp, 0400);
73
Ben Skeggsebb945a2012-07-20 08:17:34 +100074MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
75static int nouveau_noaccel = 0;
76module_param_named(noaccel, nouveau_noaccel, int, 0400);
77
Ben Skeggs94307382012-10-31 12:11:15 +100078MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
79 "0 = disabled, 1 = enabled, 2 = headless)");
80int nouveau_modeset = -1;
Ben Skeggs77145f12012-07-31 16:16:21 +100081module_param_named(modeset, nouveau_modeset, int, 0400);
82
Lyude Pauleb493fb2018-07-03 16:31:41 -040083MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)");
84static int nouveau_atomic = 0;
85module_param_named(atomic, nouveau_atomic, int, 0400);
86
Dave Airlie5addcf02012-09-10 14:20:51 +100087MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
Ben Skeggs321f5c52017-06-02 14:38:07 +100088static int nouveau_runtime_pm = -1;
Dave Airlie5addcf02012-09-10 14:20:51 +100089module_param_named(runpm, nouveau_runtime_pm, int, 0400);
90
David Herrmann915b4d12014-08-29 12:12:43 +020091static struct drm_driver driver_stub;
92static struct drm_driver driver_pci;
93static struct drm_driver driver_platform;
Ben Skeggs77145f12012-07-31 16:16:21 +100094
Ben Skeggs94580292012-07-06 12:14:00 +100095static u64
Alexandre Courbot420b9462014-02-17 15:17:26 +090096nouveau_pci_name(struct pci_dev *pdev)
Ben Skeggs94580292012-07-06 12:14:00 +100097{
98 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
99 name |= pdev->bus->number << 16;
100 name |= PCI_SLOT(pdev->devfn) << 8;
101 return name | PCI_FUNC(pdev->devfn);
102}
103
Alexandre Courbot420b9462014-02-17 15:17:26 +0900104static u64
105nouveau_platform_name(struct platform_device *platformdev)
106{
107 return platformdev->id;
108}
109
110static u64
111nouveau_name(struct drm_device *dev)
112{
113 if (dev->pdev)
114 return nouveau_pci_name(dev->pdev);
115 else
Laurent Pinchart76adb462016-12-18 00:01:19 +0200116 return nouveau_platform_name(to_platform_device(dev->dev));
Alexandre Courbot420b9462014-02-17 15:17:26 +0900117}
118
Ben Skeggs814a2322017-11-01 03:56:20 +1000119static inline bool
Ben Skeggs11e451e2018-05-08 20:39:47 +1000120nouveau_cli_work_ready(struct dma_fence *fence)
Ben Skeggs814a2322017-11-01 03:56:20 +1000121{
Ben Skeggs11e451e2018-05-08 20:39:47 +1000122 if (!dma_fence_is_signaled(fence))
123 return false;
Ben Skeggs814a2322017-11-01 03:56:20 +1000124 dma_fence_put(fence);
125 return true;
126}
127
128static void
Ben Skeggs11e451e2018-05-08 20:39:47 +1000129nouveau_cli_work(struct work_struct *w)
Ben Skeggs814a2322017-11-01 03:56:20 +1000130{
Ben Skeggs11e451e2018-05-08 20:39:47 +1000131 struct nouveau_cli *cli = container_of(w, typeof(*cli), work);
Ben Skeggs814a2322017-11-01 03:56:20 +1000132 struct nouveau_cli_work *work, *wtmp;
133 mutex_lock(&cli->lock);
134 list_for_each_entry_safe(work, wtmp, &cli->worker, head) {
Ben Skeggs11e451e2018-05-08 20:39:47 +1000135 if (!work->fence || nouveau_cli_work_ready(work->fence)) {
Ben Skeggs814a2322017-11-01 03:56:20 +1000136 list_del(&work->head);
137 work->func(work);
138 }
139 }
140 mutex_unlock(&cli->lock);
141}
142
143static void
144nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)
145{
146 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb);
147 schedule_work(&work->cli->work);
148}
149
150void
151nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
152 struct nouveau_cli_work *work)
153{
154 work->fence = dma_fence_get(fence);
155 work->cli = cli;
156 mutex_lock(&cli->lock);
157 list_add_tail(&work->head, &cli->worker);
Ben Skeggs814a2322017-11-01 03:56:20 +1000158 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
159 nouveau_cli_work_fence(fence, &work->cb);
Ben Skeggsb26a2312017-12-23 08:54:28 +1000160 mutex_unlock(&cli->lock);
Ben Skeggs814a2322017-11-01 03:56:20 +1000161}
162
163static void
Ben Skeggs20d8a882016-05-18 13:36:34 +1000164nouveau_cli_fini(struct nouveau_cli *cli)
Ben Skeggs94580292012-07-06 12:14:00 +1000165{
Ben Skeggs11e451e2018-05-08 20:39:47 +1000166 /* All our channels are dead now, which means all the fences they
167 * own are signalled, and all callback functions have been called.
168 *
169 * So, after flushing the workqueue, there should be nothing left.
170 */
171 flush_work(&cli->work);
172 WARN_ON(!list_empty(&cli->worker));
173
Ben Skeggs27111a22014-08-10 04:10:31 +1000174 usif_client_fini(cli);
Ben Skeggs24e83752017-11-01 03:56:19 +1000175 nouveau_vmm_fini(&cli->vmm);
Ben Skeggs01670a72017-11-01 03:56:19 +1000176 nvif_mmu_fini(&cli->mmu);
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000177 nvif_device_fini(&cli->device);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000178 mutex_lock(&cli->drm->master.lock);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000179 nvif_client_fini(&cli->base);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000180 mutex_unlock(&cli->drm->master.lock);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000181}
182
183static int
184nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
185 struct nouveau_cli *cli)
186{
Ben Skeggs01670a72017-11-01 03:56:19 +1000187 static const struct nvif_mclass
Ben Skeggs7f507622017-11-01 03:56:20 +1000188 mems[] = {
189 { NVIF_CLASS_MEM_GF100, -1 },
190 { NVIF_CLASS_MEM_NV50 , -1 },
191 { NVIF_CLASS_MEM_NV04 , -1 },
192 {}
193 };
194 static const struct nvif_mclass
Ben Skeggs01670a72017-11-01 03:56:19 +1000195 mmus[] = {
196 { NVIF_CLASS_MMU_GF100, -1 },
197 { NVIF_CLASS_MMU_NV50 , -1 },
198 { NVIF_CLASS_MMU_NV04 , -1 },
199 {}
200 };
Ben Skeggs96da0bc2017-11-01 03:56:20 +1000201 static const struct nvif_mclass
202 vmms[] = {
203 { NVIF_CLASS_VMM_GP100, -1 },
204 { NVIF_CLASS_VMM_GM200, -1 },
205 { NVIF_CLASS_VMM_GF100, -1 },
206 { NVIF_CLASS_VMM_NV50 , -1 },
207 { NVIF_CLASS_VMM_NV04 , -1 },
208 {}
209 };
Ben Skeggs20d8a882016-05-18 13:36:34 +1000210 u64 device = nouveau_name(drm->dev);
211 int ret;
212
213 snprintf(cli->name, sizeof(cli->name), "%s", sname);
Ben Skeggse75c0912017-11-01 03:56:19 +1000214 cli->drm = drm;
Ben Skeggs20d8a882016-05-18 13:36:34 +1000215 mutex_init(&cli->mutex);
216 usif_client_init(cli);
217
Ben Skeggs814a2322017-11-01 03:56:20 +1000218 INIT_WORK(&cli->work, nouveau_cli_work);
219 INIT_LIST_HEAD(&cli->worker);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000220 mutex_init(&cli->lock);
221
222 if (cli == &drm->master) {
Ben Skeggs80e60972016-05-23 11:25:17 +1000223 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
224 cli->name, device, &cli->base);
225 } else {
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000226 mutex_lock(&drm->master.lock);
227 ret = nvif_client_init(&drm->master.base, cli->name, device,
Ben Skeggs80e60972016-05-23 11:25:17 +1000228 &cli->base);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000229 mutex_unlock(&drm->master.lock);
Ben Skeggs80e60972016-05-23 11:25:17 +1000230 }
Ben Skeggs20d8a882016-05-18 13:36:34 +1000231 if (ret) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000232 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000233 goto done;
234 }
235
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000236 ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE,
237 &(struct nv_device_v0) {
238 .device = ~0,
239 }, sizeof(struct nv_device_v0),
240 &cli->device);
241 if (ret) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000242 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret);
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000243 goto done;
244 }
245
Ben Skeggs01670a72017-11-01 03:56:19 +1000246 ret = nvif_mclass(&cli->device.object, mmus);
247 if (ret < 0) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000248 NV_PRINTK(err, cli, "No supported MMU class\n");
Ben Skeggs01670a72017-11-01 03:56:19 +1000249 goto done;
250 }
251
252 ret = nvif_mmu_init(&cli->device.object, mmus[ret].oclass, &cli->mmu);
253 if (ret) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000254 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret);
Ben Skeggs01670a72017-11-01 03:56:19 +1000255 goto done;
256 }
257
Ben Skeggs96da0bc2017-11-01 03:56:20 +1000258 ret = nvif_mclass(&cli->mmu.object, vmms);
259 if (ret < 0) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000260 NV_PRINTK(err, cli, "No supported VMM class\n");
Ben Skeggs96da0bc2017-11-01 03:56:20 +1000261 goto done;
262 }
263
264 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
265 if (ret) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000266 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret);
Ben Skeggs96da0bc2017-11-01 03:56:20 +1000267 goto done;
268 }
269
Ben Skeggs7f507622017-11-01 03:56:20 +1000270 ret = nvif_mclass(&cli->mmu.object, mems);
271 if (ret < 0) {
Ben Skeggsa43b16d2018-08-28 14:10:34 +1000272 NV_PRINTK(err, cli, "No supported MEM class\n");
Ben Skeggs7f507622017-11-01 03:56:20 +1000273 goto done;
274 }
275
276 cli->mem = &mems[ret];
Ben Skeggs7f507622017-11-01 03:56:20 +1000277 return 0;
Ben Skeggs20d8a882016-05-18 13:36:34 +1000278done:
279 if (ret)
280 nouveau_cli_fini(cli);
281 return ret;
Ben Skeggs94580292012-07-06 12:14:00 +1000282}
283
Ben Skeggsebb945a2012-07-20 08:17:34 +1000284static void
285nouveau_accel_fini(struct nouveau_drm *drm)
286{
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000287 nouveau_channel_idle(drm->channel);
Ben Skeggs0ad72862014-08-10 04:10:22 +1000288 nvif_object_fini(&drm->ntfy);
Ben Skeggsf027f492015-08-20 14:54:17 +1000289 nvkm_gpuobj_del(&drm->notify);
Ben Skeggs0ad72862014-08-10 04:10:22 +1000290 nvif_object_fini(&drm->nvsw);
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000291 nouveau_channel_del(&drm->channel);
292
293 nouveau_channel_idle(drm->cechan);
Ben Skeggs0ad72862014-08-10 04:10:22 +1000294 nvif_object_fini(&drm->ttm.copy);
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000295 nouveau_channel_del(&drm->cechan);
296
Ben Skeggsebb945a2012-07-20 08:17:34 +1000297 if (drm->fence)
298 nouveau_fence(drm)->dtor(drm);
299}
300
301static void
302nouveau_accel_init(struct nouveau_drm *drm)
303{
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000304 struct nvif_device *device = &drm->client.device;
Ben Skeggs41a63402015-08-20 14:54:16 +1000305 struct nvif_sclass *sclass;
Ben Skeggs49981042012-08-06 19:38:25 +1000306 u32 arg0, arg1;
Ben Skeggs41a63402015-08-20 14:54:16 +1000307 int ret, i, n;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000308
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000309 if (nouveau_noaccel)
Ben Skeggsebb945a2012-07-20 08:17:34 +1000310 return;
311
Ben Skeggseb47db42018-05-08 20:39:46 +1000312 ret = nouveau_channels_init(drm);
313 if (ret)
314 return;
315
Ben Skeggs37e1c452018-05-08 20:39:48 +1000316 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) {
317 ret = nvif_user_init(device);
318 if (ret)
319 return;
320 }
321
Ben Skeggsebb945a2012-07-20 08:17:34 +1000322 /* initialise synchronisation routines */
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000323 /*XXX: this is crap, but the fence/channel stuff is a little
324 * backwards in some places. this will be fixed.
325 */
Ben Skeggs41a63402015-08-20 14:54:16 +1000326 ret = n = nvif_object_sclass_get(&device->object, &sclass);
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000327 if (ret < 0)
328 return;
329
Ben Skeggs41a63402015-08-20 14:54:16 +1000330 for (ret = -ENOSYS, i = 0; i < n; i++) {
331 switch (sclass[i].oclass) {
Ben Skeggsbbf89062014-08-10 04:10:25 +1000332 case NV03_CHANNEL_DMA:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000333 ret = nv04_fence_create(drm);
334 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000335 case NV10_CHANNEL_DMA:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000336 ret = nv10_fence_create(drm);
337 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000338 case NV17_CHANNEL_DMA:
339 case NV40_CHANNEL_DMA:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000340 ret = nv17_fence_create(drm);
341 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000342 case NV50_CHANNEL_GPFIFO:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000343 ret = nv50_fence_create(drm);
344 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000345 case G82_CHANNEL_GPFIFO:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000346 ret = nv84_fence_create(drm);
347 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000348 case FERMI_CHANNEL_GPFIFO:
349 case KEPLER_CHANNEL_GPFIFO_A:
Ben Skeggs63f8c9b2016-03-11 13:09:28 +1000350 case KEPLER_CHANNEL_GPFIFO_B:
Ben Skeggsa1020af2015-04-14 11:47:24 +1000351 case MAXWELL_CHANNEL_GPFIFO_A:
Ben Skeggse8ff9792016-07-09 10:41:01 +1000352 case PASCAL_CHANNEL_GPFIFO_A:
Ben Skeggs37e1c452018-05-08 20:39:48 +1000353 case VOLTA_CHANNEL_GPFIFO_A:
Ben Skeggs641d0b32018-12-11 14:50:02 +1000354 case TURING_CHANNEL_GPFIFO_A:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000355 ret = nvc0_fence_create(drm);
356 break;
357 default:
358 break;
359 }
360 }
361
Ben Skeggs41a63402015-08-20 14:54:16 +1000362 nvif_object_sclass_put(&sclass);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000363 if (ret) {
364 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
365 nouveau_accel_fini(drm);
366 return;
367 }
368
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000369 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000370 ret = nouveau_channel_new(drm, &drm->client.device,
Ben Skeggsa7cf0182018-05-08 20:39:46 +1000371 nvif_fifo_runlist_ce(device), 0,
Ben Skeggs85532bd2018-12-11 14:50:02 +1000372 true, &drm->cechan);
Ben Skeggs49981042012-08-06 19:38:25 +1000373 if (ret)
374 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
375
Ben Skeggsa7cf0182018-05-08 20:39:46 +1000376 arg0 = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR);
Ben Skeggs49469802012-11-22 13:43:55 +1000377 arg1 = 1;
Ben Skeggs00fc6f62013-07-09 14:20:15 +1000378 } else
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000379 if (device->info.chipset >= 0xa3 &&
380 device->info.chipset != 0xaa &&
381 device->info.chipset != 0xac) {
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000382 ret = nouveau_channel_new(drm, &drm->client.device,
Ben Skeggs85532bd2018-12-11 14:50:02 +1000383 NvDmaFB, NvDmaTT, false,
384 &drm->cechan);
Ben Skeggs00fc6f62013-07-09 14:20:15 +1000385 if (ret)
386 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
387
388 arg0 = NvDmaFB;
389 arg1 = NvDmaTT;
Ben Skeggs49981042012-08-06 19:38:25 +1000390 } else {
391 arg0 = NvDmaFB;
392 arg1 = NvDmaTT;
393 }
394
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000395 ret = nouveau_channel_new(drm, &drm->client.device,
Ben Skeggs85532bd2018-12-11 14:50:02 +1000396 arg0, arg1, false, &drm->channel);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000397 if (ret) {
398 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
399 nouveau_accel_fini(drm);
400 return;
401 }
402
Ben Skeggs512fa0b2018-05-08 20:39:47 +1000403 if (device->info.family < NV_DEVICE_INFO_V0_TESLA) {
404 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
405 nouveau_abi16_swclass(drm), NULL, 0,
406 &drm->nvsw);
Ben Skeggs69a61462013-11-13 10:58:51 +1000407 if (ret == 0) {
Ben Skeggs512fa0b2018-05-08 20:39:47 +1000408 ret = RING_SPACE(drm->channel, 2);
409 if (ret == 0) {
Ben Skeggs69a61462013-11-13 10:58:51 +1000410 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
Ben Skeggs512fa0b2018-05-08 20:39:47 +1000411 OUT_RING (drm->channel, drm->nvsw.handle);
412 }
Ben Skeggs69a61462013-11-13 10:58:51 +1000413 }
Ben Skeggs898a2b32015-08-20 14:54:18 +1000414
Ben Skeggs898a2b32015-08-20 14:54:18 +1000415 if (ret) {
Ben Skeggs512fa0b2018-05-08 20:39:47 +1000416 NV_ERROR(drm, "failed to allocate sw class, %d\n", ret);
Ben Skeggs898a2b32015-08-20 14:54:18 +1000417 nouveau_accel_fini(drm);
418 return;
419 }
Ben Skeggs69a61462013-11-13 10:58:51 +1000420 }
421
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000422 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000423 ret = nvkm_gpuobj_new(nvxx_device(&drm->client.device), 32, 0,
424 false, NULL, &drm->notify);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000425 if (ret) {
426 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
427 nouveau_accel_fini(drm);
428 return;
429 }
430
Ben Skeggsa01ca782015-08-20 14:54:15 +1000431 ret = nvif_object_init(&drm->channel->user, NvNotify0,
Ben Skeggs4acfd702014-08-10 04:10:24 +1000432 NV_DMA_IN_MEMORY,
433 &(struct nv_dma_v0) {
434 .target = NV_DMA_V0_TARGET_VRAM,
435 .access = NV_DMA_V0_ACCESS_RDWR,
Ben Skeggsebb945a2012-07-20 08:17:34 +1000436 .start = drm->notify->addr,
437 .limit = drm->notify->addr + 31
Ben Skeggs4acfd702014-08-10 04:10:24 +1000438 }, sizeof(struct nv_dma_v0),
Ben Skeggs0ad72862014-08-10 04:10:22 +1000439 &drm->ntfy);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000440 if (ret) {
441 nouveau_accel_fini(drm);
442 return;
443 }
444 }
445
446
Ben Skeggs49981042012-08-06 19:38:25 +1000447 nouveau_bo_move_init(drm);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000448}
449
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200450static int
Lyude Paulcfea88a2018-08-22 21:40:07 -0400451nouveau_drm_device_init(struct drm_device *dev)
Ben Skeggs94580292012-07-06 12:14:00 +1000452{
Ben Skeggs94580292012-07-06 12:14:00 +1000453 struct nouveau_drm *drm;
454 int ret;
455
Ben Skeggs20d8a882016-05-18 13:36:34 +1000456 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
457 return -ENOMEM;
458 dev->dev_private = drm;
459 drm->dev = dev;
460
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000461 ret = nouveau_cli_init(drm, "DRM-master", &drm->master);
462 if (ret)
Lyude Paulc4cee692018-08-22 21:40:06 -0400463 goto fail_alloc;
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000464
Ben Skeggs20d8a882016-05-18 13:36:34 +1000465 ret = nouveau_cli_init(drm, "DRM", &drm->client);
Ben Skeggs94580292012-07-06 12:14:00 +1000466 if (ret)
Lyude Paulc4cee692018-08-22 21:40:06 -0400467 goto fail_master;
Ben Skeggs94580292012-07-06 12:14:00 +1000468
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000469 dev->irq_enabled = true;
470
Ben Skeggs989aa5b2015-01-12 12:33:37 +1000471 nvxx_client(&drm->client.base)->debug =
Ben Skeggsbe83cd42015-01-14 15:36:34 +1000472 nvkm_dbgopt(nouveau_debug, "DRM");
Ben Skeggs77145f12012-07-31 16:16:21 +1000473
Ben Skeggs94580292012-07-06 12:14:00 +1000474 INIT_LIST_HEAD(&drm->clients);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000475 spin_lock_init(&drm->tile.lock);
Ben Skeggs94580292012-07-06 12:14:00 +1000476
Ben Skeggs77145f12012-07-31 16:16:21 +1000477 /* workaround an odd issue on nvc1 by disabling the device's
478 * nosnoop capability. hopefully won't cause issues until a
479 * better fix is found - assuming there is one...
480 */
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000481 if (drm->client.device.info.chipset == 0xc1)
482 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000483
Ben Skeggs77145f12012-07-31 16:16:21 +1000484 nouveau_vga_init(drm);
Ben Skeggscb75d972012-07-11 10:44:20 +1000485
Ben Skeggsebb945a2012-07-20 08:17:34 +1000486 ret = nouveau_ttm_init(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000487 if (ret)
Ben Skeggs77145f12012-07-31 16:16:21 +1000488 goto fail_ttm;
Ben Skeggs94580292012-07-06 12:14:00 +1000489
Ben Skeggs77145f12012-07-31 16:16:21 +1000490 ret = nouveau_bios_init(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000491 if (ret)
Ben Skeggs77145f12012-07-31 16:16:21 +1000492 goto fail_bios;
493
Ben Skeggsd7f9bb62019-02-12 22:28:13 +1000494 nouveau_accel_init(drm);
495
Ben Skeggs77145f12012-07-31 16:16:21 +1000496 ret = nouveau_display_create(dev);
497 if (ret)
498 goto fail_dispctor;
499
500 if (dev->mode_config.num_crtc) {
Ben Skeggs0f9976d2019-02-12 22:28:13 +1000501 ret = nouveau_display_init(dev, false, false);
Ben Skeggs77145f12012-07-31 16:16:21 +1000502 if (ret)
503 goto fail_dispinit;
504 }
505
Karol Herbstb126a202015-07-30 11:52:23 +0200506 nouveau_debugfs_init(drm);
Ben Skeggsb9ed9192013-10-15 09:44:02 +1000507 nouveau_hwmon_init(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000508 nouveau_fbcon_init(dev);
Martin Peres8d021d72016-08-25 03:57:07 +0300509 nouveau_led_init(dev);
Dave Airlie5addcf02012-09-10 14:20:51 +1000510
Ben Skeggs8fa43382017-06-02 14:49:45 +1000511 if (nouveau_pmops_runtime()) {
Dave Airlie5addcf02012-09-10 14:20:51 +1000512 pm_runtime_use_autosuspend(dev->dev);
513 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
514 pm_runtime_set_active(dev->dev);
515 pm_runtime_allow(dev->dev);
516 pm_runtime_mark_last_busy(dev->dev);
517 pm_runtime_put(dev->dev);
518 }
Lyude Paul7326ead2018-08-15 15:15:13 -0400519
Ben Skeggs94580292012-07-06 12:14:00 +1000520 return 0;
521
Ben Skeggs77145f12012-07-31 16:16:21 +1000522fail_dispinit:
523 nouveau_display_destroy(dev);
524fail_dispctor:
Ben Skeggsd7f9bb62019-02-12 22:28:13 +1000525 nouveau_accel_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000526 nouveau_bios_takedown(dev);
527fail_bios:
Ben Skeggsebb945a2012-07-20 08:17:34 +1000528 nouveau_ttm_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000529fail_ttm:
Ben Skeggs77145f12012-07-31 16:16:21 +1000530 nouveau_vga_fini(drm);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000531 nouveau_cli_fini(&drm->client);
Lyude Paulc4cee692018-08-22 21:40:06 -0400532fail_master:
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000533 nouveau_cli_fini(&drm->master);
Lyude Paulc4cee692018-08-22 21:40:06 -0400534fail_alloc:
Ben Skeggs20d8a882016-05-18 13:36:34 +1000535 kfree(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000536 return ret;
537}
538
Gabriel Krisman Bertazi11b3c202017-01-06 15:57:31 -0200539static void
Lyude Paulcfea88a2018-08-22 21:40:07 -0400540nouveau_drm_device_fini(struct drm_device *dev)
Ben Skeggs94580292012-07-06 12:14:00 +1000541{
Ben Skeggs77145f12012-07-31 16:16:21 +1000542 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000543
Ben Skeggs8fa43382017-06-02 14:49:45 +1000544 if (nouveau_pmops_runtime()) {
Lukas Wunnerc1b16b42016-06-08 18:47:27 +0200545 pm_runtime_get_sync(dev->dev);
Lukas Wunner55c868a2016-06-08 18:47:27 +0200546 pm_runtime_forbid(dev->dev);
Lukas Wunnerc1b16b42016-06-08 18:47:27 +0200547 }
548
Martin Peres8d021d72016-08-25 03:57:07 +0300549 nouveau_led_fini(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000550 nouveau_fbcon_fini(dev);
Ben Skeggsb9ed9192013-10-15 09:44:02 +1000551 nouveau_hwmon_fini(dev);
Karol Herbstb126a202015-07-30 11:52:23 +0200552 nouveau_debugfs_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000553
Ben Skeggs94307382012-10-31 12:11:15 +1000554 if (dev->mode_config.num_crtc)
Lyude Paul2f7ca782018-08-07 17:32:48 -0400555 nouveau_display_fini(dev, false, false);
Ben Skeggs77145f12012-07-31 16:16:21 +1000556 nouveau_display_destroy(dev);
557
Ben Skeggsd7f9bb62019-02-12 22:28:13 +1000558 nouveau_accel_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000559 nouveau_bios_takedown(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000560
Ben Skeggsebb945a2012-07-20 08:17:34 +1000561 nouveau_ttm_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000562 nouveau_vga_fini(drm);
Ben Skeggscb75d972012-07-11 10:44:20 +1000563
Ben Skeggs20d8a882016-05-18 13:36:34 +1000564 nouveau_cli_fini(&drm->client);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000565 nouveau_cli_fini(&drm->master);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000566 kfree(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000567}
568
Lyude Paulcfea88a2018-08-22 21:40:07 -0400569static int nouveau_drm_probe(struct pci_dev *pdev,
570 const struct pci_device_id *pent)
571{
572 struct nvkm_device *device;
573 struct drm_device *drm_dev;
574 struct apertures_struct *aper;
575 bool boot = false;
576 int ret;
577
578 if (vga_switcheroo_client_probe_defer(pdev))
579 return -EPROBE_DEFER;
580
581 /* We need to check that the chipset is supported before booting
582 * fbdev off the hardware, as there's no way to put it back.
583 */
584 ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device);
585 if (ret)
586 return ret;
587
588 nvkm_device_del(&device);
589
590 /* Remove conflicting drivers (vesafb, efifb etc). */
591 aper = alloc_apertures(3);
592 if (!aper)
593 return -ENOMEM;
594
595 aper->ranges[0].base = pci_resource_start(pdev, 1);
596 aper->ranges[0].size = pci_resource_len(pdev, 1);
597 aper->count = 1;
598
599 if (pci_resource_len(pdev, 2)) {
600 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
601 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
602 aper->count++;
603 }
604
605 if (pci_resource_len(pdev, 3)) {
606 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
607 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
608 aper->count++;
609 }
610
611#ifdef CONFIG_X86
612 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
613#endif
614 if (nouveau_modeset != 2)
615 drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot);
616 kfree(aper);
617
618 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
619 true, true, ~0ULL, &device);
620 if (ret)
621 return ret;
622
623 pci_set_master(pdev);
624
625 if (nouveau_atomic)
626 driver_pci.driver_features |= DRIVER_ATOMIC;
627
628 drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev);
629 if (IS_ERR(drm_dev)) {
630 ret = PTR_ERR(drm_dev);
631 goto fail_nvkm;
632 }
633
634 ret = pci_enable_device(pdev);
635 if (ret)
636 goto fail_drm;
637
638 drm_dev->pdev = pdev;
639 pci_set_drvdata(pdev, drm_dev);
640
641 ret = nouveau_drm_device_init(drm_dev);
642 if (ret)
643 goto fail_pci;
644
645 ret = drm_dev_register(drm_dev, pent->driver_data);
646 if (ret)
647 goto fail_drm_dev_init;
648
649 return 0;
650
651fail_drm_dev_init:
652 nouveau_drm_device_fini(drm_dev);
653fail_pci:
654 pci_disable_device(pdev);
655fail_drm:
656 drm_dev_put(drm_dev);
657fail_nvkm:
658 nvkm_device_del(&device);
659 return ret;
660}
661
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +0900662void
663nouveau_drm_device_remove(struct drm_device *dev)
Ben Skeggs94580292012-07-06 12:14:00 +1000664{
Lyude Paulcfea88a2018-08-22 21:40:07 -0400665 struct pci_dev *pdev = dev->pdev;
Ben Skeggs77145f12012-07-31 16:16:21 +1000666 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggsbe83cd42015-01-14 15:36:34 +1000667 struct nvkm_client *client;
Ben Skeggs76ecea52015-08-20 14:54:15 +1000668 struct nvkm_device *device;
Ben Skeggs77145f12012-07-31 16:16:21 +1000669
Lyude Paulcfea88a2018-08-22 21:40:07 -0400670 drm_dev_unregister(dev);
671
Ilia Mirkin7d3428c2014-01-29 19:53:00 -0500672 dev->irq_enabled = false;
Ben Skeggs989aa5b2015-01-12 12:33:37 +1000673 client = nvxx_client(&drm->client.base);
Ben Skeggs4e7e62d2015-08-20 14:54:15 +1000674 device = nvkm_device_find(client->device);
Ben Skeggs77145f12012-07-31 16:16:21 +1000675
Lyude Paulcfea88a2018-08-22 21:40:07 -0400676 nouveau_drm_device_fini(dev);
677 pci_disable_device(pdev);
678 drm_dev_put(dev);
Ben Skeggse781dc82015-08-20 14:54:15 +1000679 nvkm_device_del(&device);
Ben Skeggs94580292012-07-06 12:14:00 +1000680}
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +0900681
682static void
683nouveau_drm_remove(struct pci_dev *pdev)
684{
685 struct drm_device *dev = pci_get_drvdata(pdev);
686
687 nouveau_drm_device_remove(dev);
688}
Ben Skeggs94580292012-07-06 12:14:00 +1000689
Marcin Slusarzcd897832013-01-27 15:01:55 +0100690static int
Dave Airlie05c63c22014-03-26 14:10:06 +1000691nouveau_do_suspend(struct drm_device *dev, bool runtime)
Ben Skeggs94580292012-07-06 12:14:00 +1000692{
Ben Skeggs77145f12012-07-31 16:16:21 +1000693 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000694 int ret;
695
Martin Peres8d021d72016-08-25 03:57:07 +0300696 nouveau_led_suspend(dev);
697
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000698 if (dev->mode_config.num_crtc) {
Ben Skeggs2d38a532017-08-14 08:40:55 +1000699 NV_DEBUG(drm, "suspending console...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000700 nouveau_fbcon_set_suspend(dev, 1);
Ben Skeggs2d38a532017-08-14 08:40:55 +1000701 NV_DEBUG(drm, "suspending display...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000702 ret = nouveau_display_suspend(dev, runtime);
Ben Skeggs94307382012-10-31 12:11:15 +1000703 if (ret)
704 return ret;
705 }
Ben Skeggs94580292012-07-06 12:14:00 +1000706
Ben Skeggs2d38a532017-08-14 08:40:55 +1000707 NV_DEBUG(drm, "evicting buffers...\n");
Ben Skeggsebb945a2012-07-20 08:17:34 +1000708 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
709
Ben Skeggs2d38a532017-08-14 08:40:55 +1000710 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
Ben Skeggs81dff212013-05-07 08:33:10 +1000711 if (drm->cechan) {
712 ret = nouveau_channel_idle(drm->cechan);
713 if (ret)
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500714 goto fail_display;
Ben Skeggs81dff212013-05-07 08:33:10 +1000715 }
716
717 if (drm->channel) {
718 ret = nouveau_channel_idle(drm->channel);
719 if (ret)
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500720 goto fail_display;
Ben Skeggs81dff212013-05-07 08:33:10 +1000721 }
722
Ben Skeggs2d38a532017-08-14 08:40:55 +1000723 NV_DEBUG(drm, "suspending fence...\n");
Ben Skeggsebb945a2012-07-20 08:17:34 +1000724 if (drm->fence && nouveau_fence(drm)->suspend) {
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500725 if (!nouveau_fence(drm)->suspend(drm)) {
726 ret = -ENOMEM;
727 goto fail_display;
728 }
Ben Skeggsebb945a2012-07-20 08:17:34 +1000729 }
730
Ben Skeggs2d38a532017-08-14 08:40:55 +1000731 NV_DEBUG(drm, "suspending object tree...\n");
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000732 ret = nvif_client_suspend(&drm->master.base);
Ben Skeggs94580292012-07-06 12:14:00 +1000733 if (ret)
734 goto fail_client;
735
Ben Skeggs94580292012-07-06 12:14:00 +1000736 return 0;
737
738fail_client:
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500739 if (drm->fence && nouveau_fence(drm)->resume)
740 nouveau_fence(drm)->resume(drm);
741
742fail_display:
Ben Skeggs94307382012-10-31 12:11:15 +1000743 if (dev->mode_config.num_crtc) {
Ben Skeggs2d38a532017-08-14 08:40:55 +1000744 NV_DEBUG(drm, "resuming display...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000745 nouveau_display_resume(dev, runtime);
Ben Skeggs94307382012-10-31 12:11:15 +1000746 }
Ben Skeggs94580292012-07-06 12:14:00 +1000747 return ret;
748}
749
Marcin Slusarzcd897832013-01-27 15:01:55 +0100750static int
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000751nouveau_do_resume(struct drm_device *dev, bool runtime)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000752{
753 struct nouveau_drm *drm = nouveau_drm(dev);
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000754
Ben Skeggs2d38a532017-08-14 08:40:55 +1000755 NV_DEBUG(drm, "resuming object tree...\n");
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000756 nvif_client_resume(&drm->master.base);
Ben Skeggs94580292012-07-06 12:14:00 +1000757
Ben Skeggs2d38a532017-08-14 08:40:55 +1000758 NV_DEBUG(drm, "resuming fence...\n");
Ben Skeggs81dff212013-05-07 08:33:10 +1000759 if (drm->fence && nouveau_fence(drm)->resume)
760 nouveau_fence(drm)->resume(drm);
761
Ben Skeggs77145f12012-07-31 16:16:21 +1000762 nouveau_run_vbios_init(dev);
Ben Skeggs77145f12012-07-31 16:16:21 +1000763
Ben Skeggs94307382012-10-31 12:11:15 +1000764 if (dev->mode_config.num_crtc) {
Ben Skeggs2d38a532017-08-14 08:40:55 +1000765 NV_DEBUG(drm, "resuming display...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000766 nouveau_display_resume(dev, runtime);
Ben Skeggs2d38a532017-08-14 08:40:55 +1000767 NV_DEBUG(drm, "resuming console...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000768 nouveau_fbcon_set_suspend(dev, 0);
Ben Skeggs94307382012-10-31 12:11:15 +1000769 }
Dave Airlie5addcf02012-09-10 14:20:51 +1000770
Martin Peres8d021d72016-08-25 03:57:07 +0300771 nouveau_led_resume(dev);
772
Ben Skeggs77145f12012-07-31 16:16:21 +1000773 return 0;
Ben Skeggs94580292012-07-06 12:14:00 +1000774}
775
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000776int
777nouveau_pmops_suspend(struct device *dev)
778{
779 struct pci_dev *pdev = to_pci_dev(dev);
780 struct drm_device *drm_dev = pci_get_drvdata(pdev);
781 int ret;
782
783 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
784 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
785 return 0;
786
787 ret = nouveau_do_suspend(drm_dev, false);
788 if (ret)
789 return ret;
790
791 pci_save_state(pdev);
792 pci_disable_device(pdev);
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000793 pci_set_power_state(pdev, PCI_D3hot);
Lukas Wunnerc5fd9362015-04-19 17:18:01 +0200794 udelay(200);
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000795 return 0;
796}
797
798int
799nouveau_pmops_resume(struct device *dev)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000800{
801 struct pci_dev *pdev = to_pci_dev(dev);
802 struct drm_device *drm_dev = pci_get_drvdata(pdev);
803 int ret;
804
Dave Airlie5addcf02012-09-10 14:20:51 +1000805 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
806 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000807 return 0;
808
809 pci_set_power_state(pdev, PCI_D0);
810 pci_restore_state(pdev);
811 ret = pci_enable_device(pdev);
812 if (ret)
813 return ret;
814 pci_set_master(pdev);
815
Hans de Goede0b2fe652016-11-21 17:50:55 +0100816 ret = nouveau_do_resume(drm_dev, false);
817
818 /* Monitors may have been connected / disconnected during suspend */
819 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
820
821 return ret;
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000822}
823
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000824static int
825nouveau_pmops_freeze(struct device *dev)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000826{
827 struct pci_dev *pdev = to_pci_dev(dev);
828 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000829 return nouveau_do_suspend(drm_dev, false);
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000830}
831
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000832static int
833nouveau_pmops_thaw(struct device *dev)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000834{
835 struct pci_dev *pdev = to_pci_dev(dev);
836 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000837 return nouveau_do_resume(drm_dev, false);
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000838}
839
Ben Skeggs321f5c52017-06-02 14:38:07 +1000840bool
Arnd Bergmann54994732017-06-09 12:38:33 +0200841nouveau_pmops_runtime(void)
Ben Skeggs321f5c52017-06-02 14:38:07 +1000842{
843 if (nouveau_runtime_pm == -1)
844 return nouveau_is_optimus() || nouveau_is_v1_dsm();
845 return nouveau_runtime_pm == 1;
846}
847
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000848static int
849nouveau_pmops_runtime_suspend(struct device *dev)
850{
851 struct pci_dev *pdev = to_pci_dev(dev);
852 struct drm_device *drm_dev = pci_get_drvdata(pdev);
853 int ret;
854
Ben Skeggs321f5c52017-06-02 14:38:07 +1000855 if (!nouveau_pmops_runtime()) {
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000856 pm_runtime_forbid(dev);
857 return -EBUSY;
858 }
859
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000860 nouveau_switcheroo_optimus_dsm();
861 ret = nouveau_do_suspend(drm_dev, true);
862 pci_save_state(pdev);
863 pci_disable_device(pdev);
Dave Airlie8c863942014-12-08 10:33:52 +1000864 pci_ignore_hotplug(pdev);
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000865 pci_set_power_state(pdev, PCI_D3cold);
866 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
867 return ret;
868}
869
870static int
871nouveau_pmops_runtime_resume(struct device *dev)
872{
873 struct pci_dev *pdev = to_pci_dev(dev);
874 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000875 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000876 int ret;
877
Ben Skeggs321f5c52017-06-02 14:38:07 +1000878 if (!nouveau_pmops_runtime()) {
879 pm_runtime_forbid(dev);
880 return -EBUSY;
881 }
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000882
883 pci_set_power_state(pdev, PCI_D0);
884 pci_restore_state(pdev);
885 ret = pci_enable_device(pdev);
886 if (ret)
887 return ret;
888 pci_set_master(pdev);
889
890 ret = nouveau_do_resume(drm_dev, true);
Lyude Paulcae9ff02017-01-11 21:25:23 -0500891
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000892 /* do magic */
Ben Skeggsa01ca782015-08-20 14:54:15 +1000893 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000894 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
Hans de Goede0b2fe652016-11-21 17:50:55 +0100895
896 /* Monitors may have been connected / disconnected during suspend */
897 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
898
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000899 return ret;
900}
901
902static int
903nouveau_pmops_runtime_idle(struct device *dev)
904{
Ben Skeggs321f5c52017-06-02 14:38:07 +1000905 if (!nouveau_pmops_runtime()) {
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000906 pm_runtime_forbid(dev);
907 return -EBUSY;
908 }
909
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000910 pm_runtime_mark_last_busy(dev);
911 pm_runtime_autosuspend(dev);
912 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
913 return 1;
914}
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000915
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200916static int
Ben Skeggsebb945a2012-07-20 08:17:34 +1000917nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
918{
Ben Skeggsebb945a2012-07-20 08:17:34 +1000919 struct nouveau_drm *drm = nouveau_drm(dev);
920 struct nouveau_cli *cli;
Marcin Slusarza2896ce2012-12-09 15:45:21 +0100921 char name[32], tmpname[TASK_COMM_LEN];
Ben Skeggsebb945a2012-07-20 08:17:34 +1000922 int ret;
923
Dave Airlie5addcf02012-09-10 14:20:51 +1000924 /* need to bring up power immediately if opening device */
925 ret = pm_runtime_get_sync(dev->dev);
Alexandre Courbotb6c42852014-02-12 14:00:59 +0900926 if (ret < 0 && ret != -EACCES)
Dave Airlie5addcf02012-09-10 14:20:51 +1000927 return ret;
928
Marcin Slusarza2896ce2012-12-09 15:45:21 +0100929 get_task_comm(tmpname, current);
930 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
Ben Skeggsfa6df8c2012-09-12 13:09:23 +1000931
Lyude Paul922a8c82018-07-12 13:02:52 -0400932 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) {
933 ret = -ENOMEM;
934 goto done;
935 }
Alexandre Courbot420b9462014-02-17 15:17:26 +0900936
Ben Skeggs20d8a882016-05-18 13:36:34 +1000937 ret = nouveau_cli_init(drm, name, cli);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000938 if (ret)
Ben Skeggs20d8a882016-05-18 13:36:34 +1000939 goto done;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000940
Ben Skeggs0ad72862014-08-10 04:10:22 +1000941 cli->base.super = false;
942
Ben Skeggsebb945a2012-07-20 08:17:34 +1000943 fpriv->driver_priv = cli;
944
945 mutex_lock(&drm->client.mutex);
946 list_add(&cli->head, &drm->clients);
947 mutex_unlock(&drm->client.mutex);
Dave Airlie5addcf02012-09-10 14:20:51 +1000948
Ben Skeggs20d8a882016-05-18 13:36:34 +1000949done:
950 if (ret && cli) {
951 nouveau_cli_fini(cli);
952 kfree(cli);
953 }
954
Dave Airlie5addcf02012-09-10 14:20:51 +1000955 pm_runtime_mark_last_busy(dev->dev);
956 pm_runtime_put_autosuspend(dev->dev);
Dave Airlie5addcf02012-09-10 14:20:51 +1000957 return ret;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000958}
959
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200960static void
Daniel Vetterf0e73ff2017-05-08 10:26:30 +0200961nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
Ben Skeggsebb945a2012-07-20 08:17:34 +1000962{
963 struct nouveau_cli *cli = nouveau_cli(fpriv);
964 struct nouveau_drm *drm = nouveau_drm(dev);
965
Dave Airlie5addcf02012-09-10 14:20:51 +1000966 pm_runtime_get_sync(dev->dev);
967
Kamil Dudkaac8c7932015-07-15 17:18:15 +0200968 mutex_lock(&cli->mutex);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000969 if (cli->abi16)
970 nouveau_abi16_fini(cli->abi16);
Kamil Dudkaac8c7932015-07-15 17:18:15 +0200971 mutex_unlock(&cli->mutex);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000972
973 mutex_lock(&drm->client.mutex);
974 list_del(&cli->head);
975 mutex_unlock(&drm->client.mutex);
Dave Airlie5addcf02012-09-10 14:20:51 +1000976
Ben Skeggs20d8a882016-05-18 13:36:34 +1000977 nouveau_cli_fini(cli);
978 kfree(cli);
Dave Airlie5addcf02012-09-10 14:20:51 +1000979 pm_runtime_mark_last_busy(dev->dev);
980 pm_runtime_put_autosuspend(dev->dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000981}
982
Rob Clarkbaa70942013-08-02 13:27:49 -0400983static const struct drm_ioctl_desc
Ben Skeggs77145f12012-07-31 16:16:21 +1000984nouveau_ioctls[] = {
Daniel Vetterf8c47142015-09-08 13:56:30 +0200985 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
986 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
987 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
988 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
989 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
990 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
991 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
992 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
993 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
994 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
995 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
996 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
Ben Skeggs77145f12012-07-31 16:16:21 +1000997};
998
Ben Skeggs27111a22014-08-10 04:10:31 +1000999long
1000nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
Dave Airlie5addcf02012-09-10 14:20:51 +10001001{
Ben Skeggs27111a22014-08-10 04:10:31 +10001002 struct drm_file *filp = file->private_data;
1003 struct drm_device *dev = filp->minor->dev;
Dave Airlie5addcf02012-09-10 14:20:51 +10001004 long ret;
Dave Airlie5addcf02012-09-10 14:20:51 +10001005
1006 ret = pm_runtime_get_sync(dev->dev);
Alexandre Courbotb6c42852014-02-12 14:00:59 +09001007 if (ret < 0 && ret != -EACCES)
Dave Airlie5addcf02012-09-10 14:20:51 +10001008 return ret;
1009
Ben Skeggs27111a22014-08-10 04:10:31 +10001010 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
1011 case DRM_NOUVEAU_NVIF:
1012 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
1013 break;
1014 default:
1015 ret = drm_ioctl(file, cmd, arg);
1016 break;
1017 }
Dave Airlie5addcf02012-09-10 14:20:51 +10001018
1019 pm_runtime_mark_last_busy(dev->dev);
1020 pm_runtime_put_autosuspend(dev->dev);
1021 return ret;
1022}
Ben Skeggs27111a22014-08-10 04:10:31 +10001023
Ben Skeggs77145f12012-07-31 16:16:21 +10001024static const struct file_operations
1025nouveau_driver_fops = {
1026 .owner = THIS_MODULE,
1027 .open = drm_open,
1028 .release = drm_release,
Dave Airlie5addcf02012-09-10 14:20:51 +10001029 .unlocked_ioctl = nouveau_drm_ioctl,
Ben Skeggs77145f12012-07-31 16:16:21 +10001030 .mmap = nouveau_ttm_mmap,
1031 .poll = drm_poll,
Ben Skeggs77145f12012-07-31 16:16:21 +10001032 .read = drm_read,
1033#if defined(CONFIG_COMPAT)
1034 .compat_ioctl = nouveau_compat_ioctl,
1035#endif
1036 .llseek = noop_llseek,
1037};
1038
1039static struct drm_driver
David Herrmann915b4d12014-08-29 12:12:43 +02001040driver_stub = {
Ben Skeggs77145f12012-07-31 16:16:21 +10001041 .driver_features =
Peter Antoine0e975982015-06-23 08:18:49 +01001042 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
1043 DRIVER_KMS_LEGACY_CONTEXT,
Ben Skeggs77145f12012-07-31 16:16:21 +10001044
Ben Skeggs77145f12012-07-31 16:16:21 +10001045 .open = nouveau_drm_open,
Ben Skeggs77145f12012-07-31 16:16:21 +10001046 .postclose = nouveau_drm_postclose,
1047 .lastclose = nouveau_vga_lastclose,
1048
Marcin Slusarz33b903e2013-02-08 21:42:13 +01001049#if defined(CONFIG_DEBUG_FS)
Karol Herbst56c101a2015-07-31 00:35:42 +02001050 .debugfs_init = nouveau_drm_debugfs_init,
Marcin Slusarz33b903e2013-02-08 21:42:13 +01001051#endif
1052
Ben Skeggs51cb4b32013-10-03 07:02:29 +10001053 .enable_vblank = nouveau_display_vblank_enable,
1054 .disable_vblank = nouveau_display_vblank_disable,
Ben Skeggsd83ef852013-11-14 13:37:49 +10001055 .get_scanout_position = nouveau_display_scanoutpos,
Daniel Vetter1bf6ad62017-05-09 16:03:28 +02001056 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos,
Ben Skeggs77145f12012-07-31 16:16:21 +10001057
1058 .ioctls = nouveau_ioctls,
Rob Clarkbaa70942013-08-02 13:27:49 -04001059 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
Ben Skeggs77145f12012-07-31 16:16:21 +10001060 .fops = &nouveau_driver_fops,
1061
1062 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1063 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
Aaron Plattnerab9ccb92013-01-15 20:47:43 +00001064 .gem_prime_export = drm_gem_prime_export,
1065 .gem_prime_import = drm_gem_prime_import,
1066 .gem_prime_pin = nouveau_gem_prime_pin,
Maarten Lankhorst3aac4502014-07-01 12:57:26 +02001067 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
Maarten Lankhorst1af7c7d2013-06-27 13:38:19 +02001068 .gem_prime_unpin = nouveau_gem_prime_unpin,
Aaron Plattnerab9ccb92013-01-15 20:47:43 +00001069 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
1070 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1071 .gem_prime_vmap = nouveau_gem_prime_vmap,
1072 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
Ben Skeggs77145f12012-07-31 16:16:21 +10001073
Daniel Vettera51e6ac2016-05-30 19:53:00 +02001074 .gem_free_object_unlocked = nouveau_gem_object_del,
Ben Skeggs77145f12012-07-31 16:16:21 +10001075 .gem_open_object = nouveau_gem_object_open,
1076 .gem_close_object = nouveau_gem_object_close,
1077
1078 .dumb_create = nouveau_display_dumb_create,
1079 .dumb_map_offset = nouveau_display_dumb_map_offset,
Ben Skeggs77145f12012-07-31 16:16:21 +10001080
1081 .name = DRIVER_NAME,
1082 .desc = DRIVER_DESC,
1083#ifdef GIT_REVISION
1084 .date = GIT_REVISION,
1085#else
1086 .date = DRIVER_DATE,
1087#endif
1088 .major = DRIVER_MAJOR,
1089 .minor = DRIVER_MINOR,
1090 .patchlevel = DRIVER_PATCHLEVEL,
1091};
1092
Ben Skeggs94580292012-07-06 12:14:00 +10001093static struct pci_device_id
1094nouveau_drm_pci_table[] = {
1095 {
1096 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1097 .class = PCI_BASE_CLASS_DISPLAY << 16,
1098 .class_mask = 0xff << 16,
1099 },
1100 {
1101 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1102 .class = PCI_BASE_CLASS_DISPLAY << 16,
1103 .class_mask = 0xff << 16,
1104 },
1105 {}
1106};
1107
Pierre Moreau703fa262014-08-18 22:43:24 +02001108static void nouveau_display_options(void)
1109{
1110 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1111
1112 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1113 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1114 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1115 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1116 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1117 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1118 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1119 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1120 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1121 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
Ben Skeggsf3a8b662016-11-04 11:44:21 +10001122 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz);
Pierre Moreau703fa262014-08-18 22:43:24 +02001123}
1124
Dave Airlie2d8b9cc2012-11-02 11:04:28 +10001125static const struct dev_pm_ops nouveau_pm_ops = {
1126 .suspend = nouveau_pmops_suspend,
1127 .resume = nouveau_pmops_resume,
1128 .freeze = nouveau_pmops_freeze,
1129 .thaw = nouveau_pmops_thaw,
1130 .poweroff = nouveau_pmops_freeze,
1131 .restore = nouveau_pmops_resume,
Dave Airlie5addcf02012-09-10 14:20:51 +10001132 .runtime_suspend = nouveau_pmops_runtime_suspend,
1133 .runtime_resume = nouveau_pmops_runtime_resume,
1134 .runtime_idle = nouveau_pmops_runtime_idle,
Dave Airlie2d8b9cc2012-11-02 11:04:28 +10001135};
1136
Ben Skeggs94580292012-07-06 12:14:00 +10001137static struct pci_driver
1138nouveau_drm_pci_driver = {
1139 .name = "nouveau",
1140 .id_table = nouveau_drm_pci_table,
1141 .probe = nouveau_drm_probe,
1142 .remove = nouveau_drm_remove,
Dave Airlie2d8b9cc2012-11-02 11:04:28 +10001143 .driver.pm = &nouveau_pm_ops,
Ben Skeggs94580292012-07-06 12:14:00 +10001144};
1145
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001146struct drm_device *
Alexandre Courbote396ecd2015-09-04 19:59:31 +09001147nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1148 struct platform_device *pdev,
Ben Skeggs47b25052015-08-20 14:54:15 +10001149 struct nvkm_device **pdevice)
Alexandre Courbot420b9462014-02-17 15:17:26 +09001150{
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001151 struct drm_device *drm;
1152 int err;
Alexandre Courbot420b9462014-02-17 15:17:26 +09001153
Alexandre Courbote396ecd2015-09-04 19:59:31 +09001154 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
Ben Skeggs7974dd12015-08-20 14:54:17 +10001155 true, true, ~0ULL, pdevice);
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001156 if (err)
Ben Skeggse781dc82015-08-20 14:54:15 +10001157 goto err_free;
Alexandre Courbot420b9462014-02-17 15:17:26 +09001158
David Herrmann915b4d12014-08-29 12:12:43 +02001159 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
Tom Gundersen0f288602016-09-21 16:59:19 +02001160 if (IS_ERR(drm)) {
1161 err = PTR_ERR(drm);
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001162 goto err_free;
Alexandre Courbot420b9462014-02-17 15:17:26 +09001163 }
1164
Thierry Reding4ac0a802018-11-23 13:11:51 +01001165 err = nouveau_drm_device_init(drm);
1166 if (err)
1167 goto err_put;
1168
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001169 platform_set_drvdata(pdev, drm);
1170
1171 return drm;
1172
Thierry Reding4ac0a802018-11-23 13:11:51 +01001173err_put:
1174 drm_dev_put(drm);
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001175err_free:
Ben Skeggse781dc82015-08-20 14:54:15 +10001176 nvkm_device_del(pdevice);
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001177
1178 return ERR_PTR(err);
Alexandre Courbot420b9462014-02-17 15:17:26 +09001179}
1180
Ben Skeggs94580292012-07-06 12:14:00 +10001181static int __init
1182nouveau_drm_init(void)
1183{
David Herrmann915b4d12014-08-29 12:12:43 +02001184 driver_pci = driver_stub;
David Herrmann915b4d12014-08-29 12:12:43 +02001185 driver_platform = driver_stub;
David Herrmann915b4d12014-08-29 12:12:43 +02001186
Pierre Moreau703fa262014-08-18 22:43:24 +02001187 nouveau_display_options();
1188
Ben Skeggs77145f12012-07-31 16:16:21 +10001189 if (nouveau_modeset == -1) {
Ben Skeggs77145f12012-07-31 16:16:21 +10001190 if (vgacon_text_force())
1191 nouveau_modeset = 0;
Ben Skeggs77145f12012-07-31 16:16:21 +10001192 }
1193
1194 if (!nouveau_modeset)
1195 return 0;
1196
Alexandre Courbot055a65d2015-01-15 15:29:56 +09001197#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1198 platform_driver_register(&nouveau_platform_driver);
1199#endif
1200
Ben Skeggs77145f12012-07-31 16:16:21 +10001201 nouveau_register_dsm_handler();
Pierre Moreaudb1a0ae22016-12-08 00:57:08 +01001202 nouveau_backlight_ctor();
Daniel Vetter10631d72017-05-24 16:51:40 +02001203
1204#ifdef CONFIG_PCI
1205 return pci_register_driver(&nouveau_drm_pci_driver);
1206#else
1207 return 0;
1208#endif
Ben Skeggs94580292012-07-06 12:14:00 +10001209}
1210
1211static void __exit
1212nouveau_drm_exit(void)
1213{
Ben Skeggs77145f12012-07-31 16:16:21 +10001214 if (!nouveau_modeset)
1215 return;
1216
Daniel Vetter10631d72017-05-24 16:51:40 +02001217#ifdef CONFIG_PCI
1218 pci_unregister_driver(&nouveau_drm_pci_driver);
1219#endif
Pierre Moreaudb1a0ae22016-12-08 00:57:08 +01001220 nouveau_backlight_dtor();
Ben Skeggs77145f12012-07-31 16:16:21 +10001221 nouveau_unregister_dsm_handler();
Alexandre Courbot055a65d2015-01-15 15:29:56 +09001222
1223#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1224 platform_driver_unregister(&nouveau_platform_driver);
1225#endif
Ben Skeggs94580292012-07-06 12:14:00 +10001226}
1227
1228module_init(nouveau_drm_init);
1229module_exit(nouveau_drm_exit);
1230
1231MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
Ben Skeggs77145f12012-07-31 16:16:21 +10001232MODULE_AUTHOR(DRIVER_AUTHOR);
1233MODULE_DESCRIPTION(DRIVER_DESC);
Ben Skeggs94580292012-07-06 12:14:00 +10001234MODULE_LICENSE("GPL and additional rights");