blob: 775443c9af943eb2e96ffd3187852b681fc3f916 [file] [log] [blame]
Ben Skeggs94580292012-07-06 12:14:00 +10001/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
Ben Skeggs77145f12012-07-31 16:16:21 +100025#include <linux/console.h>
Lukas Wunnerc5fd9362015-04-19 17:18:01 +020026#include <linux/delay.h>
Ben Skeggs94580292012-07-06 12:14:00 +100027#include <linux/module.h>
28#include <linux/pci.h>
Dave Airlie5addcf02012-09-10 14:20:51 +100029#include <linux/pm_runtime.h>
30#include <linux/vga_switcheroo.h>
Ben Skeggsfdb751e2014-08-10 04:10:23 +100031
Masahiro Yamadaae956212017-04-24 13:50:29 +090032#include <drm/drmP.h>
33#include <drm/drm_crtc_helper.h>
Ben Skeggsfdb751e2014-08-10 04:10:23 +100034
Ben Skeggsebb945a2012-07-20 08:17:34 +100035#include <core/gpuobj.h>
Ilia Mirkinc33e05a2014-02-13 21:35:14 -050036#include <core/option.h>
Ben Skeggs7974dd12015-08-20 14:54:17 +100037#include <core/pci.h>
38#include <core/tegra.h>
Ben Skeggs94580292012-07-06 12:14:00 +100039
Ben Skeggs04b88672016-05-22 20:35:16 +100040#include <nvif/driver.h>
Ben Skeggsa7cf0182018-05-08 20:39:46 +100041#include <nvif/fifo.h>
Ben Skeggs37e1c452018-05-08 20:39:48 +100042#include <nvif/user.h>
Ben Skeggs04b88672016-05-22 20:35:16 +100043
Ben Skeggs923bc412015-11-08 12:23:16 +100044#include <nvif/class.h>
Ben Skeggs845f2722015-11-08 12:16:40 +100045#include <nvif/cl0002.h>
Ben Skeggs8ed17302015-11-08 11:28:26 +100046#include <nvif/cla06f.h>
Ben Skeggs538b2692015-11-08 10:34:50 +100047#include <nvif/if0004.h>
48
Ben Skeggs4dc28132016-05-20 09:22:55 +100049#include "nouveau_drv.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100050#include "nouveau_dma.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100051#include "nouveau_ttm.h"
52#include "nouveau_gem.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100053#include "nouveau_vga.h"
Martin Peres8d021d72016-08-25 03:57:07 +030054#include "nouveau_led.h"
Ben Skeggsb9ed9192013-10-15 09:44:02 +100055#include "nouveau_hwmon.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100056#include "nouveau_acpi.h"
57#include "nouveau_bios.h"
58#include "nouveau_ioctl.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100059#include "nouveau_abi16.h"
60#include "nouveau_fbcon.h"
61#include "nouveau_fence.h"
Marcin Slusarz33b903e2013-02-08 21:42:13 +010062#include "nouveau_debugfs.h"
Ben Skeggs27111a22014-08-10 04:10:31 +100063#include "nouveau_usif.h"
Pierre Moreau703fa262014-08-18 22:43:24 +020064#include "nouveau_connector.h"
Alexandre Courbot055a65d2015-01-15 15:29:56 +090065#include "nouveau_platform.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100066
Ben Skeggs94580292012-07-06 12:14:00 +100067MODULE_PARM_DESC(config, "option string to pass to driver core");
68static char *nouveau_config;
69module_param_named(config, nouveau_config, charp, 0400);
70
71MODULE_PARM_DESC(debug, "debug string to pass to driver core");
72static char *nouveau_debug;
73module_param_named(debug, nouveau_debug, charp, 0400);
74
Ben Skeggsebb945a2012-07-20 08:17:34 +100075MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
76static int nouveau_noaccel = 0;
77module_param_named(noaccel, nouveau_noaccel, int, 0400);
78
Ben Skeggs94307382012-10-31 12:11:15 +100079MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
80 "0 = disabled, 1 = enabled, 2 = headless)");
81int nouveau_modeset = -1;
Ben Skeggs77145f12012-07-31 16:16:21 +100082module_param_named(modeset, nouveau_modeset, int, 0400);
83
Dave Airlie5addcf02012-09-10 14:20:51 +100084MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
Ben Skeggs321f5c52017-06-02 14:38:07 +100085static int nouveau_runtime_pm = -1;
Dave Airlie5addcf02012-09-10 14:20:51 +100086module_param_named(runpm, nouveau_runtime_pm, int, 0400);
87
David Herrmann915b4d12014-08-29 12:12:43 +020088static struct drm_driver driver_stub;
89static struct drm_driver driver_pci;
90static struct drm_driver driver_platform;
Ben Skeggs77145f12012-07-31 16:16:21 +100091
Ben Skeggs94580292012-07-06 12:14:00 +100092static u64
Alexandre Courbot420b9462014-02-17 15:17:26 +090093nouveau_pci_name(struct pci_dev *pdev)
Ben Skeggs94580292012-07-06 12:14:00 +100094{
95 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
96 name |= pdev->bus->number << 16;
97 name |= PCI_SLOT(pdev->devfn) << 8;
98 return name | PCI_FUNC(pdev->devfn);
99}
100
Alexandre Courbot420b9462014-02-17 15:17:26 +0900101static u64
102nouveau_platform_name(struct platform_device *platformdev)
103{
104 return platformdev->id;
105}
106
107static u64
108nouveau_name(struct drm_device *dev)
109{
110 if (dev->pdev)
111 return nouveau_pci_name(dev->pdev);
112 else
Laurent Pinchart76adb462016-12-18 00:01:19 +0200113 return nouveau_platform_name(to_platform_device(dev->dev));
Alexandre Courbot420b9462014-02-17 15:17:26 +0900114}
115
Ben Skeggs814a2322017-11-01 03:56:20 +1000116static inline bool
Ben Skeggs11e451e2018-05-08 20:39:47 +1000117nouveau_cli_work_ready(struct dma_fence *fence)
Ben Skeggs814a2322017-11-01 03:56:20 +1000118{
Ben Skeggs11e451e2018-05-08 20:39:47 +1000119 if (!dma_fence_is_signaled(fence))
120 return false;
Ben Skeggs814a2322017-11-01 03:56:20 +1000121 dma_fence_put(fence);
122 return true;
123}
124
125static void
Ben Skeggs11e451e2018-05-08 20:39:47 +1000126nouveau_cli_work(struct work_struct *w)
Ben Skeggs814a2322017-11-01 03:56:20 +1000127{
Ben Skeggs11e451e2018-05-08 20:39:47 +1000128 struct nouveau_cli *cli = container_of(w, typeof(*cli), work);
Ben Skeggs814a2322017-11-01 03:56:20 +1000129 struct nouveau_cli_work *work, *wtmp;
130 mutex_lock(&cli->lock);
131 list_for_each_entry_safe(work, wtmp, &cli->worker, head) {
Ben Skeggs11e451e2018-05-08 20:39:47 +1000132 if (!work->fence || nouveau_cli_work_ready(work->fence)) {
Ben Skeggs814a2322017-11-01 03:56:20 +1000133 list_del(&work->head);
134 work->func(work);
135 }
136 }
137 mutex_unlock(&cli->lock);
138}
139
140static void
141nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)
142{
143 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb);
144 schedule_work(&work->cli->work);
145}
146
147void
148nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
149 struct nouveau_cli_work *work)
150{
151 work->fence = dma_fence_get(fence);
152 work->cli = cli;
153 mutex_lock(&cli->lock);
154 list_add_tail(&work->head, &cli->worker);
Ben Skeggs814a2322017-11-01 03:56:20 +1000155 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
156 nouveau_cli_work_fence(fence, &work->cb);
Ben Skeggsb26a2312017-12-23 08:54:28 +1000157 mutex_unlock(&cli->lock);
Ben Skeggs814a2322017-11-01 03:56:20 +1000158}
159
160static void
Ben Skeggs20d8a882016-05-18 13:36:34 +1000161nouveau_cli_fini(struct nouveau_cli *cli)
Ben Skeggs94580292012-07-06 12:14:00 +1000162{
Ben Skeggs11e451e2018-05-08 20:39:47 +1000163 /* All our channels are dead now, which means all the fences they
164 * own are signalled, and all callback functions have been called.
165 *
166 * So, after flushing the workqueue, there should be nothing left.
167 */
168 flush_work(&cli->work);
169 WARN_ON(!list_empty(&cli->worker));
170
Ben Skeggs27111a22014-08-10 04:10:31 +1000171 usif_client_fini(cli);
Ben Skeggs24e83752017-11-01 03:56:19 +1000172 nouveau_vmm_fini(&cli->vmm);
Ben Skeggs01670a72017-11-01 03:56:19 +1000173 nvif_mmu_fini(&cli->mmu);
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000174 nvif_device_fini(&cli->device);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000175 mutex_lock(&cli->drm->master.lock);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000176 nvif_client_fini(&cli->base);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000177 mutex_unlock(&cli->drm->master.lock);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000178}
179
180static int
181nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
182 struct nouveau_cli *cli)
183{
Ben Skeggs01670a72017-11-01 03:56:19 +1000184 static const struct nvif_mclass
Ben Skeggs7f507622017-11-01 03:56:20 +1000185 mems[] = {
186 { NVIF_CLASS_MEM_GF100, -1 },
187 { NVIF_CLASS_MEM_NV50 , -1 },
188 { NVIF_CLASS_MEM_NV04 , -1 },
189 {}
190 };
191 static const struct nvif_mclass
Ben Skeggs01670a72017-11-01 03:56:19 +1000192 mmus[] = {
193 { NVIF_CLASS_MMU_GF100, -1 },
194 { NVIF_CLASS_MMU_NV50 , -1 },
195 { NVIF_CLASS_MMU_NV04 , -1 },
196 {}
197 };
Ben Skeggs96da0bc2017-11-01 03:56:20 +1000198 static const struct nvif_mclass
199 vmms[] = {
200 { NVIF_CLASS_VMM_GP100, -1 },
201 { NVIF_CLASS_VMM_GM200, -1 },
202 { NVIF_CLASS_VMM_GF100, -1 },
203 { NVIF_CLASS_VMM_NV50 , -1 },
204 { NVIF_CLASS_VMM_NV04 , -1 },
205 {}
206 };
Ben Skeggs20d8a882016-05-18 13:36:34 +1000207 u64 device = nouveau_name(drm->dev);
208 int ret;
209
210 snprintf(cli->name, sizeof(cli->name), "%s", sname);
Ben Skeggse75c0912017-11-01 03:56:19 +1000211 cli->drm = drm;
Ben Skeggs20d8a882016-05-18 13:36:34 +1000212 mutex_init(&cli->mutex);
213 usif_client_init(cli);
214
Ben Skeggs814a2322017-11-01 03:56:20 +1000215 INIT_WORK(&cli->work, nouveau_cli_work);
216 INIT_LIST_HEAD(&cli->worker);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000217 mutex_init(&cli->lock);
218
219 if (cli == &drm->master) {
Ben Skeggs80e60972016-05-23 11:25:17 +1000220 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
221 cli->name, device, &cli->base);
222 } else {
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000223 mutex_lock(&drm->master.lock);
224 ret = nvif_client_init(&drm->master.base, cli->name, device,
Ben Skeggs80e60972016-05-23 11:25:17 +1000225 &cli->base);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000226 mutex_unlock(&drm->master.lock);
Ben Skeggs80e60972016-05-23 11:25:17 +1000227 }
Ben Skeggs20d8a882016-05-18 13:36:34 +1000228 if (ret) {
229 NV_ERROR(drm, "Client allocation failed: %d\n", ret);
230 goto done;
231 }
232
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000233 ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE,
234 &(struct nv_device_v0) {
235 .device = ~0,
236 }, sizeof(struct nv_device_v0),
237 &cli->device);
238 if (ret) {
239 NV_ERROR(drm, "Device allocation failed: %d\n", ret);
240 goto done;
241 }
242
Ben Skeggs01670a72017-11-01 03:56:19 +1000243 ret = nvif_mclass(&cli->device.object, mmus);
244 if (ret < 0) {
245 NV_ERROR(drm, "No supported MMU class\n");
246 goto done;
247 }
248
249 ret = nvif_mmu_init(&cli->device.object, mmus[ret].oclass, &cli->mmu);
250 if (ret) {
251 NV_ERROR(drm, "MMU allocation failed: %d\n", ret);
252 goto done;
253 }
254
Ben Skeggs96da0bc2017-11-01 03:56:20 +1000255 ret = nvif_mclass(&cli->mmu.object, vmms);
256 if (ret < 0) {
257 NV_ERROR(drm, "No supported VMM class\n");
258 goto done;
259 }
260
261 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
262 if (ret) {
263 NV_ERROR(drm, "VMM allocation failed: %d\n", ret);
264 goto done;
265 }
266
Ben Skeggs7f507622017-11-01 03:56:20 +1000267 ret = nvif_mclass(&cli->mmu.object, mems);
268 if (ret < 0) {
269 NV_ERROR(drm, "No supported MEM class\n");
270 goto done;
271 }
272
273 cli->mem = &mems[ret];
Ben Skeggs7f507622017-11-01 03:56:20 +1000274 return 0;
Ben Skeggs20d8a882016-05-18 13:36:34 +1000275done:
276 if (ret)
277 nouveau_cli_fini(cli);
278 return ret;
Ben Skeggs94580292012-07-06 12:14:00 +1000279}
280
Ben Skeggsebb945a2012-07-20 08:17:34 +1000281static void
282nouveau_accel_fini(struct nouveau_drm *drm)
283{
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000284 nouveau_channel_idle(drm->channel);
Ben Skeggs0ad72862014-08-10 04:10:22 +1000285 nvif_object_fini(&drm->ntfy);
Ben Skeggsf027f492015-08-20 14:54:17 +1000286 nvkm_gpuobj_del(&drm->notify);
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000287 nvif_notify_fini(&drm->flip);
Ben Skeggs0ad72862014-08-10 04:10:22 +1000288 nvif_object_fini(&drm->nvsw);
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000289 nouveau_channel_del(&drm->channel);
290
291 nouveau_channel_idle(drm->cechan);
Ben Skeggs0ad72862014-08-10 04:10:22 +1000292 nvif_object_fini(&drm->ttm.copy);
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000293 nouveau_channel_del(&drm->cechan);
294
Ben Skeggsebb945a2012-07-20 08:17:34 +1000295 if (drm->fence)
296 nouveau_fence(drm)->dtor(drm);
297}
298
299static void
300nouveau_accel_init(struct nouveau_drm *drm)
301{
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000302 struct nvif_device *device = &drm->client.device;
Ben Skeggs41a63402015-08-20 14:54:16 +1000303 struct nvif_sclass *sclass;
Ben Skeggs49981042012-08-06 19:38:25 +1000304 u32 arg0, arg1;
Ben Skeggs41a63402015-08-20 14:54:16 +1000305 int ret, i, n;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000306
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000307 if (nouveau_noaccel)
Ben Skeggsebb945a2012-07-20 08:17:34 +1000308 return;
309
Ben Skeggseb47db42018-05-08 20:39:46 +1000310 ret = nouveau_channels_init(drm);
311 if (ret)
312 return;
313
Ben Skeggs37e1c452018-05-08 20:39:48 +1000314 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) {
315 ret = nvif_user_init(device);
316 if (ret)
317 return;
318 }
319
Ben Skeggsebb945a2012-07-20 08:17:34 +1000320 /* initialise synchronisation routines */
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000321 /*XXX: this is crap, but the fence/channel stuff is a little
322 * backwards in some places. this will be fixed.
323 */
Ben Skeggs41a63402015-08-20 14:54:16 +1000324 ret = n = nvif_object_sclass_get(&device->object, &sclass);
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000325 if (ret < 0)
326 return;
327
Ben Skeggs41a63402015-08-20 14:54:16 +1000328 for (ret = -ENOSYS, i = 0; i < n; i++) {
329 switch (sclass[i].oclass) {
Ben Skeggsbbf89062014-08-10 04:10:25 +1000330 case NV03_CHANNEL_DMA:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000331 ret = nv04_fence_create(drm);
332 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000333 case NV10_CHANNEL_DMA:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000334 ret = nv10_fence_create(drm);
335 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000336 case NV17_CHANNEL_DMA:
337 case NV40_CHANNEL_DMA:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000338 ret = nv17_fence_create(drm);
339 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000340 case NV50_CHANNEL_GPFIFO:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000341 ret = nv50_fence_create(drm);
342 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000343 case G82_CHANNEL_GPFIFO:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000344 ret = nv84_fence_create(drm);
345 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000346 case FERMI_CHANNEL_GPFIFO:
347 case KEPLER_CHANNEL_GPFIFO_A:
Ben Skeggs63f8c9b2016-03-11 13:09:28 +1000348 case KEPLER_CHANNEL_GPFIFO_B:
Ben Skeggsa1020af2015-04-14 11:47:24 +1000349 case MAXWELL_CHANNEL_GPFIFO_A:
Ben Skeggse8ff9792016-07-09 10:41:01 +1000350 case PASCAL_CHANNEL_GPFIFO_A:
Ben Skeggs37e1c452018-05-08 20:39:48 +1000351 case VOLTA_CHANNEL_GPFIFO_A:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000352 ret = nvc0_fence_create(drm);
353 break;
354 default:
355 break;
356 }
357 }
358
Ben Skeggs41a63402015-08-20 14:54:16 +1000359 nvif_object_sclass_put(&sclass);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000360 if (ret) {
361 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
362 nouveau_accel_fini(drm);
363 return;
364 }
365
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000366 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000367 ret = nouveau_channel_new(drm, &drm->client.device,
Ben Skeggsa7cf0182018-05-08 20:39:46 +1000368 nvif_fifo_runlist_ce(device), 0,
369 &drm->cechan);
Ben Skeggs49981042012-08-06 19:38:25 +1000370 if (ret)
371 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
372
Ben Skeggsa7cf0182018-05-08 20:39:46 +1000373 arg0 = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR);
Ben Skeggs49469802012-11-22 13:43:55 +1000374 arg1 = 1;
Ben Skeggs00fc6f62013-07-09 14:20:15 +1000375 } else
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000376 if (device->info.chipset >= 0xa3 &&
377 device->info.chipset != 0xaa &&
378 device->info.chipset != 0xac) {
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000379 ret = nouveau_channel_new(drm, &drm->client.device,
Ben Skeggs0ad72862014-08-10 04:10:22 +1000380 NvDmaFB, NvDmaTT, &drm->cechan);
Ben Skeggs00fc6f62013-07-09 14:20:15 +1000381 if (ret)
382 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
383
384 arg0 = NvDmaFB;
385 arg1 = NvDmaTT;
Ben Skeggs49981042012-08-06 19:38:25 +1000386 } else {
387 arg0 = NvDmaFB;
388 arg1 = NvDmaTT;
389 }
390
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000391 ret = nouveau_channel_new(drm, &drm->client.device,
392 arg0, arg1, &drm->channel);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000393 if (ret) {
394 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
395 nouveau_accel_fini(drm);
396 return;
397 }
398
Ben Skeggs512fa0b2018-05-08 20:39:47 +1000399 if (device->info.family < NV_DEVICE_INFO_V0_TESLA) {
400 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
401 nouveau_abi16_swclass(drm), NULL, 0,
402 &drm->nvsw);
Ben Skeggs69a61462013-11-13 10:58:51 +1000403 if (ret == 0) {
Ben Skeggs512fa0b2018-05-08 20:39:47 +1000404 ret = RING_SPACE(drm->channel, 2);
405 if (ret == 0) {
Ben Skeggs69a61462013-11-13 10:58:51 +1000406 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
Ben Skeggs512fa0b2018-05-08 20:39:47 +1000407 OUT_RING (drm->channel, drm->nvsw.handle);
408 }
409
410 ret = nvif_notify_init(&drm->nvsw,
411 nouveau_flip_complete,
412 false, NV04_NVSW_NTFY_UEVENT,
413 NULL, 0, 0, &drm->flip);
414 if (ret == 0)
415 ret = nvif_notify_get(&drm->flip);
416 if (ret) {
417 nouveau_accel_fini(drm);
418 return;
Ben Skeggs69a61462013-11-13 10:58:51 +1000419 }
420 }
Ben Skeggs898a2b32015-08-20 14:54:18 +1000421
Ben Skeggs898a2b32015-08-20 14:54:18 +1000422 if (ret) {
Ben Skeggs512fa0b2018-05-08 20:39:47 +1000423 NV_ERROR(drm, "failed to allocate sw class, %d\n", ret);
Ben Skeggs898a2b32015-08-20 14:54:18 +1000424 nouveau_accel_fini(drm);
425 return;
426 }
Ben Skeggs69a61462013-11-13 10:58:51 +1000427 }
428
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000429 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000430 ret = nvkm_gpuobj_new(nvxx_device(&drm->client.device), 32, 0,
431 false, NULL, &drm->notify);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000432 if (ret) {
433 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
434 nouveau_accel_fini(drm);
435 return;
436 }
437
Ben Skeggsa01ca782015-08-20 14:54:15 +1000438 ret = nvif_object_init(&drm->channel->user, NvNotify0,
Ben Skeggs4acfd702014-08-10 04:10:24 +1000439 NV_DMA_IN_MEMORY,
440 &(struct nv_dma_v0) {
441 .target = NV_DMA_V0_TARGET_VRAM,
442 .access = NV_DMA_V0_ACCESS_RDWR,
Ben Skeggsebb945a2012-07-20 08:17:34 +1000443 .start = drm->notify->addr,
444 .limit = drm->notify->addr + 31
Ben Skeggs4acfd702014-08-10 04:10:24 +1000445 }, sizeof(struct nv_dma_v0),
Ben Skeggs0ad72862014-08-10 04:10:22 +1000446 &drm->ntfy);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000447 if (ret) {
448 nouveau_accel_fini(drm);
449 return;
450 }
451 }
452
453
Ben Skeggs49981042012-08-06 19:38:25 +1000454 nouveau_bo_move_init(drm);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000455}
456
Greg Kroah-Hartman56550d92012-12-21 15:09:25 -0800457static int nouveau_drm_probe(struct pci_dev *pdev,
458 const struct pci_device_id *pent)
Ben Skeggs94580292012-07-06 12:14:00 +1000459{
Ben Skeggsbe83cd42015-01-14 15:36:34 +1000460 struct nvkm_device *device;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000461 struct apertures_struct *aper;
462 bool boot = false;
Ben Skeggs94580292012-07-06 12:14:00 +1000463 int ret;
464
Lukas Wunnerb00e5332016-05-31 11:13:27 +0200465 if (vga_switcheroo_client_probe_defer(pdev))
Lukas Wunner98b3a342016-01-11 20:09:20 +0100466 return -EPROBE_DEFER;
467
Ben Skeggs0e67bed2016-07-12 11:57:07 +1000468 /* We need to check that the chipset is supported before booting
469 * fbdev off the hardware, as there's no way to put it back.
470 */
471 ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device);
472 if (ret)
473 return ret;
474
475 nvkm_device_del(&device);
476
477 /* Remove conflicting drivers (vesafb, efifb etc). */
Ben Skeggsebb945a2012-07-20 08:17:34 +1000478 aper = alloc_apertures(3);
479 if (!aper)
480 return -ENOMEM;
481
482 aper->ranges[0].base = pci_resource_start(pdev, 1);
483 aper->ranges[0].size = pci_resource_len(pdev, 1);
484 aper->count = 1;
485
486 if (pci_resource_len(pdev, 2)) {
487 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
488 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
489 aper->count++;
490 }
491
492 if (pci_resource_len(pdev, 3)) {
493 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
494 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
495 aper->count++;
496 }
497
498#ifdef CONFIG_X86
499 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
500#endif
Ben Skeggs771fa0e2014-08-10 04:10:31 +1000501 if (nouveau_modeset != 2)
Daniel Vetter44adece2016-08-10 18:52:34 +0200502 drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot);
Tommi Rantala83ef7772012-11-09 09:19:40 +0000503 kfree(aper);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000504
Ben Skeggs7974dd12015-08-20 14:54:17 +1000505 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
506 true, true, ~0ULL, &device);
Ben Skeggs94580292012-07-06 12:14:00 +1000507 if (ret)
508 return ret;
509
510 pci_set_master(pdev);
511
David Herrmann915b4d12014-08-29 12:12:43 +0200512 ret = drm_get_pci_dev(pdev, pent, &driver_pci);
Ben Skeggs94580292012-07-06 12:14:00 +1000513 if (ret) {
Ben Skeggse781dc82015-08-20 14:54:15 +1000514 nvkm_device_del(&device);
Ben Skeggs94580292012-07-06 12:14:00 +1000515 return ret;
516 }
517
518 return 0;
519}
520
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200521static int
Ben Skeggs94580292012-07-06 12:14:00 +1000522nouveau_drm_load(struct drm_device *dev, unsigned long flags)
523{
Ben Skeggs94580292012-07-06 12:14:00 +1000524 struct nouveau_drm *drm;
525 int ret;
526
Ben Skeggs20d8a882016-05-18 13:36:34 +1000527 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
528 return -ENOMEM;
529 dev->dev_private = drm;
530 drm->dev = dev;
531
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000532 ret = nouveau_cli_init(drm, "DRM-master", &drm->master);
533 if (ret)
534 return ret;
535
Ben Skeggs20d8a882016-05-18 13:36:34 +1000536 ret = nouveau_cli_init(drm, "DRM", &drm->client);
Ben Skeggs94580292012-07-06 12:14:00 +1000537 if (ret)
538 return ret;
539
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000540 dev->irq_enabled = true;
541
Ben Skeggs989aa5b2015-01-12 12:33:37 +1000542 nvxx_client(&drm->client.base)->debug =
Ben Skeggsbe83cd42015-01-14 15:36:34 +1000543 nvkm_dbgopt(nouveau_debug, "DRM");
Ben Skeggs77145f12012-07-31 16:16:21 +1000544
Ben Skeggs94580292012-07-06 12:14:00 +1000545 INIT_LIST_HEAD(&drm->clients);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000546 spin_lock_init(&drm->tile.lock);
Ben Skeggs94580292012-07-06 12:14:00 +1000547
Ben Skeggs77145f12012-07-31 16:16:21 +1000548 /* workaround an odd issue on nvc1 by disabling the device's
549 * nosnoop capability. hopefully won't cause issues until a
550 * better fix is found - assuming there is one...
551 */
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000552 if (drm->client.device.info.chipset == 0xc1)
553 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000554
Ben Skeggs77145f12012-07-31 16:16:21 +1000555 nouveau_vga_init(drm);
Ben Skeggscb75d972012-07-11 10:44:20 +1000556
Ben Skeggsebb945a2012-07-20 08:17:34 +1000557 ret = nouveau_ttm_init(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000558 if (ret)
Ben Skeggs77145f12012-07-31 16:16:21 +1000559 goto fail_ttm;
Ben Skeggs94580292012-07-06 12:14:00 +1000560
Ben Skeggs77145f12012-07-31 16:16:21 +1000561 ret = nouveau_bios_init(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000562 if (ret)
Ben Skeggs77145f12012-07-31 16:16:21 +1000563 goto fail_bios;
564
Ben Skeggs77145f12012-07-31 16:16:21 +1000565 ret = nouveau_display_create(dev);
566 if (ret)
567 goto fail_dispctor;
568
569 if (dev->mode_config.num_crtc) {
570 ret = nouveau_display_init(dev);
571 if (ret)
572 goto fail_dispinit;
573 }
574
Karol Herbstb126a202015-07-30 11:52:23 +0200575 nouveau_debugfs_init(drm);
Ben Skeggsb9ed9192013-10-15 09:44:02 +1000576 nouveau_hwmon_init(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000577 nouveau_accel_init(drm);
578 nouveau_fbcon_init(dev);
Martin Peres8d021d72016-08-25 03:57:07 +0300579 nouveau_led_init(dev);
Dave Airlie5addcf02012-09-10 14:20:51 +1000580
Ben Skeggs8fa43382017-06-02 14:49:45 +1000581 if (nouveau_pmops_runtime()) {
Dave Airlie5addcf02012-09-10 14:20:51 +1000582 pm_runtime_use_autosuspend(dev->dev);
583 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
584 pm_runtime_set_active(dev->dev);
585 pm_runtime_allow(dev->dev);
586 pm_runtime_mark_last_busy(dev->dev);
587 pm_runtime_put(dev->dev);
Peter Ujfalusi9a2eba32017-05-15 12:04:31 +0300588 } else {
589 /* enable polling for external displays */
590 drm_kms_helper_poll_enable(dev);
Dave Airlie5addcf02012-09-10 14:20:51 +1000591 }
Ben Skeggs94580292012-07-06 12:14:00 +1000592 return 0;
593
Ben Skeggs77145f12012-07-31 16:16:21 +1000594fail_dispinit:
595 nouveau_display_destroy(dev);
596fail_dispctor:
Ben Skeggs77145f12012-07-31 16:16:21 +1000597 nouveau_bios_takedown(dev);
598fail_bios:
Ben Skeggsebb945a2012-07-20 08:17:34 +1000599 nouveau_ttm_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000600fail_ttm:
Ben Skeggs77145f12012-07-31 16:16:21 +1000601 nouveau_vga_fini(drm);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000602 nouveau_cli_fini(&drm->client);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000603 nouveau_cli_fini(&drm->master);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000604 kfree(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000605 return ret;
606}
607
Gabriel Krisman Bertazi11b3c202017-01-06 15:57:31 -0200608static void
Ben Skeggs94580292012-07-06 12:14:00 +1000609nouveau_drm_unload(struct drm_device *dev)
610{
Ben Skeggs77145f12012-07-31 16:16:21 +1000611 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000612
Ben Skeggs8fa43382017-06-02 14:49:45 +1000613 if (nouveau_pmops_runtime()) {
Lukas Wunnerc1b16b42016-06-08 18:47:27 +0200614 pm_runtime_get_sync(dev->dev);
Lukas Wunner55c868a2016-06-08 18:47:27 +0200615 pm_runtime_forbid(dev->dev);
Lukas Wunnerc1b16b42016-06-08 18:47:27 +0200616 }
617
Martin Peres8d021d72016-08-25 03:57:07 +0300618 nouveau_led_fini(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000619 nouveau_fbcon_fini(dev);
620 nouveau_accel_fini(drm);
Ben Skeggsb9ed9192013-10-15 09:44:02 +1000621 nouveau_hwmon_fini(dev);
Karol Herbstb126a202015-07-30 11:52:23 +0200622 nouveau_debugfs_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000623
Ben Skeggs94307382012-10-31 12:11:15 +1000624 if (dev->mode_config.num_crtc)
Ben Skeggs3b4c0ab2016-11-04 17:20:35 +1000625 nouveau_display_fini(dev, false);
Ben Skeggs77145f12012-07-31 16:16:21 +1000626 nouveau_display_destroy(dev);
627
Ben Skeggs77145f12012-07-31 16:16:21 +1000628 nouveau_bios_takedown(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000629
Ben Skeggsebb945a2012-07-20 08:17:34 +1000630 nouveau_ttm_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000631 nouveau_vga_fini(drm);
Ben Skeggscb75d972012-07-11 10:44:20 +1000632
Ben Skeggs20d8a882016-05-18 13:36:34 +1000633 nouveau_cli_fini(&drm->client);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000634 nouveau_cli_fini(&drm->master);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000635 kfree(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000636}
637
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +0900638void
639nouveau_drm_device_remove(struct drm_device *dev)
Ben Skeggs94580292012-07-06 12:14:00 +1000640{
Ben Skeggs77145f12012-07-31 16:16:21 +1000641 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggsbe83cd42015-01-14 15:36:34 +1000642 struct nvkm_client *client;
Ben Skeggs76ecea52015-08-20 14:54:15 +1000643 struct nvkm_device *device;
Ben Skeggs77145f12012-07-31 16:16:21 +1000644
Ilia Mirkin7d3428c2014-01-29 19:53:00 -0500645 dev->irq_enabled = false;
Ben Skeggs989aa5b2015-01-12 12:33:37 +1000646 client = nvxx_client(&drm->client.base);
Ben Skeggs4e7e62d2015-08-20 14:54:15 +1000647 device = nvkm_device_find(client->device);
Ben Skeggs77145f12012-07-31 16:16:21 +1000648 drm_put_dev(dev);
649
Ben Skeggse781dc82015-08-20 14:54:15 +1000650 nvkm_device_del(&device);
Ben Skeggs94580292012-07-06 12:14:00 +1000651}
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +0900652
653static void
654nouveau_drm_remove(struct pci_dev *pdev)
655{
656 struct drm_device *dev = pci_get_drvdata(pdev);
657
658 nouveau_drm_device_remove(dev);
659}
Ben Skeggs94580292012-07-06 12:14:00 +1000660
Marcin Slusarzcd897832013-01-27 15:01:55 +0100661static int
Dave Airlie05c63c22014-03-26 14:10:06 +1000662nouveau_do_suspend(struct drm_device *dev, bool runtime)
Ben Skeggs94580292012-07-06 12:14:00 +1000663{
Ben Skeggs77145f12012-07-31 16:16:21 +1000664 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000665 int ret;
666
Martin Peres8d021d72016-08-25 03:57:07 +0300667 nouveau_led_suspend(dev);
668
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000669 if (dev->mode_config.num_crtc) {
Ben Skeggs2d38a532017-08-14 08:40:55 +1000670 NV_DEBUG(drm, "suspending console...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000671 nouveau_fbcon_set_suspend(dev, 1);
Ben Skeggs2d38a532017-08-14 08:40:55 +1000672 NV_DEBUG(drm, "suspending display...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000673 ret = nouveau_display_suspend(dev, runtime);
Ben Skeggs94307382012-10-31 12:11:15 +1000674 if (ret)
675 return ret;
676 }
Ben Skeggs94580292012-07-06 12:14:00 +1000677
Ben Skeggs2d38a532017-08-14 08:40:55 +1000678 NV_DEBUG(drm, "evicting buffers...\n");
Ben Skeggsebb945a2012-07-20 08:17:34 +1000679 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
680
Ben Skeggs2d38a532017-08-14 08:40:55 +1000681 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
Ben Skeggs81dff212013-05-07 08:33:10 +1000682 if (drm->cechan) {
683 ret = nouveau_channel_idle(drm->cechan);
684 if (ret)
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500685 goto fail_display;
Ben Skeggs81dff212013-05-07 08:33:10 +1000686 }
687
688 if (drm->channel) {
689 ret = nouveau_channel_idle(drm->channel);
690 if (ret)
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500691 goto fail_display;
Ben Skeggs81dff212013-05-07 08:33:10 +1000692 }
693
Ben Skeggs2d38a532017-08-14 08:40:55 +1000694 NV_DEBUG(drm, "suspending fence...\n");
Ben Skeggsebb945a2012-07-20 08:17:34 +1000695 if (drm->fence && nouveau_fence(drm)->suspend) {
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500696 if (!nouveau_fence(drm)->suspend(drm)) {
697 ret = -ENOMEM;
698 goto fail_display;
699 }
Ben Skeggsebb945a2012-07-20 08:17:34 +1000700 }
701
Ben Skeggs2d38a532017-08-14 08:40:55 +1000702 NV_DEBUG(drm, "suspending object tree...\n");
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000703 ret = nvif_client_suspend(&drm->master.base);
Ben Skeggs94580292012-07-06 12:14:00 +1000704 if (ret)
705 goto fail_client;
706
Ben Skeggs94580292012-07-06 12:14:00 +1000707 return 0;
708
709fail_client:
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500710 if (drm->fence && nouveau_fence(drm)->resume)
711 nouveau_fence(drm)->resume(drm);
712
713fail_display:
Ben Skeggs94307382012-10-31 12:11:15 +1000714 if (dev->mode_config.num_crtc) {
Ben Skeggs2d38a532017-08-14 08:40:55 +1000715 NV_DEBUG(drm, "resuming display...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000716 nouveau_display_resume(dev, runtime);
Ben Skeggs94307382012-10-31 12:11:15 +1000717 }
Ben Skeggs94580292012-07-06 12:14:00 +1000718 return ret;
719}
720
Marcin Slusarzcd897832013-01-27 15:01:55 +0100721static int
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000722nouveau_do_resume(struct drm_device *dev, bool runtime)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000723{
724 struct nouveau_drm *drm = nouveau_drm(dev);
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000725
Ben Skeggs2d38a532017-08-14 08:40:55 +1000726 NV_DEBUG(drm, "resuming object tree...\n");
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000727 nvif_client_resume(&drm->master.base);
Ben Skeggs94580292012-07-06 12:14:00 +1000728
Ben Skeggs2d38a532017-08-14 08:40:55 +1000729 NV_DEBUG(drm, "resuming fence...\n");
Ben Skeggs81dff212013-05-07 08:33:10 +1000730 if (drm->fence && nouveau_fence(drm)->resume)
731 nouveau_fence(drm)->resume(drm);
732
Ben Skeggs77145f12012-07-31 16:16:21 +1000733 nouveau_run_vbios_init(dev);
Ben Skeggs77145f12012-07-31 16:16:21 +1000734
Ben Skeggs94307382012-10-31 12:11:15 +1000735 if (dev->mode_config.num_crtc) {
Ben Skeggs2d38a532017-08-14 08:40:55 +1000736 NV_DEBUG(drm, "resuming display...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000737 nouveau_display_resume(dev, runtime);
Ben Skeggs2d38a532017-08-14 08:40:55 +1000738 NV_DEBUG(drm, "resuming console...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000739 nouveau_fbcon_set_suspend(dev, 0);
Ben Skeggs94307382012-10-31 12:11:15 +1000740 }
Dave Airlie5addcf02012-09-10 14:20:51 +1000741
Martin Peres8d021d72016-08-25 03:57:07 +0300742 nouveau_led_resume(dev);
743
Ben Skeggs77145f12012-07-31 16:16:21 +1000744 return 0;
Ben Skeggs94580292012-07-06 12:14:00 +1000745}
746
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000747int
748nouveau_pmops_suspend(struct device *dev)
749{
750 struct pci_dev *pdev = to_pci_dev(dev);
751 struct drm_device *drm_dev = pci_get_drvdata(pdev);
752 int ret;
753
754 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
755 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
756 return 0;
757
758 ret = nouveau_do_suspend(drm_dev, false);
759 if (ret)
760 return ret;
761
762 pci_save_state(pdev);
763 pci_disable_device(pdev);
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000764 pci_set_power_state(pdev, PCI_D3hot);
Lukas Wunnerc5fd9362015-04-19 17:18:01 +0200765 udelay(200);
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000766 return 0;
767}
768
769int
770nouveau_pmops_resume(struct device *dev)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000771{
772 struct pci_dev *pdev = to_pci_dev(dev);
773 struct drm_device *drm_dev = pci_get_drvdata(pdev);
774 int ret;
775
Dave Airlie5addcf02012-09-10 14:20:51 +1000776 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
777 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000778 return 0;
779
780 pci_set_power_state(pdev, PCI_D0);
781 pci_restore_state(pdev);
782 ret = pci_enable_device(pdev);
783 if (ret)
784 return ret;
785 pci_set_master(pdev);
786
Hans de Goede0b2fe652016-11-21 17:50:55 +0100787 ret = nouveau_do_resume(drm_dev, false);
788
789 /* Monitors may have been connected / disconnected during suspend */
790 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
791
792 return ret;
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000793}
794
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000795static int
796nouveau_pmops_freeze(struct device *dev)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000797{
798 struct pci_dev *pdev = to_pci_dev(dev);
799 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000800 return nouveau_do_suspend(drm_dev, false);
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000801}
802
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000803static int
804nouveau_pmops_thaw(struct device *dev)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000805{
806 struct pci_dev *pdev = to_pci_dev(dev);
807 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000808 return nouveau_do_resume(drm_dev, false);
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000809}
810
Ben Skeggs321f5c52017-06-02 14:38:07 +1000811bool
Arnd Bergmann54994732017-06-09 12:38:33 +0200812nouveau_pmops_runtime(void)
Ben Skeggs321f5c52017-06-02 14:38:07 +1000813{
814 if (nouveau_runtime_pm == -1)
815 return nouveau_is_optimus() || nouveau_is_v1_dsm();
816 return nouveau_runtime_pm == 1;
817}
818
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000819static int
820nouveau_pmops_runtime_suspend(struct device *dev)
821{
822 struct pci_dev *pdev = to_pci_dev(dev);
823 struct drm_device *drm_dev = pci_get_drvdata(pdev);
824 int ret;
825
Ben Skeggs321f5c52017-06-02 14:38:07 +1000826 if (!nouveau_pmops_runtime()) {
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000827 pm_runtime_forbid(dev);
828 return -EBUSY;
829 }
830
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000831 drm_kms_helper_poll_disable(drm_dev);
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000832 nouveau_switcheroo_optimus_dsm();
833 ret = nouveau_do_suspend(drm_dev, true);
834 pci_save_state(pdev);
835 pci_disable_device(pdev);
Dave Airlie8c863942014-12-08 10:33:52 +1000836 pci_ignore_hotplug(pdev);
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000837 pci_set_power_state(pdev, PCI_D3cold);
838 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
839 return ret;
840}
841
842static int
843nouveau_pmops_runtime_resume(struct device *dev)
844{
845 struct pci_dev *pdev = to_pci_dev(dev);
846 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000847 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000848 int ret;
849
Ben Skeggs321f5c52017-06-02 14:38:07 +1000850 if (!nouveau_pmops_runtime()) {
851 pm_runtime_forbid(dev);
852 return -EBUSY;
853 }
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000854
855 pci_set_power_state(pdev, PCI_D0);
856 pci_restore_state(pdev);
857 ret = pci_enable_device(pdev);
858 if (ret)
859 return ret;
860 pci_set_master(pdev);
861
862 ret = nouveau_do_resume(drm_dev, true);
Lyude Paulcae9ff02017-01-11 21:25:23 -0500863
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000864 /* do magic */
Ben Skeggsa01ca782015-08-20 14:54:15 +1000865 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000866 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
Hans de Goede0b2fe652016-11-21 17:50:55 +0100867
868 /* Monitors may have been connected / disconnected during suspend */
869 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
870
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000871 return ret;
872}
873
874static int
875nouveau_pmops_runtime_idle(struct device *dev)
876{
877 struct pci_dev *pdev = to_pci_dev(dev);
878 struct drm_device *drm_dev = pci_get_drvdata(pdev);
879 struct nouveau_drm *drm = nouveau_drm(drm_dev);
880 struct drm_crtc *crtc;
881
Ben Skeggs321f5c52017-06-02 14:38:07 +1000882 if (!nouveau_pmops_runtime()) {
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000883 pm_runtime_forbid(dev);
884 return -EBUSY;
885 }
886
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000887 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
888 if (crtc->enabled) {
889 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
890 return -EBUSY;
891 }
892 }
893 pm_runtime_mark_last_busy(dev);
894 pm_runtime_autosuspend(dev);
895 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
896 return 1;
897}
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000898
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200899static int
Ben Skeggsebb945a2012-07-20 08:17:34 +1000900nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
901{
Ben Skeggsebb945a2012-07-20 08:17:34 +1000902 struct nouveau_drm *drm = nouveau_drm(dev);
903 struct nouveau_cli *cli;
Marcin Slusarza2896ce2012-12-09 15:45:21 +0100904 char name[32], tmpname[TASK_COMM_LEN];
Ben Skeggsebb945a2012-07-20 08:17:34 +1000905 int ret;
906
Dave Airlie5addcf02012-09-10 14:20:51 +1000907 /* need to bring up power immediately if opening device */
908 ret = pm_runtime_get_sync(dev->dev);
Alexandre Courbotb6c42852014-02-12 14:00:59 +0900909 if (ret < 0 && ret != -EACCES)
Dave Airlie5addcf02012-09-10 14:20:51 +1000910 return ret;
911
Marcin Slusarza2896ce2012-12-09 15:45:21 +0100912 get_task_comm(tmpname, current);
913 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
Ben Skeggsfa6df8c2012-09-12 13:09:23 +1000914
Ben Skeggs20d8a882016-05-18 13:36:34 +1000915 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL)))
916 return ret;
Alexandre Courbot420b9462014-02-17 15:17:26 +0900917
Ben Skeggs20d8a882016-05-18 13:36:34 +1000918 ret = nouveau_cli_init(drm, name, cli);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000919 if (ret)
Ben Skeggs20d8a882016-05-18 13:36:34 +1000920 goto done;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000921
Ben Skeggs0ad72862014-08-10 04:10:22 +1000922 cli->base.super = false;
923
Ben Skeggsebb945a2012-07-20 08:17:34 +1000924 fpriv->driver_priv = cli;
925
926 mutex_lock(&drm->client.mutex);
927 list_add(&cli->head, &drm->clients);
928 mutex_unlock(&drm->client.mutex);
Dave Airlie5addcf02012-09-10 14:20:51 +1000929
Ben Skeggs20d8a882016-05-18 13:36:34 +1000930done:
931 if (ret && cli) {
932 nouveau_cli_fini(cli);
933 kfree(cli);
934 }
935
Dave Airlie5addcf02012-09-10 14:20:51 +1000936 pm_runtime_mark_last_busy(dev->dev);
937 pm_runtime_put_autosuspend(dev->dev);
Dave Airlie5addcf02012-09-10 14:20:51 +1000938 return ret;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000939}
940
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200941static void
Daniel Vetterf0e73ff2017-05-08 10:26:30 +0200942nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
Ben Skeggsebb945a2012-07-20 08:17:34 +1000943{
944 struct nouveau_cli *cli = nouveau_cli(fpriv);
945 struct nouveau_drm *drm = nouveau_drm(dev);
946
Dave Airlie5addcf02012-09-10 14:20:51 +1000947 pm_runtime_get_sync(dev->dev);
948
Kamil Dudkaac8c7932015-07-15 17:18:15 +0200949 mutex_lock(&cli->mutex);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000950 if (cli->abi16)
951 nouveau_abi16_fini(cli->abi16);
Kamil Dudkaac8c7932015-07-15 17:18:15 +0200952 mutex_unlock(&cli->mutex);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000953
954 mutex_lock(&drm->client.mutex);
955 list_del(&cli->head);
956 mutex_unlock(&drm->client.mutex);
Dave Airlie5addcf02012-09-10 14:20:51 +1000957
Ben Skeggs20d8a882016-05-18 13:36:34 +1000958 nouveau_cli_fini(cli);
959 kfree(cli);
Dave Airlie5addcf02012-09-10 14:20:51 +1000960 pm_runtime_mark_last_busy(dev->dev);
961 pm_runtime_put_autosuspend(dev->dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000962}
963
Rob Clarkbaa70942013-08-02 13:27:49 -0400964static const struct drm_ioctl_desc
Ben Skeggs77145f12012-07-31 16:16:21 +1000965nouveau_ioctls[] = {
Daniel Vetterf8c47142015-09-08 13:56:30 +0200966 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
967 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
968 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
969 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
970 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
971 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
972 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
973 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
974 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
975 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
976 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
977 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
Ben Skeggs77145f12012-07-31 16:16:21 +1000978};
979
Ben Skeggs27111a22014-08-10 04:10:31 +1000980long
981nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
Dave Airlie5addcf02012-09-10 14:20:51 +1000982{
Ben Skeggs27111a22014-08-10 04:10:31 +1000983 struct drm_file *filp = file->private_data;
984 struct drm_device *dev = filp->minor->dev;
Dave Airlie5addcf02012-09-10 14:20:51 +1000985 long ret;
Dave Airlie5addcf02012-09-10 14:20:51 +1000986
987 ret = pm_runtime_get_sync(dev->dev);
Alexandre Courbotb6c42852014-02-12 14:00:59 +0900988 if (ret < 0 && ret != -EACCES)
Dave Airlie5addcf02012-09-10 14:20:51 +1000989 return ret;
990
Ben Skeggs27111a22014-08-10 04:10:31 +1000991 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
992 case DRM_NOUVEAU_NVIF:
993 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
994 break;
995 default:
996 ret = drm_ioctl(file, cmd, arg);
997 break;
998 }
Dave Airlie5addcf02012-09-10 14:20:51 +1000999
1000 pm_runtime_mark_last_busy(dev->dev);
1001 pm_runtime_put_autosuspend(dev->dev);
1002 return ret;
1003}
Ben Skeggs27111a22014-08-10 04:10:31 +10001004
Ben Skeggs77145f12012-07-31 16:16:21 +10001005static const struct file_operations
1006nouveau_driver_fops = {
1007 .owner = THIS_MODULE,
1008 .open = drm_open,
1009 .release = drm_release,
Dave Airlie5addcf02012-09-10 14:20:51 +10001010 .unlocked_ioctl = nouveau_drm_ioctl,
Ben Skeggs77145f12012-07-31 16:16:21 +10001011 .mmap = nouveau_ttm_mmap,
1012 .poll = drm_poll,
Ben Skeggs77145f12012-07-31 16:16:21 +10001013 .read = drm_read,
1014#if defined(CONFIG_COMPAT)
1015 .compat_ioctl = nouveau_compat_ioctl,
1016#endif
1017 .llseek = noop_llseek,
1018};
1019
1020static struct drm_driver
David Herrmann915b4d12014-08-29 12:12:43 +02001021driver_stub = {
Ben Skeggs77145f12012-07-31 16:16:21 +10001022 .driver_features =
Peter Antoine0e975982015-06-23 08:18:49 +01001023 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
1024 DRIVER_KMS_LEGACY_CONTEXT,
Ben Skeggs77145f12012-07-31 16:16:21 +10001025
1026 .load = nouveau_drm_load,
1027 .unload = nouveau_drm_unload,
1028 .open = nouveau_drm_open,
Ben Skeggs77145f12012-07-31 16:16:21 +10001029 .postclose = nouveau_drm_postclose,
1030 .lastclose = nouveau_vga_lastclose,
1031
Marcin Slusarz33b903e2013-02-08 21:42:13 +01001032#if defined(CONFIG_DEBUG_FS)
Karol Herbst56c101a2015-07-31 00:35:42 +02001033 .debugfs_init = nouveau_drm_debugfs_init,
Marcin Slusarz33b903e2013-02-08 21:42:13 +01001034#endif
1035
Ben Skeggs51cb4b32013-10-03 07:02:29 +10001036 .enable_vblank = nouveau_display_vblank_enable,
1037 .disable_vblank = nouveau_display_vblank_disable,
Ben Skeggsd83ef852013-11-14 13:37:49 +10001038 .get_scanout_position = nouveau_display_scanoutpos,
Daniel Vetter1bf6ad62017-05-09 16:03:28 +02001039 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos,
Ben Skeggs77145f12012-07-31 16:16:21 +10001040
1041 .ioctls = nouveau_ioctls,
Rob Clarkbaa70942013-08-02 13:27:49 -04001042 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
Ben Skeggs77145f12012-07-31 16:16:21 +10001043 .fops = &nouveau_driver_fops,
1044
1045 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1046 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
Aaron Plattnerab9ccb92013-01-15 20:47:43 +00001047 .gem_prime_export = drm_gem_prime_export,
1048 .gem_prime_import = drm_gem_prime_import,
1049 .gem_prime_pin = nouveau_gem_prime_pin,
Maarten Lankhorst3aac4502014-07-01 12:57:26 +02001050 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
Maarten Lankhorst1af7c7d2013-06-27 13:38:19 +02001051 .gem_prime_unpin = nouveau_gem_prime_unpin,
Aaron Plattnerab9ccb92013-01-15 20:47:43 +00001052 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
1053 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1054 .gem_prime_vmap = nouveau_gem_prime_vmap,
1055 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
Ben Skeggs77145f12012-07-31 16:16:21 +10001056
Daniel Vettera51e6ac2016-05-30 19:53:00 +02001057 .gem_free_object_unlocked = nouveau_gem_object_del,
Ben Skeggs77145f12012-07-31 16:16:21 +10001058 .gem_open_object = nouveau_gem_object_open,
1059 .gem_close_object = nouveau_gem_object_close,
1060
1061 .dumb_create = nouveau_display_dumb_create,
1062 .dumb_map_offset = nouveau_display_dumb_map_offset,
Ben Skeggs77145f12012-07-31 16:16:21 +10001063
1064 .name = DRIVER_NAME,
1065 .desc = DRIVER_DESC,
1066#ifdef GIT_REVISION
1067 .date = GIT_REVISION,
1068#else
1069 .date = DRIVER_DATE,
1070#endif
1071 .major = DRIVER_MAJOR,
1072 .minor = DRIVER_MINOR,
1073 .patchlevel = DRIVER_PATCHLEVEL,
1074};
1075
Ben Skeggs94580292012-07-06 12:14:00 +10001076static struct pci_device_id
1077nouveau_drm_pci_table[] = {
1078 {
1079 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1080 .class = PCI_BASE_CLASS_DISPLAY << 16,
1081 .class_mask = 0xff << 16,
1082 },
1083 {
1084 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1085 .class = PCI_BASE_CLASS_DISPLAY << 16,
1086 .class_mask = 0xff << 16,
1087 },
1088 {}
1089};
1090
Pierre Moreau703fa262014-08-18 22:43:24 +02001091static void nouveau_display_options(void)
1092{
1093 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1094
1095 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1096 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1097 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1098 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1099 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1100 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1101 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1102 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1103 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1104 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
Ben Skeggsf3a8b662016-11-04 11:44:21 +10001105 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz);
Pierre Moreau703fa262014-08-18 22:43:24 +02001106}
1107
Dave Airlie2d8b9cc2012-11-02 11:04:28 +10001108static const struct dev_pm_ops nouveau_pm_ops = {
1109 .suspend = nouveau_pmops_suspend,
1110 .resume = nouveau_pmops_resume,
1111 .freeze = nouveau_pmops_freeze,
1112 .thaw = nouveau_pmops_thaw,
1113 .poweroff = nouveau_pmops_freeze,
1114 .restore = nouveau_pmops_resume,
Dave Airlie5addcf02012-09-10 14:20:51 +10001115 .runtime_suspend = nouveau_pmops_runtime_suspend,
1116 .runtime_resume = nouveau_pmops_runtime_resume,
1117 .runtime_idle = nouveau_pmops_runtime_idle,
Dave Airlie2d8b9cc2012-11-02 11:04:28 +10001118};
1119
Ben Skeggs94580292012-07-06 12:14:00 +10001120static struct pci_driver
1121nouveau_drm_pci_driver = {
1122 .name = "nouveau",
1123 .id_table = nouveau_drm_pci_table,
1124 .probe = nouveau_drm_probe,
1125 .remove = nouveau_drm_remove,
Dave Airlie2d8b9cc2012-11-02 11:04:28 +10001126 .driver.pm = &nouveau_pm_ops,
Ben Skeggs94580292012-07-06 12:14:00 +10001127};
1128
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001129struct drm_device *
Alexandre Courbote396ecd2015-09-04 19:59:31 +09001130nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1131 struct platform_device *pdev,
Ben Skeggs47b25052015-08-20 14:54:15 +10001132 struct nvkm_device **pdevice)
Alexandre Courbot420b9462014-02-17 15:17:26 +09001133{
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001134 struct drm_device *drm;
1135 int err;
Alexandre Courbot420b9462014-02-17 15:17:26 +09001136
Alexandre Courbote396ecd2015-09-04 19:59:31 +09001137 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
Ben Skeggs7974dd12015-08-20 14:54:17 +10001138 true, true, ~0ULL, pdevice);
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001139 if (err)
Ben Skeggse781dc82015-08-20 14:54:15 +10001140 goto err_free;
Alexandre Courbot420b9462014-02-17 15:17:26 +09001141
David Herrmann915b4d12014-08-29 12:12:43 +02001142 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
Tom Gundersen0f288602016-09-21 16:59:19 +02001143 if (IS_ERR(drm)) {
1144 err = PTR_ERR(drm);
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001145 goto err_free;
Alexandre Courbot420b9462014-02-17 15:17:26 +09001146 }
1147
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001148 platform_set_drvdata(pdev, drm);
1149
1150 return drm;
1151
1152err_free:
Ben Skeggse781dc82015-08-20 14:54:15 +10001153 nvkm_device_del(pdevice);
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001154
1155 return ERR_PTR(err);
Alexandre Courbot420b9462014-02-17 15:17:26 +09001156}
1157
Ben Skeggs94580292012-07-06 12:14:00 +10001158static int __init
1159nouveau_drm_init(void)
1160{
David Herrmann915b4d12014-08-29 12:12:43 +02001161 driver_pci = driver_stub;
David Herrmann915b4d12014-08-29 12:12:43 +02001162 driver_platform = driver_stub;
David Herrmann915b4d12014-08-29 12:12:43 +02001163
Pierre Moreau703fa262014-08-18 22:43:24 +02001164 nouveau_display_options();
1165
Ben Skeggs77145f12012-07-31 16:16:21 +10001166 if (nouveau_modeset == -1) {
Ben Skeggs77145f12012-07-31 16:16:21 +10001167 if (vgacon_text_force())
1168 nouveau_modeset = 0;
Ben Skeggs77145f12012-07-31 16:16:21 +10001169 }
1170
1171 if (!nouveau_modeset)
1172 return 0;
1173
Alexandre Courbot055a65d2015-01-15 15:29:56 +09001174#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1175 platform_driver_register(&nouveau_platform_driver);
1176#endif
1177
Ben Skeggs77145f12012-07-31 16:16:21 +10001178 nouveau_register_dsm_handler();
Pierre Moreaudb1a0ae22016-12-08 00:57:08 +01001179 nouveau_backlight_ctor();
Daniel Vetter10631d72017-05-24 16:51:40 +02001180
1181#ifdef CONFIG_PCI
1182 return pci_register_driver(&nouveau_drm_pci_driver);
1183#else
1184 return 0;
1185#endif
Ben Skeggs94580292012-07-06 12:14:00 +10001186}
1187
1188static void __exit
1189nouveau_drm_exit(void)
1190{
Ben Skeggs77145f12012-07-31 16:16:21 +10001191 if (!nouveau_modeset)
1192 return;
1193
Daniel Vetter10631d72017-05-24 16:51:40 +02001194#ifdef CONFIG_PCI
1195 pci_unregister_driver(&nouveau_drm_pci_driver);
1196#endif
Pierre Moreaudb1a0ae22016-12-08 00:57:08 +01001197 nouveau_backlight_dtor();
Ben Skeggs77145f12012-07-31 16:16:21 +10001198 nouveau_unregister_dsm_handler();
Alexandre Courbot055a65d2015-01-15 15:29:56 +09001199
1200#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1201 platform_driver_unregister(&nouveau_platform_driver);
1202#endif
Ben Skeggs94580292012-07-06 12:14:00 +10001203}
1204
1205module_init(nouveau_drm_init);
1206module_exit(nouveau_drm_exit);
1207
1208MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
Ben Skeggs77145f12012-07-31 16:16:21 +10001209MODULE_AUTHOR(DRIVER_AUTHOR);
1210MODULE_DESCRIPTION(DRIVER_DESC);
Ben Skeggs94580292012-07-06 12:14:00 +10001211MODULE_LICENSE("GPL and additional rights");