blob: 0ff4d669e372d8e997a0ad08bc3532e09e53d9a3 [file] [log] [blame]
Ben Skeggs94580292012-07-06 12:14:00 +10001/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
Ben Skeggs77145f12012-07-31 16:16:21 +100025#include <linux/console.h>
Lukas Wunnerc5fd9362015-04-19 17:18:01 +020026#include <linux/delay.h>
Ben Skeggs94580292012-07-06 12:14:00 +100027#include <linux/module.h>
28#include <linux/pci.h>
Dave Airlie5addcf02012-09-10 14:20:51 +100029#include <linux/pm_runtime.h>
30#include <linux/vga_switcheroo.h>
Ben Skeggsfdb751e2014-08-10 04:10:23 +100031
Masahiro Yamadaae956212017-04-24 13:50:29 +090032#include <drm/drmP.h>
33#include <drm/drm_crtc_helper.h>
Ben Skeggsfdb751e2014-08-10 04:10:23 +100034
Ben Skeggsebb945a2012-07-20 08:17:34 +100035#include <core/gpuobj.h>
Ilia Mirkinc33e05a2014-02-13 21:35:14 -050036#include <core/option.h>
Ben Skeggs7974dd12015-08-20 14:54:17 +100037#include <core/pci.h>
38#include <core/tegra.h>
Ben Skeggs94580292012-07-06 12:14:00 +100039
Ben Skeggs04b88672016-05-22 20:35:16 +100040#include <nvif/driver.h>
41
Ben Skeggs923bc412015-11-08 12:23:16 +100042#include <nvif/class.h>
Ben Skeggs845f2722015-11-08 12:16:40 +100043#include <nvif/cl0002.h>
Ben Skeggs8ed17302015-11-08 11:28:26 +100044#include <nvif/cla06f.h>
Ben Skeggs538b2692015-11-08 10:34:50 +100045#include <nvif/if0004.h>
46
Ben Skeggs4dc28132016-05-20 09:22:55 +100047#include "nouveau_drv.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100048#include "nouveau_dma.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100049#include "nouveau_ttm.h"
50#include "nouveau_gem.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100051#include "nouveau_vga.h"
Martin Peres8d021d72016-08-25 03:57:07 +030052#include "nouveau_led.h"
Ben Skeggsb9ed9192013-10-15 09:44:02 +100053#include "nouveau_hwmon.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100054#include "nouveau_acpi.h"
55#include "nouveau_bios.h"
56#include "nouveau_ioctl.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100057#include "nouveau_abi16.h"
58#include "nouveau_fbcon.h"
59#include "nouveau_fence.h"
Marcin Slusarz33b903e2013-02-08 21:42:13 +010060#include "nouveau_debugfs.h"
Ben Skeggs27111a22014-08-10 04:10:31 +100061#include "nouveau_usif.h"
Pierre Moreau703fa262014-08-18 22:43:24 +020062#include "nouveau_connector.h"
Alexandre Courbot055a65d2015-01-15 15:29:56 +090063#include "nouveau_platform.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100064
Ben Skeggs94580292012-07-06 12:14:00 +100065MODULE_PARM_DESC(config, "option string to pass to driver core");
66static char *nouveau_config;
67module_param_named(config, nouveau_config, charp, 0400);
68
69MODULE_PARM_DESC(debug, "debug string to pass to driver core");
70static char *nouveau_debug;
71module_param_named(debug, nouveau_debug, charp, 0400);
72
Ben Skeggsebb945a2012-07-20 08:17:34 +100073MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
74static int nouveau_noaccel = 0;
75module_param_named(noaccel, nouveau_noaccel, int, 0400);
76
Ben Skeggs94307382012-10-31 12:11:15 +100077MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
78 "0 = disabled, 1 = enabled, 2 = headless)");
79int nouveau_modeset = -1;
Ben Skeggs77145f12012-07-31 16:16:21 +100080module_param_named(modeset, nouveau_modeset, int, 0400);
81
Dave Airlie5addcf02012-09-10 14:20:51 +100082MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
Ben Skeggs321f5c52017-06-02 14:38:07 +100083static int nouveau_runtime_pm = -1;
Dave Airlie5addcf02012-09-10 14:20:51 +100084module_param_named(runpm, nouveau_runtime_pm, int, 0400);
85
David Herrmann915b4d12014-08-29 12:12:43 +020086static struct drm_driver driver_stub;
87static struct drm_driver driver_pci;
88static struct drm_driver driver_platform;
Ben Skeggs77145f12012-07-31 16:16:21 +100089
Ben Skeggs94580292012-07-06 12:14:00 +100090static u64
Alexandre Courbot420b9462014-02-17 15:17:26 +090091nouveau_pci_name(struct pci_dev *pdev)
Ben Skeggs94580292012-07-06 12:14:00 +100092{
93 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
94 name |= pdev->bus->number << 16;
95 name |= PCI_SLOT(pdev->devfn) << 8;
96 return name | PCI_FUNC(pdev->devfn);
97}
98
Alexandre Courbot420b9462014-02-17 15:17:26 +090099static u64
100nouveau_platform_name(struct platform_device *platformdev)
101{
102 return platformdev->id;
103}
104
105static u64
106nouveau_name(struct drm_device *dev)
107{
108 if (dev->pdev)
109 return nouveau_pci_name(dev->pdev);
110 else
Laurent Pinchart76adb462016-12-18 00:01:19 +0200111 return nouveau_platform_name(to_platform_device(dev->dev));
Alexandre Courbot420b9462014-02-17 15:17:26 +0900112}
113
Ben Skeggs814a2322017-11-01 03:56:20 +1000114static inline bool
115nouveau_cli_work_ready(struct dma_fence *fence, bool wait)
116{
117 if (!dma_fence_is_signaled(fence)) {
118 if (!wait)
119 return false;
120 WARN_ON(dma_fence_wait_timeout(fence, false, 2 * HZ) <= 0);
121 }
122 dma_fence_put(fence);
123 return true;
124}
125
126static void
127nouveau_cli_work_flush(struct nouveau_cli *cli, bool wait)
128{
129 struct nouveau_cli_work *work, *wtmp;
130 mutex_lock(&cli->lock);
131 list_for_each_entry_safe(work, wtmp, &cli->worker, head) {
132 if (!work->fence || nouveau_cli_work_ready(work->fence, wait)) {
133 list_del(&work->head);
134 work->func(work);
135 }
136 }
137 mutex_unlock(&cli->lock);
138}
139
140static void
141nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)
142{
143 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb);
144 schedule_work(&work->cli->work);
145}
146
147void
148nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
149 struct nouveau_cli_work *work)
150{
151 work->fence = dma_fence_get(fence);
152 work->cli = cli;
153 mutex_lock(&cli->lock);
154 list_add_tail(&work->head, &cli->worker);
155 mutex_unlock(&cli->lock);
156 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
157 nouveau_cli_work_fence(fence, &work->cb);
158}
159
160static void
161nouveau_cli_work(struct work_struct *w)
162{
163 struct nouveau_cli *cli = container_of(w, typeof(*cli), work);
164 nouveau_cli_work_flush(cli, false);
165}
166
Ben Skeggs94580292012-07-06 12:14:00 +1000167static void
Ben Skeggs20d8a882016-05-18 13:36:34 +1000168nouveau_cli_fini(struct nouveau_cli *cli)
Ben Skeggs94580292012-07-06 12:14:00 +1000169{
Ben Skeggs814a2322017-11-01 03:56:20 +1000170 nouveau_cli_work_flush(cli, true);
Ben Skeggs27111a22014-08-10 04:10:31 +1000171 usif_client_fini(cli);
Ben Skeggs24e83752017-11-01 03:56:19 +1000172 nouveau_vmm_fini(&cli->vmm);
Ben Skeggs01670a72017-11-01 03:56:19 +1000173 nvif_mmu_fini(&cli->mmu);
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000174 nvif_device_fini(&cli->device);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000175 mutex_lock(&cli->drm->master.lock);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000176 nvif_client_fini(&cli->base);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000177 mutex_unlock(&cli->drm->master.lock);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000178}
179
180static int
181nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
182 struct nouveau_cli *cli)
183{
Ben Skeggs01670a72017-11-01 03:56:19 +1000184 static const struct nvif_mclass
Ben Skeggs7f507622017-11-01 03:56:20 +1000185 mems[] = {
186 { NVIF_CLASS_MEM_GF100, -1 },
187 { NVIF_CLASS_MEM_NV50 , -1 },
188 { NVIF_CLASS_MEM_NV04 , -1 },
189 {}
190 };
191 static const struct nvif_mclass
Ben Skeggs01670a72017-11-01 03:56:19 +1000192 mmus[] = {
193 { NVIF_CLASS_MMU_GF100, -1 },
194 { NVIF_CLASS_MMU_NV50 , -1 },
195 { NVIF_CLASS_MMU_NV04 , -1 },
196 {}
197 };
Ben Skeggs96da0bc2017-11-01 03:56:20 +1000198 static const struct nvif_mclass
199 vmms[] = {
200 { NVIF_CLASS_VMM_GP100, -1 },
201 { NVIF_CLASS_VMM_GM200, -1 },
202 { NVIF_CLASS_VMM_GF100, -1 },
203 { NVIF_CLASS_VMM_NV50 , -1 },
204 { NVIF_CLASS_VMM_NV04 , -1 },
205 {}
206 };
Ben Skeggs20d8a882016-05-18 13:36:34 +1000207 u64 device = nouveau_name(drm->dev);
208 int ret;
209
210 snprintf(cli->name, sizeof(cli->name), "%s", sname);
Ben Skeggse75c0912017-11-01 03:56:19 +1000211 cli->drm = drm;
Ben Skeggs20d8a882016-05-18 13:36:34 +1000212 mutex_init(&cli->mutex);
213 usif_client_init(cli);
214
Ben Skeggs814a2322017-11-01 03:56:20 +1000215 INIT_WORK(&cli->work, nouveau_cli_work);
216 INIT_LIST_HEAD(&cli->worker);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000217 mutex_init(&cli->lock);
218
219 if (cli == &drm->master) {
Ben Skeggs80e60972016-05-23 11:25:17 +1000220 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
221 cli->name, device, &cli->base);
222 } else {
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000223 mutex_lock(&drm->master.lock);
224 ret = nvif_client_init(&drm->master.base, cli->name, device,
Ben Skeggs80e60972016-05-23 11:25:17 +1000225 &cli->base);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000226 mutex_unlock(&drm->master.lock);
Ben Skeggs80e60972016-05-23 11:25:17 +1000227 }
Ben Skeggs20d8a882016-05-18 13:36:34 +1000228 if (ret) {
229 NV_ERROR(drm, "Client allocation failed: %d\n", ret);
230 goto done;
231 }
232
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000233 ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE,
234 &(struct nv_device_v0) {
235 .device = ~0,
236 }, sizeof(struct nv_device_v0),
237 &cli->device);
238 if (ret) {
239 NV_ERROR(drm, "Device allocation failed: %d\n", ret);
240 goto done;
241 }
242
Ben Skeggs01670a72017-11-01 03:56:19 +1000243 ret = nvif_mclass(&cli->device.object, mmus);
244 if (ret < 0) {
245 NV_ERROR(drm, "No supported MMU class\n");
246 goto done;
247 }
248
249 ret = nvif_mmu_init(&cli->device.object, mmus[ret].oclass, &cli->mmu);
250 if (ret) {
251 NV_ERROR(drm, "MMU allocation failed: %d\n", ret);
252 goto done;
253 }
254
Ben Skeggs96da0bc2017-11-01 03:56:20 +1000255 ret = nvif_mclass(&cli->mmu.object, vmms);
256 if (ret < 0) {
257 NV_ERROR(drm, "No supported VMM class\n");
258 goto done;
259 }
260
261 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
262 if (ret) {
263 NV_ERROR(drm, "VMM allocation failed: %d\n", ret);
264 goto done;
265 }
266
Ben Skeggs7f507622017-11-01 03:56:20 +1000267 ret = nvif_mclass(&cli->mmu.object, mems);
268 if (ret < 0) {
269 NV_ERROR(drm, "No supported MEM class\n");
270 goto done;
271 }
272
273 cli->mem = &mems[ret];
274
Ben Skeggs96da0bc2017-11-01 03:56:20 +1000275 if (1) {
276 cli->vm = cli->vmm.vm;
277 nvxx_client(&cli->base)->vm = cli->vm;
278 }
279
Ben Skeggs7f507622017-11-01 03:56:20 +1000280 return 0;
Ben Skeggs20d8a882016-05-18 13:36:34 +1000281done:
282 if (ret)
283 nouveau_cli_fini(cli);
284 return ret;
Ben Skeggs94580292012-07-06 12:14:00 +1000285}
286
Ben Skeggsebb945a2012-07-20 08:17:34 +1000287static void
288nouveau_accel_fini(struct nouveau_drm *drm)
289{
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000290 nouveau_channel_idle(drm->channel);
Ben Skeggs0ad72862014-08-10 04:10:22 +1000291 nvif_object_fini(&drm->ntfy);
Ben Skeggsf027f492015-08-20 14:54:17 +1000292 nvkm_gpuobj_del(&drm->notify);
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000293 nvif_notify_fini(&drm->flip);
Ben Skeggs0ad72862014-08-10 04:10:22 +1000294 nvif_object_fini(&drm->nvsw);
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000295 nouveau_channel_del(&drm->channel);
296
297 nouveau_channel_idle(drm->cechan);
Ben Skeggs0ad72862014-08-10 04:10:22 +1000298 nvif_object_fini(&drm->ttm.copy);
Ben Skeggsfbd58eb2015-08-20 14:54:22 +1000299 nouveau_channel_del(&drm->cechan);
300
Ben Skeggsebb945a2012-07-20 08:17:34 +1000301 if (drm->fence)
302 nouveau_fence(drm)->dtor(drm);
303}
304
305static void
306nouveau_accel_init(struct nouveau_drm *drm)
307{
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000308 struct nvif_device *device = &drm->client.device;
Ben Skeggs41a63402015-08-20 14:54:16 +1000309 struct nvif_sclass *sclass;
Ben Skeggs49981042012-08-06 19:38:25 +1000310 u32 arg0, arg1;
Ben Skeggs41a63402015-08-20 14:54:16 +1000311 int ret, i, n;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000312
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000313 if (nouveau_noaccel)
Ben Skeggsebb945a2012-07-20 08:17:34 +1000314 return;
315
316 /* initialise synchronisation routines */
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000317 /*XXX: this is crap, but the fence/channel stuff is a little
318 * backwards in some places. this will be fixed.
319 */
Ben Skeggs41a63402015-08-20 14:54:16 +1000320 ret = n = nvif_object_sclass_get(&device->object, &sclass);
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000321 if (ret < 0)
322 return;
323
Ben Skeggs41a63402015-08-20 14:54:16 +1000324 for (ret = -ENOSYS, i = 0; i < n; i++) {
325 switch (sclass[i].oclass) {
Ben Skeggsbbf89062014-08-10 04:10:25 +1000326 case NV03_CHANNEL_DMA:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000327 ret = nv04_fence_create(drm);
328 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000329 case NV10_CHANNEL_DMA:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000330 ret = nv10_fence_create(drm);
331 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000332 case NV17_CHANNEL_DMA:
333 case NV40_CHANNEL_DMA:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000334 ret = nv17_fence_create(drm);
335 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000336 case NV50_CHANNEL_GPFIFO:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000337 ret = nv50_fence_create(drm);
338 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000339 case G82_CHANNEL_GPFIFO:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000340 ret = nv84_fence_create(drm);
341 break;
Ben Skeggsbbf89062014-08-10 04:10:25 +1000342 case FERMI_CHANNEL_GPFIFO:
343 case KEPLER_CHANNEL_GPFIFO_A:
Ben Skeggs63f8c9b2016-03-11 13:09:28 +1000344 case KEPLER_CHANNEL_GPFIFO_B:
Ben Skeggsa1020af2015-04-14 11:47:24 +1000345 case MAXWELL_CHANNEL_GPFIFO_A:
Ben Skeggse8ff9792016-07-09 10:41:01 +1000346 case PASCAL_CHANNEL_GPFIFO_A:
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000347 ret = nvc0_fence_create(drm);
348 break;
349 default:
350 break;
351 }
352 }
353
Ben Skeggs41a63402015-08-20 14:54:16 +1000354 nvif_object_sclass_put(&sclass);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000355 if (ret) {
356 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
357 nouveau_accel_fini(drm);
358 return;
359 }
360
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000361 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000362 ret = nouveau_channel_new(drm, &drm->client.device,
Ben Skeggs1f5ff7f2016-03-11 13:09:28 +1000363 NVA06F_V0_ENGINE_CE0 |
364 NVA06F_V0_ENGINE_CE1,
Ben Skeggsbbf89062014-08-10 04:10:25 +1000365 0, &drm->cechan);
Ben Skeggs49981042012-08-06 19:38:25 +1000366 if (ret)
367 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
368
Ben Skeggs1f5ff7f2016-03-11 13:09:28 +1000369 arg0 = NVA06F_V0_ENGINE_GR;
Ben Skeggs49469802012-11-22 13:43:55 +1000370 arg1 = 1;
Ben Skeggs00fc6f62013-07-09 14:20:15 +1000371 } else
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000372 if (device->info.chipset >= 0xa3 &&
373 device->info.chipset != 0xaa &&
374 device->info.chipset != 0xac) {
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000375 ret = nouveau_channel_new(drm, &drm->client.device,
Ben Skeggs0ad72862014-08-10 04:10:22 +1000376 NvDmaFB, NvDmaTT, &drm->cechan);
Ben Skeggs00fc6f62013-07-09 14:20:15 +1000377 if (ret)
378 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
379
380 arg0 = NvDmaFB;
381 arg1 = NvDmaTT;
Ben Skeggs49981042012-08-06 19:38:25 +1000382 } else {
383 arg0 = NvDmaFB;
384 arg1 = NvDmaTT;
385 }
386
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000387 ret = nouveau_channel_new(drm, &drm->client.device,
388 arg0, arg1, &drm->channel);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000389 if (ret) {
390 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
391 nouveau_accel_fini(drm);
392 return;
393 }
394
Ben Skeggsa01ca782015-08-20 14:54:15 +1000395 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
Ben Skeggs0ad72862014-08-10 04:10:22 +1000396 nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
Ben Skeggs69a61462013-11-13 10:58:51 +1000397 if (ret == 0) {
Ben Skeggs69a61462013-11-13 10:58:51 +1000398 ret = RING_SPACE(drm->channel, 2);
399 if (ret == 0) {
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000400 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
Ben Skeggs69a61462013-11-13 10:58:51 +1000401 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
402 OUT_RING (drm->channel, NVDRM_NVSW);
403 } else
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000404 if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
Ben Skeggs69a61462013-11-13 10:58:51 +1000405 BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
406 OUT_RING (drm->channel, 0x001f0000);
407 }
408 }
Ben Skeggs898a2b32015-08-20 14:54:18 +1000409
410 ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete,
Ben Skeggs538b2692015-11-08 10:34:50 +1000411 false, NV04_NVSW_NTFY_UEVENT,
412 NULL, 0, 0, &drm->flip);
Ben Skeggs898a2b32015-08-20 14:54:18 +1000413 if (ret == 0)
414 ret = nvif_notify_get(&drm->flip);
415 if (ret) {
416 nouveau_accel_fini(drm);
417 return;
418 }
Ben Skeggs69a61462013-11-13 10:58:51 +1000419 }
420
421 if (ret) {
422 NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
423 nouveau_accel_fini(drm);
424 return;
425 }
426
Ben Skeggs967e7bd2014-08-10 04:10:22 +1000427 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000428 ret = nvkm_gpuobj_new(nvxx_device(&drm->client.device), 32, 0,
429 false, NULL, &drm->notify);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000430 if (ret) {
431 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
432 nouveau_accel_fini(drm);
433 return;
434 }
435
Ben Skeggsa01ca782015-08-20 14:54:15 +1000436 ret = nvif_object_init(&drm->channel->user, NvNotify0,
Ben Skeggs4acfd702014-08-10 04:10:24 +1000437 NV_DMA_IN_MEMORY,
438 &(struct nv_dma_v0) {
439 .target = NV_DMA_V0_TARGET_VRAM,
440 .access = NV_DMA_V0_ACCESS_RDWR,
Ben Skeggsebb945a2012-07-20 08:17:34 +1000441 .start = drm->notify->addr,
442 .limit = drm->notify->addr + 31
Ben Skeggs4acfd702014-08-10 04:10:24 +1000443 }, sizeof(struct nv_dma_v0),
Ben Skeggs0ad72862014-08-10 04:10:22 +1000444 &drm->ntfy);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000445 if (ret) {
446 nouveau_accel_fini(drm);
447 return;
448 }
449 }
450
451
Ben Skeggs49981042012-08-06 19:38:25 +1000452 nouveau_bo_move_init(drm);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000453}
454
Greg Kroah-Hartman56550d92012-12-21 15:09:25 -0800455static int nouveau_drm_probe(struct pci_dev *pdev,
456 const struct pci_device_id *pent)
Ben Skeggs94580292012-07-06 12:14:00 +1000457{
Ben Skeggsbe83cd42015-01-14 15:36:34 +1000458 struct nvkm_device *device;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000459 struct apertures_struct *aper;
460 bool boot = false;
Ben Skeggs94580292012-07-06 12:14:00 +1000461 int ret;
462
Lukas Wunnerb00e5332016-05-31 11:13:27 +0200463 if (vga_switcheroo_client_probe_defer(pdev))
Lukas Wunner98b3a342016-01-11 20:09:20 +0100464 return -EPROBE_DEFER;
465
Ben Skeggs0e67bed2016-07-12 11:57:07 +1000466 /* We need to check that the chipset is supported before booting
467 * fbdev off the hardware, as there's no way to put it back.
468 */
469 ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device);
470 if (ret)
471 return ret;
472
473 nvkm_device_del(&device);
474
475 /* Remove conflicting drivers (vesafb, efifb etc). */
Ben Skeggsebb945a2012-07-20 08:17:34 +1000476 aper = alloc_apertures(3);
477 if (!aper)
478 return -ENOMEM;
479
480 aper->ranges[0].base = pci_resource_start(pdev, 1);
481 aper->ranges[0].size = pci_resource_len(pdev, 1);
482 aper->count = 1;
483
484 if (pci_resource_len(pdev, 2)) {
485 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
486 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
487 aper->count++;
488 }
489
490 if (pci_resource_len(pdev, 3)) {
491 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
492 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
493 aper->count++;
494 }
495
496#ifdef CONFIG_X86
497 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
498#endif
Ben Skeggs771fa0e2014-08-10 04:10:31 +1000499 if (nouveau_modeset != 2)
Daniel Vetter44adece2016-08-10 18:52:34 +0200500 drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot);
Tommi Rantala83ef7772012-11-09 09:19:40 +0000501 kfree(aper);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000502
Ben Skeggs7974dd12015-08-20 14:54:17 +1000503 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
504 true, true, ~0ULL, &device);
Ben Skeggs94580292012-07-06 12:14:00 +1000505 if (ret)
506 return ret;
507
508 pci_set_master(pdev);
509
David Herrmann915b4d12014-08-29 12:12:43 +0200510 ret = drm_get_pci_dev(pdev, pent, &driver_pci);
Ben Skeggs94580292012-07-06 12:14:00 +1000511 if (ret) {
Ben Skeggse781dc82015-08-20 14:54:15 +1000512 nvkm_device_del(&device);
Ben Skeggs94580292012-07-06 12:14:00 +1000513 return ret;
514 }
515
516 return 0;
517}
518
Dave Airlie5addcf02012-09-10 14:20:51 +1000519#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
520
521static void
Ilia Mirkin46941b02014-02-13 03:39:50 -0500522nouveau_get_hdmi_dev(struct nouveau_drm *drm)
Dave Airlie5addcf02012-09-10 14:20:51 +1000523{
Ilia Mirkin46941b02014-02-13 03:39:50 -0500524 struct pci_dev *pdev = drm->dev->pdev;
Dave Airlie5addcf02012-09-10 14:20:51 +1000525
Alexandre Courbot420b9462014-02-17 15:17:26 +0900526 if (!pdev) {
Alexandre Courbotf2a0ada2016-03-02 19:13:03 +0900527 NV_DEBUG(drm, "not a PCI device; no HDMI\n");
Alexandre Courbot420b9462014-02-17 15:17:26 +0900528 drm->hdmi_device = NULL;
529 return;
530 }
531
Dave Airlie5addcf02012-09-10 14:20:51 +1000532 /* subfunction one is a hdmi audio device? */
533 drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
534 PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
535
536 if (!drm->hdmi_device) {
Ilia Mirkin46941b02014-02-13 03:39:50 -0500537 NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
Dave Airlie5addcf02012-09-10 14:20:51 +1000538 return;
539 }
540
541 if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
Ilia Mirkin46941b02014-02-13 03:39:50 -0500542 NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
Dave Airlie5addcf02012-09-10 14:20:51 +1000543 pci_dev_put(drm->hdmi_device);
544 drm->hdmi_device = NULL;
545 return;
546 }
547}
548
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200549static int
Ben Skeggs94580292012-07-06 12:14:00 +1000550nouveau_drm_load(struct drm_device *dev, unsigned long flags)
551{
Ben Skeggs94580292012-07-06 12:14:00 +1000552 struct nouveau_drm *drm;
553 int ret;
554
Ben Skeggs20d8a882016-05-18 13:36:34 +1000555 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
556 return -ENOMEM;
557 dev->dev_private = drm;
558 drm->dev = dev;
559
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000560 ret = nouveau_cli_init(drm, "DRM-master", &drm->master);
561 if (ret)
562 return ret;
563
Ben Skeggs20d8a882016-05-18 13:36:34 +1000564 ret = nouveau_cli_init(drm, "DRM", &drm->client);
Ben Skeggs94580292012-07-06 12:14:00 +1000565 if (ret)
566 return ret;
567
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000568 dev->irq_enabled = true;
569
Ben Skeggs989aa5b2015-01-12 12:33:37 +1000570 nvxx_client(&drm->client.base)->debug =
Ben Skeggsbe83cd42015-01-14 15:36:34 +1000571 nvkm_dbgopt(nouveau_debug, "DRM");
Ben Skeggs77145f12012-07-31 16:16:21 +1000572
Ben Skeggs94580292012-07-06 12:14:00 +1000573 INIT_LIST_HEAD(&drm->clients);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000574 spin_lock_init(&drm->tile.lock);
Ben Skeggs94580292012-07-06 12:14:00 +1000575
Ilia Mirkin46941b02014-02-13 03:39:50 -0500576 nouveau_get_hdmi_dev(drm);
Dave Airlie5addcf02012-09-10 14:20:51 +1000577
Ben Skeggs77145f12012-07-31 16:16:21 +1000578 /* workaround an odd issue on nvc1 by disabling the device's
579 * nosnoop capability. hopefully won't cause issues until a
580 * better fix is found - assuming there is one...
581 */
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000582 if (drm->client.device.info.chipset == 0xc1)
583 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000584
Ben Skeggs77145f12012-07-31 16:16:21 +1000585 nouveau_vga_init(drm);
Ben Skeggscb75d972012-07-11 10:44:20 +1000586
Ben Skeggsebb945a2012-07-20 08:17:34 +1000587 ret = nouveau_ttm_init(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000588 if (ret)
Ben Skeggs77145f12012-07-31 16:16:21 +1000589 goto fail_ttm;
Ben Skeggs94580292012-07-06 12:14:00 +1000590
Ben Skeggs77145f12012-07-31 16:16:21 +1000591 ret = nouveau_bios_init(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000592 if (ret)
Ben Skeggs77145f12012-07-31 16:16:21 +1000593 goto fail_bios;
594
Ben Skeggs77145f12012-07-31 16:16:21 +1000595 ret = nouveau_display_create(dev);
596 if (ret)
597 goto fail_dispctor;
598
599 if (dev->mode_config.num_crtc) {
600 ret = nouveau_display_init(dev);
601 if (ret)
602 goto fail_dispinit;
603 }
604
Karol Herbstb126a202015-07-30 11:52:23 +0200605 nouveau_debugfs_init(drm);
Ben Skeggsb9ed9192013-10-15 09:44:02 +1000606 nouveau_hwmon_init(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000607 nouveau_accel_init(drm);
608 nouveau_fbcon_init(dev);
Martin Peres8d021d72016-08-25 03:57:07 +0300609 nouveau_led_init(dev);
Dave Airlie5addcf02012-09-10 14:20:51 +1000610
Ben Skeggs8fa43382017-06-02 14:49:45 +1000611 if (nouveau_pmops_runtime()) {
Dave Airlie5addcf02012-09-10 14:20:51 +1000612 pm_runtime_use_autosuspend(dev->dev);
613 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
614 pm_runtime_set_active(dev->dev);
615 pm_runtime_allow(dev->dev);
616 pm_runtime_mark_last_busy(dev->dev);
617 pm_runtime_put(dev->dev);
Peter Ujfalusi9a2eba32017-05-15 12:04:31 +0300618 } else {
619 /* enable polling for external displays */
620 drm_kms_helper_poll_enable(dev);
Dave Airlie5addcf02012-09-10 14:20:51 +1000621 }
Ben Skeggs94580292012-07-06 12:14:00 +1000622 return 0;
623
Ben Skeggs77145f12012-07-31 16:16:21 +1000624fail_dispinit:
625 nouveau_display_destroy(dev);
626fail_dispctor:
Ben Skeggs77145f12012-07-31 16:16:21 +1000627 nouveau_bios_takedown(dev);
628fail_bios:
Ben Skeggsebb945a2012-07-20 08:17:34 +1000629 nouveau_ttm_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000630fail_ttm:
Ben Skeggs77145f12012-07-31 16:16:21 +1000631 nouveau_vga_fini(drm);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000632 nouveau_cli_fini(&drm->client);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000633 nouveau_cli_fini(&drm->master);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000634 kfree(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000635 return ret;
636}
637
Gabriel Krisman Bertazi11b3c202017-01-06 15:57:31 -0200638static void
Ben Skeggs94580292012-07-06 12:14:00 +1000639nouveau_drm_unload(struct drm_device *dev)
640{
Ben Skeggs77145f12012-07-31 16:16:21 +1000641 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000642
Ben Skeggs8fa43382017-06-02 14:49:45 +1000643 if (nouveau_pmops_runtime()) {
Lukas Wunnerc1b16b42016-06-08 18:47:27 +0200644 pm_runtime_get_sync(dev->dev);
Lukas Wunner55c868a2016-06-08 18:47:27 +0200645 pm_runtime_forbid(dev->dev);
Lukas Wunnerc1b16b42016-06-08 18:47:27 +0200646 }
647
Martin Peres8d021d72016-08-25 03:57:07 +0300648 nouveau_led_fini(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000649 nouveau_fbcon_fini(dev);
650 nouveau_accel_fini(drm);
Ben Skeggsb9ed9192013-10-15 09:44:02 +1000651 nouveau_hwmon_fini(dev);
Karol Herbstb126a202015-07-30 11:52:23 +0200652 nouveau_debugfs_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000653
Ben Skeggs94307382012-10-31 12:11:15 +1000654 if (dev->mode_config.num_crtc)
Ben Skeggs3b4c0ab2016-11-04 17:20:35 +1000655 nouveau_display_fini(dev, false);
Ben Skeggs77145f12012-07-31 16:16:21 +1000656 nouveau_display_destroy(dev);
657
Ben Skeggs77145f12012-07-31 16:16:21 +1000658 nouveau_bios_takedown(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000659
Ben Skeggsebb945a2012-07-20 08:17:34 +1000660 nouveau_ttm_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000661 nouveau_vga_fini(drm);
Ben Skeggscb75d972012-07-11 10:44:20 +1000662
Dave Airlie5addcf02012-09-10 14:20:51 +1000663 if (drm->hdmi_device)
664 pci_dev_put(drm->hdmi_device);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000665 nouveau_cli_fini(&drm->client);
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000666 nouveau_cli_fini(&drm->master);
Ben Skeggs20d8a882016-05-18 13:36:34 +1000667 kfree(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000668}
669
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +0900670void
671nouveau_drm_device_remove(struct drm_device *dev)
Ben Skeggs94580292012-07-06 12:14:00 +1000672{
Ben Skeggs77145f12012-07-31 16:16:21 +1000673 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggsbe83cd42015-01-14 15:36:34 +1000674 struct nvkm_client *client;
Ben Skeggs76ecea52015-08-20 14:54:15 +1000675 struct nvkm_device *device;
Ben Skeggs77145f12012-07-31 16:16:21 +1000676
Ilia Mirkin7d3428c2014-01-29 19:53:00 -0500677 dev->irq_enabled = false;
Ben Skeggs989aa5b2015-01-12 12:33:37 +1000678 client = nvxx_client(&drm->client.base);
Ben Skeggs4e7e62d2015-08-20 14:54:15 +1000679 device = nvkm_device_find(client->device);
Ben Skeggs77145f12012-07-31 16:16:21 +1000680 drm_put_dev(dev);
681
Ben Skeggse781dc82015-08-20 14:54:15 +1000682 nvkm_device_del(&device);
Ben Skeggs94580292012-07-06 12:14:00 +1000683}
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +0900684
685static void
686nouveau_drm_remove(struct pci_dev *pdev)
687{
688 struct drm_device *dev = pci_get_drvdata(pdev);
689
690 nouveau_drm_device_remove(dev);
691}
Ben Skeggs94580292012-07-06 12:14:00 +1000692
Marcin Slusarzcd897832013-01-27 15:01:55 +0100693static int
Dave Airlie05c63c22014-03-26 14:10:06 +1000694nouveau_do_suspend(struct drm_device *dev, bool runtime)
Ben Skeggs94580292012-07-06 12:14:00 +1000695{
Ben Skeggs77145f12012-07-31 16:16:21 +1000696 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000697 int ret;
698
Martin Peres8d021d72016-08-25 03:57:07 +0300699 nouveau_led_suspend(dev);
700
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000701 if (dev->mode_config.num_crtc) {
Ben Skeggs2d38a532017-08-14 08:40:55 +1000702 NV_DEBUG(drm, "suspending console...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000703 nouveau_fbcon_set_suspend(dev, 1);
Ben Skeggs2d38a532017-08-14 08:40:55 +1000704 NV_DEBUG(drm, "suspending display...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000705 ret = nouveau_display_suspend(dev, runtime);
Ben Skeggs94307382012-10-31 12:11:15 +1000706 if (ret)
707 return ret;
708 }
Ben Skeggs94580292012-07-06 12:14:00 +1000709
Ben Skeggs2d38a532017-08-14 08:40:55 +1000710 NV_DEBUG(drm, "evicting buffers...\n");
Ben Skeggsebb945a2012-07-20 08:17:34 +1000711 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
712
Ben Skeggs2d38a532017-08-14 08:40:55 +1000713 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
Ben Skeggs81dff212013-05-07 08:33:10 +1000714 if (drm->cechan) {
715 ret = nouveau_channel_idle(drm->cechan);
716 if (ret)
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500717 goto fail_display;
Ben Skeggs81dff212013-05-07 08:33:10 +1000718 }
719
720 if (drm->channel) {
721 ret = nouveau_channel_idle(drm->channel);
722 if (ret)
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500723 goto fail_display;
Ben Skeggs81dff212013-05-07 08:33:10 +1000724 }
725
Ben Skeggs2d38a532017-08-14 08:40:55 +1000726 NV_DEBUG(drm, "suspending fence...\n");
Ben Skeggsebb945a2012-07-20 08:17:34 +1000727 if (drm->fence && nouveau_fence(drm)->suspend) {
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500728 if (!nouveau_fence(drm)->suspend(drm)) {
729 ret = -ENOMEM;
730 goto fail_display;
731 }
Ben Skeggsebb945a2012-07-20 08:17:34 +1000732 }
733
Ben Skeggs2d38a532017-08-14 08:40:55 +1000734 NV_DEBUG(drm, "suspending object tree...\n");
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000735 ret = nvif_client_suspend(&drm->master.base);
Ben Skeggs94580292012-07-06 12:14:00 +1000736 if (ret)
737 goto fail_client;
738
Ben Skeggs94580292012-07-06 12:14:00 +1000739 return 0;
740
741fail_client:
Ilia Mirkinf3980dc2014-01-23 02:45:02 -0500742 if (drm->fence && nouveau_fence(drm)->resume)
743 nouveau_fence(drm)->resume(drm);
744
745fail_display:
Ben Skeggs94307382012-10-31 12:11:15 +1000746 if (dev->mode_config.num_crtc) {
Ben Skeggs2d38a532017-08-14 08:40:55 +1000747 NV_DEBUG(drm, "resuming display...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000748 nouveau_display_resume(dev, runtime);
Ben Skeggs94307382012-10-31 12:11:15 +1000749 }
Ben Skeggs94580292012-07-06 12:14:00 +1000750 return ret;
751}
752
Marcin Slusarzcd897832013-01-27 15:01:55 +0100753static int
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000754nouveau_do_resume(struct drm_device *dev, bool runtime)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000755{
756 struct nouveau_drm *drm = nouveau_drm(dev);
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000757
Ben Skeggs2d38a532017-08-14 08:40:55 +1000758 NV_DEBUG(drm, "resuming object tree...\n");
Ben Skeggscb7e88e2017-11-01 03:56:19 +1000759 nvif_client_resume(&drm->master.base);
Ben Skeggs94580292012-07-06 12:14:00 +1000760
Ben Skeggs2d38a532017-08-14 08:40:55 +1000761 NV_DEBUG(drm, "resuming fence...\n");
Ben Skeggs81dff212013-05-07 08:33:10 +1000762 if (drm->fence && nouveau_fence(drm)->resume)
763 nouveau_fence(drm)->resume(drm);
764
Ben Skeggs77145f12012-07-31 16:16:21 +1000765 nouveau_run_vbios_init(dev);
Ben Skeggs77145f12012-07-31 16:16:21 +1000766
Ben Skeggs94307382012-10-31 12:11:15 +1000767 if (dev->mode_config.num_crtc) {
Ben Skeggs2d38a532017-08-14 08:40:55 +1000768 NV_DEBUG(drm, "resuming display...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000769 nouveau_display_resume(dev, runtime);
Ben Skeggs2d38a532017-08-14 08:40:55 +1000770 NV_DEBUG(drm, "resuming console...\n");
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000771 nouveau_fbcon_set_suspend(dev, 0);
Ben Skeggs94307382012-10-31 12:11:15 +1000772 }
Dave Airlie5addcf02012-09-10 14:20:51 +1000773
Martin Peres8d021d72016-08-25 03:57:07 +0300774 nouveau_led_resume(dev);
775
Ben Skeggs77145f12012-07-31 16:16:21 +1000776 return 0;
Ben Skeggs94580292012-07-06 12:14:00 +1000777}
778
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000779int
780nouveau_pmops_suspend(struct device *dev)
781{
782 struct pci_dev *pdev = to_pci_dev(dev);
783 struct drm_device *drm_dev = pci_get_drvdata(pdev);
784 int ret;
785
786 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
787 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
788 return 0;
789
790 ret = nouveau_do_suspend(drm_dev, false);
791 if (ret)
792 return ret;
793
794 pci_save_state(pdev);
795 pci_disable_device(pdev);
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000796 pci_set_power_state(pdev, PCI_D3hot);
Lukas Wunnerc5fd9362015-04-19 17:18:01 +0200797 udelay(200);
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000798 return 0;
799}
800
801int
802nouveau_pmops_resume(struct device *dev)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000803{
804 struct pci_dev *pdev = to_pci_dev(dev);
805 struct drm_device *drm_dev = pci_get_drvdata(pdev);
806 int ret;
807
Dave Airlie5addcf02012-09-10 14:20:51 +1000808 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
809 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000810 return 0;
811
812 pci_set_power_state(pdev, PCI_D0);
813 pci_restore_state(pdev);
814 ret = pci_enable_device(pdev);
815 if (ret)
816 return ret;
817 pci_set_master(pdev);
818
Hans de Goede0b2fe652016-11-21 17:50:55 +0100819 ret = nouveau_do_resume(drm_dev, false);
820
821 /* Monitors may have been connected / disconnected during suspend */
822 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
823
824 return ret;
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000825}
826
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000827static int
828nouveau_pmops_freeze(struct device *dev)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000829{
830 struct pci_dev *pdev = to_pci_dev(dev);
831 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000832 return nouveau_do_suspend(drm_dev, false);
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000833}
834
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000835static int
836nouveau_pmops_thaw(struct device *dev)
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000837{
838 struct pci_dev *pdev = to_pci_dev(dev);
839 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Ben Skeggs6fbb7022014-10-02 13:22:27 +1000840 return nouveau_do_resume(drm_dev, false);
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000841}
842
Ben Skeggs321f5c52017-06-02 14:38:07 +1000843bool
Arnd Bergmann54994732017-06-09 12:38:33 +0200844nouveau_pmops_runtime(void)
Ben Skeggs321f5c52017-06-02 14:38:07 +1000845{
846 if (nouveau_runtime_pm == -1)
847 return nouveau_is_optimus() || nouveau_is_v1_dsm();
848 return nouveau_runtime_pm == 1;
849}
850
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000851static int
852nouveau_pmops_runtime_suspend(struct device *dev)
853{
854 struct pci_dev *pdev = to_pci_dev(dev);
855 struct drm_device *drm_dev = pci_get_drvdata(pdev);
856 int ret;
857
Ben Skeggs321f5c52017-06-02 14:38:07 +1000858 if (!nouveau_pmops_runtime()) {
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000859 pm_runtime_forbid(dev);
860 return -EBUSY;
861 }
862
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000863 drm_kms_helper_poll_disable(drm_dev);
864 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
865 nouveau_switcheroo_optimus_dsm();
866 ret = nouveau_do_suspend(drm_dev, true);
867 pci_save_state(pdev);
868 pci_disable_device(pdev);
Dave Airlie8c863942014-12-08 10:33:52 +1000869 pci_ignore_hotplug(pdev);
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000870 pci_set_power_state(pdev, PCI_D3cold);
871 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
872 return ret;
873}
874
875static int
876nouveau_pmops_runtime_resume(struct device *dev)
877{
878 struct pci_dev *pdev = to_pci_dev(dev);
879 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Ben Skeggs1167c6b2016-05-18 13:57:42 +1000880 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000881 int ret;
882
Ben Skeggs321f5c52017-06-02 14:38:07 +1000883 if (!nouveau_pmops_runtime()) {
884 pm_runtime_forbid(dev);
885 return -EBUSY;
886 }
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000887
888 pci_set_power_state(pdev, PCI_D0);
889 pci_restore_state(pdev);
890 ret = pci_enable_device(pdev);
891 if (ret)
892 return ret;
893 pci_set_master(pdev);
894
895 ret = nouveau_do_resume(drm_dev, true);
Lyude Paulcae9ff02017-01-11 21:25:23 -0500896
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000897 /* do magic */
Ben Skeggsa01ca782015-08-20 14:54:15 +1000898 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000899 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
900 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
Hans de Goede0b2fe652016-11-21 17:50:55 +0100901
902 /* Monitors may have been connected / disconnected during suspend */
903 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
904
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000905 return ret;
906}
907
908static int
909nouveau_pmops_runtime_idle(struct device *dev)
910{
911 struct pci_dev *pdev = to_pci_dev(dev);
912 struct drm_device *drm_dev = pci_get_drvdata(pdev);
913 struct nouveau_drm *drm = nouveau_drm(drm_dev);
914 struct drm_crtc *crtc;
915
Ben Skeggs321f5c52017-06-02 14:38:07 +1000916 if (!nouveau_pmops_runtime()) {
Ben Skeggs7bb6d442014-10-02 13:31:00 +1000917 pm_runtime_forbid(dev);
918 return -EBUSY;
919 }
920
921 /* if we have a hdmi audio device - make sure it has a driver loaded */
922 if (drm->hdmi_device) {
923 if (!drm->hdmi_device->driver) {
924 DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
925 pm_runtime_mark_last_busy(dev);
926 return -EBUSY;
927 }
928 }
929
930 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
931 if (crtc->enabled) {
932 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
933 return -EBUSY;
934 }
935 }
936 pm_runtime_mark_last_busy(dev);
937 pm_runtime_autosuspend(dev);
938 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
939 return 1;
940}
Dave Airlie2d8b9cc2012-11-02 11:04:28 +1000941
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200942static int
Ben Skeggsebb945a2012-07-20 08:17:34 +1000943nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
944{
Ben Skeggsebb945a2012-07-20 08:17:34 +1000945 struct nouveau_drm *drm = nouveau_drm(dev);
946 struct nouveau_cli *cli;
Marcin Slusarza2896ce2012-12-09 15:45:21 +0100947 char name[32], tmpname[TASK_COMM_LEN];
Ben Skeggsebb945a2012-07-20 08:17:34 +1000948 int ret;
949
Dave Airlie5addcf02012-09-10 14:20:51 +1000950 /* need to bring up power immediately if opening device */
951 ret = pm_runtime_get_sync(dev->dev);
Alexandre Courbotb6c42852014-02-12 14:00:59 +0900952 if (ret < 0 && ret != -EACCES)
Dave Airlie5addcf02012-09-10 14:20:51 +1000953 return ret;
954
Marcin Slusarza2896ce2012-12-09 15:45:21 +0100955 get_task_comm(tmpname, current);
956 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
Ben Skeggsfa6df8c2012-09-12 13:09:23 +1000957
Ben Skeggs20d8a882016-05-18 13:36:34 +1000958 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL)))
959 return ret;
Alexandre Courbot420b9462014-02-17 15:17:26 +0900960
Ben Skeggs20d8a882016-05-18 13:36:34 +1000961 ret = nouveau_cli_init(drm, name, cli);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000962 if (ret)
Ben Skeggs20d8a882016-05-18 13:36:34 +1000963 goto done;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000964
Ben Skeggs0ad72862014-08-10 04:10:22 +1000965 cli->base.super = false;
966
Ben Skeggsebb945a2012-07-20 08:17:34 +1000967 fpriv->driver_priv = cli;
968
969 mutex_lock(&drm->client.mutex);
970 list_add(&cli->head, &drm->clients);
971 mutex_unlock(&drm->client.mutex);
Dave Airlie5addcf02012-09-10 14:20:51 +1000972
Ben Skeggs20d8a882016-05-18 13:36:34 +1000973done:
974 if (ret && cli) {
975 nouveau_cli_fini(cli);
976 kfree(cli);
977 }
978
Dave Airlie5addcf02012-09-10 14:20:51 +1000979 pm_runtime_mark_last_busy(dev->dev);
980 pm_runtime_put_autosuspend(dev->dev);
Dave Airlie5addcf02012-09-10 14:20:51 +1000981 return ret;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000982}
983
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200984static void
Daniel Vetterf0e73ff2017-05-08 10:26:30 +0200985nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
Ben Skeggsebb945a2012-07-20 08:17:34 +1000986{
987 struct nouveau_cli *cli = nouveau_cli(fpriv);
988 struct nouveau_drm *drm = nouveau_drm(dev);
989
Dave Airlie5addcf02012-09-10 14:20:51 +1000990 pm_runtime_get_sync(dev->dev);
991
Kamil Dudkaac8c7932015-07-15 17:18:15 +0200992 mutex_lock(&cli->mutex);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000993 if (cli->abi16)
994 nouveau_abi16_fini(cli->abi16);
Kamil Dudkaac8c7932015-07-15 17:18:15 +0200995 mutex_unlock(&cli->mutex);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000996
997 mutex_lock(&drm->client.mutex);
998 list_del(&cli->head);
999 mutex_unlock(&drm->client.mutex);
Dave Airlie5addcf02012-09-10 14:20:51 +10001000
Ben Skeggs20d8a882016-05-18 13:36:34 +10001001 nouveau_cli_fini(cli);
1002 kfree(cli);
Dave Airlie5addcf02012-09-10 14:20:51 +10001003 pm_runtime_mark_last_busy(dev->dev);
1004 pm_runtime_put_autosuspend(dev->dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +10001005}
1006
Rob Clarkbaa70942013-08-02 13:27:49 -04001007static const struct drm_ioctl_desc
Ben Skeggs77145f12012-07-31 16:16:21 +10001008nouveau_ioctls[] = {
Daniel Vetterf8c47142015-09-08 13:56:30 +02001009 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
1010 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1011 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
1012 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
1013 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
1014 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
1015 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
1016 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
1017 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
1018 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
1019 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
1020 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
Ben Skeggs77145f12012-07-31 16:16:21 +10001021};
1022
Ben Skeggs27111a22014-08-10 04:10:31 +10001023long
1024nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
Dave Airlie5addcf02012-09-10 14:20:51 +10001025{
Ben Skeggs27111a22014-08-10 04:10:31 +10001026 struct drm_file *filp = file->private_data;
1027 struct drm_device *dev = filp->minor->dev;
Dave Airlie5addcf02012-09-10 14:20:51 +10001028 long ret;
Dave Airlie5addcf02012-09-10 14:20:51 +10001029
1030 ret = pm_runtime_get_sync(dev->dev);
Alexandre Courbotb6c42852014-02-12 14:00:59 +09001031 if (ret < 0 && ret != -EACCES)
Dave Airlie5addcf02012-09-10 14:20:51 +10001032 return ret;
1033
Ben Skeggs27111a22014-08-10 04:10:31 +10001034 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
1035 case DRM_NOUVEAU_NVIF:
1036 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
1037 break;
1038 default:
1039 ret = drm_ioctl(file, cmd, arg);
1040 break;
1041 }
Dave Airlie5addcf02012-09-10 14:20:51 +10001042
1043 pm_runtime_mark_last_busy(dev->dev);
1044 pm_runtime_put_autosuspend(dev->dev);
1045 return ret;
1046}
Ben Skeggs27111a22014-08-10 04:10:31 +10001047
Ben Skeggs77145f12012-07-31 16:16:21 +10001048static const struct file_operations
1049nouveau_driver_fops = {
1050 .owner = THIS_MODULE,
1051 .open = drm_open,
1052 .release = drm_release,
Dave Airlie5addcf02012-09-10 14:20:51 +10001053 .unlocked_ioctl = nouveau_drm_ioctl,
Ben Skeggs77145f12012-07-31 16:16:21 +10001054 .mmap = nouveau_ttm_mmap,
1055 .poll = drm_poll,
Ben Skeggs77145f12012-07-31 16:16:21 +10001056 .read = drm_read,
1057#if defined(CONFIG_COMPAT)
1058 .compat_ioctl = nouveau_compat_ioctl,
1059#endif
1060 .llseek = noop_llseek,
1061};
1062
1063static struct drm_driver
David Herrmann915b4d12014-08-29 12:12:43 +02001064driver_stub = {
Ben Skeggs77145f12012-07-31 16:16:21 +10001065 .driver_features =
Peter Antoine0e975982015-06-23 08:18:49 +01001066 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
1067 DRIVER_KMS_LEGACY_CONTEXT,
Ben Skeggs77145f12012-07-31 16:16:21 +10001068
1069 .load = nouveau_drm_load,
1070 .unload = nouveau_drm_unload,
1071 .open = nouveau_drm_open,
Ben Skeggs77145f12012-07-31 16:16:21 +10001072 .postclose = nouveau_drm_postclose,
1073 .lastclose = nouveau_vga_lastclose,
1074
Marcin Slusarz33b903e2013-02-08 21:42:13 +01001075#if defined(CONFIG_DEBUG_FS)
Karol Herbst56c101a2015-07-31 00:35:42 +02001076 .debugfs_init = nouveau_drm_debugfs_init,
Marcin Slusarz33b903e2013-02-08 21:42:13 +01001077#endif
1078
Ben Skeggs51cb4b32013-10-03 07:02:29 +10001079 .enable_vblank = nouveau_display_vblank_enable,
1080 .disable_vblank = nouveau_display_vblank_disable,
Ben Skeggsd83ef852013-11-14 13:37:49 +10001081 .get_scanout_position = nouveau_display_scanoutpos,
Daniel Vetter1bf6ad62017-05-09 16:03:28 +02001082 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos,
Ben Skeggs77145f12012-07-31 16:16:21 +10001083
1084 .ioctls = nouveau_ioctls,
Rob Clarkbaa70942013-08-02 13:27:49 -04001085 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
Ben Skeggs77145f12012-07-31 16:16:21 +10001086 .fops = &nouveau_driver_fops,
1087
1088 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1089 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
Aaron Plattnerab9ccb92013-01-15 20:47:43 +00001090 .gem_prime_export = drm_gem_prime_export,
1091 .gem_prime_import = drm_gem_prime_import,
1092 .gem_prime_pin = nouveau_gem_prime_pin,
Maarten Lankhorst3aac4502014-07-01 12:57:26 +02001093 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
Maarten Lankhorst1af7c7d2013-06-27 13:38:19 +02001094 .gem_prime_unpin = nouveau_gem_prime_unpin,
Aaron Plattnerab9ccb92013-01-15 20:47:43 +00001095 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
1096 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1097 .gem_prime_vmap = nouveau_gem_prime_vmap,
1098 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
Ben Skeggs77145f12012-07-31 16:16:21 +10001099
Daniel Vettera51e6ac2016-05-30 19:53:00 +02001100 .gem_free_object_unlocked = nouveau_gem_object_del,
Ben Skeggs77145f12012-07-31 16:16:21 +10001101 .gem_open_object = nouveau_gem_object_open,
1102 .gem_close_object = nouveau_gem_object_close,
1103
1104 .dumb_create = nouveau_display_dumb_create,
1105 .dumb_map_offset = nouveau_display_dumb_map_offset,
Ben Skeggs77145f12012-07-31 16:16:21 +10001106
1107 .name = DRIVER_NAME,
1108 .desc = DRIVER_DESC,
1109#ifdef GIT_REVISION
1110 .date = GIT_REVISION,
1111#else
1112 .date = DRIVER_DATE,
1113#endif
1114 .major = DRIVER_MAJOR,
1115 .minor = DRIVER_MINOR,
1116 .patchlevel = DRIVER_PATCHLEVEL,
1117};
1118
Ben Skeggs94580292012-07-06 12:14:00 +10001119static struct pci_device_id
1120nouveau_drm_pci_table[] = {
1121 {
1122 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1123 .class = PCI_BASE_CLASS_DISPLAY << 16,
1124 .class_mask = 0xff << 16,
1125 },
1126 {
1127 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1128 .class = PCI_BASE_CLASS_DISPLAY << 16,
1129 .class_mask = 0xff << 16,
1130 },
1131 {}
1132};
1133
Pierre Moreau703fa262014-08-18 22:43:24 +02001134static void nouveau_display_options(void)
1135{
1136 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1137
1138 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1139 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1140 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1141 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1142 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1143 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1144 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1145 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1146 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1147 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
Ben Skeggsf3a8b662016-11-04 11:44:21 +10001148 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz);
Pierre Moreau703fa262014-08-18 22:43:24 +02001149}
1150
Dave Airlie2d8b9cc2012-11-02 11:04:28 +10001151static const struct dev_pm_ops nouveau_pm_ops = {
1152 .suspend = nouveau_pmops_suspend,
1153 .resume = nouveau_pmops_resume,
1154 .freeze = nouveau_pmops_freeze,
1155 .thaw = nouveau_pmops_thaw,
1156 .poweroff = nouveau_pmops_freeze,
1157 .restore = nouveau_pmops_resume,
Dave Airlie5addcf02012-09-10 14:20:51 +10001158 .runtime_suspend = nouveau_pmops_runtime_suspend,
1159 .runtime_resume = nouveau_pmops_runtime_resume,
1160 .runtime_idle = nouveau_pmops_runtime_idle,
Dave Airlie2d8b9cc2012-11-02 11:04:28 +10001161};
1162
Ben Skeggs94580292012-07-06 12:14:00 +10001163static struct pci_driver
1164nouveau_drm_pci_driver = {
1165 .name = "nouveau",
1166 .id_table = nouveau_drm_pci_table,
1167 .probe = nouveau_drm_probe,
1168 .remove = nouveau_drm_remove,
Dave Airlie2d8b9cc2012-11-02 11:04:28 +10001169 .driver.pm = &nouveau_pm_ops,
Ben Skeggs94580292012-07-06 12:14:00 +10001170};
1171
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001172struct drm_device *
Alexandre Courbote396ecd2015-09-04 19:59:31 +09001173nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1174 struct platform_device *pdev,
Ben Skeggs47b25052015-08-20 14:54:15 +10001175 struct nvkm_device **pdevice)
Alexandre Courbot420b9462014-02-17 15:17:26 +09001176{
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001177 struct drm_device *drm;
1178 int err;
Alexandre Courbot420b9462014-02-17 15:17:26 +09001179
Alexandre Courbote396ecd2015-09-04 19:59:31 +09001180 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
Ben Skeggs7974dd12015-08-20 14:54:17 +10001181 true, true, ~0ULL, pdevice);
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001182 if (err)
Ben Skeggse781dc82015-08-20 14:54:15 +10001183 goto err_free;
Alexandre Courbot420b9462014-02-17 15:17:26 +09001184
David Herrmann915b4d12014-08-29 12:12:43 +02001185 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
Tom Gundersen0f288602016-09-21 16:59:19 +02001186 if (IS_ERR(drm)) {
1187 err = PTR_ERR(drm);
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001188 goto err_free;
Alexandre Courbot420b9462014-02-17 15:17:26 +09001189 }
1190
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001191 platform_set_drvdata(pdev, drm);
1192
1193 return drm;
1194
1195err_free:
Ben Skeggse781dc82015-08-20 14:54:15 +10001196 nvkm_device_del(pdevice);
Alexandre Courbot8ba9ff12014-06-26 14:33:32 +09001197
1198 return ERR_PTR(err);
Alexandre Courbot420b9462014-02-17 15:17:26 +09001199}
1200
Ben Skeggs94580292012-07-06 12:14:00 +10001201static int __init
1202nouveau_drm_init(void)
1203{
David Herrmann915b4d12014-08-29 12:12:43 +02001204 driver_pci = driver_stub;
David Herrmann915b4d12014-08-29 12:12:43 +02001205 driver_platform = driver_stub;
David Herrmann915b4d12014-08-29 12:12:43 +02001206
Pierre Moreau703fa262014-08-18 22:43:24 +02001207 nouveau_display_options();
1208
Ben Skeggs77145f12012-07-31 16:16:21 +10001209 if (nouveau_modeset == -1) {
Ben Skeggs77145f12012-07-31 16:16:21 +10001210 if (vgacon_text_force())
1211 nouveau_modeset = 0;
Ben Skeggs77145f12012-07-31 16:16:21 +10001212 }
1213
1214 if (!nouveau_modeset)
1215 return 0;
1216
Alexandre Courbot055a65d2015-01-15 15:29:56 +09001217#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1218 platform_driver_register(&nouveau_platform_driver);
1219#endif
1220
Ben Skeggs77145f12012-07-31 16:16:21 +10001221 nouveau_register_dsm_handler();
Pierre Moreaudb1a0ae22016-12-08 00:57:08 +01001222 nouveau_backlight_ctor();
Daniel Vetter10631d72017-05-24 16:51:40 +02001223
1224#ifdef CONFIG_PCI
1225 return pci_register_driver(&nouveau_drm_pci_driver);
1226#else
1227 return 0;
1228#endif
Ben Skeggs94580292012-07-06 12:14:00 +10001229}
1230
1231static void __exit
1232nouveau_drm_exit(void)
1233{
Ben Skeggs77145f12012-07-31 16:16:21 +10001234 if (!nouveau_modeset)
1235 return;
1236
Daniel Vetter10631d72017-05-24 16:51:40 +02001237#ifdef CONFIG_PCI
1238 pci_unregister_driver(&nouveau_drm_pci_driver);
1239#endif
Pierre Moreaudb1a0ae22016-12-08 00:57:08 +01001240 nouveau_backlight_dtor();
Ben Skeggs77145f12012-07-31 16:16:21 +10001241 nouveau_unregister_dsm_handler();
Alexandre Courbot055a65d2015-01-15 15:29:56 +09001242
1243#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1244 platform_driver_unregister(&nouveau_platform_driver);
1245#endif
Ben Skeggs94580292012-07-06 12:14:00 +10001246}
1247
1248module_init(nouveau_drm_init);
1249module_exit(nouveau_drm_exit);
1250
1251MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
Ben Skeggs77145f12012-07-31 16:16:21 +10001252MODULE_AUTHOR(DRIVER_AUTHOR);
1253MODULE_DESCRIPTION(DRIVER_DESC);
Ben Skeggs94580292012-07-06 12:14:00 +10001254MODULE_LICENSE("GPL and additional rights");