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Anshuman Khandual4c6315f2015-05-21 12:13:06 +05301/*
2 * POWER Data Stream Control Register (DSCR)
3 *
4 * This header file contains helper functions and macros
5 * required for all the DSCR related test cases.
6 *
7 * Copyright 2012, Anton Blanchard, IBM Corporation.
8 * Copyright 2015, Anshuman Khandual, IBM Corporation.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
13 */
14#ifndef _SELFTESTS_POWERPC_DSCR_DSCR_H
15#define _SELFTESTS_POWERPC_DSCR_DSCR_H
16
17#include <unistd.h>
18#include <stdio.h>
19#include <stdlib.h>
20#include <string.h>
21#include <fcntl.h>
22#include <dirent.h>
23#include <pthread.h>
24#include <sched.h>
25#include <sys/types.h>
26#include <sys/stat.h>
27#include <sys/wait.h>
28
29#include "utils.h"
30
Anshuman Khandual4c6315f2015-05-21 12:13:06 +053031#define THREADS 100 /* Max threads */
32#define COUNT 100 /* Max iterations */
33#define DSCR_MAX 16 /* Max DSCR value */
34#define LEN_MAX 100 /* Max name length */
35
36#define DSCR_DEFAULT "/sys/devices/system/cpu/dscr_default"
37#define CPU_PATH "/sys/devices/system/cpu/"
38
39#define rmb() asm volatile("lwsync":::"memory")
40#define wmb() asm volatile("lwsync":::"memory")
41
42#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
43
44/* Prilvilege state DSCR access */
45inline unsigned long get_dscr(void)
46{
47 unsigned long ret;
48
Anshuman Khandualefe71a62016-09-30 10:32:50 +080049 asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR_PRIV));
Anshuman Khandual4c6315f2015-05-21 12:13:06 +053050
51 return ret;
52}
53
54inline void set_dscr(unsigned long val)
55{
Anshuman Khandualefe71a62016-09-30 10:32:50 +080056 asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_PRIV));
Anshuman Khandual4c6315f2015-05-21 12:13:06 +053057}
58
59/* Problem state DSCR access */
60inline unsigned long get_dscr_usr(void)
61{
62 unsigned long ret;
63
Anshuman Khandualefe71a62016-09-30 10:32:50 +080064 asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR));
Anshuman Khandual4c6315f2015-05-21 12:13:06 +053065
66 return ret;
67}
68
69inline void set_dscr_usr(unsigned long val)
70{
Anshuman Khandualefe71a62016-09-30 10:32:50 +080071 asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
Anshuman Khandual4c6315f2015-05-21 12:13:06 +053072}
73
74/* Default DSCR access */
75unsigned long get_default_dscr(void)
76{
77 int fd = -1, ret;
78 char buf[16];
79 unsigned long val;
80
81 if (fd == -1) {
82 fd = open(DSCR_DEFAULT, O_RDONLY);
83 if (fd == -1) {
84 perror("open() failed");
85 exit(1);
86 }
87 }
88 memset(buf, 0, sizeof(buf));
89 lseek(fd, 0, SEEK_SET);
90 ret = read(fd, buf, sizeof(buf));
91 if (ret == -1) {
92 perror("read() failed");
93 exit(1);
94 }
95 sscanf(buf, "%lx", &val);
96 close(fd);
97 return val;
98}
99
100void set_default_dscr(unsigned long val)
101{
102 int fd = -1, ret;
103 char buf[16];
104
105 if (fd == -1) {
106 fd = open(DSCR_DEFAULT, O_RDWR);
107 if (fd == -1) {
108 perror("open() failed");
109 exit(1);
110 }
111 }
112 sprintf(buf, "%lx\n", val);
113 ret = write(fd, buf, strlen(buf));
114 if (ret == -1) {
115 perror("write() failed");
116 exit(1);
117 }
118 close(fd);
119}
120
121double uniform_deviate(int seed)
122{
123 return seed * (1.0 / (RAND_MAX + 1.0));
124}
125#endif /* _SELFTESTS_POWERPC_DSCR_DSCR_H */