Anshuman Khandual | 4c6315f | 2015-05-21 12:13:06 +0530 | [diff] [blame] | 1 | /* |
| 2 | * POWER Data Stream Control Register (DSCR) |
| 3 | * |
| 4 | * This header file contains helper functions and macros |
| 5 | * required for all the DSCR related test cases. |
| 6 | * |
| 7 | * Copyright 2012, Anton Blanchard, IBM Corporation. |
| 8 | * Copyright 2015, Anshuman Khandual, IBM Corporation. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify it |
| 11 | * under the terms of the GNU General Public License version 2 as published |
| 12 | * by the Free Software Foundation. |
| 13 | */ |
| 14 | #ifndef _SELFTESTS_POWERPC_DSCR_DSCR_H |
| 15 | #define _SELFTESTS_POWERPC_DSCR_DSCR_H |
| 16 | |
| 17 | #include <unistd.h> |
| 18 | #include <stdio.h> |
| 19 | #include <stdlib.h> |
| 20 | #include <string.h> |
| 21 | #include <fcntl.h> |
| 22 | #include <dirent.h> |
| 23 | #include <pthread.h> |
| 24 | #include <sched.h> |
| 25 | #include <sys/types.h> |
| 26 | #include <sys/stat.h> |
| 27 | #include <sys/wait.h> |
| 28 | |
| 29 | #include "utils.h" |
| 30 | |
| 31 | #define SPRN_DSCR 0x11 /* Privilege state SPR */ |
| 32 | #define SPRN_DSCR_USR 0x03 /* Problem state SPR */ |
| 33 | #define THREADS 100 /* Max threads */ |
| 34 | #define COUNT 100 /* Max iterations */ |
| 35 | #define DSCR_MAX 16 /* Max DSCR value */ |
| 36 | #define LEN_MAX 100 /* Max name length */ |
| 37 | |
| 38 | #define DSCR_DEFAULT "/sys/devices/system/cpu/dscr_default" |
| 39 | #define CPU_PATH "/sys/devices/system/cpu/" |
| 40 | |
| 41 | #define rmb() asm volatile("lwsync":::"memory") |
| 42 | #define wmb() asm volatile("lwsync":::"memory") |
| 43 | |
| 44 | #define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x)) |
| 45 | |
| 46 | /* Prilvilege state DSCR access */ |
| 47 | inline unsigned long get_dscr(void) |
| 48 | { |
| 49 | unsigned long ret; |
| 50 | |
| 51 | asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR)); |
| 52 | |
| 53 | return ret; |
| 54 | } |
| 55 | |
| 56 | inline void set_dscr(unsigned long val) |
| 57 | { |
| 58 | asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR)); |
| 59 | } |
| 60 | |
| 61 | /* Problem state DSCR access */ |
| 62 | inline unsigned long get_dscr_usr(void) |
| 63 | { |
| 64 | unsigned long ret; |
| 65 | |
| 66 | asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR_USR)); |
| 67 | |
| 68 | return ret; |
| 69 | } |
| 70 | |
| 71 | inline void set_dscr_usr(unsigned long val) |
| 72 | { |
| 73 | asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_USR)); |
| 74 | } |
| 75 | |
| 76 | /* Default DSCR access */ |
| 77 | unsigned long get_default_dscr(void) |
| 78 | { |
| 79 | int fd = -1, ret; |
| 80 | char buf[16]; |
| 81 | unsigned long val; |
| 82 | |
| 83 | if (fd == -1) { |
| 84 | fd = open(DSCR_DEFAULT, O_RDONLY); |
| 85 | if (fd == -1) { |
| 86 | perror("open() failed"); |
| 87 | exit(1); |
| 88 | } |
| 89 | } |
| 90 | memset(buf, 0, sizeof(buf)); |
| 91 | lseek(fd, 0, SEEK_SET); |
| 92 | ret = read(fd, buf, sizeof(buf)); |
| 93 | if (ret == -1) { |
| 94 | perror("read() failed"); |
| 95 | exit(1); |
| 96 | } |
| 97 | sscanf(buf, "%lx", &val); |
| 98 | close(fd); |
| 99 | return val; |
| 100 | } |
| 101 | |
| 102 | void set_default_dscr(unsigned long val) |
| 103 | { |
| 104 | int fd = -1, ret; |
| 105 | char buf[16]; |
| 106 | |
| 107 | if (fd == -1) { |
| 108 | fd = open(DSCR_DEFAULT, O_RDWR); |
| 109 | if (fd == -1) { |
| 110 | perror("open() failed"); |
| 111 | exit(1); |
| 112 | } |
| 113 | } |
| 114 | sprintf(buf, "%lx\n", val); |
| 115 | ret = write(fd, buf, strlen(buf)); |
| 116 | if (ret == -1) { |
| 117 | perror("write() failed"); |
| 118 | exit(1); |
| 119 | } |
| 120 | close(fd); |
| 121 | } |
| 122 | |
| 123 | double uniform_deviate(int seed) |
| 124 | { |
| 125 | return seed * (1.0 / (RAND_MAX + 1.0)); |
| 126 | } |
| 127 | #endif /* _SELFTESTS_POWERPC_DSCR_DSCR_H */ |