blob: 014cf6dcaf8b491cd4a797613b87c54abd7f0227 [file] [log] [blame]
Thomas Gleixnerd2912cb2019-06-04 10:11:33 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Russell Kinga09e64f2008-08-05 16:14:15 +01002/*
3 * arch/arm/mach-ixp4xx/include/mach/io.h
4 *
5 * Author: Deepak Saxena <dsaxena@plexity.net>
6 *
7 * Copyright (C) 2002-2005 MontaVista Software, Inc.
Russell Kinga09e64f2008-08-05 16:14:15 +01008 */
9
10#ifndef __ASM_ARM_ARCH_IO_H
11#define __ASM_ARM_ARCH_IO_H
12
13#include <linux/bitops.h>
14
15#include <mach/hardware.h>
16
Russell Kinga09e64f2008-08-05 16:14:15 +010017extern int (*ixp4xx_pci_read)(u32 addr, u32 cmd, u32* data);
18extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
19
20
21/*
22 * IXP4xx provides two methods of accessing PCI memory space:
23 *
Krzysztof Hałasaed5b9fa2009-11-15 18:02:10 +010024 * 1) A direct mapped window from 0x48000000 to 0x4BFFFFFF (64MB).
Russell Kinga09e64f2008-08-05 16:14:15 +010025 * To access PCI via this space, we simply ioremap() the BAR
26 * into the kernel and we can use the standard read[bwl]/write[bwl]
27 * macros. This is the preffered method due to speed but it
Krzysztof Hałasaed5b9fa2009-11-15 18:02:10 +010028 * limits the system to just 64MB of PCI memory. This can be
29 * problematic if using video cards and other memory-heavy targets.
Russell Kinga09e64f2008-08-05 16:14:15 +010030 *
Krzysztof Hałasaed5b9fa2009-11-15 18:02:10 +010031 * 2) If > 64MB of memory space is required, the IXP4xx can use indirect
32 * registers to access the whole 4 GB of PCI memory space (as we do below
33 * for I/O transactions). This allows currently for up to 1 GB (0x10000000
34 * to 0x4FFFFFFF) of memory on the bus. The disadvantage of this is that
35 * every PCI access requires three local register accesses plus a spinlock,
36 * but in some cases the performance hit is acceptable. In addition, you
37 * cannot mmap() PCI devices in this case.
Russell Kinga09e64f2008-08-05 16:14:15 +010038 */
Rob Herring5621caa2012-02-10 20:04:56 -060039#ifdef CONFIG_IXP4XX_INDIRECT_PCI
Russell Kinga09e64f2008-08-05 16:14:15 +010040
Russell Kinga09e64f2008-08-05 16:14:15 +010041/*
42 * In the case of using indirect PCI, we simply return the actual PCI
43 * address and our read/write implementation use that to drive the
44 * access registers. If something outside of PCI is ioremap'd, we
45 * fallback to the default.
46 */
Krzysztof Hałasacba36222009-11-15 01:25:06 +010047
Arnd Bergmann926aabd2014-03-16 20:23:18 +010048extern unsigned long pcibios_min_mem;
Krzysztof Hałasacba36222009-11-15 01:25:06 +010049static inline int is_pci_memory(u32 addr)
50{
Arnd Bergmann926aabd2014-03-16 20:23:18 +010051 return (addr >= pcibios_min_mem) && (addr <= 0x4FFFFFFF);
Krzysztof Hałasacba36222009-11-15 01:25:06 +010052}
53
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +010054#define writeb(v, p) __indirect_writeb(v, p)
55#define writew(v, p) __indirect_writew(v, p)
56#define writel(v, p) __indirect_writel(v, p)
Russell Kinga09e64f2008-08-05 16:14:15 +010057
Arnd Bergmanne43b21c2014-11-10 15:10:32 +010058#define writeb_relaxed(v, p) __indirect_writeb(v, p)
59#define writew_relaxed(v, p) __indirect_writew(v, p)
60#define writel_relaxed(v, p) __indirect_writel(v, p)
61
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +010062#define writesb(p, v, l) __indirect_writesb(p, v, l)
63#define writesw(p, v, l) __indirect_writesw(p, v, l)
64#define writesl(p, v, l) __indirect_writesl(p, v, l)
Russell Kinga09e64f2008-08-05 16:14:15 +010065
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +010066#define readb(p) __indirect_readb(p)
67#define readw(p) __indirect_readw(p)
68#define readl(p) __indirect_readl(p)
69
Arnd Bergmanne43b21c2014-11-10 15:10:32 +010070#define readb_relaxed(p) __indirect_readb(p)
71#define readw_relaxed(p) __indirect_readw(p)
72#define readl_relaxed(p) __indirect_readl(p)
73
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +010074#define readsb(p, v, l) __indirect_readsb(p, v, l)
75#define readsw(p, v, l) __indirect_readsw(p, v, l)
76#define readsl(p, v, l) __indirect_readsl(p, v, l)
77
78static inline void __indirect_writeb(u8 value, volatile void __iomem *p)
Russell Kinga09e64f2008-08-05 16:14:15 +010079{
80 u32 addr = (u32)p;
81 u32 n, byte_enables, data;
82
Krzysztof Hałasacba36222009-11-15 01:25:06 +010083 if (!is_pci_memory(addr)) {
Arnd Bergmanne43b21c2014-11-10 15:10:32 +010084 __raw_writeb(value, p);
Russell Kinga09e64f2008-08-05 16:14:15 +010085 return;
86 }
87
88 n = addr % 4;
89 byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL;
90 data = value << (8*n);
91 ixp4xx_pci_write(addr, byte_enables | NP_CMD_MEMWRITE, data);
92}
93
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +010094static inline void __indirect_writesb(volatile void __iomem *bus_addr,
Arnd Bergmann1f3b4d82016-01-15 13:32:43 +010095 const void *p, int count)
Russell Kinga09e64f2008-08-05 16:14:15 +010096{
Arnd Bergmann1f3b4d82016-01-15 13:32:43 +010097 const u8 *vaddr = p;
98
Russell Kinga09e64f2008-08-05 16:14:15 +010099 while (count--)
100 writeb(*vaddr++, bus_addr);
101}
102
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100103static inline void __indirect_writew(u16 value, volatile void __iomem *p)
Russell Kinga09e64f2008-08-05 16:14:15 +0100104{
105 u32 addr = (u32)p;
106 u32 n, byte_enables, data;
107
Krzysztof Hałasacba36222009-11-15 01:25:06 +0100108 if (!is_pci_memory(addr)) {
Arnd Bergmanne43b21c2014-11-10 15:10:32 +0100109 __raw_writew(value, p);
Russell Kinga09e64f2008-08-05 16:14:15 +0100110 return;
111 }
112
113 n = addr % 4;
114 byte_enables = (0xf & ~(BIT(n) | BIT(n+1))) << IXP4XX_PCI_NP_CBE_BESL;
115 data = value << (8*n);
116 ixp4xx_pci_write(addr, byte_enables | NP_CMD_MEMWRITE, data);
117}
118
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100119static inline void __indirect_writesw(volatile void __iomem *bus_addr,
Arnd Bergmann1f3b4d82016-01-15 13:32:43 +0100120 const void *p, int count)
Russell Kinga09e64f2008-08-05 16:14:15 +0100121{
Arnd Bergmann1f3b4d82016-01-15 13:32:43 +0100122 const u16 *vaddr = p;
123
Russell Kinga09e64f2008-08-05 16:14:15 +0100124 while (count--)
125 writew(*vaddr++, bus_addr);
126}
127
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100128static inline void __indirect_writel(u32 value, volatile void __iomem *p)
Russell Kinga09e64f2008-08-05 16:14:15 +0100129{
130 u32 addr = (__force u32)p;
Krzysztof Hałasacba36222009-11-15 01:25:06 +0100131
132 if (!is_pci_memory(addr)) {
Russell Kinga09e64f2008-08-05 16:14:15 +0100133 __raw_writel(value, p);
134 return;
135 }
136
137 ixp4xx_pci_write(addr, NP_CMD_MEMWRITE, value);
138}
139
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100140static inline void __indirect_writesl(volatile void __iomem *bus_addr,
Arnd Bergmann1f3b4d82016-01-15 13:32:43 +0100141 const void *p, int count)
Russell Kinga09e64f2008-08-05 16:14:15 +0100142{
Arnd Bergmann1f3b4d82016-01-15 13:32:43 +0100143 const u32 *vaddr = p;
Russell Kinga09e64f2008-08-05 16:14:15 +0100144 while (count--)
145 writel(*vaddr++, bus_addr);
146}
147
Arnd Bergmannd66e5132015-11-20 23:20:28 +0100148static inline u8 __indirect_readb(const volatile void __iomem *p)
Russell Kinga09e64f2008-08-05 16:14:15 +0100149{
150 u32 addr = (u32)p;
151 u32 n, byte_enables, data;
152
Krzysztof Hałasacba36222009-11-15 01:25:06 +0100153 if (!is_pci_memory(addr))
Arnd Bergmanne43b21c2014-11-10 15:10:32 +0100154 return __raw_readb(p);
Russell Kinga09e64f2008-08-05 16:14:15 +0100155
156 n = addr % 4;
157 byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL;
158 if (ixp4xx_pci_read(addr, byte_enables | NP_CMD_MEMREAD, &data))
159 return 0xff;
160
161 return data >> (8*n);
162}
163
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100164static inline void __indirect_readsb(const volatile void __iomem *bus_addr,
Arnd Bergmann1f3b4d82016-01-15 13:32:43 +0100165 void *p, u32 count)
Russell Kinga09e64f2008-08-05 16:14:15 +0100166{
Arnd Bergmann1f3b4d82016-01-15 13:32:43 +0100167 u8 *vaddr = p;
168
Russell Kinga09e64f2008-08-05 16:14:15 +0100169 while (count--)
170 *vaddr++ = readb(bus_addr);
171}
172
Arnd Bergmannd66e5132015-11-20 23:20:28 +0100173static inline u16 __indirect_readw(const volatile void __iomem *p)
Russell Kinga09e64f2008-08-05 16:14:15 +0100174{
175 u32 addr = (u32)p;
176 u32 n, byte_enables, data;
177
Krzysztof Hałasacba36222009-11-15 01:25:06 +0100178 if (!is_pci_memory(addr))
Arnd Bergmanne43b21c2014-11-10 15:10:32 +0100179 return __raw_readw(p);
Russell Kinga09e64f2008-08-05 16:14:15 +0100180
181 n = addr % 4;
182 byte_enables = (0xf & ~(BIT(n) | BIT(n+1))) << IXP4XX_PCI_NP_CBE_BESL;
183 if (ixp4xx_pci_read(addr, byte_enables | NP_CMD_MEMREAD, &data))
184 return 0xffff;
185
186 return data>>(8*n);
187}
188
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100189static inline void __indirect_readsw(const volatile void __iomem *bus_addr,
Arnd Bergmann1f3b4d82016-01-15 13:32:43 +0100190 void *p, u32 count)
Russell Kinga09e64f2008-08-05 16:14:15 +0100191{
Arnd Bergmann1f3b4d82016-01-15 13:32:43 +0100192 u16 *vaddr = p;
193
Russell Kinga09e64f2008-08-05 16:14:15 +0100194 while (count--)
195 *vaddr++ = readw(bus_addr);
196}
197
Arnd Bergmannd66e5132015-11-20 23:20:28 +0100198static inline u32 __indirect_readl(const volatile void __iomem *p)
Russell Kinga09e64f2008-08-05 16:14:15 +0100199{
200 u32 addr = (__force u32)p;
201 u32 data;
202
Krzysztof Hałasacba36222009-11-15 01:25:06 +0100203 if (!is_pci_memory(addr))
Russell Kinga09e64f2008-08-05 16:14:15 +0100204 return __raw_readl(p);
205
206 if (ixp4xx_pci_read(addr, NP_CMD_MEMREAD, &data))
207 return 0xffffffff;
208
209 return data;
210}
211
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100212static inline void __indirect_readsl(const volatile void __iomem *bus_addr,
Arnd Bergmann1f3b4d82016-01-15 13:32:43 +0100213 void *p, u32 count)
Russell Kinga09e64f2008-08-05 16:14:15 +0100214{
Arnd Bergmann1f3b4d82016-01-15 13:32:43 +0100215 u32 *vaddr = p;
216
Russell Kinga09e64f2008-08-05 16:14:15 +0100217 while (count--)
218 *vaddr++ = readl(bus_addr);
219}
220
221
222/*
223 * We can use the built-in functions b/c they end up calling writeb/readb
224 */
225#define memset_io(c,v,l) _memset_io((c),(v),(l))
226#define memcpy_fromio(a,c,l) _memcpy_fromio((a),(c),(l))
227#define memcpy_toio(c,a,l) _memcpy_toio((c),(a),(l))
228
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100229#endif /* CONFIG_IXP4XX_INDIRECT_PCI */
Russell Kinga09e64f2008-08-05 16:14:15 +0100230
231#ifndef CONFIG_PCI
232
Russell King0560cf52008-11-30 11:45:54 +0000233#define __io(v) __typesafe_io(v)
Russell Kinga09e64f2008-08-05 16:14:15 +0100234
235#else
236
237/*
238 * IXP4xx does not have a transparent cpu -> PCI I/O translation
239 * window. Instead, it has a set of registers that must be tweaked
240 * with the proper byte lanes, command types, and address for the
241 * transaction. This means that we need to override the default
242 * I/O functions.
243 */
Russell Kinga09e64f2008-08-05 16:14:15 +0100244
Thierry Reding2e0fa0c2014-10-01 14:15:34 +0200245#define outb outb
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100246static inline void outb(u8 value, u32 addr)
Russell Kinga09e64f2008-08-05 16:14:15 +0100247{
248 u32 n, byte_enables, data;
249 n = addr % 4;
250 byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL;
251 data = value << (8*n);
252 ixp4xx_pci_write(addr, byte_enables | NP_CMD_IOWRITE, data);
253}
254
Thierry Reding2e0fa0c2014-10-01 14:15:34 +0200255#define outsb outsb
Arnd Bergmann1aeb3c52015-01-26 13:19:23 +0100256static inline void outsb(u32 io_addr, const void *p, u32 count)
Russell Kinga09e64f2008-08-05 16:14:15 +0100257{
Arnd Bergmann1aeb3c52015-01-26 13:19:23 +0100258 const u8 *vaddr = p;
259
Russell Kinga09e64f2008-08-05 16:14:15 +0100260 while (count--)
261 outb(*vaddr++, io_addr);
262}
263
Thierry Reding2e0fa0c2014-10-01 14:15:34 +0200264#define outw outw
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100265static inline void outw(u16 value, u32 addr)
Russell Kinga09e64f2008-08-05 16:14:15 +0100266{
267 u32 n, byte_enables, data;
268 n = addr % 4;
269 byte_enables = (0xf & ~(BIT(n) | BIT(n+1))) << IXP4XX_PCI_NP_CBE_BESL;
270 data = value << (8*n);
271 ixp4xx_pci_write(addr, byte_enables | NP_CMD_IOWRITE, data);
272}
273
Thierry Reding2e0fa0c2014-10-01 14:15:34 +0200274#define outsw outsw
Arnd Bergmann1aeb3c52015-01-26 13:19:23 +0100275static inline void outsw(u32 io_addr, const void *p, u32 count)
Russell Kinga09e64f2008-08-05 16:14:15 +0100276{
Arnd Bergmann1aeb3c52015-01-26 13:19:23 +0100277 const u16 *vaddr = p;
Russell Kinga09e64f2008-08-05 16:14:15 +0100278 while (count--)
279 outw(cpu_to_le16(*vaddr++), io_addr);
280}
281
Thierry Reding2e0fa0c2014-10-01 14:15:34 +0200282#define outl outl
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100283static inline void outl(u32 value, u32 addr)
Russell Kinga09e64f2008-08-05 16:14:15 +0100284{
285 ixp4xx_pci_write(addr, NP_CMD_IOWRITE, value);
286}
287
Thierry Reding2e0fa0c2014-10-01 14:15:34 +0200288#define outsl outsl
Arnd Bergmann1aeb3c52015-01-26 13:19:23 +0100289static inline void outsl(u32 io_addr, const void *p, u32 count)
Russell Kinga09e64f2008-08-05 16:14:15 +0100290{
Arnd Bergmann1aeb3c52015-01-26 13:19:23 +0100291 const u32 *vaddr = p;
Russell Kinga09e64f2008-08-05 16:14:15 +0100292 while (count--)
Krzysztof Hałasa9f2c9492009-11-11 00:21:48 +0100293 outl(cpu_to_le32(*vaddr++), io_addr);
Russell Kinga09e64f2008-08-05 16:14:15 +0100294}
295
Thierry Reding2e0fa0c2014-10-01 14:15:34 +0200296#define inb inb
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100297static inline u8 inb(u32 addr)
Russell Kinga09e64f2008-08-05 16:14:15 +0100298{
299 u32 n, byte_enables, data;
300 n = addr % 4;
301 byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL;
302 if (ixp4xx_pci_read(addr, byte_enables | NP_CMD_IOREAD, &data))
303 return 0xff;
304
305 return data >> (8*n);
306}
307
Thierry Reding2e0fa0c2014-10-01 14:15:34 +0200308#define insb insb
Arnd Bergmann1aeb3c52015-01-26 13:19:23 +0100309static inline void insb(u32 io_addr, void *p, u32 count)
Russell Kinga09e64f2008-08-05 16:14:15 +0100310{
Arnd Bergmann1aeb3c52015-01-26 13:19:23 +0100311 u8 *vaddr = p;
Russell Kinga09e64f2008-08-05 16:14:15 +0100312 while (count--)
313 *vaddr++ = inb(io_addr);
314}
315
Thierry Reding2e0fa0c2014-10-01 14:15:34 +0200316#define inw inw
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100317static inline u16 inw(u32 addr)
Russell Kinga09e64f2008-08-05 16:14:15 +0100318{
319 u32 n, byte_enables, data;
320 n = addr % 4;
321 byte_enables = (0xf & ~(BIT(n) | BIT(n+1))) << IXP4XX_PCI_NP_CBE_BESL;
322 if (ixp4xx_pci_read(addr, byte_enables | NP_CMD_IOREAD, &data))
323 return 0xffff;
324
325 return data>>(8*n);
326}
327
Thierry Reding2e0fa0c2014-10-01 14:15:34 +0200328#define insw insw
Arnd Bergmann1aeb3c52015-01-26 13:19:23 +0100329static inline void insw(u32 io_addr, void *p, u32 count)
Russell Kinga09e64f2008-08-05 16:14:15 +0100330{
Arnd Bergmann1aeb3c52015-01-26 13:19:23 +0100331 u16 *vaddr = p;
Russell Kinga09e64f2008-08-05 16:14:15 +0100332 while (count--)
333 *vaddr++ = le16_to_cpu(inw(io_addr));
334}
335
Thierry Reding2e0fa0c2014-10-01 14:15:34 +0200336#define inl inl
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100337static inline u32 inl(u32 addr)
Russell Kinga09e64f2008-08-05 16:14:15 +0100338{
339 u32 data;
340 if (ixp4xx_pci_read(addr, NP_CMD_IOREAD, &data))
341 return 0xffffffff;
342
343 return data;
344}
345
Thierry Reding2e0fa0c2014-10-01 14:15:34 +0200346#define insl insl
Arnd Bergmann1aeb3c52015-01-26 13:19:23 +0100347static inline void insl(u32 io_addr, void *p, u32 count)
Russell Kinga09e64f2008-08-05 16:14:15 +0100348{
Arnd Bergmann1aeb3c52015-01-26 13:19:23 +0100349 u32 *vaddr = p;
Russell Kinga09e64f2008-08-05 16:14:15 +0100350 while (count--)
Krzysztof Hałasa9f2c9492009-11-11 00:21:48 +0100351 *vaddr++ = le32_to_cpu(inl(io_addr));
Russell Kinga09e64f2008-08-05 16:14:15 +0100352}
353
354#define PIO_OFFSET 0x10000UL
355#define PIO_MASK 0x0ffffUL
356
357#define __is_io_address(p) (((unsigned long)p >= PIO_OFFSET) && \
358 ((unsigned long)p <= (PIO_MASK + PIO_OFFSET)))
Krzysztof Hałasa9f2c9492009-11-11 00:21:48 +0100359
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100360#define ioread8(p) ioread8(p)
Arnd Bergmannd66e5132015-11-20 23:20:28 +0100361static inline u8 ioread8(const void __iomem *addr)
Russell Kinga09e64f2008-08-05 16:14:15 +0100362{
363 unsigned long port = (unsigned long __force)addr;
364 if (__is_io_address(port))
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100365 return (unsigned int)inb(port & PIO_MASK);
Russell Kinga09e64f2008-08-05 16:14:15 +0100366 else
367#ifndef CONFIG_IXP4XX_INDIRECT_PCI
Krzysztof Hałasa59c29012010-01-10 13:55:11 +0100368 return (unsigned int)__raw_readb(addr);
Russell Kinga09e64f2008-08-05 16:14:15 +0100369#else
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100370 return (unsigned int)__indirect_readb(addr);
Russell Kinga09e64f2008-08-05 16:14:15 +0100371#endif
372}
373
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100374#define ioread8_rep(p, v, c) ioread8_rep(p, v, c)
375static inline void ioread8_rep(const void __iomem *addr, void *vaddr, u32 count)
Russell Kinga09e64f2008-08-05 16:14:15 +0100376{
377 unsigned long port = (unsigned long __force)addr;
378 if (__is_io_address(port))
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100379 insb(port & PIO_MASK, vaddr, count);
Russell Kinga09e64f2008-08-05 16:14:15 +0100380 else
381#ifndef CONFIG_IXP4XX_INDIRECT_PCI
382 __raw_readsb(addr, vaddr, count);
383#else
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100384 __indirect_readsb(addr, vaddr, count);
Russell Kinga09e64f2008-08-05 16:14:15 +0100385#endif
386}
387
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100388#define ioread16(p) ioread16(p)
Arnd Bergmannd66e5132015-11-20 23:20:28 +0100389static inline u16 ioread16(const void __iomem *addr)
Russell Kinga09e64f2008-08-05 16:14:15 +0100390{
391 unsigned long port = (unsigned long __force)addr;
392 if (__is_io_address(port))
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100393 return (unsigned int)inw(port & PIO_MASK);
Russell Kinga09e64f2008-08-05 16:14:15 +0100394 else
395#ifndef CONFIG_IXP4XX_INDIRECT_PCI
Krzysztof Hałasa59c29012010-01-10 13:55:11 +0100396 return le16_to_cpu((__force __le16)__raw_readw(addr));
Russell Kinga09e64f2008-08-05 16:14:15 +0100397#else
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100398 return (unsigned int)__indirect_readw(addr);
Russell Kinga09e64f2008-08-05 16:14:15 +0100399#endif
400}
401
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100402#define ioread16_rep(p, v, c) ioread16_rep(p, v, c)
403static inline void ioread16_rep(const void __iomem *addr, void *vaddr,
404 u32 count)
Russell Kinga09e64f2008-08-05 16:14:15 +0100405{
406 unsigned long port = (unsigned long __force)addr;
407 if (__is_io_address(port))
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100408 insw(port & PIO_MASK, vaddr, count);
Russell Kinga09e64f2008-08-05 16:14:15 +0100409 else
410#ifndef CONFIG_IXP4XX_INDIRECT_PCI
411 __raw_readsw(addr, vaddr, count);
412#else
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100413 __indirect_readsw(addr, vaddr, count);
Russell Kinga09e64f2008-08-05 16:14:15 +0100414#endif
415}
416
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100417#define ioread32(p) ioread32(p)
Arnd Bergmannd66e5132015-11-20 23:20:28 +0100418static inline u32 ioread32(const void __iomem *addr)
Russell Kinga09e64f2008-08-05 16:14:15 +0100419{
420 unsigned long port = (unsigned long __force)addr;
421 if (__is_io_address(port))
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100422 return (unsigned int)inl(port & PIO_MASK);
Russell Kinga09e64f2008-08-05 16:14:15 +0100423 else {
424#ifndef CONFIG_IXP4XX_INDIRECT_PCI
425 return le32_to_cpu((__force __le32)__raw_readl(addr));
426#else
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100427 return (unsigned int)__indirect_readl(addr);
Russell Kinga09e64f2008-08-05 16:14:15 +0100428#endif
429 }
430}
431
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100432#define ioread32_rep(p, v, c) ioread32_rep(p, v, c)
433static inline void ioread32_rep(const void __iomem *addr, void *vaddr,
434 u32 count)
Russell Kinga09e64f2008-08-05 16:14:15 +0100435{
436 unsigned long port = (unsigned long __force)addr;
437 if (__is_io_address(port))
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100438 insl(port & PIO_MASK, vaddr, count);
Russell Kinga09e64f2008-08-05 16:14:15 +0100439 else
440#ifndef CONFIG_IXP4XX_INDIRECT_PCI
441 __raw_readsl(addr, vaddr, count);
442#else
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100443 __indirect_readsl(addr, vaddr, count);
Russell Kinga09e64f2008-08-05 16:14:15 +0100444#endif
445}
446
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100447#define iowrite8(v, p) iowrite8(v, p)
448static inline void iowrite8(u8 value, void __iomem *addr)
Russell Kinga09e64f2008-08-05 16:14:15 +0100449{
450 unsigned long port = (unsigned long __force)addr;
451 if (__is_io_address(port))
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100452 outb(value, port & PIO_MASK);
Russell Kinga09e64f2008-08-05 16:14:15 +0100453 else
454#ifndef CONFIG_IXP4XX_INDIRECT_PCI
Krzysztof Hałasa59c29012010-01-10 13:55:11 +0100455 __raw_writeb(value, addr);
Russell Kinga09e64f2008-08-05 16:14:15 +0100456#else
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100457 __indirect_writeb(value, addr);
Russell Kinga09e64f2008-08-05 16:14:15 +0100458#endif
459}
460
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100461#define iowrite8_rep(p, v, c) iowrite8_rep(p, v, c)
462static inline void iowrite8_rep(void __iomem *addr, const void *vaddr,
463 u32 count)
Russell Kinga09e64f2008-08-05 16:14:15 +0100464{
465 unsigned long port = (unsigned long __force)addr;
466 if (__is_io_address(port))
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100467 outsb(port & PIO_MASK, vaddr, count);
Russell Kinga09e64f2008-08-05 16:14:15 +0100468 else
469#ifndef CONFIG_IXP4XX_INDIRECT_PCI
470 __raw_writesb(addr, vaddr, count);
471#else
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100472 __indirect_writesb(addr, vaddr, count);
Russell Kinga09e64f2008-08-05 16:14:15 +0100473#endif
474}
475
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100476#define iowrite16(v, p) iowrite16(v, p)
477static inline void iowrite16(u16 value, void __iomem *addr)
Russell Kinga09e64f2008-08-05 16:14:15 +0100478{
479 unsigned long port = (unsigned long __force)addr;
480 if (__is_io_address(port))
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100481 outw(value, port & PIO_MASK);
Russell Kinga09e64f2008-08-05 16:14:15 +0100482 else
483#ifndef CONFIG_IXP4XX_INDIRECT_PCI
484 __raw_writew(cpu_to_le16(value), addr);
485#else
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100486 __indirect_writew(value, addr);
Russell Kinga09e64f2008-08-05 16:14:15 +0100487#endif
488}
489
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100490#define iowrite16_rep(p, v, c) iowrite16_rep(p, v, c)
491static inline void iowrite16_rep(void __iomem *addr, const void *vaddr,
492 u32 count)
Russell Kinga09e64f2008-08-05 16:14:15 +0100493{
494 unsigned long port = (unsigned long __force)addr;
495 if (__is_io_address(port))
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100496 outsw(port & PIO_MASK, vaddr, count);
Russell Kinga09e64f2008-08-05 16:14:15 +0100497 else
498#ifndef CONFIG_IXP4XX_INDIRECT_PCI
499 __raw_writesw(addr, vaddr, count);
500#else
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100501 __indirect_writesw(addr, vaddr, count);
Russell Kinga09e64f2008-08-05 16:14:15 +0100502#endif
503}
504
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100505#define iowrite32(v, p) iowrite32(v, p)
506static inline void iowrite32(u32 value, void __iomem *addr)
Russell Kinga09e64f2008-08-05 16:14:15 +0100507{
508 unsigned long port = (unsigned long __force)addr;
509 if (__is_io_address(port))
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100510 outl(value, port & PIO_MASK);
Russell Kinga09e64f2008-08-05 16:14:15 +0100511 else
512#ifndef CONFIG_IXP4XX_INDIRECT_PCI
513 __raw_writel((u32 __force)cpu_to_le32(value), addr);
514#else
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100515 __indirect_writel(value, addr);
Russell Kinga09e64f2008-08-05 16:14:15 +0100516#endif
517}
518
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100519#define iowrite32_rep(p, v, c) iowrite32_rep(p, v, c)
520static inline void iowrite32_rep(void __iomem *addr, const void *vaddr,
521 u32 count)
Russell Kinga09e64f2008-08-05 16:14:15 +0100522{
523 unsigned long port = (unsigned long __force)addr;
524 if (__is_io_address(port))
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100525 outsl(port & PIO_MASK, vaddr, count);
Russell Kinga09e64f2008-08-05 16:14:15 +0100526 else
527#ifndef CONFIG_IXP4XX_INDIRECT_PCI
528 __raw_writesl(addr, vaddr, count);
529#else
Krzysztof Hałasa28f85cd2009-11-14 19:44:44 +0100530 __indirect_writesl(addr, vaddr, count);
Russell Kinga09e64f2008-08-05 16:14:15 +0100531#endif
532}
533
Arnd Bergmannc4caa8d2016-06-10 10:51:04 +0200534#define ioport_map(port, nr) ioport_map(port, nr)
535static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
536{
537 return ((void __iomem*)((port) + PIO_OFFSET));
538}
539#define ioport_unmap(addr) ioport_unmap(addr)
540static inline void ioport_unmap(void __iomem *addr)
541{
542}
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100543#endif /* CONFIG_PCI */
Russell Kinga09e64f2008-08-05 16:14:15 +0100544
Krzysztof Hałasa58e570d2009-11-14 22:55:42 +0100545#endif /* __ASM_ARM_ARCH_IO_H */