Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | /* |
| 3 | * linux/arch/arm/kernel/debug.S |
| 4 | * |
| 5 | * Copyright (C) 1994-1999 Russell King |
| 6 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | * 32-bit debugging code |
| 8 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | #include <linux/linkage.h> |
Rob Herring | 6f6f6a7 | 2012-03-10 10:30:31 -0600 | [diff] [blame] | 10 | #include <asm/assembler.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | |
| 12 | .text |
| 13 | |
| 14 | /* |
| 15 | * Some debugging routines (useful if you've got MM problems and |
| 16 | * printk isn't working). For DEBUGGING ONLY!!! Do not leave |
| 17 | * references to these in a production kernel! |
| 18 | */ |
| 19 | |
Rob Herring | 91a9fec | 2012-08-31 00:03:46 -0500 | [diff] [blame] | 20 | #if !defined(CONFIG_DEBUG_SEMIHOSTING) |
| 21 | #include CONFIG_DEBUG_LL_INCLUDE |
| 22 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | |
Jeremy Kerr | 0ea1293 | 2010-07-06 18:30:06 +0800 | [diff] [blame] | 24 | #ifdef CONFIG_MMU |
| 25 | .macro addruart_current, rx, tmp1, tmp2 |
Nicolas Pitre | 639da5e | 2011-08-31 22:55:46 -0400 | [diff] [blame] | 26 | addruart \tmp1, \tmp2, \rx |
Jeremy Kerr | 0ea1293 | 2010-07-06 18:30:06 +0800 | [diff] [blame] | 27 | mrc p15, 0, \rx, c1, c0 |
| 28 | tst \rx, #1 |
| 29 | moveq \rx, \tmp1 |
| 30 | movne \rx, \tmp2 |
| 31 | .endm |
| 32 | |
| 33 | #else /* !CONFIG_MMU */ |
| 34 | .macro addruart_current, rx, tmp1, tmp2 |
Stefan Agner | 7505f04 | 2015-05-20 00:03:50 +0200 | [diff] [blame] | 35 | addruart \rx, \tmp1, \tmp2 |
Jeremy Kerr | 0ea1293 | 2010-07-06 18:30:06 +0800 | [diff] [blame] | 36 | .endm |
| 37 | |
| 38 | #endif /* CONFIG_MMU */ |
| 39 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | /* |
| 41 | * Useful debugging routines |
| 42 | */ |
| 43 | ENTRY(printhex8) |
| 44 | mov r1, #8 |
| 45 | b printhex |
Catalin Marinas | 93ed397 | 2008-08-28 11:22:32 +0100 | [diff] [blame] | 46 | ENDPROC(printhex8) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | |
| 48 | ENTRY(printhex4) |
| 49 | mov r1, #4 |
| 50 | b printhex |
Catalin Marinas | 93ed397 | 2008-08-28 11:22:32 +0100 | [diff] [blame] | 51 | ENDPROC(printhex4) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | |
| 53 | ENTRY(printhex2) |
| 54 | mov r1, #2 |
Nicolas Pitre | e11d131 | 2017-10-06 19:36:58 +0100 | [diff] [blame] | 55 | printhex: adr r2, hexbuf_rel |
| 56 | ldr r3, [r2] |
| 57 | add r2, r2, r3 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 58 | add r3, r2, r1 |
| 59 | mov r1, #0 |
| 60 | strb r1, [r3] |
| 61 | 1: and r1, r0, #15 |
| 62 | mov r0, r0, lsr #4 |
| 63 | cmp r1, #10 |
| 64 | addlt r1, r1, #'0' |
| 65 | addge r1, r1, #'a' - 10 |
| 66 | strb r1, [r3, #-1]! |
| 67 | teq r3, r2 |
| 68 | bne 1b |
| 69 | mov r0, r2 |
| 70 | b printascii |
Catalin Marinas | 93ed397 | 2008-08-28 11:22:32 +0100 | [diff] [blame] | 71 | ENDPROC(printhex2) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 72 | |
Nicolas Pitre | e11d131 | 2017-10-06 19:36:58 +0100 | [diff] [blame] | 73 | .pushsection .bss |
| 74 | hexbuf_addr: .space 16 |
| 75 | .popsection |
| 76 | .align |
| 77 | hexbuf_rel: .long hexbuf_addr - . |
Afzal Mohammed | b55fa18 | 2011-10-20 19:32:07 +0100 | [diff] [blame] | 78 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | .ltorg |
| 80 | |
Nicolas Pitre | 9b5a146 | 2012-02-22 21:58:03 +0100 | [diff] [blame] | 81 | #ifndef CONFIG_DEBUG_SEMIHOSTING |
| 82 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | ENTRY(printascii) |
Jeremy Kerr | 0ea1293 | 2010-07-06 18:30:06 +0800 | [diff] [blame] | 84 | addruart_current r3, r1, r2 |
Nicolas Pitre | 2a14b80 | 2017-11-02 21:58:41 +0100 | [diff] [blame] | 85 | 1: teq r0, #0 |
Stefan Agner | e44fc38 | 2019-02-18 00:57:38 +0100 | [diff] [blame] | 86 | ldrbne r1, [r0], #1 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 87 | teqne r1, #0 |
Nicolas Pitre | 2a14b80 | 2017-11-02 21:58:41 +0100 | [diff] [blame] | 88 | reteq lr |
| 89 | 2: teq r1, #'\n' |
| 90 | bne 3f |
| 91 | mov r1, #'\r' |
| 92 | waituart r2, r3 |
| 93 | senduart r1, r3 |
| 94 | busyuart r2, r3 |
| 95 | mov r1, #'\n' |
| 96 | 3: waituart r2, r3 |
| 97 | senduart r1, r3 |
| 98 | busyuart r2, r3 |
| 99 | b 1b |
Catalin Marinas | 93ed397 | 2008-08-28 11:22:32 +0100 | [diff] [blame] | 100 | ENDPROC(printascii) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 101 | |
| 102 | ENTRY(printch) |
Jeremy Kerr | 0ea1293 | 2010-07-06 18:30:06 +0800 | [diff] [blame] | 103 | addruart_current r3, r1, r2 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 104 | mov r1, r0 |
| 105 | mov r0, #0 |
Nicolas Pitre | 2a14b80 | 2017-11-02 21:58:41 +0100 | [diff] [blame] | 106 | b 2b |
Catalin Marinas | 93ed397 | 2008-08-28 11:22:32 +0100 | [diff] [blame] | 107 | ENDPROC(printch) |
Nicolas Pitre | 9b5a146 | 2012-02-22 21:58:03 +0100 | [diff] [blame] | 108 | |
Uwe Kleine-König | a73b59c | 2013-01-16 15:32:06 +0100 | [diff] [blame] | 109 | #ifdef CONFIG_MMU |
Rob Herring | e5c5f2a | 2012-10-22 11:42:54 -0600 | [diff] [blame] | 110 | ENTRY(debug_ll_addr) |
| 111 | addruart r2, r3, ip |
| 112 | str r2, [r0] |
| 113 | str r3, [r1] |
Russell King | 6ebbf2c | 2014-06-30 16:29:12 +0100 | [diff] [blame] | 114 | ret lr |
Rob Herring | e5c5f2a | 2012-10-22 11:42:54 -0600 | [diff] [blame] | 115 | ENDPROC(debug_ll_addr) |
Uwe Kleine-König | a73b59c | 2013-01-16 15:32:06 +0100 | [diff] [blame] | 116 | #endif |
Rob Herring | e5c5f2a | 2012-10-22 11:42:54 -0600 | [diff] [blame] | 117 | |
Nicolas Pitre | 9b5a146 | 2012-02-22 21:58:03 +0100 | [diff] [blame] | 118 | #else |
| 119 | |
| 120 | ENTRY(printascii) |
| 121 | mov r1, r0 |
| 122 | mov r0, #0x04 @ SYS_WRITE0 |
| 123 | ARM( svc #0x123456 ) |
Nicolas Pitre | ee3eaee | 2017-10-06 19:39:57 +0100 | [diff] [blame] | 124 | #ifdef CONFIG_CPU_V7M |
| 125 | THUMB( bkpt #0xab ) |
| 126 | #else |
Nicolas Pitre | 9b5a146 | 2012-02-22 21:58:03 +0100 | [diff] [blame] | 127 | THUMB( svc #0xab ) |
Nicolas Pitre | ee3eaee | 2017-10-06 19:39:57 +0100 | [diff] [blame] | 128 | #endif |
Russell King | 6ebbf2c | 2014-06-30 16:29:12 +0100 | [diff] [blame] | 129 | ret lr |
Nicolas Pitre | 9b5a146 | 2012-02-22 21:58:03 +0100 | [diff] [blame] | 130 | ENDPROC(printascii) |
| 131 | |
| 132 | ENTRY(printch) |
Nicolas Pitre | e11d131 | 2017-10-06 19:36:58 +0100 | [diff] [blame] | 133 | adr r1, hexbuf_rel |
| 134 | ldr r2, [r1] |
| 135 | add r1, r1, r2 |
Nicolas Pitre | 9b5a146 | 2012-02-22 21:58:03 +0100 | [diff] [blame] | 136 | strb r0, [r1] |
| 137 | mov r0, #0x03 @ SYS_WRITEC |
| 138 | ARM( svc #0x123456 ) |
Nicolas Pitre | ee3eaee | 2017-10-06 19:39:57 +0100 | [diff] [blame] | 139 | #ifdef CONFIG_CPU_V7M |
| 140 | THUMB( bkpt #0xab ) |
| 141 | #else |
Nicolas Pitre | 9b5a146 | 2012-02-22 21:58:03 +0100 | [diff] [blame] | 142 | THUMB( svc #0xab ) |
Nicolas Pitre | ee3eaee | 2017-10-06 19:39:57 +0100 | [diff] [blame] | 143 | #endif |
Russell King | 6ebbf2c | 2014-06-30 16:29:12 +0100 | [diff] [blame] | 144 | ret lr |
Nicolas Pitre | 9b5a146 | 2012-02-22 21:58:03 +0100 | [diff] [blame] | 145 | ENDPROC(printch) |
| 146 | |
Rob Herring | e5c5f2a | 2012-10-22 11:42:54 -0600 | [diff] [blame] | 147 | ENTRY(debug_ll_addr) |
| 148 | mov r2, #0 |
| 149 | str r2, [r0] |
| 150 | str r2, [r1] |
Russell King | 6ebbf2c | 2014-06-30 16:29:12 +0100 | [diff] [blame] | 151 | ret lr |
Rob Herring | e5c5f2a | 2012-10-22 11:42:54 -0600 | [diff] [blame] | 152 | ENDPROC(debug_ll_addr) |
| 153 | |
Nicolas Pitre | 9b5a146 | 2012-02-22 21:58:03 +0100 | [diff] [blame] | 154 | #endif |