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Paul Mundt02bf6cc2010-01-14 20:58:58 +09001/*
2 * Renesas Technology Europe SDK7786 Support.
3 *
4 * Copyright (C) 2010 Matt Fleming
5 * Copyright (C) 2010 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <linux/io.h>
14#include <linux/smsc911x.h>
15#include <linux/i2c.h>
16#include <linux/irq.h>
17#include <asm/machvec.h>
Paul Mundt2267c782010-01-15 12:11:30 +090018#include <asm/heartbeat.h>
Paul Mundt02bf6cc2010-01-14 20:58:58 +090019#include <asm/sizes.h>
20
Paul Mundt2267c782010-01-15 12:11:30 +090021static struct resource heartbeat_resource = {
22 .start = 0x07fff8b0,
23 .end = 0x07fff8b0 + sizeof(u16) - 1,
24 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
25};
26
27static struct platform_device heartbeat_device = {
28 .name = "heartbeat",
29 .id = -1,
30 .num_resources = 1,
31 .resource = &heartbeat_resource,
32};
33
Paul Mundt02bf6cc2010-01-14 20:58:58 +090034static struct resource smsc911x_resources[] = {
35 [0] = {
36 .name = "smsc911x-memory",
37 .start = 0x07ffff00,
38 .end = 0x07ffff00 + SZ_256 - 1,
39 .flags = IORESOURCE_MEM,
40 },
41 [1] = {
42 .name = "smsc911x-irq",
43 .start = evt2irq(0x2c0),
44 .end = evt2irq(0x2c0),
45 .flags = IORESOURCE_IRQ,
46 },
47};
48
49static struct smsc911x_platform_config smsc911x_config = {
50 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
51 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
52 .flags = SMSC911X_USE_32BIT,
53 .phy_interface = PHY_INTERFACE_MODE_MII,
54};
55
56static struct platform_device smsc911x_device = {
57 .name = "smsc911x",
58 .id = -1,
59 .num_resources = ARRAY_SIZE(smsc911x_resources),
60 .resource = smsc911x_resources,
61 .dev = {
62 .platform_data = &smsc911x_config,
63 },
64};
65
66static struct resource smbus_fpga_resource = {
67 .start = 0x07fff9e0,
68 .end = 0x07fff9e0 + SZ_32 - 1,
69 .flags = IORESOURCE_MEM,
70};
71
72static struct platform_device smbus_fpga_device = {
73 .name = "i2c-sdk7786",
74 .id = 0,
75 .num_resources = 1,
76 .resource = &smbus_fpga_resource,
77};
78
79static struct resource smbus_pcie_resource = {
80 .start = 0x07fffc30,
81 .end = 0x07fffc30 + SZ_32 - 1,
82 .flags = IORESOURCE_MEM,
83};
84
85static struct platform_device smbus_pcie_device = {
86 .name = "i2c-sdk7786",
87 .id = 1,
88 .num_resources = 1,
89 .resource = &smbus_pcie_resource,
90};
91
92static struct i2c_board_info __initdata sdk7786_i2c_devices[] = {
93 {
94 I2C_BOARD_INFO("max6900", 0x68),
95 },
96};
97
98static struct platform_device *sh7786_devices[] __initdata = {
Paul Mundt2267c782010-01-15 12:11:30 +090099 &heartbeat_device,
Paul Mundt02bf6cc2010-01-14 20:58:58 +0900100 &smsc911x_device,
101 &smbus_fpga_device,
102 &smbus_pcie_device,
103};
104
105#define SBCR_REGS_BASE 0x07fff990
106
107#define SCBR_I2CMEN (1 << 0) /* FPGA I2C master enable */
108#define SCBR_I2CCEN (1 << 1) /* CPU I2C master enable */
109
110static int sdk7786_i2c_setup(void)
111{
112 void __iomem *sbcr;
113 unsigned int tmp;
114
115 sbcr = ioremap_nocache(SBCR_REGS_BASE, SZ_16);
116
117 /*
118 * Hand over I2C control to the FPGA.
119 */
120 tmp = ioread16(sbcr);
121 tmp &= ~SCBR_I2CCEN;
122 tmp |= SCBR_I2CMEN;
123 iowrite16(tmp, sbcr);
124
125 iounmap(sbcr);
126
127 return i2c_register_board_info(0, sdk7786_i2c_devices,
128 ARRAY_SIZE(sdk7786_i2c_devices));
129}
130
131static int __init sdk7786_devices_setup(void)
132{
133 int ret;
134
135 ret = platform_add_devices(sh7786_devices, ARRAY_SIZE(sh7786_devices));
136 if (unlikely(ret != 0))
137 return ret;
138
139 return sdk7786_i2c_setup();
140}
141__initcall(sdk7786_devices_setup);
142
143#define FPGA_REGS_BASE 0x07fff800
144#define FPGA_REGS_SIZE 1152
145
146#define INTASR 0x010
147#define INTAMR 0x020
148#define INTBSR 0x090
149#define INTBMR 0x0a0
150#define INTMSR 0x130
151
152#define IASELR1 0x210
153#define IASELR2 0x220
154#define IASELR3 0x230
155#define IASELR4 0x240
156#define IASELR5 0x250
157#define IASELR6 0x260
158#define IASELR7 0x270
159#define IASELR8 0x280
160#define IASELR9 0x290
161#define IASELR10 0x2a0
162#define IASELR11 0x2b0
163#define IASELR12 0x2c0
164#define IASELR13 0x2d0
165#define IASELR14 0x2e0
166#define IASELR15 0x2f0
167
168static void __iomem *fpga_regs;
169
170static u16 fpga_read_reg(unsigned int reg)
171{
172 return __raw_readw(fpga_regs + reg);
173}
174
175static void fpga_write_reg(u16 val, unsigned int reg)
176{
177 __raw_writew(val, fpga_regs + reg);
178}
179
180enum {
181 ATA_IRQ_BIT = 1,
182 SPI_BUSY_BIT = 2,
183 LIRQ5_BIT = 3,
184 LIRQ6_BIT = 4,
185 LIRQ7_BIT = 5,
186 LIRQ8_BIT = 6,
187 KEY_IRQ_BIT = 7,
188 PEN_IRQ_BIT = 8,
189 ETH_IRQ_BIT = 9,
190 RTC_ALARM_BIT = 10,
191 CRYSTAL_FAIL_BIT = 12,
192 ETH_PME_BIT = 14,
193};
194
195static void __init init_sdk7786_IRQ(void)
196{
197 unsigned int tmp;
198
199 fpga_regs = ioremap_nocache(FPGA_REGS_BASE, FPGA_REGS_SIZE);
200 if (!fpga_regs) {
201 printk(KERN_ERR "Couldn't map FPGA registers\n");
202 return;
203 }
204
205 /* Enable priority encoding for all IRLs */
206 fpga_write_reg(fpga_read_reg(INTMSR) | 0x0303, INTMSR);
207
208 /* Clear FPGA interrupt status registers */
209 fpga_write_reg(0x0000, INTASR);
210 fpga_write_reg(0x0000, INTBSR);
211
212 /* Unmask FPGA interrupts */
213 tmp = fpga_read_reg(INTAMR);
214 tmp &= ~(1 << ETH_IRQ_BIT);
215 fpga_write_reg(tmp, INTAMR);
216
217 plat_irq_setup_pins(IRQ_MODE_IRL7654_MASK);
218 plat_irq_setup_pins(IRQ_MODE_IRL3210_MASK);
219}
220
221/* Initialize the board */
222static void __init sdk7786_setup(char **cmdline_p)
223{
224 printk(KERN_INFO "Renesas Technology Corp. SDK7786 support.\n");
225}
226
227/*
228 * The Machine Vector
229 */
230static struct sh_machine_vector mv_sdk7786 __initmv = {
231 .mv_name = "SDK7786",
232 .mv_setup = sdk7786_setup,
233 .mv_init_irq = init_sdk7786_IRQ,
234};