Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1 | /* |
| 2 | * Signal handling for 32bit PPC and 32bit tasks on 64bit PPC |
| 3 | * |
| 4 | * PowerPC version |
| 5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) |
| 6 | * Copyright (C) 2001 IBM |
| 7 | * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) |
| 8 | * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) |
| 9 | * |
| 10 | * Derived from "arch/i386/kernel/signal.c" |
| 11 | * Copyright (C) 1991, 1992 Linus Torvalds |
| 12 | * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson |
| 13 | * |
| 14 | * This program is free software; you can redistribute it and/or |
| 15 | * modify it under the terms of the GNU General Public License |
| 16 | * as published by the Free Software Foundation; either version |
| 17 | * 2 of the License, or (at your option) any later version. |
| 18 | */ |
| 19 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 20 | #include <linux/sched.h> |
| 21 | #include <linux/mm.h> |
| 22 | #include <linux/smp.h> |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 23 | #include <linux/kernel.h> |
| 24 | #include <linux/signal.h> |
| 25 | #include <linux/errno.h> |
| 26 | #include <linux/elf.h> |
Lucas Woods | 05ead01 | 2007-12-13 15:56:06 -0800 | [diff] [blame] | 27 | #include <linux/ptrace.h> |
Christophe Leroy | 56b04d5 | 2018-04-24 18:04:25 +0200 | [diff] [blame] | 28 | #include <linux/pagemap.h> |
Christian Dietrich | 7646223 | 2011-06-04 05:36:54 +0000 | [diff] [blame] | 29 | #include <linux/ratelimit.h> |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 30 | #include <linux/syscalls.h> |
Al Viro | f367564 | 2018-05-02 23:20:47 +1000 | [diff] [blame] | 31 | #ifdef CONFIG_PPC64 |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 32 | #include <linux/compat.h> |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 33 | #else |
| 34 | #include <linux/wait.h> |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 35 | #include <linux/unistd.h> |
| 36 | #include <linux/stddef.h> |
| 37 | #include <linux/tty.h> |
| 38 | #include <linux/binfmts.h> |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 39 | #endif |
| 40 | |
Linus Torvalds | 7c0f6ba | 2016-12-24 11:46:01 -0800 | [diff] [blame] | 41 | #include <linux/uaccess.h> |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 42 | #include <asm/cacheflush.h> |
Arnd Bergmann | a7f3184 | 2006-03-23 00:00:08 +0100 | [diff] [blame] | 43 | #include <asm/syscalls.h> |
David Gibson | c5ff700 | 2005-11-09 11:21:07 +1100 | [diff] [blame] | 44 | #include <asm/sigcontext.h> |
Benjamin Herrenschmidt | a7f290d | 2005-11-11 21:15:21 +1100 | [diff] [blame] | 45 | #include <asm/vdso.h> |
David Howells | ae3a197 | 2012-03-28 18:30:02 +0100 | [diff] [blame] | 46 | #include <asm/switch_to.h> |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 47 | #include <asm/tm.h> |
Daniel Axtens | 0545d54 | 2016-09-06 15:32:43 +1000 | [diff] [blame] | 48 | #include <asm/asm-prototypes.h> |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 49 | #ifdef CONFIG_PPC64 |
Stephen Rothwell | 879168e | 2005-11-03 15:32:07 +1100 | [diff] [blame] | 50 | #include "ppc32.h" |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 51 | #include <asm/unistd.h> |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 52 | #else |
| 53 | #include <asm/ucontext.h> |
| 54 | #include <asm/pgtable.h> |
| 55 | #endif |
| 56 | |
Benjamin Herrenschmidt | 22e38f2 | 2007-06-04 15:15:49 +1000 | [diff] [blame] | 57 | #include "signal.h" |
| 58 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 59 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 60 | #ifdef CONFIG_PPC64 |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 61 | #define old_sigaction old_sigaction32 |
| 62 | #define sigcontext sigcontext32 |
| 63 | #define mcontext mcontext32 |
| 64 | #define ucontext ucontext32 |
| 65 | |
Al Viro | 7cce246 | 2012-12-23 03:26:46 -0500 | [diff] [blame] | 66 | #define __save_altstack __compat_save_altstack |
| 67 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 68 | /* |
Michael Neuling | c1cb299 | 2008-07-08 18:43:41 +1000 | [diff] [blame] | 69 | * Userspace code may pass a ucontext which doesn't include VSX added |
| 70 | * at the end. We need to check for this case. |
| 71 | */ |
| 72 | #define UCONTEXTSIZEWITHOUTVSX \ |
| 73 | (sizeof(struct ucontext) - sizeof(elf_vsrreghalf_t32)) |
| 74 | |
| 75 | /* |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 76 | * Returning 0 means we return to userspace via |
| 77 | * ret_from_except and thus restore all user |
| 78 | * registers from *regs. This is what we need |
| 79 | * to do when a signal has been delivered. |
| 80 | */ |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 81 | |
| 82 | #define GP_REGS_SIZE min(sizeof(elf_gregset_t32), sizeof(struct pt_regs32)) |
| 83 | #undef __SIGNAL_FRAMESIZE |
| 84 | #define __SIGNAL_FRAMESIZE __SIGNAL_FRAMESIZE32 |
| 85 | #undef ELF_NVRREG |
| 86 | #define ELF_NVRREG ELF_NVRREG32 |
| 87 | |
| 88 | /* |
| 89 | * Functions for flipping sigsets (thanks to brain dead generic |
| 90 | * implementation that makes things simple for little endian only) |
| 91 | */ |
| 92 | static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set) |
| 93 | { |
Al Viro | a5ae754 | 2017-09-04 12:17:38 -0400 | [diff] [blame] | 94 | return put_compat_sigset(uset, set, sizeof(*uset)); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 95 | } |
| 96 | |
Paul Mackerras | 9b7cf8b | 2005-10-19 23:13:04 +1000 | [diff] [blame] | 97 | static inline int get_sigset_t(sigset_t *set, |
| 98 | const compat_sigset_t __user *uset) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 99 | { |
Al Viro | a5ae754 | 2017-09-04 12:17:38 -0400 | [diff] [blame] | 100 | return get_compat_sigset(set, uset); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 101 | } |
| 102 | |
Al Viro | 29e646d | 2006-02-01 05:28:09 -0500 | [diff] [blame] | 103 | #define to_user_ptr(p) ptr_to_compat(p) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 104 | #define from_user_ptr(p) compat_ptr(p) |
| 105 | |
| 106 | static inline int save_general_regs(struct pt_regs *regs, |
| 107 | struct mcontext __user *frame) |
| 108 | { |
| 109 | elf_greg_t64 *gregs = (elf_greg_t64 *)regs; |
| 110 | int i; |
Madhavan Srinivasan | a8a4b03 | 2017-08-20 23:28:24 +0530 | [diff] [blame] | 111 | /* Force usr to alway see softe as 1 (interrupts enabled) */ |
| 112 | elf_greg_t64 softe = 0x1; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 113 | |
Paul Mackerras | 1bd7933 | 2006-03-08 13:24:22 +1100 | [diff] [blame] | 114 | WARN_ON(!FULL_REGS(regs)); |
David Woodhouse | 401d1f0 | 2005-11-15 18:52:18 +0000 | [diff] [blame] | 115 | |
| 116 | for (i = 0; i <= PT_RESULT; i ++) { |
| 117 | if (i == 14 && !FULL_REGS(regs)) |
| 118 | i = 32; |
Madhavan Srinivasan | a8a4b03 | 2017-08-20 23:28:24 +0530 | [diff] [blame] | 119 | if ( i == PT_SOFTE) { |
| 120 | if(__put_user((unsigned int)softe, &frame->mc_gregs[i])) |
| 121 | return -EFAULT; |
| 122 | else |
| 123 | continue; |
| 124 | } |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 125 | if (__put_user((unsigned int)gregs[i], &frame->mc_gregs[i])) |
| 126 | return -EFAULT; |
David Woodhouse | 401d1f0 | 2005-11-15 18:52:18 +0000 | [diff] [blame] | 127 | } |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 128 | return 0; |
| 129 | } |
| 130 | |
| 131 | static inline int restore_general_regs(struct pt_regs *regs, |
| 132 | struct mcontext __user *sr) |
| 133 | { |
| 134 | elf_greg_t64 *gregs = (elf_greg_t64 *)regs; |
| 135 | int i; |
| 136 | |
| 137 | for (i = 0; i <= PT_RESULT; i++) { |
| 138 | if ((i == PT_MSR) || (i == PT_SOFTE)) |
| 139 | continue; |
| 140 | if (__get_user(gregs[i], &sr->mc_gregs[i])) |
| 141 | return -EFAULT; |
| 142 | } |
| 143 | return 0; |
| 144 | } |
| 145 | |
| 146 | #else /* CONFIG_PPC64 */ |
| 147 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 148 | #define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs)) |
| 149 | |
| 150 | static inline int put_sigset_t(sigset_t __user *uset, sigset_t *set) |
| 151 | { |
| 152 | return copy_to_user(uset, set, sizeof(*uset)); |
| 153 | } |
| 154 | |
Paul Mackerras | 9b7cf8b | 2005-10-19 23:13:04 +1000 | [diff] [blame] | 155 | static inline int get_sigset_t(sigset_t *set, const sigset_t __user *uset) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 156 | { |
| 157 | return copy_from_user(set, uset, sizeof(*uset)); |
| 158 | } |
| 159 | |
Al Viro | 29e646d | 2006-02-01 05:28:09 -0500 | [diff] [blame] | 160 | #define to_user_ptr(p) ((unsigned long)(p)) |
| 161 | #define from_user_ptr(p) ((void __user *)(p)) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 162 | |
| 163 | static inline int save_general_regs(struct pt_regs *regs, |
| 164 | struct mcontext __user *frame) |
| 165 | { |
Paul Mackerras | 1bd7933 | 2006-03-08 13:24:22 +1100 | [diff] [blame] | 166 | WARN_ON(!FULL_REGS(regs)); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 167 | return __copy_to_user(&frame->mc_gregs, regs, GP_REGS_SIZE); |
| 168 | } |
| 169 | |
| 170 | static inline int restore_general_regs(struct pt_regs *regs, |
| 171 | struct mcontext __user *sr) |
| 172 | { |
| 173 | /* copy up to but not including MSR */ |
| 174 | if (__copy_from_user(regs, &sr->mc_gregs, |
| 175 | PT_MSR * sizeof(elf_greg_t))) |
| 176 | return -EFAULT; |
| 177 | /* copy from orig_r3 (the word after the MSR) up to the end */ |
| 178 | if (__copy_from_user(®s->orig_gpr3, &sr->mc_gregs[PT_ORIG_R3], |
| 179 | GP_REGS_SIZE - PT_ORIG_R3 * sizeof(elf_greg_t))) |
| 180 | return -EFAULT; |
| 181 | return 0; |
| 182 | } |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 183 | #endif |
| 184 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 185 | /* |
| 186 | * When we have signals to deliver, we set up on the |
| 187 | * user stack, going down from the original stack pointer: |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 188 | * an ABI gap of 56 words |
| 189 | * an mcontext struct |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 190 | * a sigcontext struct |
| 191 | * a gap of __SIGNAL_FRAMESIZE bytes |
| 192 | * |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 193 | * Each of these things must be a multiple of 16 bytes in size. The following |
| 194 | * structure represent all of this except the __SIGNAL_FRAMESIZE gap |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 195 | * |
| 196 | */ |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 197 | struct sigframe { |
| 198 | struct sigcontext sctx; /* the sigcontext */ |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 199 | struct mcontext mctx; /* all the register values */ |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 200 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 201 | struct sigcontext sctx_transact; |
| 202 | struct mcontext mctx_transact; |
| 203 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 204 | /* |
| 205 | * Programs using the rs6000/xcoff abi can save up to 19 gp |
| 206 | * regs and 18 fp regs below sp before decrementing it. |
| 207 | */ |
| 208 | int abigap[56]; |
| 209 | }; |
| 210 | |
| 211 | /* We use the mc_pad field for the signal return trampoline. */ |
| 212 | #define tramp mc_pad |
| 213 | |
| 214 | /* |
| 215 | * When we have rt signals to deliver, we set up on the |
| 216 | * user stack, going down from the original stack pointer: |
| 217 | * one rt_sigframe struct (siginfo + ucontext + ABI gap) |
| 218 | * a gap of __SIGNAL_FRAMESIZE+16 bytes |
| 219 | * (the +16 is to get the siginfo and ucontext in the same |
| 220 | * positions as in older kernels). |
| 221 | * |
| 222 | * Each of these things must be a multiple of 16 bytes in size. |
| 223 | * |
| 224 | */ |
| 225 | struct rt_sigframe { |
| 226 | #ifdef CONFIG_PPC64 |
| 227 | compat_siginfo_t info; |
| 228 | #else |
| 229 | struct siginfo info; |
| 230 | #endif |
| 231 | struct ucontext uc; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 232 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 233 | struct ucontext uc_transact; |
| 234 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 235 | /* |
| 236 | * Programs using the rs6000/xcoff abi can save up to 19 gp |
| 237 | * regs and 18 fp regs below sp before decrementing it. |
| 238 | */ |
| 239 | int abigap[56]; |
| 240 | }; |
| 241 | |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 242 | #ifdef CONFIG_VSX |
| 243 | unsigned long copy_fpr_to_user(void __user *to, |
| 244 | struct task_struct *task) |
| 245 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 246 | u64 buf[ELF_NFPREG]; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 247 | int i; |
| 248 | |
| 249 | /* save FPR copy to local buffer then write to the thread_struct */ |
| 250 | for (i = 0; i < (ELF_NFPREG - 1) ; i++) |
| 251 | buf[i] = task->thread.TS_FPR(i); |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 252 | buf[i] = task->thread.fp_state.fpscr; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 253 | return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double)); |
| 254 | } |
| 255 | |
| 256 | unsigned long copy_fpr_from_user(struct task_struct *task, |
| 257 | void __user *from) |
| 258 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 259 | u64 buf[ELF_NFPREG]; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 260 | int i; |
| 261 | |
| 262 | if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double))) |
| 263 | return 1; |
| 264 | for (i = 0; i < (ELF_NFPREG - 1) ; i++) |
| 265 | task->thread.TS_FPR(i) = buf[i]; |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 266 | task->thread.fp_state.fpscr = buf[i]; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 267 | |
| 268 | return 0; |
| 269 | } |
| 270 | |
| 271 | unsigned long copy_vsx_to_user(void __user *to, |
| 272 | struct task_struct *task) |
| 273 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 274 | u64 buf[ELF_NVSRHALFREG]; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 275 | int i; |
| 276 | |
| 277 | /* save FPR copy to local buffer then write to the thread_struct */ |
| 278 | for (i = 0; i < ELF_NVSRHALFREG; i++) |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 279 | buf[i] = task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET]; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 280 | return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double)); |
| 281 | } |
| 282 | |
| 283 | unsigned long copy_vsx_from_user(struct task_struct *task, |
| 284 | void __user *from) |
| 285 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 286 | u64 buf[ELF_NVSRHALFREG]; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 287 | int i; |
| 288 | |
| 289 | if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double))) |
| 290 | return 1; |
| 291 | for (i = 0; i < ELF_NVSRHALFREG ; i++) |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 292 | task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i]; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 293 | return 0; |
| 294 | } |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 295 | |
| 296 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 297 | unsigned long copy_ckfpr_to_user(void __user *to, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 298 | struct task_struct *task) |
| 299 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 300 | u64 buf[ELF_NFPREG]; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 301 | int i; |
| 302 | |
| 303 | /* save FPR copy to local buffer then write to the thread_struct */ |
| 304 | for (i = 0; i < (ELF_NFPREG - 1) ; i++) |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 305 | buf[i] = task->thread.TS_CKFPR(i); |
| 306 | buf[i] = task->thread.ckfp_state.fpscr; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 307 | return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double)); |
| 308 | } |
| 309 | |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 310 | unsigned long copy_ckfpr_from_user(struct task_struct *task, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 311 | void __user *from) |
| 312 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 313 | u64 buf[ELF_NFPREG]; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 314 | int i; |
| 315 | |
| 316 | if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double))) |
| 317 | return 1; |
| 318 | for (i = 0; i < (ELF_NFPREG - 1) ; i++) |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 319 | task->thread.TS_CKFPR(i) = buf[i]; |
| 320 | task->thread.ckfp_state.fpscr = buf[i]; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 321 | |
| 322 | return 0; |
| 323 | } |
| 324 | |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 325 | unsigned long copy_ckvsx_to_user(void __user *to, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 326 | struct task_struct *task) |
| 327 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 328 | u64 buf[ELF_NVSRHALFREG]; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 329 | int i; |
| 330 | |
| 331 | /* save FPR copy to local buffer then write to the thread_struct */ |
| 332 | for (i = 0; i < ELF_NVSRHALFREG; i++) |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 333 | buf[i] = task->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET]; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 334 | return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double)); |
| 335 | } |
| 336 | |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 337 | unsigned long copy_ckvsx_from_user(struct task_struct *task, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 338 | void __user *from) |
| 339 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 340 | u64 buf[ELF_NVSRHALFREG]; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 341 | int i; |
| 342 | |
| 343 | if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double))) |
| 344 | return 1; |
| 345 | for (i = 0; i < ELF_NVSRHALFREG ; i++) |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 346 | task->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i]; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 347 | return 0; |
| 348 | } |
| 349 | #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 350 | #else |
| 351 | inline unsigned long copy_fpr_to_user(void __user *to, |
| 352 | struct task_struct *task) |
| 353 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 354 | return __copy_to_user(to, task->thread.fp_state.fpr, |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 355 | ELF_NFPREG * sizeof(double)); |
| 356 | } |
| 357 | |
| 358 | inline unsigned long copy_fpr_from_user(struct task_struct *task, |
| 359 | void __user *from) |
| 360 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 361 | return __copy_from_user(task->thread.fp_state.fpr, from, |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 362 | ELF_NFPREG * sizeof(double)); |
| 363 | } |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 364 | |
| 365 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 366 | inline unsigned long copy_ckfpr_to_user(void __user *to, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 367 | struct task_struct *task) |
| 368 | { |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 369 | return __copy_to_user(to, task->thread.ckfp_state.fpr, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 370 | ELF_NFPREG * sizeof(double)); |
| 371 | } |
| 372 | |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 373 | inline unsigned long copy_ckfpr_from_user(struct task_struct *task, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 374 | void __user *from) |
| 375 | { |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 376 | return __copy_from_user(task->thread.ckfp_state.fpr, from, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 377 | ELF_NFPREG * sizeof(double)); |
| 378 | } |
| 379 | #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 380 | #endif |
| 381 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 382 | /* |
| 383 | * Save the current user registers on the user stack. |
| 384 | * We only save the altivec/spe registers if the process has used |
| 385 | * altivec/spe instructions at some point. |
| 386 | */ |
| 387 | static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame, |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 388 | struct mcontext __user *tm_frame, int sigret, |
| 389 | int ctx_has_vsx_region) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 390 | { |
Michael Neuling | 9e75118 | 2008-06-25 14:07:17 +1000 | [diff] [blame] | 391 | unsigned long msr = regs->msr; |
| 392 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 393 | /* Make sure floating point registers are stored in regs */ |
| 394 | flush_fp_to_thread(current); |
| 395 | |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 396 | /* save general registers */ |
| 397 | if (save_general_regs(regs, frame)) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 398 | return 1; |
| 399 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 400 | #ifdef CONFIG_ALTIVEC |
| 401 | /* save altivec registers */ |
| 402 | if (current->thread.used_vr) { |
| 403 | flush_altivec_to_thread(current); |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 404 | if (__copy_to_user(&frame->mc_vregs, ¤t->thread.vr_state, |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 405 | ELF_NVRREG * sizeof(vector128))) |
| 406 | return 1; |
| 407 | /* set MSR_VEC in the saved MSR value to indicate that |
| 408 | frame->mc_vregs contains valid data */ |
Michael Neuling | 9e75118 | 2008-06-25 14:07:17 +1000 | [diff] [blame] | 409 | msr |= MSR_VEC; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 410 | } |
| 411 | /* else assert((regs->msr & MSR_VEC) == 0) */ |
| 412 | |
| 413 | /* We always copy to/from vrsave, it's 0 if we don't have or don't |
| 414 | * use altivec. Since VSCR only contains 32 bits saved in the least |
| 415 | * significant bits of a vector, we "cheat" and stuff VRSAVE in the |
| 416 | * most significant bits of that same vector. --BenH |
Paul Mackerras | 408a7e0 | 2013-08-05 14:13:16 +1000 | [diff] [blame] | 417 | * Note that the current VRSAVE value is in the SPR at this point. |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 418 | */ |
Paul Mackerras | 408a7e0 | 2013-08-05 14:13:16 +1000 | [diff] [blame] | 419 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
| 420 | current->thread.vrsave = mfspr(SPRN_VRSAVE); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 421 | if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32])) |
| 422 | return 1; |
| 423 | #endif /* CONFIG_ALTIVEC */ |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 424 | if (copy_fpr_to_user(&frame->mc_fregs, current)) |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 425 | return 1; |
Michael Neuling | ec67ad8 | 2013-11-25 11:12:20 +1100 | [diff] [blame] | 426 | |
| 427 | /* |
| 428 | * Clear the MSR VSX bit to indicate there is no valid state attached |
| 429 | * to this context, except in the specific case below where we set it. |
| 430 | */ |
| 431 | msr &= ~MSR_VSX; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 432 | #ifdef CONFIG_VSX |
Michael Neuling | ce48b21 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 433 | /* |
| 434 | * Copy VSR 0-31 upper half from thread_struct to local |
| 435 | * buffer, then write that to userspace. Also set MSR_VSX in |
| 436 | * the saved MSR value to indicate that frame->mc_vregs |
| 437 | * contains valid data |
| 438 | */ |
Michael Neuling | 16c29d1 | 2008-10-23 00:42:36 +0000 | [diff] [blame] | 439 | if (current->thread.used_vsr && ctx_has_vsx_region) { |
Anton Blanchard | a7d623d | 2015-10-29 11:44:02 +1100 | [diff] [blame] | 440 | flush_vsx_to_thread(current); |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 441 | if (copy_vsx_to_user(&frame->mc_vsregs, current)) |
Michael Neuling | ce48b21 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 442 | return 1; |
| 443 | msr |= MSR_VSX; |
Michael Neuling | ec67ad8 | 2013-11-25 11:12:20 +1100 | [diff] [blame] | 444 | } |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 445 | #endif /* CONFIG_VSX */ |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 446 | #ifdef CONFIG_SPE |
| 447 | /* save spe registers */ |
| 448 | if (current->thread.used_spe) { |
| 449 | flush_spe_to_thread(current); |
| 450 | if (__copy_to_user(&frame->mc_vregs, current->thread.evr, |
| 451 | ELF_NEVRREG * sizeof(u32))) |
| 452 | return 1; |
| 453 | /* set MSR_SPE in the saved MSR value to indicate that |
| 454 | frame->mc_vregs contains valid data */ |
Michael Neuling | 9e75118 | 2008-06-25 14:07:17 +1000 | [diff] [blame] | 455 | msr |= MSR_SPE; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 456 | } |
| 457 | /* else assert((regs->msr & MSR_SPE) == 0) */ |
| 458 | |
| 459 | /* We always copy to/from spefscr */ |
| 460 | if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG)) |
| 461 | return 1; |
| 462 | #endif /* CONFIG_SPE */ |
| 463 | |
Michael Neuling | 9e75118 | 2008-06-25 14:07:17 +1000 | [diff] [blame] | 464 | if (__put_user(msr, &frame->mc_gregs[PT_MSR])) |
| 465 | return 1; |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 466 | /* We need to write 0 the MSR top 32 bits in the tm frame so that we |
| 467 | * can check it on the restore to see if TM is active |
| 468 | */ |
| 469 | if (tm_frame && __put_user(0, &tm_frame->mc_gregs[PT_MSR])) |
| 470 | return 1; |
| 471 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 472 | if (sigret) { |
Christophe Leroy | d16952a | 2018-11-09 17:33:28 +0000 | [diff] [blame] | 473 | /* Set up the sigreturn trampoline: li 0,sigret; sc */ |
| 474 | if (__put_user(PPC_INST_ADDI + sigret, &frame->tramp[0]) |
| 475 | || __put_user(PPC_INST_SC, &frame->tramp[1])) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 476 | return 1; |
| 477 | flush_icache_range((unsigned long) &frame->tramp[0], |
| 478 | (unsigned long) &frame->tramp[2]); |
| 479 | } |
| 480 | |
| 481 | return 0; |
| 482 | } |
| 483 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 484 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 485 | /* |
| 486 | * Save the current user registers on the user stack. |
| 487 | * We only save the altivec/spe registers if the process has used |
| 488 | * altivec/spe instructions at some point. |
| 489 | * We also save the transactional registers to a second ucontext in the |
| 490 | * frame. |
| 491 | * |
| 492 | * See save_user_regs() and signal_64.c:setup_tm_sigcontexts(). |
| 493 | */ |
| 494 | static int save_tm_user_regs(struct pt_regs *regs, |
| 495 | struct mcontext __user *frame, |
| 496 | struct mcontext __user *tm_frame, int sigret) |
| 497 | { |
| 498 | unsigned long msr = regs->msr; |
| 499 | |
Michael Neuling | 92fb869 | 2017-10-12 21:17:19 +1100 | [diff] [blame] | 500 | WARN_ON(tm_suspend_disabled); |
| 501 | |
Paul Mackerras | d31626f | 2014-01-13 15:56:29 +1100 | [diff] [blame] | 502 | /* Remove TM bits from thread's MSR. The MSR in the sigcontext |
| 503 | * just indicates to userland that we were doing a transaction, but we |
| 504 | * don't want to return in transactional state. This also ensures |
| 505 | * that flush_fp_to_thread won't set TIF_RESTORE_TM again. |
| 506 | */ |
| 507 | regs->msr &= ~MSR_TS_MASK; |
| 508 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 509 | /* Save both sets of general registers */ |
| 510 | if (save_general_regs(¤t->thread.ckpt_regs, frame) |
| 511 | || save_general_regs(regs, tm_frame)) |
| 512 | return 1; |
| 513 | |
| 514 | /* Stash the top half of the 64bit MSR into the 32bit MSR word |
| 515 | * of the transactional mcontext. This way we have a backward-compatible |
| 516 | * MSR in the 'normal' (checkpointed) mcontext and additionally one can |
| 517 | * also look at what type of transaction (T or S) was active at the |
| 518 | * time of the signal. |
| 519 | */ |
| 520 | if (__put_user((msr >> 32), &tm_frame->mc_gregs[PT_MSR])) |
| 521 | return 1; |
| 522 | |
| 523 | #ifdef CONFIG_ALTIVEC |
| 524 | /* save altivec registers */ |
| 525 | if (current->thread.used_vr) { |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 526 | if (__copy_to_user(&frame->mc_vregs, ¤t->thread.ckvr_state, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 527 | ELF_NVRREG * sizeof(vector128))) |
| 528 | return 1; |
| 529 | if (msr & MSR_VEC) { |
| 530 | if (__copy_to_user(&tm_frame->mc_vregs, |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 531 | ¤t->thread.vr_state, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 532 | ELF_NVRREG * sizeof(vector128))) |
| 533 | return 1; |
| 534 | } else { |
| 535 | if (__copy_to_user(&tm_frame->mc_vregs, |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 536 | ¤t->thread.ckvr_state, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 537 | ELF_NVRREG * sizeof(vector128))) |
| 538 | return 1; |
| 539 | } |
| 540 | |
| 541 | /* set MSR_VEC in the saved MSR value to indicate that |
| 542 | * frame->mc_vregs contains valid data |
| 543 | */ |
| 544 | msr |= MSR_VEC; |
| 545 | } |
| 546 | |
| 547 | /* We always copy to/from vrsave, it's 0 if we don't have or don't |
| 548 | * use altivec. Since VSCR only contains 32 bits saved in the least |
| 549 | * significant bits of a vector, we "cheat" and stuff VRSAVE in the |
| 550 | * most significant bits of that same vector. --BenH |
| 551 | */ |
Paul Mackerras | 408a7e0 | 2013-08-05 14:13:16 +1000 | [diff] [blame] | 552 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 553 | current->thread.ckvrsave = mfspr(SPRN_VRSAVE); |
| 554 | if (__put_user(current->thread.ckvrsave, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 555 | (u32 __user *)&frame->mc_vregs[32])) |
| 556 | return 1; |
| 557 | if (msr & MSR_VEC) { |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 558 | if (__put_user(current->thread.vrsave, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 559 | (u32 __user *)&tm_frame->mc_vregs[32])) |
| 560 | return 1; |
| 561 | } else { |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 562 | if (__put_user(current->thread.ckvrsave, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 563 | (u32 __user *)&tm_frame->mc_vregs[32])) |
| 564 | return 1; |
| 565 | } |
| 566 | #endif /* CONFIG_ALTIVEC */ |
| 567 | |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 568 | if (copy_ckfpr_to_user(&frame->mc_fregs, current)) |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 569 | return 1; |
| 570 | if (msr & MSR_FP) { |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 571 | if (copy_fpr_to_user(&tm_frame->mc_fregs, current)) |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 572 | return 1; |
| 573 | } else { |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 574 | if (copy_ckfpr_to_user(&tm_frame->mc_fregs, current)) |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 575 | return 1; |
| 576 | } |
| 577 | |
| 578 | #ifdef CONFIG_VSX |
| 579 | /* |
| 580 | * Copy VSR 0-31 upper half from thread_struct to local |
| 581 | * buffer, then write that to userspace. Also set MSR_VSX in |
| 582 | * the saved MSR value to indicate that frame->mc_vregs |
| 583 | * contains valid data |
| 584 | */ |
| 585 | if (current->thread.used_vsr) { |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 586 | if (copy_ckvsx_to_user(&frame->mc_vsregs, current)) |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 587 | return 1; |
| 588 | if (msr & MSR_VSX) { |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 589 | if (copy_vsx_to_user(&tm_frame->mc_vsregs, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 590 | current)) |
| 591 | return 1; |
| 592 | } else { |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 593 | if (copy_ckvsx_to_user(&tm_frame->mc_vsregs, current)) |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 594 | return 1; |
| 595 | } |
| 596 | |
| 597 | msr |= MSR_VSX; |
| 598 | } |
| 599 | #endif /* CONFIG_VSX */ |
| 600 | #ifdef CONFIG_SPE |
| 601 | /* SPE regs are not checkpointed with TM, so this section is |
| 602 | * simply the same as in save_user_regs(). |
| 603 | */ |
| 604 | if (current->thread.used_spe) { |
| 605 | flush_spe_to_thread(current); |
| 606 | if (__copy_to_user(&frame->mc_vregs, current->thread.evr, |
| 607 | ELF_NEVRREG * sizeof(u32))) |
| 608 | return 1; |
| 609 | /* set MSR_SPE in the saved MSR value to indicate that |
| 610 | * frame->mc_vregs contains valid data */ |
| 611 | msr |= MSR_SPE; |
| 612 | } |
| 613 | |
| 614 | /* We always copy to/from spefscr */ |
| 615 | if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG)) |
| 616 | return 1; |
| 617 | #endif /* CONFIG_SPE */ |
| 618 | |
| 619 | if (__put_user(msr, &frame->mc_gregs[PT_MSR])) |
| 620 | return 1; |
| 621 | if (sigret) { |
Christophe Leroy | d16952a | 2018-11-09 17:33:28 +0000 | [diff] [blame] | 622 | /* Set up the sigreturn trampoline: li 0,sigret; sc */ |
| 623 | if (__put_user(PPC_INST_ADDI + sigret, &frame->tramp[0]) |
| 624 | || __put_user(PPC_INST_SC, &frame->tramp[1])) |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 625 | return 1; |
| 626 | flush_icache_range((unsigned long) &frame->tramp[0], |
| 627 | (unsigned long) &frame->tramp[2]); |
| 628 | } |
| 629 | |
| 630 | return 0; |
| 631 | } |
| 632 | #endif |
| 633 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 634 | /* |
| 635 | * Restore the current user register values from the user stack, |
| 636 | * (except for MSR). |
| 637 | */ |
| 638 | static long restore_user_regs(struct pt_regs *regs, |
| 639 | struct mcontext __user *sr, int sig) |
| 640 | { |
| 641 | long err; |
| 642 | unsigned int save_r2 = 0; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 643 | unsigned long msr; |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 644 | #ifdef CONFIG_VSX |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 645 | int i; |
| 646 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 647 | |
| 648 | /* |
| 649 | * restore general registers but not including MSR or SOFTE. Also |
| 650 | * take care of keeping r2 (TLS) intact if not a signal |
| 651 | */ |
| 652 | if (!sig) |
| 653 | save_r2 = (unsigned int)regs->gpr[2]; |
| 654 | err = restore_general_regs(regs, sr); |
Al Viro | 9a81c16 | 2010-09-20 21:48:57 +0100 | [diff] [blame] | 655 | regs->trap = 0; |
Paul Mackerras | fab5db9 | 2006-06-07 16:14:40 +1000 | [diff] [blame] | 656 | err |= __get_user(msr, &sr->mc_gregs[PT_MSR]); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 657 | if (!sig) |
| 658 | regs->gpr[2] = (unsigned long) save_r2; |
| 659 | if (err) |
| 660 | return 1; |
| 661 | |
Paul Mackerras | fab5db9 | 2006-06-07 16:14:40 +1000 | [diff] [blame] | 662 | /* if doing signal return, restore the previous little-endian mode */ |
| 663 | if (sig) |
| 664 | regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE); |
| 665 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 666 | #ifdef CONFIG_ALTIVEC |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 667 | /* |
| 668 | * Force the process to reload the altivec registers from |
| 669 | * current->thread when it next does altivec instructions |
| 670 | */ |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 671 | regs->msr &= ~MSR_VEC; |
Paul Mackerras | fab5db9 | 2006-06-07 16:14:40 +1000 | [diff] [blame] | 672 | if (msr & MSR_VEC) { |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 673 | /* restore altivec registers from the stack */ |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 674 | if (__copy_from_user(¤t->thread.vr_state, &sr->mc_vregs, |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 675 | sizeof(sr->mc_vregs))) |
| 676 | return 1; |
Simon Guo | e1c0d66 | 2016-07-26 16:06:01 +0800 | [diff] [blame] | 677 | current->thread.used_vr = true; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 678 | } else if (current->thread.used_vr) |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 679 | memset(¤t->thread.vr_state, 0, |
| 680 | ELF_NVRREG * sizeof(vector128)); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 681 | |
| 682 | /* Always get VRSAVE back */ |
| 683 | if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32])) |
| 684 | return 1; |
Paul Mackerras | 408a7e0 | 2013-08-05 14:13:16 +1000 | [diff] [blame] | 685 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
| 686 | mtspr(SPRN_VRSAVE, current->thread.vrsave); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 687 | #endif /* CONFIG_ALTIVEC */ |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 688 | if (copy_fpr_from_user(current, &sr->mc_fregs)) |
| 689 | return 1; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 690 | |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 691 | #ifdef CONFIG_VSX |
Michael Neuling | ce48b21 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 692 | /* |
| 693 | * Force the process to reload the VSX registers from |
| 694 | * current->thread when it next does VSX instruction. |
| 695 | */ |
| 696 | regs->msr &= ~MSR_VSX; |
| 697 | if (msr & MSR_VSX) { |
| 698 | /* |
| 699 | * Restore altivec registers from the stack to a local |
| 700 | * buffer, then write this out to the thread_struct |
| 701 | */ |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 702 | if (copy_vsx_from_user(current, &sr->mc_vsregs)) |
Michael Neuling | ce48b21 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 703 | return 1; |
Simon Guo | e1c0d66 | 2016-07-26 16:06:01 +0800 | [diff] [blame] | 704 | current->thread.used_vsr = true; |
Michael Neuling | ce48b21 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 705 | } else if (current->thread.used_vsr) |
| 706 | for (i = 0; i < 32 ; i++) |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 707 | current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0; |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 708 | #endif /* CONFIG_VSX */ |
| 709 | /* |
| 710 | * force the process to reload the FP registers from |
| 711 | * current->thread when it next does FP instructions |
| 712 | */ |
| 713 | regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1); |
| 714 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 715 | #ifdef CONFIG_SPE |
| 716 | /* force the process to reload the spe registers from |
| 717 | current->thread when it next does spe instructions */ |
| 718 | regs->msr &= ~MSR_SPE; |
Paul Mackerras | fab5db9 | 2006-06-07 16:14:40 +1000 | [diff] [blame] | 719 | if (msr & MSR_SPE) { |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 720 | /* restore spe registers from the stack */ |
| 721 | if (__copy_from_user(current->thread.evr, &sr->mc_vregs, |
| 722 | ELF_NEVRREG * sizeof(u32))) |
| 723 | return 1; |
Simon Guo | e1c0d66 | 2016-07-26 16:06:01 +0800 | [diff] [blame] | 724 | current->thread.used_spe = true; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 725 | } else if (current->thread.used_spe) |
| 726 | memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32)); |
| 727 | |
| 728 | /* Always get SPEFSCR back */ |
| 729 | if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs + ELF_NEVRREG)) |
| 730 | return 1; |
| 731 | #endif /* CONFIG_SPE */ |
| 732 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 733 | return 0; |
| 734 | } |
| 735 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 736 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 737 | /* |
| 738 | * Restore the current user register values from the user stack, except for |
| 739 | * MSR, and recheckpoint the original checkpointed register state for processes |
| 740 | * in transactions. |
| 741 | */ |
| 742 | static long restore_tm_user_regs(struct pt_regs *regs, |
| 743 | struct mcontext __user *sr, |
| 744 | struct mcontext __user *tm_sr) |
| 745 | { |
| 746 | long err; |
Michael Neuling | 2c27a18 | 2013-06-09 21:23:17 +1000 | [diff] [blame] | 747 | unsigned long msr, msr_hi; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 748 | #ifdef CONFIG_VSX |
| 749 | int i; |
| 750 | #endif |
| 751 | |
Michael Neuling | 92fb869 | 2017-10-12 21:17:19 +1100 | [diff] [blame] | 752 | if (tm_suspend_disabled) |
| 753 | return 1; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 754 | /* |
| 755 | * restore general registers but not including MSR or SOFTE. Also |
| 756 | * take care of keeping r2 (TLS) intact if not a signal. |
| 757 | * See comment in signal_64.c:restore_tm_sigcontexts(); |
| 758 | * TFHAR is restored from the checkpointed NIP; TEXASR and TFIAR |
| 759 | * were set by the signal delivery. |
| 760 | */ |
| 761 | err = restore_general_regs(regs, tm_sr); |
| 762 | err |= restore_general_regs(¤t->thread.ckpt_regs, sr); |
| 763 | |
| 764 | err |= __get_user(current->thread.tm_tfhar, &sr->mc_gregs[PT_NIP]); |
| 765 | |
| 766 | err |= __get_user(msr, &sr->mc_gregs[PT_MSR]); |
| 767 | if (err) |
| 768 | return 1; |
| 769 | |
| 770 | /* Restore the previous little-endian mode */ |
| 771 | regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE); |
| 772 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 773 | #ifdef CONFIG_ALTIVEC |
| 774 | regs->msr &= ~MSR_VEC; |
| 775 | if (msr & MSR_VEC) { |
| 776 | /* restore altivec registers from the stack */ |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 777 | if (__copy_from_user(¤t->thread.ckvr_state, &sr->mc_vregs, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 778 | sizeof(sr->mc_vregs)) || |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 779 | __copy_from_user(¤t->thread.vr_state, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 780 | &tm_sr->mc_vregs, |
| 781 | sizeof(sr->mc_vregs))) |
| 782 | return 1; |
Simon Guo | e1c0d66 | 2016-07-26 16:06:01 +0800 | [diff] [blame] | 783 | current->thread.used_vr = true; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 784 | } else if (current->thread.used_vr) { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 785 | memset(¤t->thread.vr_state, 0, |
| 786 | ELF_NVRREG * sizeof(vector128)); |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 787 | memset(¤t->thread.ckvr_state, 0, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 788 | ELF_NVRREG * sizeof(vector128)); |
| 789 | } |
| 790 | |
| 791 | /* Always get VRSAVE back */ |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 792 | if (__get_user(current->thread.ckvrsave, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 793 | (u32 __user *)&sr->mc_vregs[32]) || |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 794 | __get_user(current->thread.vrsave, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 795 | (u32 __user *)&tm_sr->mc_vregs[32])) |
| 796 | return 1; |
Paul Mackerras | 408a7e0 | 2013-08-05 14:13:16 +1000 | [diff] [blame] | 797 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 798 | mtspr(SPRN_VRSAVE, current->thread.ckvrsave); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 799 | #endif /* CONFIG_ALTIVEC */ |
| 800 | |
| 801 | regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1); |
| 802 | |
| 803 | if (copy_fpr_from_user(current, &sr->mc_fregs) || |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 804 | copy_ckfpr_from_user(current, &tm_sr->mc_fregs)) |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 805 | return 1; |
| 806 | |
| 807 | #ifdef CONFIG_VSX |
| 808 | regs->msr &= ~MSR_VSX; |
| 809 | if (msr & MSR_VSX) { |
| 810 | /* |
| 811 | * Restore altivec registers from the stack to a local |
| 812 | * buffer, then write this out to the thread_struct |
| 813 | */ |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 814 | if (copy_vsx_from_user(current, &tm_sr->mc_vsregs) || |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 815 | copy_ckvsx_from_user(current, &sr->mc_vsregs)) |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 816 | return 1; |
Simon Guo | e1c0d66 | 2016-07-26 16:06:01 +0800 | [diff] [blame] | 817 | current->thread.used_vsr = true; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 818 | } else if (current->thread.used_vsr) |
| 819 | for (i = 0; i < 32 ; i++) { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 820 | current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0; |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 821 | current->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET] = 0; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 822 | } |
| 823 | #endif /* CONFIG_VSX */ |
| 824 | |
| 825 | #ifdef CONFIG_SPE |
| 826 | /* SPE regs are not checkpointed with TM, so this section is |
| 827 | * simply the same as in restore_user_regs(). |
| 828 | */ |
| 829 | regs->msr &= ~MSR_SPE; |
| 830 | if (msr & MSR_SPE) { |
| 831 | if (__copy_from_user(current->thread.evr, &sr->mc_vregs, |
| 832 | ELF_NEVRREG * sizeof(u32))) |
| 833 | return 1; |
Simon Guo | e1c0d66 | 2016-07-26 16:06:01 +0800 | [diff] [blame] | 834 | current->thread.used_spe = true; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 835 | } else if (current->thread.used_spe) |
| 836 | memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32)); |
| 837 | |
| 838 | /* Always get SPEFSCR back */ |
| 839 | if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs |
| 840 | + ELF_NEVRREG)) |
| 841 | return 1; |
| 842 | #endif /* CONFIG_SPE */ |
| 843 | |
Michael Neuling | d2b9d2a | 2015-11-19 15:44:44 +1100 | [diff] [blame] | 844 | /* Get the top half of the MSR from the user context */ |
| 845 | if (__get_user(msr_hi, &tm_sr->mc_gregs[PT_MSR])) |
| 846 | return 1; |
| 847 | msr_hi <<= 32; |
| 848 | /* If TM bits are set to the reserved value, it's an invalid context */ |
| 849 | if (MSR_TM_RESV(msr_hi)) |
| 850 | return 1; |
Breno Leitao | e1c3743 | 2018-11-21 17:21:09 -0200 | [diff] [blame^] | 851 | |
| 852 | /* |
| 853 | * Disabling preemption, since it is unsafe to be preempted |
| 854 | * with MSR[TS] set without recheckpointing. |
| 855 | */ |
| 856 | preempt_disable(); |
| 857 | |
| 858 | /* |
| 859 | * CAUTION: |
| 860 | * After regs->MSR[TS] being updated, make sure that get_user(), |
| 861 | * put_user() or similar functions are *not* called. These |
| 862 | * functions can generate page faults which will cause the process |
| 863 | * to be de-scheduled with MSR[TS] set but without calling |
| 864 | * tm_recheckpoint(). This can cause a bug. |
| 865 | * |
| 866 | * Pull in the MSR TM bits from the user context |
| 867 | */ |
Michael Neuling | d2b9d2a | 2015-11-19 15:44:44 +1100 | [diff] [blame] | 868 | regs->msr = (regs->msr & ~MSR_TS_MASK) | (msr_hi & MSR_TS_MASK); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 869 | /* Now, recheckpoint. This loads up all of the checkpointed (older) |
| 870 | * registers, including FP and V[S]Rs. After recheckpointing, the |
| 871 | * transactional versions should be loaded. |
| 872 | */ |
| 873 | tm_enable(); |
Michael Neuling | e6b8fd0 | 2014-04-04 20:19:48 +1100 | [diff] [blame] | 874 | /* Make sure the transaction is marked as failed */ |
| 875 | current->thread.tm_texasr |= TEXASR_FS; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 876 | /* This loads the checkpointed FP/VEC state, if used */ |
Cyril Bur | eb5c3f1 | 2017-11-02 14:09:05 +1100 | [diff] [blame] | 877 | tm_recheckpoint(¤t->thread); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 878 | |
| 879 | /* This loads the speculative FP/VEC state, if used */ |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 880 | msr_check_and_set(msr & (MSR_FP | MSR_VEC)); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 881 | if (msr & MSR_FP) { |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 882 | load_fp_state(¤t->thread.fp_state); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 883 | regs->msr |= (MSR_FP | current->thread.fpexc_mode); |
| 884 | } |
Michael Neuling | f110c0c | 2013-04-09 16:18:55 +1000 | [diff] [blame] | 885 | #ifdef CONFIG_ALTIVEC |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 886 | if (msr & MSR_VEC) { |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 887 | load_vr_state(¤t->thread.vr_state); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 888 | regs->msr |= MSR_VEC; |
| 889 | } |
Michael Neuling | f110c0c | 2013-04-09 16:18:55 +1000 | [diff] [blame] | 890 | #endif |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 891 | |
Breno Leitao | e1c3743 | 2018-11-21 17:21:09 -0200 | [diff] [blame^] | 892 | preempt_enable(); |
| 893 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 894 | return 0; |
| 895 | } |
| 896 | #endif |
| 897 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 898 | #ifdef CONFIG_PPC64 |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 899 | |
| 900 | #define copy_siginfo_to_user copy_siginfo_to_user32 |
| 901 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 902 | #endif /* CONFIG_PPC64 */ |
| 903 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 904 | /* |
| 905 | * Set up a signal frame for a "real-time" signal handler |
| 906 | * (one which gets siginfo). |
| 907 | */ |
Richard Weinberger | 129b69d | 2014-03-02 14:46:11 +0100 | [diff] [blame] | 908 | int handle_rt_signal32(struct ksignal *ksig, sigset_t *oldset, |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 909 | struct task_struct *tsk) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 910 | { |
| 911 | struct rt_sigframe __user *rt_sf; |
| 912 | struct mcontext __user *frame; |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 913 | struct mcontext __user *tm_frame = NULL; |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 914 | void __user *addr; |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 915 | unsigned long newsp = 0; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 916 | int sigret; |
| 917 | unsigned long tramp; |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 918 | struct pt_regs *regs = tsk->thread.regs; |
| 919 | |
| 920 | BUG_ON(tsk != current); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 921 | |
| 922 | /* Set up Signal Frame */ |
| 923 | /* Put a Real Time Context onto stack */ |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 924 | rt_sf = get_sigframe(ksig, get_tm_stackpointer(tsk), sizeof(*rt_sf), 1); |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 925 | addr = rt_sf; |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 926 | if (unlikely(rt_sf == NULL)) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 927 | goto badframe; |
| 928 | |
| 929 | /* Put the siginfo & fill in most of the ucontext */ |
Richard Weinberger | 129b69d | 2014-03-02 14:46:11 +0100 | [diff] [blame] | 930 | if (copy_siginfo_to_user(&rt_sf->info, &ksig->info) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 931 | || __put_user(0, &rt_sf->uc.uc_flags) |
Al Viro | 7cce246 | 2012-12-23 03:26:46 -0500 | [diff] [blame] | 932 | || __save_altstack(&rt_sf->uc.uc_stack, regs->gpr[1]) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 933 | || __put_user(to_user_ptr(&rt_sf->uc.uc_mcontext), |
| 934 | &rt_sf->uc.uc_regs) |
| 935 | || put_sigset_t(&rt_sf->uc.uc_sigmask, oldset)) |
| 936 | goto badframe; |
| 937 | |
| 938 | /* Save user registers on the stack */ |
| 939 | frame = &rt_sf->uc.uc_mcontext; |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 940 | addr = frame; |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 941 | if (vdso32_rt_sigtramp && tsk->mm->context.vdso_base) { |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 942 | sigret = 0; |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 943 | tramp = tsk->mm->context.vdso_base + vdso32_rt_sigtramp; |
Benjamin Herrenschmidt | a7f290d | 2005-11-11 21:15:21 +1100 | [diff] [blame] | 944 | } else { |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 945 | sigret = __NR_rt_sigreturn; |
| 946 | tramp = (unsigned long) frame->tramp; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 947 | } |
Paul Mackerras | cc657f5 | 2005-11-14 21:55:15 +1100 | [diff] [blame] | 948 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 949 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 950 | tm_frame = &rt_sf->uc_transact.uc_mcontext; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 951 | if (MSR_TM_ACTIVE(regs->msr)) { |
Paul Mackerras | d765ff2 | 2014-01-29 16:33:56 +1100 | [diff] [blame] | 952 | if (__put_user((unsigned long)&rt_sf->uc_transact, |
| 953 | &rt_sf->uc.uc_link) || |
| 954 | __put_user((unsigned long)tm_frame, |
| 955 | &rt_sf->uc_transact.uc_regs)) |
| 956 | goto badframe; |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 957 | if (save_tm_user_regs(regs, frame, tm_frame, sigret)) |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 958 | goto badframe; |
| 959 | } |
| 960 | else |
| 961 | #endif |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 962 | { |
Paul Mackerras | d765ff2 | 2014-01-29 16:33:56 +1100 | [diff] [blame] | 963 | if (__put_user(0, &rt_sf->uc.uc_link)) |
| 964 | goto badframe; |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 965 | if (save_user_regs(regs, frame, tm_frame, sigret, 1)) |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 966 | goto badframe; |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 967 | } |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 968 | regs->link = tramp; |
| 969 | |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 970 | tsk->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */ |
Paul Mackerras | cc657f5 | 2005-11-14 21:55:15 +1100 | [diff] [blame] | 971 | |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 972 | /* create a stack frame for the caller of the handler */ |
| 973 | newsp = ((unsigned long)rt_sf) - (__SIGNAL_FRAMESIZE + 16); |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 974 | addr = (void __user *)regs->gpr[1]; |
Paul Mackerras | e2b5530 | 2005-10-22 14:46:33 +1000 | [diff] [blame] | 975 | if (put_user(regs->gpr[1], (u32 __user *)newsp)) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 976 | goto badframe; |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 977 | |
| 978 | /* Fill registers for signal handler */ |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 979 | regs->gpr[1] = newsp; |
Richard Weinberger | 129b69d | 2014-03-02 14:46:11 +0100 | [diff] [blame] | 980 | regs->gpr[3] = ksig->sig; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 981 | regs->gpr[4] = (unsigned long) &rt_sf->info; |
| 982 | regs->gpr[5] = (unsigned long) &rt_sf->uc; |
| 983 | regs->gpr[6] = (unsigned long) rt_sf; |
Richard Weinberger | 129b69d | 2014-03-02 14:46:11 +0100 | [diff] [blame] | 984 | regs->nip = (unsigned long) ksig->ka.sa.sa_handler; |
Anton Blanchard | e871c6b | 2013-09-23 12:04:43 +1000 | [diff] [blame] | 985 | /* enter the signal handler in native-endian mode */ |
Paul Mackerras | fab5db9 | 2006-06-07 16:14:40 +1000 | [diff] [blame] | 986 | regs->msr &= ~MSR_LE; |
Anton Blanchard | e871c6b | 2013-09-23 12:04:43 +1000 | [diff] [blame] | 987 | regs->msr |= (MSR_KERNEL & MSR_LE); |
Richard Weinberger | 129b69d | 2014-03-02 14:46:11 +0100 | [diff] [blame] | 988 | return 0; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 989 | |
| 990 | badframe: |
Christian Dietrich | 7646223 | 2011-06-04 05:36:54 +0000 | [diff] [blame] | 991 | if (show_unhandled_signals) |
| 992 | printk_ratelimited(KERN_INFO |
| 993 | "%s[%d]: bad frame in handle_rt_signal32: " |
| 994 | "%p nip %08lx lr %08lx\n", |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 995 | tsk->comm, tsk->pid, |
Christian Dietrich | 7646223 | 2011-06-04 05:36:54 +0000 | [diff] [blame] | 996 | addr, regs->nip, regs->link); |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 997 | |
Richard Weinberger | 129b69d | 2014-03-02 14:46:11 +0100 | [diff] [blame] | 998 | return 1; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 999 | } |
| 1000 | |
| 1001 | static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int sig) |
| 1002 | { |
| 1003 | sigset_t set; |
| 1004 | struct mcontext __user *mcp; |
| 1005 | |
| 1006 | if (get_sigset_t(&set, &ucp->uc_sigmask)) |
| 1007 | return -EFAULT; |
| 1008 | #ifdef CONFIG_PPC64 |
| 1009 | { |
| 1010 | u32 cmcp; |
| 1011 | |
| 1012 | if (__get_user(cmcp, &ucp->uc_regs)) |
| 1013 | return -EFAULT; |
| 1014 | mcp = (struct mcontext __user *)(u64)cmcp; |
Paul Mackerras | 7c85d1f | 2006-06-09 13:02:59 +1000 | [diff] [blame] | 1015 | /* no need to check access_ok(mcp), since mcp < 4GB */ |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1016 | } |
| 1017 | #else |
| 1018 | if (__get_user(mcp, &ucp->uc_regs)) |
| 1019 | return -EFAULT; |
Paul Mackerras | 7c85d1f | 2006-06-09 13:02:59 +1000 | [diff] [blame] | 1020 | if (!access_ok(VERIFY_READ, mcp, sizeof(*mcp))) |
| 1021 | return -EFAULT; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1022 | #endif |
Al Viro | 17440f1 | 2012-04-27 14:09:19 -0400 | [diff] [blame] | 1023 | set_current_blocked(&set); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1024 | if (restore_user_regs(regs, mcp, sig)) |
| 1025 | return -EFAULT; |
| 1026 | |
| 1027 | return 0; |
| 1028 | } |
| 1029 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1030 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1031 | static int do_setcontext_tm(struct ucontext __user *ucp, |
| 1032 | struct ucontext __user *tm_ucp, |
| 1033 | struct pt_regs *regs) |
| 1034 | { |
| 1035 | sigset_t set; |
| 1036 | struct mcontext __user *mcp; |
| 1037 | struct mcontext __user *tm_mcp; |
| 1038 | u32 cmcp; |
| 1039 | u32 tm_cmcp; |
| 1040 | |
| 1041 | if (get_sigset_t(&set, &ucp->uc_sigmask)) |
| 1042 | return -EFAULT; |
| 1043 | |
| 1044 | if (__get_user(cmcp, &ucp->uc_regs) || |
| 1045 | __get_user(tm_cmcp, &tm_ucp->uc_regs)) |
| 1046 | return -EFAULT; |
| 1047 | mcp = (struct mcontext __user *)(u64)cmcp; |
| 1048 | tm_mcp = (struct mcontext __user *)(u64)tm_cmcp; |
| 1049 | /* no need to check access_ok(mcp), since mcp < 4GB */ |
| 1050 | |
| 1051 | set_current_blocked(&set); |
| 1052 | if (restore_tm_user_regs(regs, mcp, tm_mcp)) |
| 1053 | return -EFAULT; |
| 1054 | |
| 1055 | return 0; |
| 1056 | } |
| 1057 | #endif |
| 1058 | |
Al Viro | f367564 | 2018-05-02 23:20:47 +1000 | [diff] [blame] | 1059 | #ifdef CONFIG_PPC64 |
| 1060 | COMPAT_SYSCALL_DEFINE3(swapcontext, struct ucontext __user *, old_ctx, |
| 1061 | struct ucontext __user *, new_ctx, int, ctx_size) |
| 1062 | #else |
| 1063 | SYSCALL_DEFINE3(swapcontext, struct ucontext __user *, old_ctx, |
| 1064 | struct ucontext __user *, new_ctx, long, ctx_size) |
| 1065 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1066 | { |
Al Viro | f367564 | 2018-05-02 23:20:47 +1000 | [diff] [blame] | 1067 | struct pt_regs *regs = current_pt_regs(); |
Michael Neuling | 16c29d1 | 2008-10-23 00:42:36 +0000 | [diff] [blame] | 1068 | int ctx_has_vsx_region = 0; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1069 | |
Michael Neuling | c1cb299 | 2008-07-08 18:43:41 +1000 | [diff] [blame] | 1070 | #ifdef CONFIG_PPC64 |
| 1071 | unsigned long new_msr = 0; |
| 1072 | |
Andreas Schwab | 77eb50a | 2008-11-06 00:49:00 +0000 | [diff] [blame] | 1073 | if (new_ctx) { |
| 1074 | struct mcontext __user *mcp; |
| 1075 | u32 cmcp; |
| 1076 | |
| 1077 | /* |
| 1078 | * Get pointer to the real mcontext. No need for |
| 1079 | * access_ok since we are dealing with compat |
| 1080 | * pointers. |
| 1081 | */ |
| 1082 | if (__get_user(cmcp, &new_ctx->uc_regs)) |
| 1083 | return -EFAULT; |
| 1084 | mcp = (struct mcontext __user *)(u64)cmcp; |
| 1085 | if (__get_user(new_msr, &mcp->mc_gregs[PT_MSR])) |
| 1086 | return -EFAULT; |
| 1087 | } |
Michael Neuling | c1cb299 | 2008-07-08 18:43:41 +1000 | [diff] [blame] | 1088 | /* |
| 1089 | * Check that the context is not smaller than the original |
| 1090 | * size (with VMX but without VSX) |
| 1091 | */ |
| 1092 | if (ctx_size < UCONTEXTSIZEWITHOUTVSX) |
| 1093 | return -EINVAL; |
| 1094 | /* |
| 1095 | * If the new context state sets the MSR VSX bits but |
| 1096 | * it doesn't provide VSX state. |
| 1097 | */ |
| 1098 | if ((ctx_size < sizeof(struct ucontext)) && |
| 1099 | (new_msr & MSR_VSX)) |
| 1100 | return -EINVAL; |
Michael Neuling | 16c29d1 | 2008-10-23 00:42:36 +0000 | [diff] [blame] | 1101 | /* Does the context have enough room to store VSX data? */ |
| 1102 | if (ctx_size >= sizeof(struct ucontext)) |
| 1103 | ctx_has_vsx_region = 1; |
Michael Neuling | c1cb299 | 2008-07-08 18:43:41 +1000 | [diff] [blame] | 1104 | #else |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1105 | /* Context size is for future use. Right now, we only make sure |
| 1106 | * we are passed something we understand |
| 1107 | */ |
| 1108 | if (ctx_size < sizeof(struct ucontext)) |
| 1109 | return -EINVAL; |
Michael Neuling | c1cb299 | 2008-07-08 18:43:41 +1000 | [diff] [blame] | 1110 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1111 | if (old_ctx != NULL) { |
Paul Mackerras | 1c9bb1a | 2006-12-20 13:57:06 +1100 | [diff] [blame] | 1112 | struct mcontext __user *mctx; |
| 1113 | |
| 1114 | /* |
| 1115 | * old_ctx might not be 16-byte aligned, in which |
| 1116 | * case old_ctx->uc_mcontext won't be either. |
| 1117 | * Because we have the old_ctx->uc_pad2 field |
| 1118 | * before old_ctx->uc_mcontext, we need to round down |
| 1119 | * from &old_ctx->uc_mcontext to a 16-byte boundary. |
| 1120 | */ |
| 1121 | mctx = (struct mcontext __user *) |
| 1122 | ((unsigned long) &old_ctx->uc_mcontext & ~0xfUL); |
Michael Neuling | 16c29d1 | 2008-10-23 00:42:36 +0000 | [diff] [blame] | 1123 | if (!access_ok(VERIFY_WRITE, old_ctx, ctx_size) |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 1124 | || save_user_regs(regs, mctx, NULL, 0, ctx_has_vsx_region) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1125 | || put_sigset_t(&old_ctx->uc_sigmask, ¤t->blocked) |
Paul Mackerras | 1c9bb1a | 2006-12-20 13:57:06 +1100 | [diff] [blame] | 1126 | || __put_user(to_user_ptr(mctx), &old_ctx->uc_regs)) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1127 | return -EFAULT; |
| 1128 | } |
| 1129 | if (new_ctx == NULL) |
| 1130 | return 0; |
Christophe Leroy | 56b04d5 | 2018-04-24 18:04:25 +0200 | [diff] [blame] | 1131 | if (!access_ok(VERIFY_READ, new_ctx, ctx_size) || |
| 1132 | fault_in_pages_readable((u8 __user *)new_ctx, ctx_size)) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1133 | return -EFAULT; |
| 1134 | |
| 1135 | /* |
| 1136 | * If we get a fault copying the context into the kernel's |
| 1137 | * image of the user's registers, we can't just return -EFAULT |
| 1138 | * because the user's registers will be corrupted. For instance |
| 1139 | * the NIP value may have been updated but not some of the |
| 1140 | * other registers. Given that we have done the access_ok |
| 1141 | * and successfully read the first and last bytes of the region |
| 1142 | * above, this should only happen in an out-of-memory situation |
| 1143 | * or if another thread unmaps the region containing the context. |
| 1144 | * We kill the task with a SIGSEGV in this situation. |
| 1145 | */ |
| 1146 | if (do_setcontext(new_ctx, regs, 0)) |
| 1147 | do_exit(SIGSEGV); |
David Woodhouse | 401d1f0 | 2005-11-15 18:52:18 +0000 | [diff] [blame] | 1148 | |
| 1149 | set_thread_flag(TIF_RESTOREALL); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1150 | return 0; |
| 1151 | } |
| 1152 | |
Al Viro | f367564 | 2018-05-02 23:20:47 +1000 | [diff] [blame] | 1153 | #ifdef CONFIG_PPC64 |
| 1154 | COMPAT_SYSCALL_DEFINE0(rt_sigreturn) |
| 1155 | #else |
| 1156 | SYSCALL_DEFINE0(rt_sigreturn) |
| 1157 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1158 | { |
| 1159 | struct rt_sigframe __user *rt_sf; |
Al Viro | f367564 | 2018-05-02 23:20:47 +1000 | [diff] [blame] | 1160 | struct pt_regs *regs = current_pt_regs(); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1161 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1162 | struct ucontext __user *uc_transact; |
| 1163 | unsigned long msr_hi; |
| 1164 | unsigned long tmp; |
| 1165 | int tm_restore = 0; |
| 1166 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1167 | /* Always make any pending restarted system calls return -EINTR */ |
Andy Lutomirski | f56141e | 2015-02-12 15:01:14 -0800 | [diff] [blame] | 1168 | current->restart_block.fn = do_no_restart_syscall; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1169 | |
| 1170 | rt_sf = (struct rt_sigframe __user *) |
| 1171 | (regs->gpr[1] + __SIGNAL_FRAMESIZE + 16); |
| 1172 | if (!access_ok(VERIFY_READ, rt_sf, sizeof(*rt_sf))) |
| 1173 | goto bad; |
Cyril Bur | 78a3e88 | 2016-08-23 10:46:17 +1000 | [diff] [blame] | 1174 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1175 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
Cyril Bur | 78a3e88 | 2016-08-23 10:46:17 +1000 | [diff] [blame] | 1176 | /* |
| 1177 | * If there is a transactional state then throw it away. |
| 1178 | * The purpose of a sigreturn is to destroy all traces of the |
| 1179 | * signal frame, this includes any transactional state created |
| 1180 | * within in. We only check for suspended as we can never be |
| 1181 | * active in the kernel, we are active, there is nothing better to |
| 1182 | * do than go ahead and Bad Thing later. |
| 1183 | * The cause is not important as there will never be a |
| 1184 | * recheckpoint so it's not user visible. |
| 1185 | */ |
| 1186 | if (MSR_TM_SUSPENDED(mfmsr())) |
| 1187 | tm_reclaim_current(0); |
| 1188 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1189 | if (__get_user(tmp, &rt_sf->uc.uc_link)) |
| 1190 | goto bad; |
| 1191 | uc_transact = (struct ucontext __user *)(uintptr_t)tmp; |
| 1192 | if (uc_transact) { |
| 1193 | u32 cmcp; |
| 1194 | struct mcontext __user *mcp; |
| 1195 | |
| 1196 | if (__get_user(cmcp, &uc_transact->uc_regs)) |
| 1197 | return -EFAULT; |
| 1198 | mcp = (struct mcontext __user *)(u64)cmcp; |
| 1199 | /* The top 32 bits of the MSR are stashed in the transactional |
| 1200 | * ucontext. */ |
| 1201 | if (__get_user(msr_hi, &mcp->mc_gregs[PT_MSR])) |
| 1202 | goto bad; |
| 1203 | |
Michael Neuling | 55e4341 | 2013-06-09 21:23:18 +1000 | [diff] [blame] | 1204 | if (MSR_TM_ACTIVE(msr_hi<<32)) { |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1205 | /* We only recheckpoint on return if we're |
| 1206 | * transaction. |
| 1207 | */ |
| 1208 | tm_restore = 1; |
| 1209 | if (do_setcontext_tm(&rt_sf->uc, uc_transact, regs)) |
| 1210 | goto bad; |
| 1211 | } |
| 1212 | } |
| 1213 | if (!tm_restore) |
| 1214 | /* Fall through, for non-TM restore */ |
| 1215 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1216 | if (do_setcontext(&rt_sf->uc, regs, 1)) |
| 1217 | goto bad; |
| 1218 | |
| 1219 | /* |
| 1220 | * It's not clear whether or why it is desirable to save the |
| 1221 | * sigaltstack setting on signal delivery and restore it on |
| 1222 | * signal return. But other architectures do this and we have |
| 1223 | * always done it up until now so it is probably better not to |
| 1224 | * change it. -- paulus |
| 1225 | */ |
| 1226 | #ifdef CONFIG_PPC64 |
Al Viro | 7cce246 | 2012-12-23 03:26:46 -0500 | [diff] [blame] | 1227 | if (compat_restore_altstack(&rt_sf->uc.uc_stack)) |
| 1228 | goto bad; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1229 | #else |
Al Viro | 7cce246 | 2012-12-23 03:26:46 -0500 | [diff] [blame] | 1230 | if (restore_altstack(&rt_sf->uc.uc_stack)) |
| 1231 | goto bad; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1232 | #endif |
David Woodhouse | 401d1f0 | 2005-11-15 18:52:18 +0000 | [diff] [blame] | 1233 | set_thread_flag(TIF_RESTOREALL); |
| 1234 | return 0; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1235 | |
| 1236 | bad: |
Christian Dietrich | 7646223 | 2011-06-04 05:36:54 +0000 | [diff] [blame] | 1237 | if (show_unhandled_signals) |
| 1238 | printk_ratelimited(KERN_INFO |
| 1239 | "%s[%d]: bad frame in sys_rt_sigreturn: " |
| 1240 | "%p nip %08lx lr %08lx\n", |
| 1241 | current->comm, current->pid, |
| 1242 | rt_sf, regs->nip, regs->link); |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 1243 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1244 | force_sig(SIGSEGV, current); |
| 1245 | return 0; |
| 1246 | } |
| 1247 | |
| 1248 | #ifdef CONFIG_PPC32 |
Al Viro | f367564 | 2018-05-02 23:20:47 +1000 | [diff] [blame] | 1249 | SYSCALL_DEFINE3(debug_setcontext, struct ucontext __user *, ctx, |
| 1250 | int, ndbg, struct sig_dbg_op __user *, dbg) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1251 | { |
Al Viro | f367564 | 2018-05-02 23:20:47 +1000 | [diff] [blame] | 1252 | struct pt_regs *regs = current_pt_regs(); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1253 | struct sig_dbg_op op; |
| 1254 | int i; |
| 1255 | unsigned long new_msr = regs->msr; |
Dave Kleikamp | 172ae2e | 2010-02-08 11:50:57 +0000 | [diff] [blame] | 1256 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
Bharat Bhushan | 51ae8d4 | 2013-07-04 11:45:46 +0530 | [diff] [blame] | 1257 | unsigned long new_dbcr0 = current->thread.debug.dbcr0; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1258 | #endif |
| 1259 | |
| 1260 | for (i=0; i<ndbg; i++) { |
Paul Mackerras | 7c85d1f | 2006-06-09 13:02:59 +1000 | [diff] [blame] | 1261 | if (copy_from_user(&op, dbg + i, sizeof(op))) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1262 | return -EFAULT; |
| 1263 | switch (op.dbg_type) { |
| 1264 | case SIG_DBG_SINGLE_STEPPING: |
Dave Kleikamp | 172ae2e | 2010-02-08 11:50:57 +0000 | [diff] [blame] | 1265 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1266 | if (op.dbg_value) { |
| 1267 | new_msr |= MSR_DE; |
| 1268 | new_dbcr0 |= (DBCR0_IDM | DBCR0_IC); |
| 1269 | } else { |
Dave Kleikamp | 3bffb65 | 2010-02-08 11:51:18 +0000 | [diff] [blame] | 1270 | new_dbcr0 &= ~DBCR0_IC; |
| 1271 | if (!DBCR_ACTIVE_EVENTS(new_dbcr0, |
Bharat Bhushan | 51ae8d4 | 2013-07-04 11:45:46 +0530 | [diff] [blame] | 1272 | current->thread.debug.dbcr1)) { |
Dave Kleikamp | 3bffb65 | 2010-02-08 11:51:18 +0000 | [diff] [blame] | 1273 | new_msr &= ~MSR_DE; |
| 1274 | new_dbcr0 &= ~DBCR0_IDM; |
| 1275 | } |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1276 | } |
| 1277 | #else |
| 1278 | if (op.dbg_value) |
| 1279 | new_msr |= MSR_SE; |
| 1280 | else |
| 1281 | new_msr &= ~MSR_SE; |
| 1282 | #endif |
| 1283 | break; |
| 1284 | case SIG_DBG_BRANCH_TRACING: |
Dave Kleikamp | 172ae2e | 2010-02-08 11:50:57 +0000 | [diff] [blame] | 1285 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1286 | return -EINVAL; |
| 1287 | #else |
| 1288 | if (op.dbg_value) |
| 1289 | new_msr |= MSR_BE; |
| 1290 | else |
| 1291 | new_msr &= ~MSR_BE; |
| 1292 | #endif |
| 1293 | break; |
| 1294 | |
| 1295 | default: |
| 1296 | return -EINVAL; |
| 1297 | } |
| 1298 | } |
| 1299 | |
| 1300 | /* We wait until here to actually install the values in the |
| 1301 | registers so if we fail in the above loop, it will not |
| 1302 | affect the contents of these registers. After this point, |
| 1303 | failure is a problem, anyway, and it's very unlikely unless |
| 1304 | the user is really doing something wrong. */ |
| 1305 | regs->msr = new_msr; |
Dave Kleikamp | 172ae2e | 2010-02-08 11:50:57 +0000 | [diff] [blame] | 1306 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
Bharat Bhushan | 51ae8d4 | 2013-07-04 11:45:46 +0530 | [diff] [blame] | 1307 | current->thread.debug.dbcr0 = new_dbcr0; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1308 | #endif |
| 1309 | |
Christophe Leroy | 56b04d5 | 2018-04-24 18:04:25 +0200 | [diff] [blame] | 1310 | if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx)) || |
| 1311 | fault_in_pages_readable((u8 __user *)ctx, sizeof(*ctx))) |
Paul Mackerras | 7c85d1f | 2006-06-09 13:02:59 +1000 | [diff] [blame] | 1312 | return -EFAULT; |
| 1313 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1314 | /* |
| 1315 | * If we get a fault copying the context into the kernel's |
| 1316 | * image of the user's registers, we can't just return -EFAULT |
| 1317 | * because the user's registers will be corrupted. For instance |
| 1318 | * the NIP value may have been updated but not some of the |
| 1319 | * other registers. Given that we have done the access_ok |
| 1320 | * and successfully read the first and last bytes of the region |
| 1321 | * above, this should only happen in an out-of-memory situation |
| 1322 | * or if another thread unmaps the region containing the context. |
| 1323 | * We kill the task with a SIGSEGV in this situation. |
| 1324 | */ |
| 1325 | if (do_setcontext(ctx, regs, 1)) { |
Christian Dietrich | 7646223 | 2011-06-04 05:36:54 +0000 | [diff] [blame] | 1326 | if (show_unhandled_signals) |
| 1327 | printk_ratelimited(KERN_INFO "%s[%d]: bad frame in " |
| 1328 | "sys_debug_setcontext: %p nip %08lx " |
| 1329 | "lr %08lx\n", |
| 1330 | current->comm, current->pid, |
| 1331 | ctx, regs->nip, regs->link); |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 1332 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1333 | force_sig(SIGSEGV, current); |
| 1334 | goto out; |
| 1335 | } |
| 1336 | |
| 1337 | /* |
| 1338 | * It's not clear whether or why it is desirable to save the |
| 1339 | * sigaltstack setting on signal delivery and restore it on |
| 1340 | * signal return. But other architectures do this and we have |
| 1341 | * always done it up until now so it is probably better not to |
| 1342 | * change it. -- paulus |
| 1343 | */ |
Al Viro | 7cce246 | 2012-12-23 03:26:46 -0500 | [diff] [blame] | 1344 | restore_altstack(&ctx->uc_stack); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1345 | |
David Woodhouse | 401d1f0 | 2005-11-15 18:52:18 +0000 | [diff] [blame] | 1346 | set_thread_flag(TIF_RESTOREALL); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1347 | out: |
| 1348 | return 0; |
| 1349 | } |
| 1350 | #endif |
| 1351 | |
| 1352 | /* |
| 1353 | * OK, we're invoking a handler |
| 1354 | */ |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 1355 | int handle_signal32(struct ksignal *ksig, sigset_t *oldset, |
| 1356 | struct task_struct *tsk) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1357 | { |
| 1358 | struct sigcontext __user *sc; |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 1359 | struct sigframe __user *frame; |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 1360 | struct mcontext __user *tm_mctx = NULL; |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 1361 | unsigned long newsp = 0; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1362 | int sigret; |
| 1363 | unsigned long tramp; |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 1364 | struct pt_regs *regs = tsk->thread.regs; |
| 1365 | |
| 1366 | BUG_ON(tsk != current); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1367 | |
| 1368 | /* Set up Signal Frame */ |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 1369 | frame = get_sigframe(ksig, get_tm_stackpointer(tsk), sizeof(*frame), 1); |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 1370 | if (unlikely(frame == NULL)) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1371 | goto badframe; |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 1372 | sc = (struct sigcontext __user *) &frame->sctx; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1373 | |
| 1374 | #if _NSIG != 64 |
| 1375 | #error "Please adjust handle_signal()" |
| 1376 | #endif |
Richard Weinberger | 129b69d | 2014-03-02 14:46:11 +0100 | [diff] [blame] | 1377 | if (__put_user(to_user_ptr(ksig->ka.sa.sa_handler), &sc->handler) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1378 | || __put_user(oldset->sig[0], &sc->oldmask) |
| 1379 | #ifdef CONFIG_PPC64 |
| 1380 | || __put_user((oldset->sig[0] >> 32), &sc->_unused[3]) |
| 1381 | #else |
| 1382 | || __put_user(oldset->sig[1], &sc->_unused[3]) |
| 1383 | #endif |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 1384 | || __put_user(to_user_ptr(&frame->mctx), &sc->regs) |
Richard Weinberger | 129b69d | 2014-03-02 14:46:11 +0100 | [diff] [blame] | 1385 | || __put_user(ksig->sig, &sc->signal)) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1386 | goto badframe; |
| 1387 | |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 1388 | if (vdso32_sigtramp && tsk->mm->context.vdso_base) { |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1389 | sigret = 0; |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 1390 | tramp = tsk->mm->context.vdso_base + vdso32_sigtramp; |
Benjamin Herrenschmidt | a7f290d | 2005-11-11 21:15:21 +1100 | [diff] [blame] | 1391 | } else { |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1392 | sigret = __NR_sigreturn; |
| 1393 | tramp = (unsigned long) frame->mctx.tramp; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1394 | } |
| 1395 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1396 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 1397 | tm_mctx = &frame->mctx_transact; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1398 | if (MSR_TM_ACTIVE(regs->msr)) { |
| 1399 | if (save_tm_user_regs(regs, &frame->mctx, &frame->mctx_transact, |
| 1400 | sigret)) |
| 1401 | goto badframe; |
| 1402 | } |
| 1403 | else |
| 1404 | #endif |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 1405 | { |
| 1406 | if (save_user_regs(regs, &frame->mctx, tm_mctx, sigret, 1)) |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1407 | goto badframe; |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 1408 | } |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1409 | |
| 1410 | regs->link = tramp; |
| 1411 | |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 1412 | tsk->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */ |
Paul Mackerras | cc657f5 | 2005-11-14 21:55:15 +1100 | [diff] [blame] | 1413 | |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 1414 | /* create a stack frame for the caller of the handler */ |
| 1415 | newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1416 | if (put_user(regs->gpr[1], (u32 __user *)newsp)) |
| 1417 | goto badframe; |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 1418 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1419 | regs->gpr[1] = newsp; |
Richard Weinberger | 129b69d | 2014-03-02 14:46:11 +0100 | [diff] [blame] | 1420 | regs->gpr[3] = ksig->sig; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1421 | regs->gpr[4] = (unsigned long) sc; |
Richard Weinberger | 129b69d | 2014-03-02 14:46:11 +0100 | [diff] [blame] | 1422 | regs->nip = (unsigned long) (unsigned long)ksig->ka.sa.sa_handler; |
Paul Mackerras | fab5db9 | 2006-06-07 16:14:40 +1000 | [diff] [blame] | 1423 | /* enter the signal handler in big-endian mode */ |
| 1424 | regs->msr &= ~MSR_LE; |
Richard Weinberger | 129b69d | 2014-03-02 14:46:11 +0100 | [diff] [blame] | 1425 | return 0; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1426 | |
| 1427 | badframe: |
Christian Dietrich | 7646223 | 2011-06-04 05:36:54 +0000 | [diff] [blame] | 1428 | if (show_unhandled_signals) |
| 1429 | printk_ratelimited(KERN_INFO |
| 1430 | "%s[%d]: bad frame in handle_signal32: " |
| 1431 | "%p nip %08lx lr %08lx\n", |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 1432 | tsk->comm, tsk->pid, |
Christian Dietrich | 7646223 | 2011-06-04 05:36:54 +0000 | [diff] [blame] | 1433 | frame, regs->nip, regs->link); |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 1434 | |
Richard Weinberger | 129b69d | 2014-03-02 14:46:11 +0100 | [diff] [blame] | 1435 | return 1; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1436 | } |
| 1437 | |
| 1438 | /* |
| 1439 | * Do a signal return; undo the signal stack. |
| 1440 | */ |
Al Viro | f367564 | 2018-05-02 23:20:47 +1000 | [diff] [blame] | 1441 | #ifdef CONFIG_PPC64 |
| 1442 | COMPAT_SYSCALL_DEFINE0(sigreturn) |
| 1443 | #else |
| 1444 | SYSCALL_DEFINE0(sigreturn) |
| 1445 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1446 | { |
Al Viro | f367564 | 2018-05-02 23:20:47 +1000 | [diff] [blame] | 1447 | struct pt_regs *regs = current_pt_regs(); |
Michael Neuling | fee55450 | 2013-06-09 21:23:16 +1000 | [diff] [blame] | 1448 | struct sigframe __user *sf; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1449 | struct sigcontext __user *sc; |
| 1450 | struct sigcontext sigctx; |
| 1451 | struct mcontext __user *sr; |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 1452 | void __user *addr; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1453 | sigset_t set; |
Michael Neuling | fee55450 | 2013-06-09 21:23:16 +1000 | [diff] [blame] | 1454 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1455 | struct mcontext __user *mcp, *tm_mcp; |
| 1456 | unsigned long msr_hi; |
| 1457 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1458 | |
| 1459 | /* Always make any pending restarted system calls return -EINTR */ |
Andy Lutomirski | f56141e | 2015-02-12 15:01:14 -0800 | [diff] [blame] | 1460 | current->restart_block.fn = do_no_restart_syscall; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1461 | |
Michael Neuling | fee55450 | 2013-06-09 21:23:16 +1000 | [diff] [blame] | 1462 | sf = (struct sigframe __user *)(regs->gpr[1] + __SIGNAL_FRAMESIZE); |
| 1463 | sc = &sf->sctx; |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 1464 | addr = sc; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1465 | if (copy_from_user(&sigctx, sc, sizeof(sigctx))) |
| 1466 | goto badframe; |
| 1467 | |
| 1468 | #ifdef CONFIG_PPC64 |
| 1469 | /* |
| 1470 | * Note that PPC32 puts the upper 32 bits of the sigmask in the |
| 1471 | * unused part of the signal stackframe |
| 1472 | */ |
| 1473 | set.sig[0] = sigctx.oldmask + ((long)(sigctx._unused[3]) << 32); |
| 1474 | #else |
| 1475 | set.sig[0] = sigctx.oldmask; |
| 1476 | set.sig[1] = sigctx._unused[3]; |
| 1477 | #endif |
Al Viro | 17440f1 | 2012-04-27 14:09:19 -0400 | [diff] [blame] | 1478 | set_current_blocked(&set); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1479 | |
Michael Neuling | fee55450 | 2013-06-09 21:23:16 +1000 | [diff] [blame] | 1480 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1481 | mcp = (struct mcontext __user *)&sf->mctx; |
| 1482 | tm_mcp = (struct mcontext __user *)&sf->mctx_transact; |
| 1483 | if (__get_user(msr_hi, &tm_mcp->mc_gregs[PT_MSR])) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1484 | goto badframe; |
Michael Neuling | fee55450 | 2013-06-09 21:23:16 +1000 | [diff] [blame] | 1485 | if (MSR_TM_ACTIVE(msr_hi<<32)) { |
| 1486 | if (!cpu_has_feature(CPU_FTR_TM)) |
| 1487 | goto badframe; |
| 1488 | if (restore_tm_user_regs(regs, mcp, tm_mcp)) |
| 1489 | goto badframe; |
| 1490 | } else |
| 1491 | #endif |
| 1492 | { |
| 1493 | sr = (struct mcontext __user *)from_user_ptr(sigctx.regs); |
| 1494 | addr = sr; |
| 1495 | if (!access_ok(VERIFY_READ, sr, sizeof(*sr)) |
| 1496 | || restore_user_regs(regs, sr, 1)) |
| 1497 | goto badframe; |
| 1498 | } |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1499 | |
David Woodhouse | 401d1f0 | 2005-11-15 18:52:18 +0000 | [diff] [blame] | 1500 | set_thread_flag(TIF_RESTOREALL); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1501 | return 0; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1502 | |
| 1503 | badframe: |
Christian Dietrich | 7646223 | 2011-06-04 05:36:54 +0000 | [diff] [blame] | 1504 | if (show_unhandled_signals) |
| 1505 | printk_ratelimited(KERN_INFO |
| 1506 | "%s[%d]: bad frame in sys_sigreturn: " |
| 1507 | "%p nip %08lx lr %08lx\n", |
| 1508 | current->comm, current->pid, |
| 1509 | addr, regs->nip, regs->link); |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 1510 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1511 | force_sig(SIGSEGV, current); |
| 1512 | return 0; |
| 1513 | } |