Thomas Gleixner | 2874c5f | 2019-05-27 08:55:01 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Distributed Switch Architecture loopback driver |
| 4 | * |
| 5 | * Copyright (C) 2016, Florian Fainelli <f.fainelli@gmail.com> |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <linux/platform_device.h> |
| 9 | #include <linux/netdevice.h> |
| 10 | #include <linux/phy.h> |
| 11 | #include <linux/phy_fixed.h> |
| 12 | #include <linux/export.h> |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 13 | #include <linux/ethtool.h> |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 14 | #include <linux/workqueue.h> |
| 15 | #include <linux/module.h> |
| 16 | #include <linux/if_bridge.h> |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 17 | #include <net/dsa.h> |
| 18 | |
| 19 | #include "dsa_loop.h" |
| 20 | |
| 21 | struct dsa_loop_vlan { |
| 22 | u16 members; |
| 23 | u16 untagged; |
| 24 | }; |
| 25 | |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 26 | struct dsa_loop_mib_entry { |
| 27 | char name[ETH_GSTRING_LEN]; |
| 28 | unsigned long val; |
| 29 | }; |
| 30 | |
| 31 | enum dsa_loop_mib_counters { |
| 32 | DSA_LOOP_PHY_READ_OK, |
| 33 | DSA_LOOP_PHY_READ_ERR, |
| 34 | DSA_LOOP_PHY_WRITE_OK, |
| 35 | DSA_LOOP_PHY_WRITE_ERR, |
| 36 | __DSA_LOOP_CNT_MAX, |
| 37 | }; |
| 38 | |
| 39 | static struct dsa_loop_mib_entry dsa_loop_mibs[] = { |
| 40 | [DSA_LOOP_PHY_READ_OK] = { "phy_read_ok", }, |
| 41 | [DSA_LOOP_PHY_READ_ERR] = { "phy_read_err", }, |
| 42 | [DSA_LOOP_PHY_WRITE_OK] = { "phy_write_ok", }, |
| 43 | [DSA_LOOP_PHY_WRITE_ERR] = { "phy_write_err", }, |
| 44 | }; |
| 45 | |
| 46 | struct dsa_loop_port { |
| 47 | struct dsa_loop_mib_entry mib[__DSA_LOOP_CNT_MAX]; |
| 48 | }; |
| 49 | |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 50 | #define DSA_LOOP_VLANS 5 |
| 51 | |
| 52 | struct dsa_loop_priv { |
| 53 | struct mii_bus *bus; |
| 54 | unsigned int port_base; |
| 55 | struct dsa_loop_vlan vlans[DSA_LOOP_VLANS]; |
| 56 | struct net_device *netdev; |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 57 | struct dsa_loop_port ports[DSA_MAX_PORTS]; |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 58 | u16 pvid; |
| 59 | }; |
| 60 | |
| 61 | static struct phy_device *phydevs[PHY_MAX_ADDR]; |
| 62 | |
Florian Fainelli | 5ed4e3e | 2017-11-10 15:22:52 -0800 | [diff] [blame] | 63 | static enum dsa_tag_protocol dsa_loop_get_protocol(struct dsa_switch *ds, |
| 64 | int port) |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 65 | { |
Florian Fainelli | e52cde7 | 2018-05-24 20:52:14 -0700 | [diff] [blame] | 66 | dev_dbg(ds->dev, "%s: port: %d\n", __func__, port); |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 67 | |
| 68 | return DSA_TAG_PROTO_NONE; |
| 69 | } |
| 70 | |
| 71 | static int dsa_loop_setup(struct dsa_switch *ds) |
| 72 | { |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 73 | struct dsa_loop_priv *ps = ds->priv; |
| 74 | unsigned int i; |
| 75 | |
| 76 | for (i = 0; i < ds->num_ports; i++) |
| 77 | memcpy(ps->ports[i].mib, dsa_loop_mibs, |
| 78 | sizeof(dsa_loop_mibs)); |
| 79 | |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 80 | dev_dbg(ds->dev, "%s\n", __func__); |
| 81 | |
| 82 | return 0; |
| 83 | } |
| 84 | |
Florian Fainelli | 89f0904 | 2018-04-25 12:12:50 -0700 | [diff] [blame] | 85 | static int dsa_loop_get_sset_count(struct dsa_switch *ds, int port, int sset) |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 86 | { |
Florian Fainelli | 96cbddc | 2018-04-25 12:12:54 -0700 | [diff] [blame] | 87 | if (sset != ETH_SS_STATS && sset != ETH_SS_PHY_STATS) |
Florian Fainelli | 89f0904 | 2018-04-25 12:12:50 -0700 | [diff] [blame] | 88 | return 0; |
| 89 | |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 90 | return __DSA_LOOP_CNT_MAX; |
| 91 | } |
| 92 | |
Florian Fainelli | 89f0904 | 2018-04-25 12:12:50 -0700 | [diff] [blame] | 93 | static void dsa_loop_get_strings(struct dsa_switch *ds, int port, |
| 94 | u32 stringset, uint8_t *data) |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 95 | { |
| 96 | struct dsa_loop_priv *ps = ds->priv; |
| 97 | unsigned int i; |
| 98 | |
Florian Fainelli | 96cbddc | 2018-04-25 12:12:54 -0700 | [diff] [blame] | 99 | if (stringset != ETH_SS_STATS && stringset != ETH_SS_PHY_STATS) |
Florian Fainelli | 89f0904 | 2018-04-25 12:12:50 -0700 | [diff] [blame] | 100 | return; |
| 101 | |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 102 | for (i = 0; i < __DSA_LOOP_CNT_MAX; i++) |
| 103 | memcpy(data + i * ETH_GSTRING_LEN, |
| 104 | ps->ports[port].mib[i].name, ETH_GSTRING_LEN); |
| 105 | } |
| 106 | |
| 107 | static void dsa_loop_get_ethtool_stats(struct dsa_switch *ds, int port, |
| 108 | uint64_t *data) |
| 109 | { |
| 110 | struct dsa_loop_priv *ps = ds->priv; |
| 111 | unsigned int i; |
| 112 | |
| 113 | for (i = 0; i < __DSA_LOOP_CNT_MAX; i++) |
| 114 | data[i] = ps->ports[port].mib[i].val; |
| 115 | } |
| 116 | |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 117 | static int dsa_loop_phy_read(struct dsa_switch *ds, int port, int regnum) |
| 118 | { |
| 119 | struct dsa_loop_priv *ps = ds->priv; |
| 120 | struct mii_bus *bus = ps->bus; |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 121 | int ret; |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 122 | |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 123 | ret = mdiobus_read_nested(bus, ps->port_base + port, regnum); |
| 124 | if (ret < 0) |
| 125 | ps->ports[port].mib[DSA_LOOP_PHY_READ_ERR].val++; |
| 126 | else |
| 127 | ps->ports[port].mib[DSA_LOOP_PHY_READ_OK].val++; |
| 128 | |
| 129 | return ret; |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 130 | } |
| 131 | |
| 132 | static int dsa_loop_phy_write(struct dsa_switch *ds, int port, |
| 133 | int regnum, u16 value) |
| 134 | { |
| 135 | struct dsa_loop_priv *ps = ds->priv; |
| 136 | struct mii_bus *bus = ps->bus; |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 137 | int ret; |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 138 | |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 139 | ret = mdiobus_write_nested(bus, ps->port_base + port, regnum, value); |
| 140 | if (ret < 0) |
| 141 | ps->ports[port].mib[DSA_LOOP_PHY_WRITE_ERR].val++; |
| 142 | else |
| 143 | ps->ports[port].mib[DSA_LOOP_PHY_WRITE_OK].val++; |
| 144 | |
| 145 | return ret; |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 146 | } |
| 147 | |
| 148 | static int dsa_loop_port_bridge_join(struct dsa_switch *ds, int port, |
| 149 | struct net_device *bridge) |
| 150 | { |
Florian Fainelli | e52cde7 | 2018-05-24 20:52:14 -0700 | [diff] [blame] | 151 | dev_dbg(ds->dev, "%s: port: %d, bridge: %s\n", |
| 152 | __func__, port, bridge->name); |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 153 | |
| 154 | return 0; |
| 155 | } |
| 156 | |
| 157 | static void dsa_loop_port_bridge_leave(struct dsa_switch *ds, int port, |
| 158 | struct net_device *bridge) |
| 159 | { |
Florian Fainelli | e52cde7 | 2018-05-24 20:52:14 -0700 | [diff] [blame] | 160 | dev_dbg(ds->dev, "%s: port: %d, bridge: %s\n", |
| 161 | __func__, port, bridge->name); |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 162 | } |
| 163 | |
| 164 | static void dsa_loop_port_stp_state_set(struct dsa_switch *ds, int port, |
| 165 | u8 state) |
| 166 | { |
Florian Fainelli | e52cde7 | 2018-05-24 20:52:14 -0700 | [diff] [blame] | 167 | dev_dbg(ds->dev, "%s: port: %d, state: %d\n", |
| 168 | __func__, port, state); |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 169 | } |
| 170 | |
| 171 | static int dsa_loop_port_vlan_filtering(struct dsa_switch *ds, int port, |
| 172 | bool vlan_filtering) |
| 173 | { |
Florian Fainelli | e52cde7 | 2018-05-24 20:52:14 -0700 | [diff] [blame] | 174 | dev_dbg(ds->dev, "%s: port: %d, vlan_filtering: %d\n", |
| 175 | __func__, port, vlan_filtering); |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 176 | |
| 177 | return 0; |
| 178 | } |
| 179 | |
Vivien Didelot | 80e0236 | 2017-11-30 11:23:57 -0500 | [diff] [blame] | 180 | static int |
| 181 | dsa_loop_port_vlan_prepare(struct dsa_switch *ds, int port, |
| 182 | const struct switchdev_obj_port_vlan *vlan) |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 183 | { |
| 184 | struct dsa_loop_priv *ps = ds->priv; |
| 185 | struct mii_bus *bus = ps->bus; |
| 186 | |
Florian Fainelli | e52cde7 | 2018-05-24 20:52:14 -0700 | [diff] [blame] | 187 | dev_dbg(ds->dev, "%s: port: %d, vlan: %d-%d", |
| 188 | __func__, port, vlan->vid_begin, vlan->vid_end); |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 189 | |
| 190 | /* Just do a sleeping operation to make lockdep checks effective */ |
| 191 | mdiobus_read(bus, ps->port_base + port, MII_BMSR); |
| 192 | |
| 193 | if (vlan->vid_end > DSA_LOOP_VLANS) |
| 194 | return -ERANGE; |
| 195 | |
| 196 | return 0; |
| 197 | } |
| 198 | |
| 199 | static void dsa_loop_port_vlan_add(struct dsa_switch *ds, int port, |
Vivien Didelot | 80e0236 | 2017-11-30 11:23:57 -0500 | [diff] [blame] | 200 | const struct switchdev_obj_port_vlan *vlan) |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 201 | { |
| 202 | bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; |
| 203 | bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID; |
| 204 | struct dsa_loop_priv *ps = ds->priv; |
| 205 | struct mii_bus *bus = ps->bus; |
| 206 | struct dsa_loop_vlan *vl; |
| 207 | u16 vid; |
| 208 | |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 209 | /* Just do a sleeping operation to make lockdep checks effective */ |
| 210 | mdiobus_read(bus, ps->port_base + port, MII_BMSR); |
| 211 | |
| 212 | for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) { |
| 213 | vl = &ps->vlans[vid]; |
| 214 | |
| 215 | vl->members |= BIT(port); |
| 216 | if (untagged) |
| 217 | vl->untagged |= BIT(port); |
| 218 | else |
| 219 | vl->untagged &= ~BIT(port); |
Florian Fainelli | e52cde7 | 2018-05-24 20:52:14 -0700 | [diff] [blame] | 220 | |
| 221 | dev_dbg(ds->dev, "%s: port: %d vlan: %d, %stagged, pvid: %d\n", |
| 222 | __func__, port, vid, untagged ? "un" : "", pvid); |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 223 | } |
| 224 | |
| 225 | if (pvid) |
| 226 | ps->pvid = vid; |
| 227 | } |
| 228 | |
| 229 | static int dsa_loop_port_vlan_del(struct dsa_switch *ds, int port, |
| 230 | const struct switchdev_obj_port_vlan *vlan) |
| 231 | { |
| 232 | bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; |
| 233 | struct dsa_loop_priv *ps = ds->priv; |
| 234 | struct mii_bus *bus = ps->bus; |
| 235 | struct dsa_loop_vlan *vl; |
Florian Fainelli | 5865ccc | 2017-04-05 11:19:30 -0700 | [diff] [blame] | 236 | u16 vid, pvid = ps->pvid; |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 237 | |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 238 | /* Just do a sleeping operation to make lockdep checks effective */ |
| 239 | mdiobus_read(bus, ps->port_base + port, MII_BMSR); |
| 240 | |
| 241 | for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) { |
| 242 | vl = &ps->vlans[vid]; |
| 243 | |
| 244 | vl->members &= ~BIT(port); |
| 245 | if (untagged) |
| 246 | vl->untagged &= ~BIT(port); |
| 247 | |
| 248 | if (pvid == vid) |
| 249 | pvid = 1; |
Florian Fainelli | e52cde7 | 2018-05-24 20:52:14 -0700 | [diff] [blame] | 250 | |
| 251 | dev_dbg(ds->dev, "%s: port: %d vlan: %d, %stagged, pvid: %d\n", |
| 252 | __func__, port, vid, untagged ? "un" : "", pvid); |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 253 | } |
| 254 | ps->pvid = pvid; |
| 255 | |
| 256 | return 0; |
| 257 | } |
| 258 | |
Bhumika Goyal | d78d677 | 2017-08-09 10:34:15 +0530 | [diff] [blame] | 259 | static const struct dsa_switch_ops dsa_loop_driver = { |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 260 | .get_tag_protocol = dsa_loop_get_protocol, |
| 261 | .setup = dsa_loop_setup, |
Florian Fainelli | 484c017 | 2017-06-15 10:15:53 -0700 | [diff] [blame] | 262 | .get_strings = dsa_loop_get_strings, |
| 263 | .get_ethtool_stats = dsa_loop_get_ethtool_stats, |
| 264 | .get_sset_count = dsa_loop_get_sset_count, |
Florian Fainelli | 96cbddc | 2018-04-25 12:12:54 -0700 | [diff] [blame] | 265 | .get_ethtool_phy_stats = dsa_loop_get_ethtool_stats, |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 266 | .phy_read = dsa_loop_phy_read, |
| 267 | .phy_write = dsa_loop_phy_write, |
| 268 | .port_bridge_join = dsa_loop_port_bridge_join, |
| 269 | .port_bridge_leave = dsa_loop_port_bridge_leave, |
| 270 | .port_stp_state_set = dsa_loop_port_stp_state_set, |
| 271 | .port_vlan_filtering = dsa_loop_port_vlan_filtering, |
| 272 | .port_vlan_prepare = dsa_loop_port_vlan_prepare, |
| 273 | .port_vlan_add = dsa_loop_port_vlan_add, |
| 274 | .port_vlan_del = dsa_loop_port_vlan_del, |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 275 | }; |
| 276 | |
| 277 | static int dsa_loop_drv_probe(struct mdio_device *mdiodev) |
| 278 | { |
| 279 | struct dsa_loop_pdata *pdata = mdiodev->dev.platform_data; |
| 280 | struct dsa_loop_priv *ps; |
| 281 | struct dsa_switch *ds; |
| 282 | |
| 283 | if (!pdata) |
| 284 | return -ENODEV; |
| 285 | |
| 286 | dev_info(&mdiodev->dev, "%s: 0x%0x\n", |
| 287 | pdata->name, pdata->enabled_ports); |
| 288 | |
| 289 | ds = dsa_switch_alloc(&mdiodev->dev, DSA_MAX_PORTS); |
| 290 | if (!ds) |
| 291 | return -ENOMEM; |
| 292 | |
| 293 | ps = devm_kzalloc(&mdiodev->dev, sizeof(*ps), GFP_KERNEL); |
Christophe Jaillet | 8ce7aaa | 2017-05-06 07:29:45 +0200 | [diff] [blame] | 294 | if (!ps) |
| 295 | return -ENOMEM; |
| 296 | |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 297 | ps->netdev = dev_get_by_name(&init_net, pdata->netdev); |
| 298 | if (!ps->netdev) |
| 299 | return -EPROBE_DEFER; |
| 300 | |
| 301 | pdata->cd.netdev[DSA_LOOP_CPU_PORT] = &ps->netdev->dev; |
| 302 | |
| 303 | ds->dev = &mdiodev->dev; |
| 304 | ds->ops = &dsa_loop_driver; |
| 305 | ds->priv = ps; |
| 306 | ps->bus = mdiodev->bus; |
| 307 | |
| 308 | dev_set_drvdata(&mdiodev->dev, ds); |
| 309 | |
Vivien Didelot | 23c9ee4 | 2017-05-26 18:12:51 -0400 | [diff] [blame] | 310 | return dsa_register_switch(ds); |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 311 | } |
| 312 | |
| 313 | static void dsa_loop_drv_remove(struct mdio_device *mdiodev) |
| 314 | { |
| 315 | struct dsa_switch *ds = dev_get_drvdata(&mdiodev->dev); |
| 316 | struct dsa_loop_priv *ps = ds->priv; |
| 317 | |
| 318 | dsa_unregister_switch(ds); |
| 319 | dev_put(ps->netdev); |
| 320 | } |
| 321 | |
| 322 | static struct mdio_driver dsa_loop_drv = { |
| 323 | .mdiodrv.driver = { |
| 324 | .name = "dsa-loop", |
| 325 | }, |
| 326 | .probe = dsa_loop_drv_probe, |
| 327 | .remove = dsa_loop_drv_remove, |
| 328 | }; |
| 329 | |
| 330 | #define NUM_FIXED_PHYS (DSA_LOOP_NUM_PORTS - 2) |
| 331 | |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 332 | static int __init dsa_loop_init(void) |
| 333 | { |
| 334 | struct fixed_phy_status status = { |
| 335 | .link = 1, |
| 336 | .speed = SPEED_100, |
| 337 | .duplex = DUPLEX_FULL, |
| 338 | }; |
| 339 | unsigned int i; |
| 340 | |
| 341 | for (i = 0; i < NUM_FIXED_PHYS; i++) |
Linus Walleij | 5468e82 | 2019-02-04 11:26:18 +0100 | [diff] [blame] | 342 | phydevs[i] = fixed_phy_register(PHY_POLL, &status, NULL); |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 343 | |
| 344 | return mdio_driver_register(&dsa_loop_drv); |
| 345 | } |
| 346 | module_init(dsa_loop_init); |
| 347 | |
| 348 | static void __exit dsa_loop_exit(void) |
| 349 | { |
Florian Fainelli | 3407dc8 | 2017-06-15 10:15:52 -0700 | [diff] [blame] | 350 | unsigned int i; |
| 351 | |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 352 | mdio_driver_unregister(&dsa_loop_drv); |
Florian Fainelli | 3407dc8 | 2017-06-15 10:15:52 -0700 | [diff] [blame] | 353 | for (i = 0; i < NUM_FIXED_PHYS; i++) |
Florian Fainelli | 6d9c153 | 2017-09-02 08:56:45 -0700 | [diff] [blame] | 354 | if (!IS_ERR(phydevs[i])) |
Florian Fainelli | 3407dc8 | 2017-06-15 10:15:52 -0700 | [diff] [blame] | 355 | fixed_phy_unregister(phydevs[i]); |
Florian Fainelli | 98cd155 | 2017-03-30 18:43:21 -0700 | [diff] [blame] | 356 | } |
| 357 | module_exit(dsa_loop_exit); |
| 358 | |
| 359 | MODULE_LICENSE("GPL"); |
| 360 | MODULE_AUTHOR("Florian Fainelli"); |
| 361 | MODULE_DESCRIPTION("DSA loopback driver"); |