Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Thierry Reding | 5f60ed0 | 2013-02-28 08:08:01 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2013 NVIDIA Corporation |
Thierry Reding | 5f60ed0 | 2013-02-28 08:08:01 +0100 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef TEGRA_GR3D_H |
| 7 | #define TEGRA_GR3D_H |
| 8 | |
| 9 | #define GR3D_IDX_ATTRIBUTE(x) (0x100 + (x) * 2) |
| 10 | #define GR3D_IDX_INDEX_BASE 0x121 |
| 11 | #define GR3D_QR_ZTAG_ADDR 0x415 |
| 12 | #define GR3D_QR_CTAG_ADDR 0x417 |
| 13 | #define GR3D_QR_CZ_ADDR 0x419 |
| 14 | #define GR3D_TEX_TEX_ADDR(x) (0x710 + (x)) |
| 15 | #define GR3D_DW_MEMORY_OUTPUT_ADDRESS 0x904 |
| 16 | #define GR3D_GLOBAL_SURFADDR(x) (0xe00 + (x)) |
| 17 | #define GR3D_GLOBAL_SPILLSURFADDR 0xe2a |
| 18 | #define GR3D_GLOBAL_SURFOVERADDR(x) (0xe30 + (x)) |
| 19 | #define GR3D_GLOBAL_SAMP01SURFADDR(x) (0xe50 + (x)) |
| 20 | #define GR3D_GLOBAL_SAMP23SURFADDR(x) (0xe60 + (x)) |
| 21 | |
| 22 | #define GR3D_NUM_REGS 0xe88 |
| 23 | |
| 24 | #endif |