Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. |
| 4 | * http://www.samsung.com/ |
| 5 | * |
| 6 | * samsung - Common hr-timer support (s3c and s5p) |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <linux/interrupt.h> |
| 10 | #include <linux/irq.h> |
| 11 | #include <linux/err.h> |
| 12 | #include <linux/clk.h> |
| 13 | #include <linux/clockchips.h> |
| 14 | #include <linux/list.h> |
| 15 | #include <linux/module.h> |
| 16 | #include <linux/of.h> |
| 17 | #include <linux/of_address.h> |
| 18 | #include <linux/of_irq.h> |
| 19 | #include <linux/platform_device.h> |
| 20 | #include <linux/slab.h> |
Stephen Boyd | 38ff87f | 2013-06-01 23:39:40 -0700 | [diff] [blame] | 21 | #include <linux/sched_clock.h> |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 22 | |
| 23 | #include <clocksource/samsung_pwm.h> |
| 24 | |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 25 | |
| 26 | /* |
| 27 | * Clocksource driver |
| 28 | */ |
| 29 | |
| 30 | #define REG_TCFG0 0x00 |
| 31 | #define REG_TCFG1 0x04 |
| 32 | #define REG_TCON 0x08 |
| 33 | #define REG_TINT_CSTAT 0x44 |
| 34 | |
| 35 | #define REG_TCNTB(chan) (0x0c + 12 * (chan)) |
| 36 | #define REG_TCMPB(chan) (0x10 + 12 * (chan)) |
| 37 | |
| 38 | #define TCFG0_PRESCALER_MASK 0xff |
| 39 | #define TCFG0_PRESCALER1_SHIFT 8 |
| 40 | |
| 41 | #define TCFG1_SHIFT(x) ((x) * 4) |
| 42 | #define TCFG1_MUX_MASK 0xf |
| 43 | |
Tomasz Figa | ceea124 | 2013-06-17 02:10:24 +0200 | [diff] [blame] | 44 | /* |
| 45 | * Each channel occupies 4 bits in TCON register, but there is a gap of 4 |
| 46 | * bits (one channel) after channel 0, so channels have different numbering |
| 47 | * when accessing TCON register. |
| 48 | * |
| 49 | * In addition, the location of autoreload bit for channel 4 (TCON channel 5) |
| 50 | * in its set of bits is 2 as opposed to 3 for other channels. |
| 51 | */ |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 52 | #define TCON_START(chan) (1 << (4 * (chan) + 0)) |
| 53 | #define TCON_MANUALUPDATE(chan) (1 << (4 * (chan) + 1)) |
| 54 | #define TCON_INVERT(chan) (1 << (4 * (chan) + 2)) |
Tomasz Figa | ceea124 | 2013-06-17 02:10:24 +0200 | [diff] [blame] | 55 | #define _TCON_AUTORELOAD(chan) (1 << (4 * (chan) + 3)) |
| 56 | #define _TCON_AUTORELOAD4(chan) (1 << (4 * (chan) + 2)) |
| 57 | #define TCON_AUTORELOAD(chan) \ |
| 58 | ((chan < 5) ? _TCON_AUTORELOAD(chan) : _TCON_AUTORELOAD4(chan)) |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 59 | |
Tomasz Figa | 7aac482 | 2013-04-23 17:46:24 +0200 | [diff] [blame] | 60 | DEFINE_SPINLOCK(samsung_pwm_lock); |
| 61 | EXPORT_SYMBOL(samsung_pwm_lock); |
| 62 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 63 | struct samsung_pwm_clocksource { |
| 64 | void __iomem *base; |
Tomasz Figa | 61d7e20 | 2013-06-17 00:07:03 +0200 | [diff] [blame] | 65 | void __iomem *source_reg; |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 66 | unsigned int irq[SAMSUNG_PWM_NUM]; |
| 67 | struct samsung_pwm_variant variant; |
| 68 | |
| 69 | struct clk *timerclk; |
| 70 | |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 71 | unsigned int event_id; |
| 72 | unsigned int source_id; |
| 73 | unsigned int tcnt_max; |
| 74 | unsigned int tscaler_div; |
| 75 | unsigned int tdiv; |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 76 | |
| 77 | unsigned long clock_count_per_tick; |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 78 | }; |
| 79 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 80 | static struct samsung_pwm_clocksource pwm; |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 81 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 82 | static void samsung_timer_set_prescale(unsigned int channel, u16 prescale) |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 83 | { |
| 84 | unsigned long flags; |
| 85 | u8 shift = 0; |
| 86 | u32 reg; |
| 87 | |
| 88 | if (channel >= 2) |
| 89 | shift = TCFG0_PRESCALER1_SHIFT; |
| 90 | |
Tomasz Figa | 7aac482 | 2013-04-23 17:46:24 +0200 | [diff] [blame] | 91 | spin_lock_irqsave(&samsung_pwm_lock, flags); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 92 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 93 | reg = readl(pwm.base + REG_TCFG0); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 94 | reg &= ~(TCFG0_PRESCALER_MASK << shift); |
| 95 | reg |= (prescale - 1) << shift; |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 96 | writel(reg, pwm.base + REG_TCFG0); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 97 | |
Tomasz Figa | 7aac482 | 2013-04-23 17:46:24 +0200 | [diff] [blame] | 98 | spin_unlock_irqrestore(&samsung_pwm_lock, flags); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 99 | } |
| 100 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 101 | static void samsung_timer_set_divisor(unsigned int channel, u8 divisor) |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 102 | { |
| 103 | u8 shift = TCFG1_SHIFT(channel); |
| 104 | unsigned long flags; |
| 105 | u32 reg; |
| 106 | u8 bits; |
| 107 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 108 | bits = (fls(divisor) - 1) - pwm.variant.div_base; |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 109 | |
Tomasz Figa | 7aac482 | 2013-04-23 17:46:24 +0200 | [diff] [blame] | 110 | spin_lock_irqsave(&samsung_pwm_lock, flags); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 111 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 112 | reg = readl(pwm.base + REG_TCFG1); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 113 | reg &= ~(TCFG1_MUX_MASK << shift); |
| 114 | reg |= bits << shift; |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 115 | writel(reg, pwm.base + REG_TCFG1); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 116 | |
Tomasz Figa | 7aac482 | 2013-04-23 17:46:24 +0200 | [diff] [blame] | 117 | spin_unlock_irqrestore(&samsung_pwm_lock, flags); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 118 | } |
| 119 | |
| 120 | static void samsung_time_stop(unsigned int channel) |
| 121 | { |
| 122 | unsigned long tcon; |
| 123 | unsigned long flags; |
| 124 | |
| 125 | if (channel > 0) |
| 126 | ++channel; |
| 127 | |
Tomasz Figa | 7aac482 | 2013-04-23 17:46:24 +0200 | [diff] [blame] | 128 | spin_lock_irqsave(&samsung_pwm_lock, flags); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 129 | |
Matthew Leach | 7cc0617 | 2016-06-16 15:51:29 +0200 | [diff] [blame] | 130 | tcon = readl_relaxed(pwm.base + REG_TCON); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 131 | tcon &= ~TCON_START(channel); |
Matthew Leach | 7cc0617 | 2016-06-16 15:51:29 +0200 | [diff] [blame] | 132 | writel_relaxed(tcon, pwm.base + REG_TCON); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 133 | |
Tomasz Figa | 7aac482 | 2013-04-23 17:46:24 +0200 | [diff] [blame] | 134 | spin_unlock_irqrestore(&samsung_pwm_lock, flags); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 135 | } |
| 136 | |
| 137 | static void samsung_time_setup(unsigned int channel, unsigned long tcnt) |
| 138 | { |
| 139 | unsigned long tcon; |
| 140 | unsigned long flags; |
| 141 | unsigned int tcon_chan = channel; |
| 142 | |
| 143 | if (tcon_chan > 0) |
| 144 | ++tcon_chan; |
| 145 | |
Tomasz Figa | 7aac482 | 2013-04-23 17:46:24 +0200 | [diff] [blame] | 146 | spin_lock_irqsave(&samsung_pwm_lock, flags); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 147 | |
Matthew Leach | 7cc0617 | 2016-06-16 15:51:29 +0200 | [diff] [blame] | 148 | tcon = readl_relaxed(pwm.base + REG_TCON); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 149 | |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 150 | tcon &= ~(TCON_START(tcon_chan) | TCON_AUTORELOAD(tcon_chan)); |
| 151 | tcon |= TCON_MANUALUPDATE(tcon_chan); |
| 152 | |
Matthew Leach | 7cc0617 | 2016-06-16 15:51:29 +0200 | [diff] [blame] | 153 | writel_relaxed(tcnt, pwm.base + REG_TCNTB(channel)); |
| 154 | writel_relaxed(tcnt, pwm.base + REG_TCMPB(channel)); |
| 155 | writel_relaxed(tcon, pwm.base + REG_TCON); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 156 | |
Tomasz Figa | 7aac482 | 2013-04-23 17:46:24 +0200 | [diff] [blame] | 157 | spin_unlock_irqrestore(&samsung_pwm_lock, flags); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 158 | } |
| 159 | |
| 160 | static void samsung_time_start(unsigned int channel, bool periodic) |
| 161 | { |
| 162 | unsigned long tcon; |
| 163 | unsigned long flags; |
| 164 | |
| 165 | if (channel > 0) |
| 166 | ++channel; |
| 167 | |
Tomasz Figa | 7aac482 | 2013-04-23 17:46:24 +0200 | [diff] [blame] | 168 | spin_lock_irqsave(&samsung_pwm_lock, flags); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 169 | |
Matthew Leach | 7cc0617 | 2016-06-16 15:51:29 +0200 | [diff] [blame] | 170 | tcon = readl_relaxed(pwm.base + REG_TCON); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 171 | |
| 172 | tcon &= ~TCON_MANUALUPDATE(channel); |
| 173 | tcon |= TCON_START(channel); |
| 174 | |
| 175 | if (periodic) |
| 176 | tcon |= TCON_AUTORELOAD(channel); |
| 177 | else |
| 178 | tcon &= ~TCON_AUTORELOAD(channel); |
| 179 | |
Matthew Leach | 7cc0617 | 2016-06-16 15:51:29 +0200 | [diff] [blame] | 180 | writel_relaxed(tcon, pwm.base + REG_TCON); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 181 | |
Tomasz Figa | 7aac482 | 2013-04-23 17:46:24 +0200 | [diff] [blame] | 182 | spin_unlock_irqrestore(&samsung_pwm_lock, flags); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 183 | } |
| 184 | |
| 185 | static int samsung_set_next_event(unsigned long cycles, |
| 186 | struct clock_event_device *evt) |
| 187 | { |
Tomasz Figa | 81d4f7b | 2013-04-23 17:46:30 +0200 | [diff] [blame] | 188 | /* |
| 189 | * This check is needed to account for internal rounding |
| 190 | * errors inside clockevents core, which might result in |
| 191 | * passing cycles = 0, which in turn would not generate any |
| 192 | * timer interrupt and hang the system. |
| 193 | * |
| 194 | * Another solution would be to set up the clockevent device |
| 195 | * with min_delta = 2, but this would unnecessarily increase |
| 196 | * the minimum sleep period. |
| 197 | */ |
| 198 | if (!cycles) |
| 199 | cycles = 1; |
| 200 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 201 | samsung_time_setup(pwm.event_id, cycles); |
| 202 | samsung_time_start(pwm.event_id, false); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 203 | |
| 204 | return 0; |
| 205 | } |
| 206 | |
Viresh Kumar | b49b570 | 2015-06-18 16:24:33 +0530 | [diff] [blame] | 207 | static int samsung_shutdown(struct clock_event_device *evt) |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 208 | { |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 209 | samsung_time_stop(pwm.event_id); |
Viresh Kumar | b49b570 | 2015-06-18 16:24:33 +0530 | [diff] [blame] | 210 | return 0; |
| 211 | } |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 212 | |
Viresh Kumar | b49b570 | 2015-06-18 16:24:33 +0530 | [diff] [blame] | 213 | static int samsung_set_periodic(struct clock_event_device *evt) |
| 214 | { |
| 215 | samsung_time_stop(pwm.event_id); |
| 216 | samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick - 1); |
| 217 | samsung_time_start(pwm.event_id, true); |
| 218 | return 0; |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 219 | } |
| 220 | |
Tomasz Figa | 0b96258 | 2013-06-17 01:11:31 +0200 | [diff] [blame] | 221 | static void samsung_clockevent_resume(struct clock_event_device *cev) |
| 222 | { |
| 223 | samsung_timer_set_prescale(pwm.event_id, pwm.tscaler_div); |
| 224 | samsung_timer_set_divisor(pwm.event_id, pwm.tdiv); |
| 225 | |
| 226 | if (pwm.variant.has_tint_cstat) { |
| 227 | u32 mask = (1 << pwm.event_id); |
| 228 | writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT); |
| 229 | } |
| 230 | } |
| 231 | |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 232 | static struct clock_event_device time_event_device = { |
Viresh Kumar | b49b570 | 2015-06-18 16:24:33 +0530 | [diff] [blame] | 233 | .name = "samsung_event_timer", |
| 234 | .features = CLOCK_EVT_FEAT_PERIODIC | |
| 235 | CLOCK_EVT_FEAT_ONESHOT, |
| 236 | .rating = 200, |
| 237 | .set_next_event = samsung_set_next_event, |
| 238 | .set_state_shutdown = samsung_shutdown, |
| 239 | .set_state_periodic = samsung_set_periodic, |
| 240 | .set_state_oneshot = samsung_shutdown, |
| 241 | .tick_resume = samsung_shutdown, |
| 242 | .resume = samsung_clockevent_resume, |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 243 | }; |
| 244 | |
| 245 | static irqreturn_t samsung_clock_event_isr(int irq, void *dev_id) |
| 246 | { |
| 247 | struct clock_event_device *evt = dev_id; |
| 248 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 249 | if (pwm.variant.has_tint_cstat) { |
| 250 | u32 mask = (1 << pwm.event_id); |
| 251 | writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 252 | } |
| 253 | |
| 254 | evt->event_handler(evt); |
| 255 | |
| 256 | return IRQ_HANDLED; |
| 257 | } |
| 258 | |
| 259 | static struct irqaction samsung_clock_event_irq = { |
| 260 | .name = "samsung_time_irq", |
Michael Opdenacker | 38c30a8 | 2013-12-09 10:12:10 +0100 | [diff] [blame] | 261 | .flags = IRQF_TIMER | IRQF_IRQPOLL, |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 262 | .handler = samsung_clock_event_isr, |
| 263 | .dev_id = &time_event_device, |
| 264 | }; |
| 265 | |
| 266 | static void __init samsung_clockevent_init(void) |
| 267 | { |
| 268 | unsigned long pclk; |
| 269 | unsigned long clock_rate; |
| 270 | unsigned int irq_number; |
| 271 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 272 | pclk = clk_get_rate(pwm.timerclk); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 273 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 274 | samsung_timer_set_prescale(pwm.event_id, pwm.tscaler_div); |
| 275 | samsung_timer_set_divisor(pwm.event_id, pwm.tdiv); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 276 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 277 | clock_rate = pclk / (pwm.tscaler_div * pwm.tdiv); |
| 278 | pwm.clock_count_per_tick = clock_rate / HZ; |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 279 | |
| 280 | time_event_device.cpumask = cpumask_of(0); |
Tomasz Figa | e9b852b | 2013-04-23 17:46:28 +0200 | [diff] [blame] | 281 | clockevents_config_and_register(&time_event_device, |
| 282 | clock_rate, 1, pwm.tcnt_max); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 283 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 284 | irq_number = pwm.irq[pwm.event_id]; |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 285 | setup_irq(irq_number, &samsung_clock_event_irq); |
| 286 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 287 | if (pwm.variant.has_tint_cstat) { |
| 288 | u32 mask = (1 << pwm.event_id); |
| 289 | writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 290 | } |
| 291 | } |
| 292 | |
Tomasz Figa | 0b96258 | 2013-06-17 01:11:31 +0200 | [diff] [blame] | 293 | static void samsung_clocksource_suspend(struct clocksource *cs) |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 294 | { |
Tomasz Figa | 0b96258 | 2013-06-17 01:11:31 +0200 | [diff] [blame] | 295 | samsung_time_stop(pwm.source_id); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 296 | } |
| 297 | |
Tomasz Figa | 0b96258 | 2013-06-17 01:11:31 +0200 | [diff] [blame] | 298 | static void samsung_clocksource_resume(struct clocksource *cs) |
| 299 | { |
| 300 | samsung_timer_set_prescale(pwm.source_id, pwm.tscaler_div); |
| 301 | samsung_timer_set_divisor(pwm.source_id, pwm.tdiv); |
| 302 | |
| 303 | samsung_time_setup(pwm.source_id, pwm.tcnt_max); |
| 304 | samsung_time_start(pwm.source_id, true); |
| 305 | } |
| 306 | |
Thomas Gleixner | a5a1d1c | 2016-12-21 20:32:01 +0100 | [diff] [blame] | 307 | static u64 notrace samsung_clocksource_read(struct clocksource *c) |
Tomasz Figa | 6792e63 | 2013-06-17 00:13:06 +0200 | [diff] [blame] | 308 | { |
| 309 | return ~readl_relaxed(pwm.source_reg); |
| 310 | } |
| 311 | |
| 312 | static struct clocksource samsung_clocksource = { |
| 313 | .name = "samsung_clocksource_timer", |
| 314 | .rating = 250, |
| 315 | .read = samsung_clocksource_read, |
Tomasz Figa | 0b96258 | 2013-06-17 01:11:31 +0200 | [diff] [blame] | 316 | .suspend = samsung_clocksource_suspend, |
| 317 | .resume = samsung_clocksource_resume, |
Tomasz Figa | 6792e63 | 2013-06-17 00:13:06 +0200 | [diff] [blame] | 318 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
| 319 | }; |
| 320 | |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 321 | /* |
| 322 | * Override the global weak sched_clock symbol with this |
| 323 | * local implementation which uses the clocksource to get some |
| 324 | * better resolution when scheduling the kernel. We accept that |
| 325 | * this wraps around for now, since it is just a relative time |
| 326 | * stamp. (Inspired by U300 implementation.) |
| 327 | */ |
Stephen Boyd | 2902b30 | 2013-07-18 16:21:25 -0700 | [diff] [blame] | 328 | static u64 notrace samsung_read_sched_clock(void) |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 329 | { |
Tomasz Figa | 6792e63 | 2013-06-17 00:13:06 +0200 | [diff] [blame] | 330 | return samsung_clocksource_read(NULL); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 331 | } |
| 332 | |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 333 | static int __init samsung_clocksource_init(void) |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 334 | { |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 335 | unsigned long pclk; |
| 336 | unsigned long clock_rate; |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 337 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 338 | pclk = clk_get_rate(pwm.timerclk); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 339 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 340 | samsung_timer_set_prescale(pwm.source_id, pwm.tscaler_div); |
| 341 | samsung_timer_set_divisor(pwm.source_id, pwm.tdiv); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 342 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 343 | clock_rate = pclk / (pwm.tscaler_div * pwm.tdiv); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 344 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 345 | samsung_time_setup(pwm.source_id, pwm.tcnt_max); |
| 346 | samsung_time_start(pwm.source_id, true); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 347 | |
Tomasz Figa | 61d7e20 | 2013-06-17 00:07:03 +0200 | [diff] [blame] | 348 | if (pwm.source_id == 4) |
| 349 | pwm.source_reg = pwm.base + 0x40; |
| 350 | else |
| 351 | pwm.source_reg = pwm.base + pwm.source_id * 0x0c + 0x14; |
| 352 | |
Stephen Boyd | 2902b30 | 2013-07-18 16:21:25 -0700 | [diff] [blame] | 353 | sched_clock_register(samsung_read_sched_clock, |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 354 | pwm.variant.bits, clock_rate); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 355 | |
Tomasz Figa | 6792e63 | 2013-06-17 00:13:06 +0200 | [diff] [blame] | 356 | samsung_clocksource.mask = CLOCKSOURCE_MASK(pwm.variant.bits); |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 357 | return clocksource_register_hz(&samsung_clocksource, clock_rate); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 358 | } |
| 359 | |
| 360 | static void __init samsung_timer_resources(void) |
| 361 | { |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 362 | clk_prepare_enable(pwm.timerclk); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 363 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 364 | pwm.tcnt_max = (1UL << pwm.variant.bits) - 1; |
| 365 | if (pwm.variant.bits == 16) { |
| 366 | pwm.tscaler_div = 25; |
| 367 | pwm.tdiv = 2; |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 368 | } else { |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 369 | pwm.tscaler_div = 2; |
| 370 | pwm.tdiv = 1; |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 371 | } |
| 372 | } |
| 373 | |
| 374 | /* |
| 375 | * PWM master driver |
| 376 | */ |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 377 | static int __init _samsung_pwm_clocksource_init(void) |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 378 | { |
| 379 | u8 mask; |
| 380 | int channel; |
| 381 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 382 | mask = ~pwm.variant.output_mask & ((1 << SAMSUNG_PWM_NUM) - 1); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 383 | channel = fls(mask) - 1; |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 384 | if (channel < 0) { |
Rafał Miłecki | ac9ce6d | 2017-03-09 10:47:10 +0100 | [diff] [blame] | 385 | pr_crit("failed to find PWM channel for clocksource\n"); |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 386 | return -EINVAL; |
| 387 | } |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 388 | pwm.source_id = channel; |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 389 | |
| 390 | mask &= ~(1 << channel); |
| 391 | channel = fls(mask) - 1; |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 392 | if (channel < 0) { |
Rafał Miłecki | ac9ce6d | 2017-03-09 10:47:10 +0100 | [diff] [blame] | 393 | pr_crit("failed to find PWM channel for clock event\n"); |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 394 | return -EINVAL; |
| 395 | } |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 396 | pwm.event_id = channel; |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 397 | |
| 398 | samsung_timer_resources(); |
| 399 | samsung_clockevent_init(); |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 400 | |
| 401 | return samsung_clocksource_init(); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 402 | } |
| 403 | |
Tomasz Figa | f9bb48a2 | 2013-04-23 17:46:27 +0200 | [diff] [blame] | 404 | void __init samsung_pwm_clocksource_init(void __iomem *base, |
| 405 | unsigned int *irqs, struct samsung_pwm_variant *variant) |
| 406 | { |
| 407 | pwm.base = base; |
| 408 | memcpy(&pwm.variant, variant, sizeof(pwm.variant)); |
| 409 | memcpy(pwm.irq, irqs, SAMSUNG_PWM_NUM * sizeof(*irqs)); |
| 410 | |
Tomasz Figa | a1fa6f5 | 2013-08-26 19:08:58 +0200 | [diff] [blame] | 411 | pwm.timerclk = clk_get(NULL, "timers"); |
| 412 | if (IS_ERR(pwm.timerclk)) |
| 413 | panic("failed to get timers clock for timer"); |
| 414 | |
Tomasz Figa | f9bb48a2 | 2013-04-23 17:46:27 +0200 | [diff] [blame] | 415 | _samsung_pwm_clocksource_init(); |
| 416 | } |
| 417 | |
Daniel Lezcano | bb0eb05 | 2017-05-26 19:34:11 +0200 | [diff] [blame] | 418 | #ifdef CONFIG_TIMER_OF |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 419 | static int __init samsung_pwm_alloc(struct device_node *np, |
| 420 | const struct samsung_pwm_variant *variant) |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 421 | { |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 422 | struct property *prop; |
| 423 | const __be32 *cur; |
| 424 | u32 val; |
| 425 | int i; |
| 426 | |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 427 | memcpy(&pwm.variant, variant, sizeof(pwm.variant)); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 428 | for (i = 0; i < SAMSUNG_PWM_NUM; ++i) |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 429 | pwm.irq[i] = irq_of_parse_and_map(np, i); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 430 | |
| 431 | of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur, val) { |
| 432 | if (val >= SAMSUNG_PWM_NUM) { |
| 433 | pr_warning("%s: invalid channel index in samsung,pwm-outputs property\n", |
| 434 | __func__); |
| 435 | continue; |
| 436 | } |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 437 | pwm.variant.output_mask |= 1 << val; |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 438 | } |
| 439 | |
Tomasz Figa | e241548 | 2013-06-13 21:22:44 +0200 | [diff] [blame] | 440 | pwm.base = of_iomap(np, 0); |
Tomasz Figa | 030c2a1 | 2013-04-23 17:46:25 +0200 | [diff] [blame] | 441 | if (!pwm.base) { |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 442 | pr_err("%s: failed to map PWM registers\n", __func__); |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 443 | return -ENXIO; |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 444 | } |
| 445 | |
Tomasz Figa | a1fa6f5 | 2013-08-26 19:08:58 +0200 | [diff] [blame] | 446 | pwm.timerclk = of_clk_get_by_name(np, "timers"); |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 447 | if (IS_ERR(pwm.timerclk)) { |
Rafał Miłecki | ac9ce6d | 2017-03-09 10:47:10 +0100 | [diff] [blame] | 448 | pr_crit("failed to get timers clock for timer\n"); |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 449 | return PTR_ERR(pwm.timerclk); |
| 450 | } |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 451 | |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 452 | return _samsung_pwm_clocksource_init(); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 453 | } |
| 454 | |
| 455 | static const struct samsung_pwm_variant s3c24xx_variant = { |
| 456 | .bits = 16, |
| 457 | .div_base = 1, |
| 458 | .has_tint_cstat = false, |
| 459 | .tclk_mask = (1 << 4), |
| 460 | }; |
| 461 | |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 462 | static int __init s3c2410_pwm_clocksource_init(struct device_node *np) |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 463 | { |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 464 | return samsung_pwm_alloc(np, &s3c24xx_variant); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 465 | } |
Daniel Lezcano | 1727339 | 2017-05-26 16:56:11 +0200 | [diff] [blame] | 466 | TIMER_OF_DECLARE(s3c2410_pwm, "samsung,s3c2410-pwm", s3c2410_pwm_clocksource_init); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 467 | |
| 468 | static const struct samsung_pwm_variant s3c64xx_variant = { |
| 469 | .bits = 32, |
| 470 | .div_base = 0, |
| 471 | .has_tint_cstat = true, |
| 472 | .tclk_mask = (1 << 7) | (1 << 6) | (1 << 5), |
| 473 | }; |
| 474 | |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 475 | static int __init s3c64xx_pwm_clocksource_init(struct device_node *np) |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 476 | { |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 477 | return samsung_pwm_alloc(np, &s3c64xx_variant); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 478 | } |
Daniel Lezcano | 1727339 | 2017-05-26 16:56:11 +0200 | [diff] [blame] | 479 | TIMER_OF_DECLARE(s3c6400_pwm, "samsung,s3c6400-pwm", s3c64xx_pwm_clocksource_init); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 480 | |
| 481 | static const struct samsung_pwm_variant s5p64x0_variant = { |
| 482 | .bits = 32, |
| 483 | .div_base = 0, |
| 484 | .has_tint_cstat = true, |
| 485 | .tclk_mask = 0, |
| 486 | }; |
| 487 | |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 488 | static int __init s5p64x0_pwm_clocksource_init(struct device_node *np) |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 489 | { |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 490 | return samsung_pwm_alloc(np, &s5p64x0_variant); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 491 | } |
Daniel Lezcano | 1727339 | 2017-05-26 16:56:11 +0200 | [diff] [blame] | 492 | TIMER_OF_DECLARE(s5p6440_pwm, "samsung,s5p6440-pwm", s5p64x0_pwm_clocksource_init); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 493 | |
| 494 | static const struct samsung_pwm_variant s5p_variant = { |
| 495 | .bits = 32, |
| 496 | .div_base = 0, |
| 497 | .has_tint_cstat = true, |
| 498 | .tclk_mask = (1 << 5), |
| 499 | }; |
| 500 | |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 501 | static int __init s5p_pwm_clocksource_init(struct device_node *np) |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 502 | { |
Daniel Lezcano | 0993f57 | 2016-06-06 17:58:56 +0200 | [diff] [blame] | 503 | return samsung_pwm_alloc(np, &s5p_variant); |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 504 | } |
Daniel Lezcano | 1727339 | 2017-05-26 16:56:11 +0200 | [diff] [blame] | 505 | TIMER_OF_DECLARE(s5pc100_pwm, "samsung,s5pc100-pwm", s5p_pwm_clocksource_init); |
Tomasz Figa | f9bb48a2 | 2013-04-23 17:46:27 +0200 | [diff] [blame] | 506 | #endif |