Thomas Gleixner | acee2e8 | 2019-06-04 10:10:53 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Lucas Stach | e0fed51 | 2014-09-26 15:41:01 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2014 Lucas Stach <l.stach@pengutronix.de>, Pengutronix |
Lucas Stach | e0fed51 | 2014-09-26 15:41:01 +0200 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <linux/clk.h> |
| 7 | #include <linux/clk-provider.h> |
| 8 | #include <linux/slab.h> |
Fabio Estevam | a39973a | 2015-04-29 18:34:42 -0300 | [diff] [blame] | 9 | #include "clk.h" |
Lucas Stach | e0fed51 | 2014-09-26 15:41:01 +0200 | [diff] [blame] | 10 | |
| 11 | struct clk_cpu { |
| 12 | struct clk_hw hw; |
| 13 | struct clk *div; |
| 14 | struct clk *mux; |
| 15 | struct clk *pll; |
| 16 | struct clk *step; |
| 17 | }; |
| 18 | |
| 19 | static inline struct clk_cpu *to_clk_cpu(struct clk_hw *hw) |
| 20 | { |
| 21 | return container_of(hw, struct clk_cpu, hw); |
| 22 | } |
| 23 | |
| 24 | static unsigned long clk_cpu_recalc_rate(struct clk_hw *hw, |
| 25 | unsigned long parent_rate) |
| 26 | { |
| 27 | struct clk_cpu *cpu = to_clk_cpu(hw); |
| 28 | |
| 29 | return clk_get_rate(cpu->div); |
| 30 | } |
| 31 | |
| 32 | static long clk_cpu_round_rate(struct clk_hw *hw, unsigned long rate, |
| 33 | unsigned long *prate) |
| 34 | { |
| 35 | struct clk_cpu *cpu = to_clk_cpu(hw); |
| 36 | |
| 37 | return clk_round_rate(cpu->pll, rate); |
| 38 | } |
| 39 | |
| 40 | static int clk_cpu_set_rate(struct clk_hw *hw, unsigned long rate, |
| 41 | unsigned long parent_rate) |
| 42 | { |
| 43 | struct clk_cpu *cpu = to_clk_cpu(hw); |
| 44 | int ret; |
| 45 | |
| 46 | /* switch to PLL bypass clock */ |
| 47 | ret = clk_set_parent(cpu->mux, cpu->step); |
| 48 | if (ret) |
| 49 | return ret; |
| 50 | |
| 51 | /* reprogram PLL */ |
| 52 | ret = clk_set_rate(cpu->pll, rate); |
| 53 | if (ret) { |
| 54 | clk_set_parent(cpu->mux, cpu->pll); |
| 55 | return ret; |
| 56 | } |
| 57 | /* switch back to PLL clock */ |
| 58 | clk_set_parent(cpu->mux, cpu->pll); |
| 59 | |
| 60 | /* Ensure the divider is what we expect */ |
| 61 | clk_set_rate(cpu->div, rate); |
| 62 | |
| 63 | return 0; |
| 64 | } |
| 65 | |
| 66 | static const struct clk_ops clk_cpu_ops = { |
| 67 | .recalc_rate = clk_cpu_recalc_rate, |
| 68 | .round_rate = clk_cpu_round_rate, |
| 69 | .set_rate = clk_cpu_set_rate, |
| 70 | }; |
| 71 | |
| 72 | struct clk *imx_clk_cpu(const char *name, const char *parent_name, |
| 73 | struct clk *div, struct clk *mux, struct clk *pll, |
| 74 | struct clk *step) |
| 75 | { |
| 76 | struct clk_cpu *cpu; |
| 77 | struct clk *clk; |
| 78 | struct clk_init_data init; |
| 79 | |
| 80 | cpu = kzalloc(sizeof(*cpu), GFP_KERNEL); |
| 81 | if (!cpu) |
| 82 | return ERR_PTR(-ENOMEM); |
| 83 | |
| 84 | cpu->div = div; |
| 85 | cpu->mux = mux; |
| 86 | cpu->pll = pll; |
| 87 | cpu->step = step; |
| 88 | |
| 89 | init.name = name; |
| 90 | init.ops = &clk_cpu_ops; |
Anson Huang | ec18939 | 2018-10-17 06:11:59 +0000 | [diff] [blame] | 91 | init.flags = CLK_IS_CRITICAL; |
Lucas Stach | e0fed51 | 2014-09-26 15:41:01 +0200 | [diff] [blame] | 92 | init.parent_names = &parent_name; |
| 93 | init.num_parents = 1; |
| 94 | |
| 95 | cpu->hw.init = &init; |
| 96 | |
| 97 | clk = clk_register(NULL, &cpu->hw); |
| 98 | if (IS_ERR(clk)) |
| 99 | kfree(cpu); |
| 100 | |
| 101 | return clk; |
| 102 | } |