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Michael Bueschebc915a2006-06-26 00:25:03 -07001/*
David Brownellc49a7f12008-04-16 19:24:42 +08002 * omap-rng.c - RNG driver for TI OMAP CPU family
Michael Bueschebc915a2006-06-26 00:25:03 -07003 *
4 * Author: Deepak Saxena <dsaxena@plexity.net>
5 *
6 * Copyright 2005 (c) MontaVista Software, Inc.
7 *
8 * Mostly based on original driver:
9 *
10 * Copyright (C) 2005 Nokia Corporation
Jan Engelhardt96de0e22007-10-19 23:21:04 +020011 * Author: Juha Yrjölä <juha.yrjola@nokia.com>
Michael Bueschebc915a2006-06-26 00:25:03 -070012 *
13 * This file is licensed under the terms of the GNU General Public
14 * License version 2. This program is licensed "as is" without any
15 * warranty of any kind, whether express or implied.
Michael Bueschebc915a2006-06-26 00:25:03 -070016 */
17
18#include <linux/module.h>
19#include <linux/init.h>
20#include <linux/random.h>
21#include <linux/err.h>
David Brownellaf2bc7d2006-08-05 12:14:04 -070022#include <linux/platform_device.h>
Michael Bueschebc915a2006-06-26 00:25:03 -070023#include <linux/hw_random.h>
Patrick McHardy984e9762007-11-21 12:24:45 +080024#include <linux/delay.h>
Paul Walmsley02666362012-09-23 17:28:26 -060025#include <linux/slab.h>
Paul Walmsley665d92f2012-09-23 17:28:26 -060026#include <linux/pm_runtime.h>
Lokesh Vutlac9039702013-08-05 20:17:21 +053027#include <linux/of.h>
28#include <linux/of_device.h>
29#include <linux/of_address.h>
Lokesh Vutlae83872c2013-08-05 20:17:23 +053030#include <linux/interrupt.h>
Romain Perier38321242016-09-16 12:08:55 +020031#include <linux/clk.h>
Michael Bueschebc915a2006-06-26 00:25:03 -070032
33#include <asm/io.h>
Michael Bueschebc915a2006-06-26 00:25:03 -070034
Lokesh Vutlae83872c2013-08-05 20:17:23 +053035#define RNG_REG_STATUS_RDY (1 << 0)
Michael Bueschebc915a2006-06-26 00:25:03 -070036
Lokesh Vutlae83872c2013-08-05 20:17:23 +053037#define RNG_REG_INTACK_RDY_MASK (1 << 0)
38#define RNG_REG_INTACK_SHUTDOWN_OFLO_MASK (1 << 1)
39#define RNG_SHUTDOWN_OFLO_MASK (1 << 1)
40
41#define RNG_CONTROL_STARTUP_CYCLES_SHIFT 16
42#define RNG_CONTROL_STARTUP_CYCLES_MASK (0xffff << 16)
43#define RNG_CONTROL_ENABLE_TRNG_SHIFT 10
44#define RNG_CONTROL_ENABLE_TRNG_MASK (1 << 10)
45
46#define RNG_CONFIG_MAX_REFIL_CYCLES_SHIFT 16
47#define RNG_CONFIG_MAX_REFIL_CYCLES_MASK (0xffff << 16)
48#define RNG_CONFIG_MIN_REFIL_CYCLES_SHIFT 0
49#define RNG_CONFIG_MIN_REFIL_CYCLES_MASK (0xff << 0)
50
51#define RNG_CONTROL_STARTUP_CYCLES 0xff
52#define RNG_CONFIG_MIN_REFIL_CYCLES 0x21
53#define RNG_CONFIG_MAX_REFIL_CYCLES 0x22
54
55#define RNG_ALARMCNT_ALARM_TH_SHIFT 0x0
56#define RNG_ALARMCNT_ALARM_TH_MASK (0xff << 0)
57#define RNG_ALARMCNT_SHUTDOWN_TH_SHIFT 16
58#define RNG_ALARMCNT_SHUTDOWN_TH_MASK (0x1f << 16)
59#define RNG_ALARM_THRESHOLD 0xff
60#define RNG_SHUTDOWN_THRESHOLD 0x4
61
62#define RNG_REG_FROENABLE_MASK 0xffffff
63#define RNG_REG_FRODETUNE_MASK 0xffffff
64
65#define OMAP2_RNG_OUTPUT_SIZE 0x4
66#define OMAP4_RNG_OUTPUT_SIZE 0x8
Romain Perier38321242016-09-16 12:08:55 +020067#define EIP76_RNG_OUTPUT_SIZE 0x10
Lokesh Vutlae83872c2013-08-05 20:17:23 +053068
69enum {
Romain Periere54feeb2016-09-16 12:08:53 +020070 RNG_OUTPUT_0_REG = 0,
71 RNG_OUTPUT_1_REG,
72 RNG_OUTPUT_2_REG,
73 RNG_OUTPUT_3_REG,
Lokesh Vutlae83872c2013-08-05 20:17:23 +053074 RNG_STATUS_REG,
75 RNG_INTMASK_REG,
76 RNG_INTACK_REG,
77 RNG_CONTROL_REG,
78 RNG_CONFIG_REG,
79 RNG_ALARMCNT_REG,
80 RNG_FROENABLE_REG,
81 RNG_FRODETUNE_REG,
82 RNG_ALARMMASK_REG,
83 RNG_ALARMSTOP_REG,
84 RNG_REV_REG,
85 RNG_SYSCONFIG_REG,
Paul Walmsley02666362012-09-23 17:28:26 -060086};
Michael Bueschebc915a2006-06-26 00:25:03 -070087
Lokesh Vutlae83872c2013-08-05 20:17:23 +053088static const u16 reg_map_omap2[] = {
Romain Periere54feeb2016-09-16 12:08:53 +020089 [RNG_OUTPUT_0_REG] = 0x0,
Lokesh Vutlae83872c2013-08-05 20:17:23 +053090 [RNG_STATUS_REG] = 0x4,
91 [RNG_CONFIG_REG] = 0x28,
92 [RNG_REV_REG] = 0x3c,
93 [RNG_SYSCONFIG_REG] = 0x40,
94};
95
96static const u16 reg_map_omap4[] = {
Romain Periere54feeb2016-09-16 12:08:53 +020097 [RNG_OUTPUT_0_REG] = 0x0,
98 [RNG_OUTPUT_1_REG] = 0x4,
Lokesh Vutlae83872c2013-08-05 20:17:23 +053099 [RNG_STATUS_REG] = 0x8,
100 [RNG_INTMASK_REG] = 0xc,
101 [RNG_INTACK_REG] = 0x10,
102 [RNG_CONTROL_REG] = 0x14,
103 [RNG_CONFIG_REG] = 0x18,
104 [RNG_ALARMCNT_REG] = 0x1c,
105 [RNG_FROENABLE_REG] = 0x20,
106 [RNG_FRODETUNE_REG] = 0x24,
107 [RNG_ALARMMASK_REG] = 0x28,
108 [RNG_ALARMSTOP_REG] = 0x2c,
109 [RNG_REV_REG] = 0x1FE0,
110 [RNG_SYSCONFIG_REG] = 0x1FE4,
111};
112
Romain Perier38321242016-09-16 12:08:55 +0200113static const u16 reg_map_eip76[] = {
114 [RNG_OUTPUT_0_REG] = 0x0,
115 [RNG_OUTPUT_1_REG] = 0x4,
116 [RNG_OUTPUT_2_REG] = 0x8,
117 [RNG_OUTPUT_3_REG] = 0xc,
118 [RNG_STATUS_REG] = 0x10,
119 [RNG_INTACK_REG] = 0x10,
120 [RNG_CONTROL_REG] = 0x14,
121 [RNG_CONFIG_REG] = 0x18,
122 [RNG_ALARMCNT_REG] = 0x1c,
123 [RNG_FROENABLE_REG] = 0x20,
124 [RNG_FRODETUNE_REG] = 0x24,
125 [RNG_ALARMMASK_REG] = 0x28,
126 [RNG_ALARMSTOP_REG] = 0x2c,
127 [RNG_REV_REG] = 0x7c,
128};
129
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530130struct omap_rng_dev;
131/**
132 * struct omap_rng_pdata - RNG IP block-specific data
133 * @regs: Pointer to the register offsets structure.
134 * @data_size: No. of bytes in RNG output.
135 * @data_present: Callback to determine if data is available.
136 * @init: Callback for IP specific initialization sequence.
137 * @cleanup: Callback for IP specific cleanup sequence.
138 */
139struct omap_rng_pdata {
140 u16 *regs;
141 u32 data_size;
142 u32 (*data_present)(struct omap_rng_dev *priv);
143 int (*init)(struct omap_rng_dev *priv);
144 void (*cleanup)(struct omap_rng_dev *priv);
145};
146
147struct omap_rng_dev {
148 void __iomem *base;
149 struct device *dev;
150 const struct omap_rng_pdata *pdata;
Romain Perierb23d2d92016-09-16 12:08:52 +0200151 struct hwrng rng;
Romain Perier38321242016-09-16 12:08:55 +0200152 struct clk *clk;
Gregory CLEMENTb166be02018-02-28 15:27:23 +0100153 struct clk *clk_reg;
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530154};
155
156static inline u32 omap_rng_read(struct omap_rng_dev *priv, u16 reg)
Michael Bueschebc915a2006-06-26 00:25:03 -0700157{
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530158 return __raw_readl(priv->base + priv->pdata->regs[reg]);
Michael Bueschebc915a2006-06-26 00:25:03 -0700159}
160
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530161static inline void omap_rng_write(struct omap_rng_dev *priv, u16 reg,
162 u32 val)
Michael Bueschebc915a2006-06-26 00:25:03 -0700163{
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530164 __raw_writel(val, priv->base + priv->pdata->regs[reg]);
165}
166
Romain Perier69eb4d02016-09-16 12:08:51 +0200167
168static int omap_rng_do_read(struct hwrng *rng, void *data, size_t max,
169 bool wait)
Michael Bueschebc915a2006-06-26 00:25:03 -0700170{
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530171 struct omap_rng_dev *priv;
Romain Perier69eb4d02016-09-16 12:08:51 +0200172 int i, present;
Patrick McHardy984e9762007-11-21 12:24:45 +0800173
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530174 priv = (struct omap_rng_dev *)rng->priv;
Paul Walmsley02666362012-09-23 17:28:26 -0600175
Romain Perier69eb4d02016-09-16 12:08:51 +0200176 if (max < priv->pdata->data_size)
177 return 0;
178
Patrick McHardy984e9762007-11-21 12:24:45 +0800179 for (i = 0; i < 20; i++) {
Romain Perier69eb4d02016-09-16 12:08:51 +0200180 present = priv->pdata->data_present(priv);
181 if (present || !wait)
Patrick McHardy984e9762007-11-21 12:24:45 +0800182 break;
Romain Perier69eb4d02016-09-16 12:08:51 +0200183
Patrick McHardy984e9762007-11-21 12:24:45 +0800184 udelay(10);
185 }
Romain Perier69eb4d02016-09-16 12:08:51 +0200186 if (!present)
187 return 0;
Michael Bueschebc915a2006-06-26 00:25:03 -0700188
Romain Periere54feeb2016-09-16 12:08:53 +0200189 memcpy_fromio(data, priv->base + priv->pdata->regs[RNG_OUTPUT_0_REG],
Romain Perier69eb4d02016-09-16 12:08:51 +0200190 priv->pdata->data_size);
Paul Walmsley02666362012-09-23 17:28:26 -0600191
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530192 if (priv->pdata->regs[RNG_INTACK_REG])
193 omap_rng_write(priv, RNG_INTACK_REG, RNG_REG_INTACK_RDY_MASK);
Romain Perier69eb4d02016-09-16 12:08:51 +0200194
195 return priv->pdata->data_size;
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530196}
197
Olof Johanssona2469682013-08-20 11:07:53 -0700198static int omap_rng_init(struct hwrng *rng)
199{
200 struct omap_rng_dev *priv;
201
202 priv = (struct omap_rng_dev *)rng->priv;
203 return priv->pdata->init(priv);
204}
205
206static void omap_rng_cleanup(struct hwrng *rng)
207{
208 struct omap_rng_dev *priv;
209
210 priv = (struct omap_rng_dev *)rng->priv;
211 priv->pdata->cleanup(priv);
212}
213
Olof Johanssona2469682013-08-20 11:07:53 -0700214
215static inline u32 omap2_rng_data_present(struct omap_rng_dev *priv)
216{
217 return omap_rng_read(priv, RNG_STATUS_REG) ? 0 : 1;
218}
219
220static int omap2_rng_init(struct omap_rng_dev *priv)
221{
222 omap_rng_write(priv, RNG_SYSCONFIG_REG, 0x1);
223 return 0;
224}
225
226static void omap2_rng_cleanup(struct omap_rng_dev *priv)
227{
228 omap_rng_write(priv, RNG_SYSCONFIG_REG, 0x0);
229}
230
231static struct omap_rng_pdata omap2_rng_pdata = {
232 .regs = (u16 *)reg_map_omap2,
233 .data_size = OMAP2_RNG_OUTPUT_SIZE,
234 .data_present = omap2_rng_data_present,
235 .init = omap2_rng_init,
236 .cleanup = omap2_rng_cleanup,
237};
238
239#if defined(CONFIG_OF)
240static inline u32 omap4_rng_data_present(struct omap_rng_dev *priv)
241{
242 return omap_rng_read(priv, RNG_STATUS_REG) & RNG_REG_STATUS_RDY;
243}
244
Romain Perier38321242016-09-16 12:08:55 +0200245static int eip76_rng_init(struct omap_rng_dev *priv)
246{
247 u32 val;
248
249 /* Return if RNG is already running. */
250 if (omap_rng_read(priv, RNG_CONTROL_REG) & RNG_CONTROL_ENABLE_TRNG_MASK)
251 return 0;
252
253 /* Number of 512 bit blocks of raw Noise Source output data that must
254 * be processed by either the Conditioning Function or the
255 * SP 800-90 DRBG ‘BC_DF’ functionality to yield a ‘full entropy’
256 * output value.
257 */
258 val = 0x5 << RNG_CONFIG_MIN_REFIL_CYCLES_SHIFT;
259
260 /* Number of FRO samples that are XOR-ed together into one bit to be
261 * shifted into the main shift register
262 */
263 val |= RNG_CONFIG_MAX_REFIL_CYCLES << RNG_CONFIG_MAX_REFIL_CYCLES_SHIFT;
264 omap_rng_write(priv, RNG_CONFIG_REG, val);
265
266 /* Enable all available FROs */
267 omap_rng_write(priv, RNG_FRODETUNE_REG, 0x0);
268 omap_rng_write(priv, RNG_FROENABLE_REG, RNG_REG_FROENABLE_MASK);
269
270 /* Enable TRNG */
271 val = RNG_CONTROL_ENABLE_TRNG_MASK;
272 omap_rng_write(priv, RNG_CONTROL_REG, val);
273
274 return 0;
275}
276
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530277static int omap4_rng_init(struct omap_rng_dev *priv)
278{
279 u32 val;
280
281 /* Return if RNG is already running. */
Andre Wolokita656d7e72015-03-16 12:54:50 +1100282 if (omap_rng_read(priv, RNG_CONTROL_REG) & RNG_CONTROL_ENABLE_TRNG_MASK)
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530283 return 0;
284
285 val = RNG_CONFIG_MIN_REFIL_CYCLES << RNG_CONFIG_MIN_REFIL_CYCLES_SHIFT;
286 val |= RNG_CONFIG_MAX_REFIL_CYCLES << RNG_CONFIG_MAX_REFIL_CYCLES_SHIFT;
287 omap_rng_write(priv, RNG_CONFIG_REG, val);
288
289 omap_rng_write(priv, RNG_FRODETUNE_REG, 0x0);
290 omap_rng_write(priv, RNG_FROENABLE_REG, RNG_REG_FROENABLE_MASK);
291 val = RNG_ALARM_THRESHOLD << RNG_ALARMCNT_ALARM_TH_SHIFT;
292 val |= RNG_SHUTDOWN_THRESHOLD << RNG_ALARMCNT_SHUTDOWN_TH_SHIFT;
293 omap_rng_write(priv, RNG_ALARMCNT_REG, val);
294
295 val = RNG_CONTROL_STARTUP_CYCLES << RNG_CONTROL_STARTUP_CYCLES_SHIFT;
296 val |= RNG_CONTROL_ENABLE_TRNG_MASK;
297 omap_rng_write(priv, RNG_CONTROL_REG, val);
298
299 return 0;
300}
301
302static void omap4_rng_cleanup(struct omap_rng_dev *priv)
303{
304 int val;
305
306 val = omap_rng_read(priv, RNG_CONTROL_REG);
307 val &= ~RNG_CONTROL_ENABLE_TRNG_MASK;
Andre Wolokita1a5addf2015-03-16 10:19:11 +1100308 omap_rng_write(priv, RNG_CONTROL_REG, val);
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530309}
310
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530311static irqreturn_t omap4_rng_irq(int irq, void *dev_id)
312{
313 struct omap_rng_dev *priv = dev_id;
314 u32 fro_detune, fro_enable;
315
316 /*
317 * Interrupt raised by a fro shutdown threshold, do the following:
318 * 1. Clear the alarm events.
319 * 2. De tune the FROs which are shutdown.
320 * 3. Re enable the shutdown FROs.
321 */
322 omap_rng_write(priv, RNG_ALARMMASK_REG, 0x0);
323 omap_rng_write(priv, RNG_ALARMSTOP_REG, 0x0);
324
325 fro_enable = omap_rng_read(priv, RNG_FROENABLE_REG);
326 fro_detune = ~fro_enable & RNG_REG_FRODETUNE_MASK;
327 fro_detune = fro_detune | omap_rng_read(priv, RNG_FRODETUNE_REG);
328 fro_enable = RNG_REG_FROENABLE_MASK;
329
330 omap_rng_write(priv, RNG_FRODETUNE_REG, fro_detune);
331 omap_rng_write(priv, RNG_FROENABLE_REG, fro_enable);
332
333 omap_rng_write(priv, RNG_INTACK_REG, RNG_REG_INTACK_SHUTDOWN_OFLO_MASK);
334
335 return IRQ_HANDLED;
Michael Bueschebc915a2006-06-26 00:25:03 -0700336}
337
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530338static struct omap_rng_pdata omap4_rng_pdata = {
339 .regs = (u16 *)reg_map_omap4,
340 .data_size = OMAP4_RNG_OUTPUT_SIZE,
341 .data_present = omap4_rng_data_present,
342 .init = omap4_rng_init,
343 .cleanup = omap4_rng_cleanup,
344};
345
Romain Perier38321242016-09-16 12:08:55 +0200346static struct omap_rng_pdata eip76_rng_pdata = {
347 .regs = (u16 *)reg_map_eip76,
348 .data_size = EIP76_RNG_OUTPUT_SIZE,
349 .data_present = omap4_rng_data_present,
350 .init = eip76_rng_init,
351 .cleanup = omap4_rng_cleanup,
352};
353
Lokesh Vutlac9039702013-08-05 20:17:21 +0530354static const struct of_device_id omap_rng_of_match[] = {
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530355 {
356 .compatible = "ti,omap2-rng",
357 .data = &omap2_rng_pdata,
358 },
359 {
360 .compatible = "ti,omap4-rng",
361 .data = &omap4_rng_pdata,
362 },
Romain Perier38321242016-09-16 12:08:55 +0200363 {
364 .compatible = "inside-secure,safexcel-eip76",
365 .data = &eip76_rng_pdata,
366 },
Lokesh Vutlac9039702013-08-05 20:17:21 +0530367 {},
368};
369MODULE_DEVICE_TABLE(of, omap_rng_of_match);
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530370
371static int of_get_omap_rng_device_details(struct omap_rng_dev *priv,
372 struct platform_device *pdev)
373{
374 const struct of_device_id *match;
375 struct device *dev = &pdev->dev;
376 int irq, err;
377
378 match = of_match_device(of_match_ptr(omap_rng_of_match), dev);
379 if (!match) {
380 dev_err(dev, "no compatible OF match\n");
381 return -EINVAL;
382 }
383 priv->pdata = match->data;
384
Romain Perier38321242016-09-16 12:08:55 +0200385 if (of_device_is_compatible(dev->of_node, "ti,omap4-rng") ||
386 of_device_is_compatible(dev->of_node, "inside-secure,safexcel-eip76")) {
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530387 irq = platform_get_irq(pdev, 0);
388 if (irq < 0) {
389 dev_err(dev, "%s: error getting IRQ resource - %d\n",
390 __func__, irq);
391 return irq;
392 }
393
394 err = devm_request_irq(dev, irq, omap4_rng_irq,
395 IRQF_TRIGGER_NONE, dev_name(dev), priv);
396 if (err) {
397 dev_err(dev, "unable to request irq %d, err = %d\n",
398 irq, err);
399 return err;
400 }
Romain Perier38321242016-09-16 12:08:55 +0200401
Thomas Petazzonib9857352017-03-07 15:14:48 +0100402 /*
403 * On OMAP4, enabling the shutdown_oflo interrupt is
404 * done in the interrupt mask register. There is no
405 * such register on EIP76, and it's enabled by the
406 * same bit in the control register
407 */
408 if (priv->pdata->regs[RNG_INTMASK_REG])
409 omap_rng_write(priv, RNG_INTMASK_REG,
410 RNG_SHUTDOWN_OFLO_MASK);
411 else
412 omap_rng_write(priv, RNG_CONTROL_REG,
413 RNG_SHUTDOWN_OFLO_MASK);
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530414 }
415 return 0;
416}
417#else
418static int of_get_omap_rng_device_details(struct omap_rng_dev *omap_rng,
419 struct platform_device *pdev)
420{
421 return -EINVAL;
422}
Lokesh Vutlac9039702013-08-05 20:17:21 +0530423#endif
424
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530425static int get_omap_rng_device_details(struct omap_rng_dev *omap_rng)
426{
427 /* Only OMAP2/3 can be non-DT */
428 omap_rng->pdata = &omap2_rng_pdata;
429 return 0;
430}
431
Greg Kroah-Hartmanbcd29822012-12-21 15:12:08 -0800432static int omap_rng_probe(struct platform_device *pdev)
Michael Bueschebc915a2006-06-26 00:25:03 -0700433{
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530434 struct omap_rng_dev *priv;
435 struct resource *res;
436 struct device *dev = &pdev->dev;
Michael Bueschebc915a2006-06-26 00:25:03 -0700437 int ret;
438
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530439 priv = devm_kzalloc(dev, sizeof(struct omap_rng_dev), GFP_KERNEL);
Jingoo Han9e9026a2014-04-29 17:15:36 +0900440 if (!priv)
Paul Walmsley02666362012-09-23 17:28:26 -0600441 return -ENOMEM;
Paul Walmsley02666362012-09-23 17:28:26 -0600442
Romain Perierb23d2d92016-09-16 12:08:52 +0200443 priv->rng.read = omap_rng_do_read;
444 priv->rng.init = omap_rng_init;
445 priv->rng.cleanup = omap_rng_cleanup;
Rouven Czerwinski62f95ae2019-03-11 11:58:57 +0100446 priv->rng.quality = 900;
Romain Perierb23d2d92016-09-16 12:08:52 +0200447
448 priv->rng.priv = (unsigned long)priv;
Jingoo Han1f539bc2013-05-29 09:47:29 +0900449 platform_set_drvdata(pdev, priv);
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530450 priv->dev = dev;
Michael Bueschebc915a2006-06-26 00:25:03 -0700451
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530452 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
453 priv->base = devm_ioremap_resource(dev, res);
Thierry Redingc7c9e1c2013-01-21 11:08:59 +0100454 if (IS_ERR(priv->base)) {
455 ret = PTR_ERR(priv->base);
Russell King55c381e2008-09-04 14:07:22 +0100456 goto err_ioremap;
457 }
Michael Bueschebc915a2006-06-26 00:25:03 -0700458
Romain Perierb23d2d92016-09-16 12:08:52 +0200459 priv->rng.name = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL);
460 if (!priv->rng.name) {
461 ret = -ENOMEM;
462 goto err_ioremap;
463 }
464
Paul Walmsley665d92f2012-09-23 17:28:26 -0600465 pm_runtime_enable(&pdev->dev);
Nishanth Menon61dc0a42016-06-24 11:50:39 -0500466 ret = pm_runtime_get_sync(&pdev->dev);
Dave Gerlachad8529f2016-09-20 10:25:40 -0500467 if (ret < 0) {
Nishanth Menon61dc0a42016-06-24 11:50:39 -0500468 dev_err(&pdev->dev, "Failed to runtime_get device: %d\n", ret);
469 pm_runtime_put_noidle(&pdev->dev);
470 goto err_ioremap;
471 }
Paul Walmsley665d92f2012-09-23 17:28:26 -0600472
Thomas Petazzoni43ec5402017-03-07 15:14:49 +0100473 priv->clk = devm_clk_get(&pdev->dev, NULL);
474 if (IS_ERR(priv->clk) && PTR_ERR(priv->clk) == -EPROBE_DEFER)
475 return -EPROBE_DEFER;
476 if (!IS_ERR(priv->clk)) {
477 ret = clk_prepare_enable(priv->clk);
478 if (ret) {
479 dev_err(&pdev->dev,
480 "Unable to enable the clk: %d\n", ret);
481 goto err_register;
482 }
483 }
484
Gregory CLEMENTb166be02018-02-28 15:27:23 +0100485 priv->clk_reg = devm_clk_get(&pdev->dev, "reg");
486 if (IS_ERR(priv->clk_reg) && PTR_ERR(priv->clk_reg) == -EPROBE_DEFER)
487 return -EPROBE_DEFER;
488 if (!IS_ERR(priv->clk_reg)) {
489 ret = clk_prepare_enable(priv->clk_reg);
490 if (ret) {
491 dev_err(&pdev->dev,
492 "Unable to enable the register clk: %d\n",
493 ret);
494 goto err_register;
495 }
496 }
497
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530498 ret = (dev->of_node) ? of_get_omap_rng_device_details(priv, pdev) :
499 get_omap_rng_device_details(priv);
500 if (ret)
Romain Perier38321242016-09-16 12:08:55 +0200501 goto err_register;
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530502
Romain Perierb23d2d92016-09-16 12:08:52 +0200503 ret = hwrng_register(&priv->rng);
Russell King55c381e2008-09-04 14:07:22 +0100504 if (ret)
505 goto err_register;
Michael Bueschebc915a2006-06-26 00:25:03 -0700506
Romain Perierf0d5a112016-09-16 12:08:54 +0200507 dev_info(&pdev->dev, "Random Number Generator ver. %02x\n",
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530508 omap_rng_read(priv, RNG_REV_REG));
Michael Bueschebc915a2006-06-26 00:25:03 -0700509
510 return 0;
Russell King55c381e2008-09-04 14:07:22 +0100511
512err_register:
Paul Walmsley02666362012-09-23 17:28:26 -0600513 priv->base = NULL;
Romain Perier38321242016-09-16 12:08:55 +0200514 pm_runtime_put_sync(&pdev->dev);
Paul Walmsley665d92f2012-09-23 17:28:26 -0600515 pm_runtime_disable(&pdev->dev);
Romain Perier38321242016-09-16 12:08:55 +0200516
Gregory CLEMENTb166be02018-02-28 15:27:23 +0100517 clk_disable_unprepare(priv->clk_reg);
Gregory CLEMENT10bc3202018-02-28 15:27:22 +0100518 clk_disable_unprepare(priv->clk);
Russell King55c381e2008-09-04 14:07:22 +0100519err_ioremap:
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530520 dev_err(dev, "initialization failed.\n");
Russell King55c381e2008-09-04 14:07:22 +0100521 return ret;
Michael Bueschebc915a2006-06-26 00:25:03 -0700522}
523
Dmitry Torokhov1ee9b5e2015-03-09 10:36:35 -0700524static int omap_rng_remove(struct platform_device *pdev)
Michael Bueschebc915a2006-06-26 00:25:03 -0700525{
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530526 struct omap_rng_dev *priv = platform_get_drvdata(pdev);
Paul Walmsley02666362012-09-23 17:28:26 -0600527
Romain Perierb23d2d92016-09-16 12:08:52 +0200528 hwrng_unregister(&priv->rng);
Michael Bueschebc915a2006-06-26 00:25:03 -0700529
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530530 priv->pdata->cleanup(priv);
Paul Walmsley02666362012-09-23 17:28:26 -0600531
Paul Walmsley665d92f2012-09-23 17:28:26 -0600532 pm_runtime_put_sync(&pdev->dev);
533 pm_runtime_disable(&pdev->dev);
Michael Bueschebc915a2006-06-26 00:25:03 -0700534
Gregory CLEMENT10bc3202018-02-28 15:27:22 +0100535 clk_disable_unprepare(priv->clk);
Gregory CLEMENTb166be02018-02-28 15:27:23 +0100536 clk_disable_unprepare(priv->clk_reg);
Romain Perier38321242016-09-16 12:08:55 +0200537
Michael Bueschebc915a2006-06-26 00:25:03 -0700538 return 0;
539}
540
Dmitry Torokhova308d662015-03-11 14:08:36 -0700541static int __maybe_unused omap_rng_suspend(struct device *dev)
Michael Bueschebc915a2006-06-26 00:25:03 -0700542{
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530543 struct omap_rng_dev *priv = dev_get_drvdata(dev);
Paul Walmsley02666362012-09-23 17:28:26 -0600544
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530545 priv->pdata->cleanup(priv);
Paul Walmsley665d92f2012-09-23 17:28:26 -0600546 pm_runtime_put_sync(dev);
Paul Walmsley02666362012-09-23 17:28:26 -0600547
Michael Bueschebc915a2006-06-26 00:25:03 -0700548 return 0;
549}
550
Dmitry Torokhova308d662015-03-11 14:08:36 -0700551static int __maybe_unused omap_rng_resume(struct device *dev)
Michael Bueschebc915a2006-06-26 00:25:03 -0700552{
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530553 struct omap_rng_dev *priv = dev_get_drvdata(dev);
Nishanth Menon61dc0a42016-06-24 11:50:39 -0500554 int ret;
Paul Walmsley02666362012-09-23 17:28:26 -0600555
Nishanth Menon61dc0a42016-06-24 11:50:39 -0500556 ret = pm_runtime_get_sync(dev);
Dave Gerlachad8529f2016-09-20 10:25:40 -0500557 if (ret < 0) {
Nishanth Menon61dc0a42016-06-24 11:50:39 -0500558 dev_err(dev, "Failed to runtime_get device: %d\n", ret);
559 pm_runtime_put_noidle(dev);
560 return ret;
561 }
562
Lokesh Vutlae83872c2013-08-05 20:17:23 +0530563 priv->pdata->init(priv);
Paul Walmsley02666362012-09-23 17:28:26 -0600564
David Brownellaf2bc7d2006-08-05 12:14:04 -0700565 return 0;
Michael Bueschebc915a2006-06-26 00:25:03 -0700566}
567
Rafael J. Wysocki76505722012-07-06 19:08:53 +0200568static SIMPLE_DEV_PM_OPS(omap_rng_pm, omap_rng_suspend, omap_rng_resume);
Michael Bueschebc915a2006-06-26 00:25:03 -0700569
David Brownellaf2bc7d2006-08-05 12:14:04 -0700570static struct platform_driver omap_rng_driver = {
571 .driver = {
572 .name = "omap_rng",
Dmitry Torokhova308d662015-03-11 14:08:36 -0700573 .pm = &omap_rng_pm,
Lokesh Vutlac9039702013-08-05 20:17:21 +0530574 .of_match_table = of_match_ptr(omap_rng_of_match),
David Brownellaf2bc7d2006-08-05 12:14:04 -0700575 },
Michael Bueschebc915a2006-06-26 00:25:03 -0700576 .probe = omap_rng_probe,
Dmitry Torokhov1ee9b5e2015-03-09 10:36:35 -0700577 .remove = omap_rng_remove,
Michael Bueschebc915a2006-06-26 00:25:03 -0700578};
579
Lokesh Vutla4390f772013-08-05 20:17:18 +0530580module_platform_driver(omap_rng_driver);
581MODULE_ALIAS("platform:omap_rng");
Michael Bueschebc915a2006-06-26 00:25:03 -0700582MODULE_AUTHOR("Deepak Saxena (and others)");
583MODULE_LICENSE("GPL");