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Thomas Gleixnerfcaf2032019-05-27 08:55:08 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -03002/*
3 * RNG driver for Freescale RNGA
4 *
5 * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
6 * Author: Alan Carvalho de Assis <acassis@gmail.com>
7 */
8
9/*
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -030010 *
11 * This driver is based on other RNG drivers.
12 */
13
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -030014#include <linux/clk.h>
Benoît Thébaudeau36211892012-06-13 18:15:34 +020015#include <linux/delay.h>
Vladimir Zapolskiya6ab6402018-03-06 00:21:00 +020016#include <linux/hw_random.h>
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -030017#include <linux/io.h>
Vladimir Zapolskiya6ab6402018-03-06 00:21:00 +020018#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/platform_device.h>
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -030021
22/* RNGA Registers */
23#define RNGA_CONTROL 0x00
24#define RNGA_STATUS 0x04
25#define RNGA_ENTROPY 0x08
26#define RNGA_OUTPUT_FIFO 0x0c
27#define RNGA_MODE 0x10
28#define RNGA_VERIFICATION_CONTROL 0x14
29#define RNGA_OSC_CONTROL_COUNTER 0x18
30#define RNGA_OSC1_COUNTER 0x1c
31#define RNGA_OSC2_COUNTER 0x20
32#define RNGA_OSC_COUNTER_STATUS 0x24
33
34/* RNGA Registers Range */
35#define RNG_ADDR_RANGE 0x28
36
37/* RNGA Control Register */
38#define RNGA_CONTROL_SLEEP 0x00000010
39#define RNGA_CONTROL_CLEAR_INT 0x00000008
40#define RNGA_CONTROL_MASK_INTS 0x00000004
41#define RNGA_CONTROL_HIGH_ASSURANCE 0x00000002
42#define RNGA_CONTROL_GO 0x00000001
43
44#define RNGA_STATUS_LEVEL_MASK 0x0000ff00
45
46/* RNGA Status Register */
47#define RNGA_STATUS_OSC_DEAD 0x80000000
48#define RNGA_STATUS_SLEEP 0x00000010
49#define RNGA_STATUS_ERROR_INT 0x00000008
50#define RNGA_STATUS_FIFO_UNDERFLOW 0x00000004
51#define RNGA_STATUS_LAST_READ_STATUS 0x00000002
52#define RNGA_STATUS_SECURITY_VIOLATION 0x00000001
53
Fabio Estevam821873a2012-09-04 18:35:22 -030054struct mxc_rng {
55 struct device *dev;
56 struct hwrng rng;
57 void __iomem *mem;
58 struct clk *clk;
59};
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -030060
Benoît Thébaudeau36211892012-06-13 18:15:34 +020061static int mxc_rnga_data_present(struct hwrng *rng, int wait)
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -030062{
Benoît Thébaudeau36211892012-06-13 18:15:34 +020063 int i;
Fabio Estevam821873a2012-09-04 18:35:22 -030064 struct mxc_rng *mxc_rng = container_of(rng, struct mxc_rng, rng);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -030065
Benoît Thébaudeau36211892012-06-13 18:15:34 +020066 for (i = 0; i < 20; i++) {
67 /* how many random numbers are in FIFO? [0-16] */
Fabio Estevam821873a2012-09-04 18:35:22 -030068 int level = (__raw_readl(mxc_rng->mem + RNGA_STATUS) &
Benoît Thébaudeau36211892012-06-13 18:15:34 +020069 RNGA_STATUS_LEVEL_MASK) >> 8;
70 if (level || !wait)
71 return !!level;
72 udelay(10);
73 }
74 return 0;
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -030075}
76
77static int mxc_rnga_data_read(struct hwrng *rng, u32 * data)
78{
79 int err;
80 u32 ctrl;
Fabio Estevam821873a2012-09-04 18:35:22 -030081 struct mxc_rng *mxc_rng = container_of(rng, struct mxc_rng, rng);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -030082
83 /* retrieve a random number from FIFO */
Fabio Estevam821873a2012-09-04 18:35:22 -030084 *data = __raw_readl(mxc_rng->mem + RNGA_OUTPUT_FIFO);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -030085
86 /* some error while reading this random number? */
Fabio Estevam821873a2012-09-04 18:35:22 -030087 err = __raw_readl(mxc_rng->mem + RNGA_STATUS) & RNGA_STATUS_ERROR_INT;
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -030088
89 /* if error: clear error interrupt, but doesn't return random number */
90 if (err) {
Fabio Estevam821873a2012-09-04 18:35:22 -030091 dev_dbg(mxc_rng->dev, "Error while reading random number!\n");
92 ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -030093 __raw_writel(ctrl | RNGA_CONTROL_CLEAR_INT,
Fabio Estevam821873a2012-09-04 18:35:22 -030094 mxc_rng->mem + RNGA_CONTROL);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -030095 return 0;
96 } else
97 return 4;
98}
99
100static int mxc_rnga_init(struct hwrng *rng)
101{
102 u32 ctrl, osc;
Fabio Estevam821873a2012-09-04 18:35:22 -0300103 struct mxc_rng *mxc_rng = container_of(rng, struct mxc_rng, rng);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300104
105 /* wake up */
Fabio Estevam821873a2012-09-04 18:35:22 -0300106 ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
107 __raw_writel(ctrl & ~RNGA_CONTROL_SLEEP, mxc_rng->mem + RNGA_CONTROL);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300108
109 /* verify if oscillator is working */
Fabio Estevam821873a2012-09-04 18:35:22 -0300110 osc = __raw_readl(mxc_rng->mem + RNGA_STATUS);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300111 if (osc & RNGA_STATUS_OSC_DEAD) {
Fabio Estevam821873a2012-09-04 18:35:22 -0300112 dev_err(mxc_rng->dev, "RNGA Oscillator is dead!\n");
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300113 return -ENODEV;
114 }
115
116 /* go running */
Fabio Estevam821873a2012-09-04 18:35:22 -0300117 ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
118 __raw_writel(ctrl | RNGA_CONTROL_GO, mxc_rng->mem + RNGA_CONTROL);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300119
120 return 0;
121}
122
123static void mxc_rnga_cleanup(struct hwrng *rng)
124{
125 u32 ctrl;
Fabio Estevam821873a2012-09-04 18:35:22 -0300126 struct mxc_rng *mxc_rng = container_of(rng, struct mxc_rng, rng);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300127
Fabio Estevam821873a2012-09-04 18:35:22 -0300128 ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300129
130 /* stop rnga */
Fabio Estevam821873a2012-09-04 18:35:22 -0300131 __raw_writel(ctrl & ~RNGA_CONTROL_GO, mxc_rng->mem + RNGA_CONTROL);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300132}
133
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300134static int __init mxc_rnga_probe(struct platform_device *pdev)
135{
Fabio Estevamc09e2cc2015-09-12 20:19:51 -0300136 int err;
Fabio Estevam264878e2013-03-13 00:57:27 -0300137 struct resource *res;
Fabio Estevam821873a2012-09-04 18:35:22 -0300138 struct mxc_rng *mxc_rng;
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300139
Fabio Estevam05db0ad2015-09-12 20:19:53 -0300140 mxc_rng = devm_kzalloc(&pdev->dev, sizeof(*mxc_rng), GFP_KERNEL);
Fabio Estevam821873a2012-09-04 18:35:22 -0300141 if (!mxc_rng)
142 return -ENOMEM;
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300143
Fabio Estevam821873a2012-09-04 18:35:22 -0300144 mxc_rng->dev = &pdev->dev;
145 mxc_rng->rng.name = "mxc-rnga";
146 mxc_rng->rng.init = mxc_rnga_init;
147 mxc_rng->rng.cleanup = mxc_rnga_cleanup,
148 mxc_rng->rng.data_present = mxc_rnga_data_present,
149 mxc_rng->rng.data_read = mxc_rnga_data_read,
150
151 mxc_rng->clk = devm_clk_get(&pdev->dev, NULL);
152 if (IS_ERR(mxc_rng->clk)) {
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300153 dev_err(&pdev->dev, "Could not get rng_clk!\n");
Fabio Estevam1bf21382015-09-12 20:19:50 -0300154 return PTR_ERR(mxc_rng->clk);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300155 }
156
Fabio Estevam9e01d0c2013-07-21 14:41:38 -0300157 err = clk_prepare_enable(mxc_rng->clk);
158 if (err)
Fabio Estevam1bf21382015-09-12 20:19:50 -0300159 return err;
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300160
161 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Fabio Estevam264878e2013-03-13 00:57:27 -0300162 mxc_rng->mem = devm_ioremap_resource(&pdev->dev, res);
163 if (IS_ERR(mxc_rng->mem)) {
164 err = PTR_ERR(mxc_rng->mem);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300165 goto err_ioremap;
166 }
167
Fabio Estevam821873a2012-09-04 18:35:22 -0300168 err = hwrng_register(&mxc_rng->rng);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300169 if (err) {
170 dev_err(&pdev->dev, "MXC RNGA registering failed (%d)\n", err);
Fabio Estevam821873a2012-09-04 18:35:22 -0300171 goto err_ioremap;
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300172 }
173
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300174 return 0;
175
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300176err_ioremap:
Fabio Estevam821873a2012-09-04 18:35:22 -0300177 clk_disable_unprepare(mxc_rng->clk);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300178 return err;
179}
180
181static int __exit mxc_rnga_remove(struct platform_device *pdev)
182{
Fabio Estevam821873a2012-09-04 18:35:22 -0300183 struct mxc_rng *mxc_rng = platform_get_drvdata(pdev);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300184
Fabio Estevam821873a2012-09-04 18:35:22 -0300185 hwrng_unregister(&mxc_rng->rng);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300186
Fabio Estevam821873a2012-09-04 18:35:22 -0300187 clk_disable_unprepare(mxc_rng->clk);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300188
189 return 0;
190}
191
Vladimir Zapolskiya6ab6402018-03-06 00:21:00 +0200192static const struct of_device_id mxc_rnga_of_match[] = {
193 { .compatible = "fsl,imx21-rnga", },
194 { .compatible = "fsl,imx31-rnga", },
195 { /* sentinel */ },
196};
197MODULE_DEVICE_TABLE(of, mxc_rnga_of_match);
198
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300199static struct platform_driver mxc_rnga_driver = {
200 .driver = {
Vladimir Zapolskiya6ab6402018-03-06 00:21:00 +0200201 .name = "mxc_rnga",
202 .of_match_table = mxc_rnga_of_match,
203 },
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300204 .remove = __exit_p(mxc_rnga_remove),
205};
206
Fabio Porceddae7c21992013-03-14 18:09:33 +0100207module_platform_driver_probe(mxc_rnga_driver, mxc_rnga_probe);
Alan Carvalho de Assis45001e92009-04-02 12:38:41 -0300208
209MODULE_AUTHOR("Freescale Semiconductor, Inc.");
210MODULE_DESCRIPTION("H/W RNGA driver for i.MX");
211MODULE_LICENSE("GPL");