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Thomas Gleixnerd2912cb2019-06-04 10:11:33 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +10002/*
3 * Copyright 2017 Benjamin Herrenschmidt, IBM Corporation
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +10004 */
5
6#ifndef _KVM_PPC_BOOK3S_XIVE_H
7#define _KVM_PPC_BOOK3S_XIVE_H
8
9#ifdef CONFIG_KVM_XICS
10#include "book3s_xics.h"
11
12/*
Cédric Le Goater4131f832019-04-18 12:39:29 +020013 * The XIVE Interrupt source numbers are within the range 0 to
14 * KVMPPC_XICS_NR_IRQS.
15 */
16#define KVMPPC_XIVE_FIRST_IRQ 0
17#define KVMPPC_XIVE_NR_IRQS KVMPPC_XICS_NR_IRQS
18
19/*
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +100020 * State for one guest irq source.
21 *
22 * For each guest source we allocate a HW interrupt in the XIVE
23 * which we use for all SW triggers. It will be unused for
24 * pass-through but it's easier to keep around as the same
25 * guest interrupt can alternatively be emulated or pass-through
26 * if a physical device is hot unplugged and replaced with an
27 * emulated one.
28 *
29 * This state structure is very similar to the XICS one with
30 * additional XIVE specific tracking.
31 */
32struct kvmppc_xive_irq_state {
33 bool valid; /* Interrupt entry is valid */
34
35 u32 number; /* Guest IRQ number */
36 u32 ipi_number; /* XIVE IPI HW number */
37 struct xive_irq_data ipi_data; /* XIVE IPI associated data */
38 u32 pt_number; /* XIVE Pass-through number if any */
39 struct xive_irq_data *pt_data; /* XIVE Pass-through associated data */
40
41 /* Targetting as set by guest */
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +100042 u8 guest_priority; /* Guest set priority */
43 u8 saved_priority; /* Saved priority when masking */
44
45 /* Actual targetting */
46 u32 act_server; /* Actual server */
47 u8 act_priority; /* Actual priority */
48
49 /* Various state bits */
50 bool in_eoi; /* Synchronize with H_EOI */
51 bool old_p; /* P bit state when masking */
52 bool old_q; /* Q bit state when masking */
53 bool lsi; /* level-sensitive interrupt */
54 bool asserted; /* Only for emulated LSI: current state */
55
56 /* Saved for migration state */
57 bool in_queue;
58 bool saved_p;
59 bool saved_q;
60 u8 saved_scan_prio;
Cédric Le Goatere8676ce2019-04-18 12:39:30 +020061
62 /* Xive native */
63 u32 eisn; /* Guest Effective IRQ number */
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +100064};
65
66/* Select the "right" interrupt (IPI vs. passthrough) */
67static inline void kvmppc_xive_select_irq(struct kvmppc_xive_irq_state *state,
68 u32 *out_hw_irq,
69 struct xive_irq_data **out_xd)
70{
71 if (state->pt_number) {
72 if (out_hw_irq)
73 *out_hw_irq = state->pt_number;
74 if (out_xd)
75 *out_xd = state->pt_data;
76 } else {
77 if (out_hw_irq)
78 *out_hw_irq = state->ipi_number;
79 if (out_xd)
80 *out_xd = &state->ipi_data;
81 }
82}
83
84/*
85 * This corresponds to an "ICS" in XICS terminology, we use it
86 * as a mean to break up source information into multiple structures.
87 */
88struct kvmppc_xive_src_block {
89 arch_spinlock_t lock;
90 u16 id;
91 struct kvmppc_xive_irq_state irq_state[KVMPPC_XICS_IRQ_PER_ICS];
92};
93
Cédric Le Goater232b9842019-04-18 12:39:39 +020094struct kvmppc_xive;
95
96struct kvmppc_xive_ops {
97 int (*reset_mapped)(struct kvm *kvm, unsigned long guest_irq);
98};
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +100099
100struct kvmppc_xive {
101 struct kvm *kvm;
102 struct kvm_device *dev;
103 struct dentry *dentry;
104
105 /* VP block associated with the VM */
106 u32 vp_base;
107
108 /* Blocks of sources */
109 struct kvmppc_xive_src_block *src_blocks[KVMPPC_XICS_MAX_ICS_ID + 1];
110 u32 max_sbid;
111
112 /*
113 * For state save, we lazily scan the queues on the first interrupt
114 * being migrated. We don't have a clean way to reset that flags
115 * so we keep track of the number of valid sources and how many of
116 * them were migrated so we can reset when all of them have been
117 * processed.
118 */
119 u32 src_count;
120 u32 saved_src_count;
121
122 /*
123 * Some irqs are delayed on restore until the source is created,
124 * keep track here of how many of them
125 */
126 u32 delayed_irqs;
127
128 /* Which queues (priorities) are in use by the guest */
129 u8 qmap;
130
131 /* Queue orders */
132 u32 q_order;
133 u32 q_page_order;
134
Benjamin Herrenschmidtbf4159da2018-01-12 13:37:12 +1100135 /* Flags */
136 u8 single_escalation;
Cédric Le Goater232b9842019-04-18 12:39:39 +0200137
138 struct kvmppc_xive_ops *ops;
139 struct address_space *mapping;
140 struct mutex mapping_lock;
Cédric Le Goater7e10b9a2019-05-24 15:20:30 +0200141 struct mutex lock;
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +1000142};
143
144#define KVMPPC_XIVE_Q_COUNT 8
145
146struct kvmppc_xive_vcpu {
147 struct kvmppc_xive *xive;
148 struct kvm_vcpu *vcpu;
149 bool valid;
150
151 /* Server number. This is the HW CPU ID from a guest perspective */
152 u32 server_num;
153
154 /*
155 * HW VP corresponding to this VCPU. This is the base of the VP
156 * block plus the server number.
157 */
158 u32 vp_id;
159 u32 vp_chip_id;
160 u32 vp_cam;
161
162 /* IPI used for sending ... IPIs */
163 u32 vp_ipi;
164 struct xive_irq_data vp_ipi_data;
165
166 /* Local emulation state */
167 uint8_t cppr; /* guest CPPR */
168 uint8_t hw_cppr;/* Hardware CPPR */
169 uint8_t mfrr;
170 uint8_t pending;
171
172 /* Each VP has 8 queues though we only provision some */
173 struct xive_q queues[KVMPPC_XIVE_Q_COUNT];
174 u32 esc_virq[KVMPPC_XIVE_Q_COUNT];
175 char *esc_virq_names[KVMPPC_XIVE_Q_COUNT];
176
177 /* Stash a delayed irq on restore from migration (see set_icp) */
178 u32 delayed_irq;
179
180 /* Stats */
181 u64 stat_rm_h_xirr;
182 u64 stat_rm_h_ipoll;
183 u64 stat_rm_h_cppr;
184 u64 stat_rm_h_eoi;
185 u64 stat_rm_h_ipi;
186 u64 stat_vm_h_xirr;
187 u64 stat_vm_h_ipoll;
188 u64 stat_vm_h_cppr;
189 u64 stat_vm_h_eoi;
190 u64 stat_vm_h_ipi;
191};
192
193static inline struct kvm_vcpu *kvmppc_xive_find_server(struct kvm *kvm, u32 nr)
194{
195 struct kvm_vcpu *vcpu = NULL;
196 int i;
197
198 kvm_for_each_vcpu(i, vcpu, kvm) {
199 if (vcpu->arch.xive_vcpu && nr == vcpu->arch.xive_vcpu->server_num)
200 return vcpu;
201 }
202 return NULL;
203}
204
205static inline struct kvmppc_xive_src_block *kvmppc_xive_find_source(struct kvmppc_xive *xive,
206 u32 irq, u16 *source)
207{
208 u32 bid = irq >> KVMPPC_XICS_ICS_SHIFT;
209 u16 src = irq & KVMPPC_XICS_SRC_MASK;
210
211 if (source)
212 *source = src;
213 if (bid > KVMPPC_XICS_MAX_ICS_ID)
214 return NULL;
215 return xive->src_blocks[bid];
216}
217
Cédric Le Goatereacc56b2019-04-18 12:39:28 +0200218static inline u32 kvmppc_xive_vp(struct kvmppc_xive *xive, u32 server)
219{
220 return xive->vp_base + kvmppc_pack_vcpu_id(xive->kvm, server);
221}
222
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +1000223/*
224 * Mapping between guest priorities and host priorities
225 * is as follow.
226 *
227 * Guest request for 0...6 are honored. Guest request for anything
Benjamin Herrenschmidtbf4159da2018-01-12 13:37:12 +1100228 * higher results in a priority of 6 being applied.
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +1000229 *
230 * Similar mapping is done for CPPR values
231 */
232static inline u8 xive_prio_from_guest(u8 prio)
233{
Benjamin Herrenschmidtbf4159da2018-01-12 13:37:12 +1100234 if (prio == 0xff || prio < 6)
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +1000235 return prio;
Benjamin Herrenschmidtbf4159da2018-01-12 13:37:12 +1100236 return 6;
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +1000237}
238
239static inline u8 xive_prio_to_guest(u8 prio)
240{
Benjamin Herrenschmidtbf4159da2018-01-12 13:37:12 +1100241 return prio;
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +1000242}
243
244static inline u32 __xive_read_eq(__be32 *qpage, u32 msk, u32 *idx, u32 *toggle)
245{
246 u32 cur;
247
248 if (!qpage)
249 return 0;
250 cur = be32_to_cpup(qpage + *idx);
251 if ((cur >> 31) == *toggle)
252 return 0;
253 *idx = (*idx + 1) & msk;
254 if (*idx == 0)
255 (*toggle) ^= 1;
256 return cur & 0x7fffffff;
257}
258
259extern unsigned long xive_rm_h_xirr(struct kvm_vcpu *vcpu);
260extern unsigned long xive_rm_h_ipoll(struct kvm_vcpu *vcpu, unsigned long server);
261extern int xive_rm_h_ipi(struct kvm_vcpu *vcpu, unsigned long server,
262 unsigned long mfrr);
263extern int xive_rm_h_cppr(struct kvm_vcpu *vcpu, unsigned long cppr);
264extern int xive_rm_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr);
265
266extern unsigned long (*__xive_vm_h_xirr)(struct kvm_vcpu *vcpu);
267extern unsigned long (*__xive_vm_h_ipoll)(struct kvm_vcpu *vcpu, unsigned long server);
268extern int (*__xive_vm_h_ipi)(struct kvm_vcpu *vcpu, unsigned long server,
269 unsigned long mfrr);
270extern int (*__xive_vm_h_cppr)(struct kvm_vcpu *vcpu, unsigned long cppr);
271extern int (*__xive_vm_h_eoi)(struct kvm_vcpu *vcpu, unsigned long xirr);
272
Cédric Le Goatereacc56b2019-04-18 12:39:28 +0200273/*
274 * Common Xive routines for XICS-over-XIVE and XIVE native
275 */
276void kvmppc_xive_disable_vcpu_interrupts(struct kvm_vcpu *vcpu);
277int kvmppc_xive_debug_show_queues(struct seq_file *m, struct kvm_vcpu *vcpu);
Cédric Le Goater4131f832019-04-18 12:39:29 +0200278struct kvmppc_xive_src_block *kvmppc_xive_create_src_block(
279 struct kvmppc_xive *xive, int irq);
280void kvmppc_xive_free_sources(struct kvmppc_xive_src_block *sb);
Cédric Le Goatere8676ce2019-04-18 12:39:30 +0200281int kvmppc_xive_select_target(struct kvm *kvm, u32 *server, u8 prio);
Cédric Le Goater13ce3292019-04-18 12:39:31 +0200282int kvmppc_xive_attach_escalation(struct kvm_vcpu *vcpu, u8 prio,
283 bool single_escalation);
Cédric Le Goater5422e952019-04-18 12:39:42 +0200284struct kvmppc_xive *kvmppc_xive_get_device(struct kvm *kvm, u32 type);
Cédric Le Goatereacc56b2019-04-18 12:39:28 +0200285
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +1000286#endif /* CONFIG_KVM_XICS */
287#endif /* _KVM_PPC_BOOK3S_XICS_H */