| Thomas Gleixner | 1a59d1b8 | 2019-05-27 08:55:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| Ananth N Mavinakayanahalli | 7118e7e | 2012-08-23 21:26:02 +0000 | [diff] [blame] | 2 | #ifndef _ASM_POWERPC_PROBES_H |
| 3 | #define _ASM_POWERPC_PROBES_H |
| 4 | #ifdef __KERNEL__ |
| 5 | /* |
| 6 | * Definitions common to probes files |
| 7 | * |
| Ananth N Mavinakayanahalli | 7118e7e | 2012-08-23 21:26:02 +0000 | [diff] [blame] | 8 | * Copyright IBM Corporation, 2012 |
| 9 | */ |
| 10 | #include <linux/types.h> |
| 11 | |
| Ananth N Mavinakayanahalli | 28e1e58 | 2012-09-05 22:17:04 +0000 | [diff] [blame] | 12 | typedef u32 ppc_opcode_t; |
| Ananth N Mavinakayanahalli | 7118e7e | 2012-08-23 21:26:02 +0000 | [diff] [blame] | 13 | #define BREAKPOINT_INSTRUCTION 0x7fe00008 /* trap */ |
| 14 | |
| 15 | /* Trap definitions per ISA */ |
| 16 | #define IS_TW(instr) (((instr) & 0xfc0007fe) == 0x7c000008) |
| 17 | #define IS_TD(instr) (((instr) & 0xfc0007fe) == 0x7c000088) |
| 18 | #define IS_TDI(instr) (((instr) & 0xfc000000) == 0x08000000) |
| 19 | #define IS_TWI(instr) (((instr) & 0xfc000000) == 0x0c000000) |
| 20 | |
| 21 | #ifdef CONFIG_PPC64 |
| 22 | #define is_trap(instr) (IS_TW(instr) || IS_TD(instr) || \ |
| 23 | IS_TWI(instr) || IS_TDI(instr)) |
| 24 | #else |
| 25 | #define is_trap(instr) (IS_TW(instr) || IS_TWI(instr)) |
| 26 | #endif /* CONFIG_PPC64 */ |
| 27 | |
| Suzuki K. Poulose | 35fd219 | 2012-12-03 20:38:37 +0530 | [diff] [blame] | 28 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
| 29 | #define MSR_SINGLESTEP (MSR_DE) |
| 30 | #else |
| 31 | #define MSR_SINGLESTEP (MSR_SE) |
| 32 | #endif |
| 33 | |
| 34 | /* Enable single stepping for the current task */ |
| 35 | static inline void enable_single_step(struct pt_regs *regs) |
| 36 | { |
| 37 | regs->msr |= MSR_SINGLESTEP; |
| 38 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
| 39 | /* |
| 40 | * We turn off Critical Input Exception(CE) to ensure that the single |
| 41 | * step will be for the instruction we have the probe on; if we don't, |
| 42 | * it is possible we'd get the single step reported for CE. |
| 43 | */ |
| 44 | regs->msr &= ~MSR_CE; |
| 45 | mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM); |
| 46 | #ifdef CONFIG_PPC_47x |
| 47 | isync(); |
| 48 | #endif |
| 49 | #endif |
| 50 | } |
| 51 | |
| 52 | |
| Ananth N Mavinakayanahalli | 7118e7e | 2012-08-23 21:26:02 +0000 | [diff] [blame] | 53 | #endif /* __KERNEL__ */ |
| 54 | #endif /* _ASM_POWERPC_PROBES_H */ |