| Thomas Gleixner | 2874c5f | 2019-05-27 08:55:01 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| jdl@freescale.com | a37c887 | 2005-09-07 15:27:09 -0500 | [diff] [blame] | 2 | #ifndef _ASM_POWERPC_MC146818RTC_H |
| 3 | #define _ASM_POWERPC_MC146818RTC_H |
| Jon Loeliger | 6b9269a | 2005-09-01 15:51:52 -0500 | [diff] [blame] | 4 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | /* |
| 6 | * Machine dependent access functions for RTC registers. |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | */ |
| Jon Loeliger | 6b9269a | 2005-09-01 15:51:52 -0500 | [diff] [blame] | 8 | |
| 9 | #ifdef __KERNEL__ |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | |
| 11 | #include <asm/io.h> |
| 12 | |
| 13 | #ifndef RTC_PORT |
| 14 | #define RTC_PORT(x) (0x70 + (x)) |
| 15 | #define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */ |
| 16 | #endif |
| 17 | |
| 18 | /* |
| 19 | * The yet supported machines all access the RTC index register via |
| 20 | * an ISA port access but the way to access the date register differs ... |
| 21 | */ |
| 22 | #define CMOS_READ(addr) ({ \ |
| 23 | outb_p((addr),RTC_PORT(0)); \ |
| 24 | inb_p(RTC_PORT(1)); \ |
| 25 | }) |
| 26 | #define CMOS_WRITE(val, addr) ({ \ |
| 27 | outb_p((addr),RTC_PORT(0)); \ |
| 28 | outb_p((val),RTC_PORT(1)); \ |
| 29 | }) |
| 30 | |
| Jon Loeliger | 6b9269a | 2005-09-01 15:51:52 -0500 | [diff] [blame] | 31 | #endif /* __KERNEL__ */ |
| jdl@freescale.com | a37c887 | 2005-09-07 15:27:09 -0500 | [diff] [blame] | 32 | #endif /* _ASM_POWERPC_MC146818RTC_H */ |