Thomas Gleixner | 2874c5f | 2019-05-27 08:55:01 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2003 Ralf Baechle |
| 4 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | * Handler for RM7000 extended interrupts. These are a non-standard |
| 6 | * feature so we handle them separately from standard interrupts. |
| 7 | */ |
| 8 | #include <linux/init.h> |
| 9 | #include <linux/interrupt.h> |
David Howells | ca4d3e67 | 2010-10-07 14:08:54 +0100 | [diff] [blame] | 10 | #include <linux/irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | #include <linux/kernel.h> |
| 12 | |
| 13 | #include <asm/irq_cpu.h> |
| 14 | #include <asm/mipsregs.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 15 | |
Thomas Gleixner | e059852 | 2011-03-23 21:09:00 +0000 | [diff] [blame] | 16 | static inline void unmask_rm7k_irq(struct irq_data *d) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | { |
Thomas Gleixner | e059852 | 2011-03-23 21:09:00 +0000 | [diff] [blame] | 18 | set_c0_intcontrol(0x100 << (d->irq - RM7K_CPU_IRQ_BASE)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | } |
| 20 | |
Thomas Gleixner | e059852 | 2011-03-23 21:09:00 +0000 | [diff] [blame] | 21 | static inline void mask_rm7k_irq(struct irq_data *d) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | { |
Thomas Gleixner | e059852 | 2011-03-23 21:09:00 +0000 | [diff] [blame] | 23 | clear_c0_intcontrol(0x100 << (d->irq - RM7K_CPU_IRQ_BASE)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | } |
| 25 | |
Ralf Baechle | 94dee17 | 2006-07-02 14:41:42 +0100 | [diff] [blame] | 26 | static struct irq_chip rm7k_irq_controller = { |
Atsushi Nemoto | 70d21cd | 2007-01-15 00:07:25 +0900 | [diff] [blame] | 27 | .name = "RM7000", |
Thomas Gleixner | e059852 | 2011-03-23 21:09:00 +0000 | [diff] [blame] | 28 | .irq_ack = mask_rm7k_irq, |
| 29 | .irq_mask = mask_rm7k_irq, |
| 30 | .irq_mask_ack = mask_rm7k_irq, |
| 31 | .irq_unmask = unmask_rm7k_irq, |
| 32 | .irq_eoi = unmask_rm7k_irq |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | }; |
| 34 | |
Atsushi Nemoto | 97dcb82 | 2007-01-08 02:14:29 +0900 | [diff] [blame] | 35 | void __init rm7k_cpu_irq_init(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | { |
Atsushi Nemoto | 97dcb82 | 2007-01-08 02:14:29 +0900 | [diff] [blame] | 37 | int base = RM7K_CPU_IRQ_BASE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | int i; |
| 39 | |
| 40 | clear_c0_intcontrol(0x00000f00); /* Mask all */ |
| 41 | |
Atsushi Nemoto | 1603b5a | 2006-11-02 02:08:36 +0900 | [diff] [blame] | 42 | for (i = base; i < base + 4; i++) |
Thomas Gleixner | e4ec798 | 2011-03-27 15:19:28 +0200 | [diff] [blame] | 43 | irq_set_chip_and_handler(i, &rm7k_irq_controller, |
Ralf Baechle | 30e748a | 2007-11-15 19:37:15 +0000 | [diff] [blame] | 44 | handle_percpu_irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | } |