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nv-tegra.nvidia.com / linux-5.10 / d2912cb15bdda8ba4a5dd73396ad62641af2f520 / . / arch / arm / mach-omap2 / vp.h
blob: 4d7dd204e92fe144c692cc873b8ade18c9fad3bc [file] [log] [blame]
Thomas Gleixnerd2912cb2019-06-04 10:11:33 +0200[diff] [blame^]1/* SPDX-License-Identifier: GPL-2.0-only */
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]2/*
3 * OMAP3/4 Voltage Processor (VP) structure and macro definitions
4 *
5 * Copyright (C) 2007, 2010 Texas Instruments, Inc.
6 * Rajendra Nayak <rnayak@ti.com>
7 * Lesly A M <x0080970@ti.com>
8 * Thara Gopinath <thara@ti.com>
9 *
10 * Copyright (C) 2008, 2011 Nokia Corporation
11 * Kalle Jokiniemi
12 * Paul Walmsley
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]13 */
14#ifndef __ARCH_ARM_MACH_OMAP2_VP_H
15#define __ARCH_ARM_MACH_OMAP2_VP_H
16
17#include <linux/kernel.h>
18
Kevin Hilman01f48d32011-03-21 14:29:13 -0700[diff] [blame]19struct voltagedomain;
20
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]21/* XXX document */
22#define VP_IDLE_TIMEOUT 200
23#define VP_TRANXDONE_TIMEOUT 300
24
Kevin Hilman58aaa592011-03-28 10:52:04 -0700[diff] [blame]25/**
26 * struct omap_vp_ops - per-VP operations
27 * @check_txdone: check for VP transaction done
28 * @clear_txdone: clear VP transaction done status
29 */
30struct omap_vp_ops {
31 u32 (*check_txdone)(u8 vp_id);
32 void (*clear_txdone)(u8 vp_id);
33};
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]34
35/**
Kevin Hilmanb7ea8032011-04-04 15:25:07 -0700[diff] [blame]36 * struct omap_vp_common - register data common to all VDDs
Kevin Hilman0ec30412011-04-04 16:02:28 -0700[diff] [blame]37 * @vpconfig_erroroffset_mask: ERROROFFSET bitmask in the PRM_VP*_CONFIG reg
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]38 * @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG reg
39 * @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the PRM_VP*_CONFIG reg
Kevin Hilman0ec30412011-04-04 16:02:28 -0700[diff] [blame]40 * @vpconfig_timeouten: TIMEOUT bitmask in the PRM_VP*_CONFIG reg
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]41 * @vpconfig_initvdd: INITVDD bitmask in the PRM_VP*_CONFIG reg
42 * @vpconfig_forceupdate: FORCEUPDATE bitmask in the PRM_VP*_CONFIG reg
43 * @vpconfig_vpenable: VPENABLE bitmask in the PRM_VP*_CONFIG reg
44 * @vpconfig_erroroffset_shift: ERROROFFSET field shift in PRM_VP*_CONFIG reg
45 * @vpconfig_errorgain_shift: ERRORGAIN field shift in PRM_VP*_CONFIG reg
46 * @vpconfig_initvoltage_shift: INITVOLTAGE field shift in PRM_VP*_CONFIG reg
Kevin Hilman0ec30412011-04-04 16:02:28 -0700[diff] [blame]47 * @vstepmin_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN reg
48 * @vstepmin_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in PRM_VP*_VSTEPMIN reg
49 * @vstepmax_stepmax_shift: VSTEPMAX field shift in the PRM_VP*_VSTEPMAX reg
50 * @vstepmax_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in PRM_VP*_VSTEPMAX reg
51 * @vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg
52 * @vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg
53 * @vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg
Todd Poynorbea30ed2011-05-27 19:15:59 -0700[diff] [blame]54 * @vpvoltage_mask: VPVOLTAGE field mask in PRM_VP*_VOLTAGE reg
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]55 */
Kevin Hilmanb7ea8032011-04-04 15:25:07 -0700[diff] [blame]56struct omap_vp_common {
Kevin Hilman0ec30412011-04-04 16:02:28 -0700[diff] [blame]57 u32 vpconfig_erroroffset_mask;
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]58 u32 vpconfig_errorgain_mask;
59 u32 vpconfig_initvoltage_mask;
Kevin Hilman0ec30412011-04-04 16:02:28 -0700[diff] [blame]60 u8 vpconfig_timeouten;
61 u8 vpconfig_initvdd;
62 u8 vpconfig_forceupdate;
63 u8 vpconfig_vpenable;
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]64 u8 vstepmin_stepmin_shift;
65 u8 vstepmin_smpswaittimemin_shift;
66 u8 vstepmax_stepmax_shift;
67 u8 vstepmax_smpswaittimemax_shift;
68 u8 vlimitto_vddmin_shift;
69 u8 vlimitto_vddmax_shift;
70 u8 vlimitto_timeout_shift;
Todd Poynorbea30ed2011-05-27 19:15:59 -0700[diff] [blame]71 u8 vpvoltage_mask;
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]72
Kevin Hilman58aaa592011-03-28 10:52:04 -0700[diff] [blame]73 const struct omap_vp_ops *ops;
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]74};
75
76/**
Kevin Hilmanb7ea8032011-04-04 15:25:07 -0700[diff] [blame]77 * struct omap_vp_instance - VP register offsets (per-VDD)
78 * @common: pointer to struct omap_vp_common * for this SoC
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]79 * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start
80 * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start
81 * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start
82 * @vstatus: PRM_VP*_VSTATUS reg offset from PRM start
83 * @voltage: PRM_VP*_VOLTAGE reg offset from PRM start
Kevin Hilman58aaa592011-03-28 10:52:04 -0700[diff] [blame]84 * @id: Unique identifier for VP instance.
Kevin Hilmanb7ea8032011-04-04 15:25:07 -0700[diff] [blame]85 * @enabled: flag to keep track of whether vp is enabled or not
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]86 *
87 * XXX vp_common is probably not needed since it is per-SoC
88 */
Kevin Hilmanb7ea8032011-04-04 15:25:07 -0700[diff] [blame]89struct omap_vp_instance {
90 const struct omap_vp_common *common;
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]91 u8 vpconfig;
92 u8 vstepmin;
93 u8 vstepmax;
94 u8 vlimitto;
95 u8 vstatus;
96 u8 voltage;
Kevin Hilman58aaa592011-03-28 10:52:04 -0700[diff] [blame]97 u8 id;
Kevin Hilmanb7ea8032011-04-04 15:25:07 -0700[diff] [blame]98 bool enabled;
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]99};
100
Kevin Hilmanb7ea8032011-04-04 15:25:07 -0700[diff] [blame]101extern struct omap_vp_instance omap3_vp_mpu;
102extern struct omap_vp_instance omap3_vp_core;
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]103
Kevin Hilmanb7ea8032011-04-04 15:25:07 -0700[diff] [blame]104extern struct omap_vp_instance omap4_vp_mpu;
105extern struct omap_vp_instance omap4_vp_iva;
106extern struct omap_vp_instance omap4_vp_core;
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]107
Tero Kristo8b5d8c02012-09-25 19:33:35 +0300[diff] [blame]108extern struct omap_vp_param omap3_mpu_vp_data;
109extern struct omap_vp_param omap3_core_vp_data;
110
111extern struct omap_vp_param omap4_mpu_vp_data;
112extern struct omap_vp_param omap4_iva_vp_data;
113extern struct omap_vp_param omap4_core_vp_data;
114
Kevin Hilman01f48d32011-03-21 14:29:13 -0700[diff] [blame]115void omap_vp_init(struct voltagedomain *voltdm);
116void omap_vp_enable(struct voltagedomain *voltdm);
117void omap_vp_disable(struct voltagedomain *voltdm);
Kevin Hilman01f48d32011-03-21 14:29:13 -0700[diff] [blame]118int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
119 unsigned long target_volt);
Kevin Hilman76ea7422011-04-05 15:15:31 -0700[diff] [blame]120int omap_vp_update_errorgain(struct voltagedomain *voltdm,
121 unsigned long target_volt);
Kevin Hilman01f48d32011-03-21 14:29:13 -0700[diff] [blame]122
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]123#endif