Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 2 | /* |
| 3 | * arch/arm/mach-ixp4xx/include/mach/cpu.h |
| 4 | * |
| 5 | * IXP4XX cpu type detection |
| 6 | * |
| 7 | * Copyright (C) 2007 MontaVista Software, Inc. |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef __ASM_ARCH_CPU_H__ |
| 11 | #define __ASM_ARCH_CPU_H__ |
| 12 | |
Arnd Bergmann | 13ec32f | 2012-09-14 20:19:40 +0000 | [diff] [blame] | 13 | #include <linux/io.h> |
Russell King | 0ba8b9b | 2008-08-10 18:08:10 +0100 | [diff] [blame] | 14 | #include <asm/cputype.h> |
| 15 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 16 | /* Processor id value in CP15 Register 0 */ |
Krzysztof Hałasa | de3ce85 | 2009-03-17 13:51:52 +0100 | [diff] [blame] | 17 | #define IXP42X_PROCESSOR_ID_VALUE 0x690541c0 /* including unused 0x690541Ex */ |
| 18 | #define IXP42X_PROCESSOR_ID_MASK 0xffffffc0 |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 19 | |
Krzysztof Hałasa | de3ce85 | 2009-03-17 13:51:52 +0100 | [diff] [blame] | 20 | #define IXP43X_PROCESSOR_ID_VALUE 0x69054040 |
| 21 | #define IXP43X_PROCESSOR_ID_MASK 0xfffffff0 |
| 22 | |
| 23 | #define IXP46X_PROCESSOR_ID_VALUE 0x69054200 /* including IXP455 */ |
| 24 | #define IXP46X_PROCESSOR_ID_MASK 0xfffffff0 |
| 25 | |
Krzysztof Hałasa | 8a4fe82 | 2009-04-28 14:48:43 +0200 | [diff] [blame] | 26 | #define cpu_is_ixp42x_rev_a0() ((read_cpuid_id() & (IXP42X_PROCESSOR_ID_MASK | 0xF)) == \ |
| 27 | IXP42X_PROCESSOR_ID_VALUE) |
Krzysztof Hałasa | de3ce85 | 2009-03-17 13:51:52 +0100 | [diff] [blame] | 28 | #define cpu_is_ixp42x() ((read_cpuid_id() & IXP42X_PROCESSOR_ID_MASK) == \ |
| 29 | IXP42X_PROCESSOR_ID_VALUE) |
| 30 | #define cpu_is_ixp43x() ((read_cpuid_id() & IXP43X_PROCESSOR_ID_MASK) == \ |
| 31 | IXP43X_PROCESSOR_ID_VALUE) |
| 32 | #define cpu_is_ixp46x() ((read_cpuid_id() & IXP46X_PROCESSOR_ID_MASK) == \ |
| 33 | IXP46X_PROCESSOR_ID_VALUE) |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 34 | |
| 35 | static inline u32 ixp4xx_read_feature_bits(void) |
| 36 | { |
Arnd Bergmann | 13ec32f | 2012-09-14 20:19:40 +0000 | [diff] [blame] | 37 | u32 val = ~__raw_readl(IXP4XX_EXP_CFG2); |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 38 | |
Krzysztof Hałasa | 8a4fe82 | 2009-04-28 14:48:43 +0200 | [diff] [blame] | 39 | if (cpu_is_ixp42x_rev_a0()) |
| 40 | return IXP42X_FEATURE_MASK & ~(IXP4XX_FEATURE_RCOMP | |
| 41 | IXP4XX_FEATURE_AES); |
Krzysztof Hałasa | de3ce85 | 2009-03-17 13:51:52 +0100 | [diff] [blame] | 42 | if (cpu_is_ixp42x()) |
| 43 | return val & IXP42X_FEATURE_MASK; |
| 44 | if (cpu_is_ixp43x()) |
| 45 | return val & IXP43X_FEATURE_MASK; |
| 46 | return val & IXP46X_FEATURE_MASK; |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 47 | } |
| 48 | |
| 49 | static inline void ixp4xx_write_feature_bits(u32 value) |
| 50 | { |
Arnd Bergmann | 13ec32f | 2012-09-14 20:19:40 +0000 | [diff] [blame] | 51 | __raw_writel(~value, IXP4XX_EXP_CFG2); |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 52 | } |
| 53 | |
| 54 | #endif /* _ASM_ARCH_CPU_H */ |