Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 2 | /* |
| 3 | * arch/arch/mach-ixp4xx/fsg-pci.c |
| 4 | * |
| 5 | * FSG board-level PCI initialization |
| 6 | * |
| 7 | * Author: Rod Whitby <rod@whitby.id.au> |
| 8 | * Maintainer: http://www.nslu2-linux.org/ |
| 9 | * |
| 10 | * based on ixdp425-pci.c: |
| 11 | * Copyright (C) 2002 Intel Corporation. |
| 12 | * Copyright (C) 2003-2004 MontaVista Software, Inc. |
Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 13 | */ |
| 14 | |
| 15 | #include <linux/pci.h> |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/irq.h> |
Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 18 | #include <asm/mach/pci.h> |
| 19 | #include <asm/mach-types.h> |
| 20 | |
Linus Walleij | dc8ef8cd | 2018-12-29 15:47:52 +0100 | [diff] [blame] | 21 | #include "irqs.h" |
| 22 | |
Krzysztof Hałasa | 8d3fdf3 | 2009-11-17 18:48:23 +0100 | [diff] [blame] | 23 | #define MAX_DEV 3 |
| 24 | #define IRQ_LINES 3 |
Krzysztof Hałasa | 914e7bc | 2009-11-16 22:53:53 +0100 | [diff] [blame] | 25 | |
| 26 | /* PCI controller GPIO to IRQ pin mappings */ |
Krzysztof Hałasa | 8d3fdf3 | 2009-11-17 18:48:23 +0100 | [diff] [blame] | 27 | #define INTA 6 |
| 28 | #define INTB 7 |
| 29 | #define INTC 5 |
Krzysztof Hałasa | 914e7bc | 2009-11-16 22:53:53 +0100 | [diff] [blame] | 30 | |
Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 31 | void __init fsg_pci_preinit(void) |
| 32 | { |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 33 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); |
| 34 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); |
| 35 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); |
Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 36 | ixp4xx_pci_preinit(); |
| 37 | } |
| 38 | |
Ralf Baechle | d534194 | 2011-06-10 15:30:21 +0100 | [diff] [blame] | 39 | static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 40 | { |
Krzysztof Hałasa | 8d3fdf3 | 2009-11-17 18:48:23 +0100 | [diff] [blame] | 41 | static int pci_irq_table[IRQ_LINES] = { |
| 42 | IXP4XX_GPIO_IRQ(INTC), |
| 43 | IXP4XX_GPIO_IRQ(INTB), |
| 44 | IXP4XX_GPIO_IRQ(INTA), |
Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 45 | }; |
| 46 | |
| 47 | int irq = -1; |
Krzysztof Hałasa | 8d3fdf3 | 2009-11-17 18:48:23 +0100 | [diff] [blame] | 48 | slot -= 11; |
Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 49 | |
Krzysztof Hałasa | 8d3fdf3 | 2009-11-17 18:48:23 +0100 | [diff] [blame] | 50 | if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES) |
| 51 | irq = pci_irq_table[slot - 1]; |
Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 52 | printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n", |
| 53 | __func__, slot, pin, irq); |
| 54 | |
| 55 | return irq; |
| 56 | } |
| 57 | |
| 58 | struct hw_pci fsg_pci __initdata = { |
| 59 | .nr_controllers = 1, |
Russell King | c23bfc3 | 2012-03-10 12:49:16 +0000 | [diff] [blame] | 60 | .ops = &ixp4xx_ops, |
Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 61 | .preinit = fsg_pci_preinit, |
Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 62 | .setup = ixp4xx_setup, |
Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 63 | .map_irq = fsg_map_irq, |
| 64 | }; |
| 65 | |
| 66 | int __init fsg_pci_init(void) |
| 67 | { |
| 68 | if (machine_is_fsg()) |
| 69 | pci_common_init(&fsg_pci); |
| 70 | return 0; |
| 71 | } |
| 72 | |
| 73 | subsys_initcall(fsg_pci_init); |