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Thomas Gleixnerd2912cb2019-06-04 10:11:33 +02001// SPDX-License-Identifier: GPL-2.0-only
Shawn Guo31a2fbf2013-05-03 11:24:47 +08002/*
3 * Copyright 2013 Freescale Semiconductor, Inc.
Shawn Guo31a2fbf2013-05-03 11:24:47 +08004 */
5
6#include <linux/irqchip.h>
7#include <linux/of.h>
8#include <linux/of_platform.h>
Fugang Duana9aec302013-09-04 10:58:17 +08009#include <linux/mfd/syscon.h>
10#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
11#include <linux/regmap.h>
Shawn Guo31a2fbf2013-05-03 11:24:47 +080012#include <asm/mach/arch.h>
13#include <asm/mach/map.h>
14
15#include "common.h"
Anson Huang751f7e92014-01-09 16:03:16 +080016#include "cpuidle.h"
Bai Pingdee5dee2018-03-08 17:34:55 +080017#include "hardware.h"
Shawn Guo31a2fbf2013-05-03 11:24:47 +080018
Fugang Duana9aec302013-09-04 10:58:17 +080019static void __init imx6sl_fec_init(void)
20{
21 struct regmap *gpr;
22
23 /* set FEC clock from internal PLL clock source */
24 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sl-iomuxc-gpr");
25 if (!IS_ERR(gpr)) {
26 regmap_update_bits(gpr, IOMUXC_GPR1,
27 IMX6SL_GPR1_FEC_CLOCK_MUX2_SEL_MASK, 0);
28 regmap_update_bits(gpr, IOMUXC_GPR1,
29 IMX6SL_GPR1_FEC_CLOCK_MUX1_SEL_MASK, 0);
30 } else {
31 pr_err("failed to find fsl,imx6sl-iomux-gpr regmap\n");
32 }
33}
34
John Tobias1ed4aae2013-12-19 12:35:37 -080035static void __init imx6sl_init_late(void)
36{
37 /* imx6sl reuses imx6q cpufreq driver */
38 if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
39 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
Anson Huang751f7e92014-01-09 16:03:16 +080040
Arnd Bergmannbc0ebbd2018-07-09 17:51:17 +020041 if (IS_ENABLED(CONFIG_SOC_IMX6SL) && cpu_is_imx6sl())
Anson Huange7fa1fb2018-06-03 10:33:45 +080042 imx6sl_cpuidle_init();
Arnd Bergmannbc0ebbd2018-07-09 17:51:17 +020043 else if (IS_ENABLED(CONFIG_SOC_IMX6SLL))
Anson Huange7fa1fb2018-06-03 10:33:45 +080044 imx6sx_cpuidle_init();
John Tobias1ed4aae2013-12-19 12:35:37 -080045}
46
Shawn Guo31a2fbf2013-05-03 11:24:47 +080047static void __init imx6sl_init_machine(void)
48{
Shawn Guoa2887542013-08-13 16:59:28 +080049 struct device *parent;
50
Shawn Guoa2887542013-08-13 16:59:28 +080051 parent = imx_soc_device_init();
52 if (parent == NULL)
53 pr_warn("failed to initialize soc device\n");
54
Kefeng Wang435ebcb2016-06-01 14:53:05 +080055 of_platform_default_populate(NULL, NULL, parent);
Fugang Duana9aec302013-09-04 10:58:17 +080056
Bai Pingdee5dee2018-03-08 17:34:55 +080057 if (cpu_is_imx6sl())
58 imx6sl_fec_init();
Shawn Guo9ba64fe2013-10-17 10:07:09 +080059 imx_anatop_init();
Anson Huangdf595742014-01-17 11:39:05 +080060 imx6sl_pm_init();
Shawn Guo31a2fbf2013-05-03 11:24:47 +080061}
62
63static void __init imx6sl_init_irq(void)
64{
Marc Zyngier14517562015-03-13 16:05:37 +000065 imx_gpc_check_dt();
Shawn Guod8ce8232013-08-13 16:54:05 +080066 imx_init_revision_from_anatop();
Shawn Guo73dada72013-07-08 21:52:33 +080067 imx_init_l2cache();
Shawn Guo31a2fbf2013-05-03 11:24:47 +080068 imx_src_init();
Shawn Guo31a2fbf2013-05-03 11:24:47 +080069 irqchip_init();
Bai Pingdee5dee2018-03-08 17:34:55 +080070 if (cpu_is_imx6sl())
71 imx6_pm_ccm_init("fsl,imx6sl-ccm");
72 else
73 imx6_pm_ccm_init("fsl,imx6sll-ccm");
Shawn Guo31a2fbf2013-05-03 11:24:47 +080074}
75
Shawn Guo8756dd92014-07-01 16:03:00 +080076static const char * const imx6sl_dt_compat[] __initconst = {
Shawn Guo31a2fbf2013-05-03 11:24:47 +080077 "fsl,imx6sl",
Bai Pingdee5dee2018-03-08 17:34:55 +080078 "fsl,imx6sll",
Shawn Guo31a2fbf2013-05-03 11:24:47 +080079 NULL,
80};
81
82DT_MACHINE_START(IMX6SL, "Freescale i.MX6 SoloLite (Device Tree)")
Andrey Smirnov510aca62016-06-18 18:09:31 -070083 .l2c_aux_val = 0,
84 .l2c_aux_mask = ~0,
Shawn Guo31a2fbf2013-05-03 11:24:47 +080085 .init_irq = imx6sl_init_irq,
Shawn Guo31a2fbf2013-05-03 11:24:47 +080086 .init_machine = imx6sl_init_machine,
John Tobias1ed4aae2013-12-19 12:35:37 -080087 .init_late = imx6sl_init_late,
Shawn Guo31a2fbf2013-05-03 11:24:47 +080088 .dt_compat = imx6sl_dt_compat,
Shawn Guo31a2fbf2013-05-03 11:24:47 +080089MACHINE_END