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Thomas Gleixnerd2912cb2019-06-04 10:11:33 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002/*
Russell King4baa9922008-08-02 10:55:55 +01003 * arch/arm/include/asm/tlb.h
Linus Torvalds1da177e2005-04-16 15:20:36 -07004 *
5 * Copyright (C) 2002 Russell King
6 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07007 * Experimentation shows that on a StrongARM, it appears to be faster
8 * to use the "invalidate whole tlb" rather than "invalidate single
9 * tlb" for this.
10 *
11 * This appears true for both the process fork+exit case, as well as
12 * the munmap-large-area case.
13 */
14#ifndef __ASMARM_TLB_H
15#define __ASMARM_TLB_H
16
17#include <asm/cacheflush.h>
Hyok S. Choi01579032006-02-24 21:41:25 +000018
19#ifndef CONFIG_MMU
20
21#include <linux/pagemap.h>
Russell King58e9c472011-02-20 12:27:49 +000022
23#define tlb_flush(tlb) ((void) tlb)
24
Hyok S. Choi01579032006-02-24 21:41:25 +000025#include <asm-generic/tlb.h>
26
27#else /* !CONFIG_MMU */
28
Russell King06824ba2011-02-20 12:16:45 +000029#include <linux/swap.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070030#include <asm/pgalloc.h>
Russell King06824ba2011-02-20 12:16:45 +000031#include <asm/tlbflush.h>
32
Steve Cappera0ad5492014-10-09 15:29:18 -070033static inline void __tlb_remove_table(void *_table)
34{
35 free_page_and_swap_cache((struct page *)_table);
36}
37
Peter Zijlstrab78180b2018-09-04 14:09:30 +020038#include <asm-generic/tlb.h>
Steve Cappera0ad5492014-10-09 15:29:18 -070039
Peter Zijlstrab78180b2018-09-04 14:09:30 +020040#ifndef CONFIG_HAVE_RCU_TABLE_FREE
41#define tlb_remove_table(tlb, entry) tlb_remove_page(tlb, entry)
Steve Cappera0ad5492014-10-09 15:29:18 -070042#endif
Linus Torvalds1cf35d42014-04-25 16:05:40 -070043
Peter Zijlstra9e14f672011-05-24 17:11:53 -070044static inline void
Peter Zijlstrab78180b2018-09-04 14:09:30 +020045__pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, unsigned long addr)
Russell King06824ba2011-02-20 12:16:45 +000046{
47 pgtable_page_dtor(pte);
Catalin Marinas6d3ec1a2012-01-25 11:54:22 +010048
Peter Zijlstrab78180b2018-09-04 14:09:30 +020049#ifndef CONFIG_ARM_LPAE
Catalin Marinas6d3ec1a2012-01-25 11:54:22 +010050 /*
51 * With the classic ARM MMU, a pte page has two corresponding pmd
52 * entries, each covering 1MB.
53 */
Peter Zijlstrab78180b2018-09-04 14:09:30 +020054 addr = (addr & PMD_MASK) + SZ_1M;
55 __tlb_adjust_range(tlb, addr - PAGE_SIZE, 2 * PAGE_SIZE);
Will Deacondf547e02012-08-24 15:23:06 +010056#endif
Catalin Marinas6d3ec1a2012-01-25 11:54:22 +010057
Peter Zijlstrab78180b2018-09-04 14:09:30 +020058 tlb_remove_table(tlb, pte);
Catalin Marinasc9f27f12011-11-22 17:30:29 +000059}
60
Catalin Marinas8d962502012-07-25 14:39:26 +010061static inline void
Peter Zijlstrab78180b2018-09-04 14:09:30 +020062__pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp, unsigned long addr)
Catalin Marinas8d962502012-07-25 14:39:26 +010063{
Peter Zijlstrab78180b2018-09-04 14:09:30 +020064#ifdef CONFIG_ARM_LPAE
65 struct page *page = virt_to_page(pmdp);
Catalin Marinas8d962502012-07-25 14:39:26 +010066
Peter Zijlstrab78180b2018-09-04 14:09:30 +020067 tlb_remove_table(tlb, page);
68#endif
Anders Roxell063daa82018-07-25 11:55:57 +020069}
70
Hyok S. Choi01579032006-02-24 21:41:25 +000071#endif /* CONFIG_MMU */
Linus Torvalds1da177e2005-04-16 15:20:36 -070072#endif