blob: 3aa5c957ffbfa771ee5789288899991ed1cffae5 [file] [log] [blame]
Thomas Gleixnerc942fdd2019-05-27 08:55:06 +02001/* SPDX-License-Identifier: GPL-2.0-or-later */
Dylan Reid05e84872014-02-28 15:41:22 -08002/*
3 * Common functionality for the alsa driver code base for HD Audio.
Dylan Reid05e84872014-02-28 15:41:22 -08004 */
5
6#ifndef __SOUND_HDA_CONTROLLER_H
7#define __SOUND_HDA_CONTROLLER_H
8
Takashi Iwai89a93fe2015-02-19 18:04:17 +01009#include <linux/timecounter.h>
10#include <linux/interrupt.h>
Dylan Reid05e84872014-02-28 15:41:22 -080011#include <sound/core.h>
Takashi Iwai89a93fe2015-02-19 18:04:17 +010012#include <sound/pcm.h>
Dylan Reid05e84872014-02-28 15:41:22 -080013#include <sound/initval.h>
Pierre-Louis Bossartbe57bff2018-08-22 15:24:57 -050014#include <sound/hda_codec.h>
Takashi Iwai14752412015-04-14 12:15:47 +020015#include <sound/hda_register.h>
Takashi Iwai89a93fe2015-02-19 18:04:17 +010016
Takashi Iwai14752412015-04-14 12:15:47 +020017#define AZX_MAX_CODECS HDA_MAX_CODECS
Takashi Iwai89a93fe2015-02-19 18:04:17 +010018#define AZX_DEFAULT_CODECS 4
Takashi Iwai89a93fe2015-02-19 18:04:17 +010019
20/* driver quirks (capabilities) */
21/* bits 0-7 are used for indicating driver type */
22#define AZX_DCAPS_NO_TCSEL (1 << 8) /* No Intel TCSEL bit */
23#define AZX_DCAPS_NO_MSI (1 << 9) /* No MSI support */
24#define AZX_DCAPS_SNOOP_MASK (3 << 10) /* snoop type mask */
25#define AZX_DCAPS_SNOOP_OFF (1 << 12) /* snoop default off */
Takashi Iwaidba9b7b2017-06-29 16:18:12 +020026#ifdef CONFIG_SND_HDA_I915
27#define AZX_DCAPS_I915_COMPONENT (1 << 13) /* bind with i915 gfx */
28#else
29#define AZX_DCAPS_I915_COMPONENT 0 /* NOP */
30#endif
Takashi Iwai3e9ad242018-12-31 19:02:01 +010031/* 14 unused */
Takashi Iwai89a93fe2015-02-19 18:04:17 +010032#define AZX_DCAPS_CTX_WORKAROUND (1 << 15) /* X-Fi workaround */
33#define AZX_DCAPS_POSFIX_LPIB (1 << 16) /* Use LPIB as default */
Takashi Iwai26f05712015-12-17 08:29:53 +010034/* 17 unused */
Takashi Iwai89a93fe2015-02-19 18:04:17 +010035#define AZX_DCAPS_NO_64BIT (1 << 18) /* No 64bit address */
36#define AZX_DCAPS_SYNC_WRITE (1 << 19) /* sync each cmd write */
37#define AZX_DCAPS_OLD_SSYNC (1 << 20) /* Old SSYNC reg for ICH */
38#define AZX_DCAPS_NO_ALIGN_BUFSIZE (1 << 21) /* no buffer size alignment */
39/* 22 unused */
40#define AZX_DCAPS_4K_BDLE_BOUNDARY (1 << 23) /* BDLE in 4k boundary */
Takashi Iwaibcb337d2015-12-17 08:31:45 +010041/* 24 unused */
Takashi Iwai89a93fe2015-02-19 18:04:17 +010042#define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */
43#define AZX_DCAPS_PM_RUNTIME (1 << 26) /* runtime PM support */
Takashi Iwaie454ff82018-12-09 09:57:37 +010044/* 27 unused */
Takashi Iwai89a93fe2015-02-19 18:04:17 +010045#define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28) /* CORBRP clears itself after reset */
46#define AZX_DCAPS_NO_MSI64 (1 << 29) /* Stick to 32-bit MSIs */
47#define AZX_DCAPS_SEPARATE_STREAM_TAG (1 << 30) /* capture and playback use separate stream tag */
48
49enum {
50 AZX_SNOOP_TYPE_NONE,
51 AZX_SNOOP_TYPE_SCH,
52 AZX_SNOOP_TYPE_ATI,
53 AZX_SNOOP_TYPE_NVIDIA,
54};
55
Takashi Iwai89a93fe2015-02-19 18:04:17 +010056struct azx_dev {
Takashi Iwai7833c3f2015-04-14 18:13:13 +020057 struct hdac_stream core;
Takashi Iwai89a93fe2015-02-19 18:04:17 +010058
Takashi Iwai89a93fe2015-02-19 18:04:17 +010059 unsigned int irq_pending:1;
Takashi Iwai89a93fe2015-02-19 18:04:17 +010060 /*
61 * For VIA:
62 * A flag to ensure DMA position is 0
63 * when link position is not greater than FIFO size
64 */
65 unsigned int insufficient:1;
Takashi Iwai89a93fe2015-02-19 18:04:17 +010066};
67
Takashi Iwai7833c3f2015-04-14 18:13:13 +020068#define azx_stream(dev) (&(dev)->core)
69#define stream_to_azx_dev(s) container_of(s, struct azx_dev, core)
Takashi Iwai89a93fe2015-02-19 18:04:17 +010070
71struct azx;
72
73/* Functions to read/write to hda registers. */
74struct hda_controller_ops {
Takashi Iwai89a93fe2015-02-19 18:04:17 +010075 /* Disable msi if supported, PCI only */
76 int (*disable_msi_reset_irq)(struct azx *);
Takashi Iwai89a93fe2015-02-19 18:04:17 +010077 void (*pcm_mmap_prepare)(struct snd_pcm_substream *substream,
78 struct vm_area_struct *area);
79 /* Check if current position is acceptable */
80 int (*position_check)(struct azx *chip, struct azx_dev *azx_dev);
Mengdong Lin17eccb22015-04-29 17:43:29 +080081 /* enable/disable the link power */
82 int (*link_power)(struct azx *chip, bool enable);
Takashi Iwai89a93fe2015-02-19 18:04:17 +010083};
84
85struct azx_pcm {
86 struct azx *chip;
87 struct snd_pcm *pcm;
88 struct hda_codec *codec;
Takashi Iwai820cc6c2015-02-20 12:50:46 +010089 struct hda_pcm *info;
Takashi Iwai89a93fe2015-02-19 18:04:17 +010090 struct list_head list;
91};
92
93typedef unsigned int (*azx_get_pos_callback_t)(struct azx *, struct azx_dev *);
94typedef int (*azx_get_delay_callback_t)(struct azx *, struct azx_dev *, unsigned int pos);
95
96struct azx {
Takashi Iwaia41d1222015-04-14 22:13:18 +020097 struct hda_bus bus;
98
Takashi Iwai89a93fe2015-02-19 18:04:17 +010099 struct snd_card *card;
100 struct pci_dev *pci;
101 int dev_index;
102
103 /* chip type specific */
104 int driver_type;
105 unsigned int driver_caps;
106 int playback_streams;
107 int playback_index_offset;
108 int capture_streams;
109 int capture_index_offset;
110 int num_streams;
Takashi Iwai3a182c82018-08-30 07:58:50 +0200111 int jackpoll_interval; /* jack poll interval in jiffies */
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100112
113 /* Register interaction. */
114 const struct hda_controller_ops *ops;
115
116 /* position adjustment callbacks */
117 azx_get_pos_callback_t get_position[2];
118 azx_get_delay_callback_t get_delay[2];
119
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100120 /* locks */
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100121 struct mutex open_mutex; /* Prevents concurrent open/close operations */
122
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100123 /* PCM */
124 struct list_head pcm_list; /* azx_pcm list */
125
126 /* HD codec */
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100127 int codec_probe_mask; /* copied from probe_mask option */
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100128 unsigned int beep_mode;
129
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100130#ifdef CONFIG_SND_HDA_PATCH_LOADER
131 const struct firmware *fw;
132#endif
133
134 /* flags */
Takashi Iwai4f0189b2015-12-10 16:44:08 +0100135 int bdl_pos_adj;
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100136 int poll_count;
137 unsigned int running:1;
Takashi Iwai41438f12017-01-12 17:13:21 +0100138 unsigned int fallback_to_single_cmd:1;
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100139 unsigned int single_cmd:1;
140 unsigned int polling_mode:1;
141 unsigned int msi:1;
142 unsigned int probing:1; /* codec probing phase */
143 unsigned int snoop:1;
Takashi Iwai78c9be62018-08-11 23:33:34 +0200144 unsigned int uc_buffer:1; /* non-cached pages for stream buffers */
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100145 unsigned int align_buffer_size:1;
146 unsigned int region_requested:1;
Lukas Wunner2b760d82015-09-04 20:49:36 +0200147 unsigned int disabled:1; /* disabled by vga_switcheroo */
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100148
Guneshwor Singh50279d92016-08-04 15:46:03 +0530149 /* GTS present */
150 unsigned int gts_present:1;
151
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100152#ifdef CONFIG_SND_HDA_DSP_LOADER
153 struct azx_dev saved_azx_dev;
154#endif
155};
156
Takashi Iwaia41d1222015-04-14 22:13:18 +0200157#define azx_bus(chip) (&(chip)->bus.core)
158#define bus_to_azx(_bus) container_of(_bus, struct azx, bus.core)
Takashi Iwaia43ff5b2015-04-14 17:26:00 +0200159
Anders Roxell5b03006d2018-09-11 16:18:36 +0200160static inline bool azx_snoop(struct azx *chip)
161{
162 return !IS_ENABLED(CONFIG_X86) || chip->snoop;
163}
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100164
165/*
166 * macros for easy use
167 */
168
169#define azx_writel(chip, reg, value) \
Takashi Iwaia41d1222015-04-14 22:13:18 +0200170 snd_hdac_chip_writel(azx_bus(chip), reg, value)
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100171#define azx_readl(chip, reg) \
Takashi Iwaia41d1222015-04-14 22:13:18 +0200172 snd_hdac_chip_readl(azx_bus(chip), reg)
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100173#define azx_writew(chip, reg, value) \
Takashi Iwaia41d1222015-04-14 22:13:18 +0200174 snd_hdac_chip_writew(azx_bus(chip), reg, value)
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100175#define azx_readw(chip, reg) \
Takashi Iwaia41d1222015-04-14 22:13:18 +0200176 snd_hdac_chip_readw(azx_bus(chip), reg)
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100177#define azx_writeb(chip, reg, value) \
Takashi Iwaia41d1222015-04-14 22:13:18 +0200178 snd_hdac_chip_writeb(azx_bus(chip), reg, value)
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100179#define azx_readb(chip, reg) \
Takashi Iwaia41d1222015-04-14 22:13:18 +0200180 snd_hdac_chip_readb(azx_bus(chip), reg)
Takashi Iwai89a93fe2015-02-19 18:04:17 +0100181
182#define azx_has_pm_runtime(chip) \
David Henningsson828fa8c2015-04-15 13:29:05 +0200183 ((chip)->driver_caps & AZX_DCAPS_PM_RUNTIME)
Dylan Reid05e84872014-02-28 15:41:22 -0800184
185/* PCM setup */
Dylan Reid05e84872014-02-28 15:41:22 -0800186static inline struct azx_dev *get_azx_dev(struct snd_pcm_substream *substream)
187{
188 return substream->runtime->private_data;
189}
Takashi Iwaib6050ef2014-06-26 16:50:16 +0200190unsigned int azx_get_position(struct azx *chip, struct azx_dev *azx_dev);
191unsigned int azx_get_pos_lpib(struct azx *chip, struct azx_dev *azx_dev);
192unsigned int azx_get_pos_posbuf(struct azx *chip, struct azx_dev *azx_dev);
Dylan Reid05e84872014-02-28 15:41:22 -0800193
194/* Stream control. */
Takashi Iwai7833c3f2015-04-14 18:13:13 +0200195void azx_stop_all_streams(struct azx *chip);
Dylan Reid05e84872014-02-28 15:41:22 -0800196
Dylan Reid67908992014-02-28 15:41:23 -0800197/* Allocation functions. */
Takashi Iwaia41d1222015-04-14 22:13:18 +0200198#define azx_alloc_stream_pages(chip) \
199 snd_hdac_bus_alloc_stream_pages(azx_bus(chip))
200#define azx_free_stream_pages(chip) \
201 snd_hdac_bus_free_stream_pages(azx_bus(chip))
Dylan Reid67908992014-02-28 15:41:23 -0800202
Dylan Reidf43923f2014-02-28 15:41:27 -0800203/* Low level azx interface */
Thierry Reding17c3ad02014-04-09 12:30:57 +0200204void azx_init_chip(struct azx *chip, bool full_reset);
Dylan Reidf43923f2014-02-28 15:41:27 -0800205void azx_stop_chip(struct azx *chip);
Takashi Iwaia41d1222015-04-14 22:13:18 +0200206#define azx_enter_link_reset(chip) \
207 snd_hdac_bus_enter_link_reset(azx_bus(chip))
Dylan Reidf0b1df82014-02-28 15:41:29 -0800208irqreturn_t azx_interrupt(int irq, void *dev_id);
Dylan Reidf43923f2014-02-28 15:41:27 -0800209
Dylan Reid154867c2014-02-28 15:41:30 -0800210/* Codec interface */
Takashi Iwaia41d1222015-04-14 22:13:18 +0200211int azx_bus_init(struct azx *chip, const char *model,
212 const struct hdac_io_ops *io_ops);
Takashi Iwai96d2bd62015-02-19 18:12:22 +0100213int azx_probe_codecs(struct azx *chip, unsigned int max_slots);
Dylan Reid154867c2014-02-28 15:41:30 -0800214int azx_codec_configure(struct azx *chip);
Takashi Iwaia41d1222015-04-14 22:13:18 +0200215int azx_init_streams(struct azx *chip);
216void azx_free_streams(struct azx *chip);
Dylan Reid154867c2014-02-28 15:41:30 -0800217
Dylan Reid05e84872014-02-28 15:41:22 -0800218#endif /* __SOUND_HDA_CONTROLLER_H */