Daniel Scheller | 4771d83 | 2018-06-19 14:50:09 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 2 | /* |
| 3 | * ddbridge-hw.c: Digital Devices bridge hardware maps |
| 4 | * |
| 5 | * Copyright (C) 2010-2017 Digital Devices GmbH |
| 6 | * Ralph Metzler <rjkm@metzlerbros.de> |
| 7 | * Marcus Metzler <mocm@metzlerbros.de> |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License |
| 11 | * version 2 only, as published by the Free Software Foundation. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 17 | */ |
| 18 | |
| 19 | #include "ddbridge.h" |
Daniel Scheller | 66cc3d9 | 2017-08-20 06:41:11 -0400 | [diff] [blame] | 20 | #include "ddbridge-hw.h" |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 21 | |
| 22 | /******************************************************************************/ |
| 23 | |
Daniel Scheller | 0937e7e | 2017-08-20 06:41:13 -0400 | [diff] [blame] | 24 | static const struct ddb_regset octopus_input = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 25 | .base = 0x200, |
| 26 | .num = 0x08, |
| 27 | .size = 0x10, |
| 28 | }; |
| 29 | |
Daniel Scheller | 0937e7e | 2017-08-20 06:41:13 -0400 | [diff] [blame] | 30 | static const struct ddb_regset octopus_output = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 31 | .base = 0x280, |
| 32 | .num = 0x08, |
| 33 | .size = 0x10, |
| 34 | }; |
| 35 | |
Daniel Scheller | 0937e7e | 2017-08-20 06:41:13 -0400 | [diff] [blame] | 36 | static const struct ddb_regset octopus_idma = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 37 | .base = 0x300, |
| 38 | .num = 0x08, |
| 39 | .size = 0x10, |
| 40 | }; |
| 41 | |
Daniel Scheller | 0937e7e | 2017-08-20 06:41:13 -0400 | [diff] [blame] | 42 | static const struct ddb_regset octopus_idma_buf = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 43 | .base = 0x2000, |
| 44 | .num = 0x08, |
| 45 | .size = 0x100, |
| 46 | }; |
| 47 | |
Daniel Scheller | 0937e7e | 2017-08-20 06:41:13 -0400 | [diff] [blame] | 48 | static const struct ddb_regset octopus_odma = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 49 | .base = 0x380, |
| 50 | .num = 0x04, |
| 51 | .size = 0x10, |
| 52 | }; |
| 53 | |
Daniel Scheller | 0937e7e | 2017-08-20 06:41:13 -0400 | [diff] [blame] | 54 | static const struct ddb_regset octopus_odma_buf = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 55 | .base = 0x2800, |
| 56 | .num = 0x04, |
| 57 | .size = 0x100, |
| 58 | }; |
| 59 | |
Daniel Scheller | 0937e7e | 2017-08-20 06:41:13 -0400 | [diff] [blame] | 60 | static const struct ddb_regset octopus_i2c = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 61 | .base = 0x80, |
| 62 | .num = 0x04, |
| 63 | .size = 0x20, |
| 64 | }; |
| 65 | |
Daniel Scheller | 0937e7e | 2017-08-20 06:41:13 -0400 | [diff] [blame] | 66 | static const struct ddb_regset octopus_i2c_buf = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 67 | .base = 0x1000, |
| 68 | .num = 0x04, |
| 69 | .size = 0x200, |
| 70 | }; |
| 71 | |
| 72 | /****************************************************************************/ |
| 73 | |
Daniel Scheller | 0937e7e | 2017-08-20 06:41:13 -0400 | [diff] [blame] | 74 | static const struct ddb_regmap octopus_map = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 75 | .irq_base_i2c = 0, |
| 76 | .irq_base_idma = 8, |
| 77 | .irq_base_odma = 16, |
| 78 | .i2c = &octopus_i2c, |
| 79 | .i2c_buf = &octopus_i2c_buf, |
| 80 | .idma = &octopus_idma, |
| 81 | .idma_buf = &octopus_idma_buf, |
| 82 | .odma = &octopus_odma, |
| 83 | .odma_buf = &octopus_odma_buf, |
| 84 | .input = &octopus_input, |
| 85 | .output = &octopus_output, |
| 86 | }; |
| 87 | |
| 88 | /****************************************************************************/ |
| 89 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 90 | static const struct ddb_info ddb_none = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 91 | .type = DDB_NONE, |
| 92 | .name = "unknown Digital Devices PCIe card, install newer driver", |
| 93 | .regmap = &octopus_map, |
| 94 | }; |
| 95 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 96 | static const struct ddb_info ddb_octopus = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 97 | .type = DDB_OCTOPUS, |
| 98 | .name = "Digital Devices Octopus DVB adapter", |
| 99 | .regmap = &octopus_map, |
| 100 | .port_num = 4, |
| 101 | .i2c_mask = 0x0f, |
| 102 | }; |
| 103 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 104 | static const struct ddb_info ddb_octopusv3 = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 105 | .type = DDB_OCTOPUS, |
| 106 | .name = "Digital Devices Octopus V3 DVB adapter", |
| 107 | .regmap = &octopus_map, |
| 108 | .port_num = 4, |
| 109 | .i2c_mask = 0x0f, |
| 110 | }; |
| 111 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 112 | static const struct ddb_info ddb_octopus_le = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 113 | .type = DDB_OCTOPUS, |
| 114 | .name = "Digital Devices Octopus LE DVB adapter", |
| 115 | .regmap = &octopus_map, |
| 116 | .port_num = 2, |
| 117 | .i2c_mask = 0x03, |
| 118 | }; |
| 119 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 120 | static const struct ddb_info ddb_octopus_oem = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 121 | .type = DDB_OCTOPUS, |
| 122 | .name = "Digital Devices Octopus OEM", |
| 123 | .regmap = &octopus_map, |
| 124 | .port_num = 4, |
| 125 | .i2c_mask = 0x0f, |
| 126 | .led_num = 1, |
| 127 | .fan_num = 1, |
| 128 | .temp_num = 1, |
| 129 | .temp_bus = 0, |
| 130 | }; |
| 131 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 132 | static const struct ddb_info ddb_octopus_mini = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 133 | .type = DDB_OCTOPUS, |
| 134 | .name = "Digital Devices Octopus Mini", |
| 135 | .regmap = &octopus_map, |
| 136 | .port_num = 4, |
| 137 | .i2c_mask = 0x0f, |
| 138 | }; |
| 139 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 140 | static const struct ddb_info ddb_v6 = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 141 | .type = DDB_OCTOPUS, |
| 142 | .name = "Digital Devices Cine S2 V6 DVB adapter", |
| 143 | .regmap = &octopus_map, |
| 144 | .port_num = 3, |
| 145 | .i2c_mask = 0x07, |
| 146 | }; |
| 147 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 148 | static const struct ddb_info ddb_v6_5 = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 149 | .type = DDB_OCTOPUS, |
| 150 | .name = "Digital Devices Cine S2 V6.5 DVB adapter", |
| 151 | .regmap = &octopus_map, |
| 152 | .port_num = 4, |
| 153 | .i2c_mask = 0x0f, |
| 154 | }; |
| 155 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 156 | static const struct ddb_info ddb_v7 = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 157 | .type = DDB_OCTOPUS, |
| 158 | .name = "Digital Devices Cine S2 V7 DVB adapter", |
| 159 | .regmap = &octopus_map, |
| 160 | .port_num = 4, |
| 161 | .i2c_mask = 0x0f, |
| 162 | .board_control = 2, |
| 163 | .board_control_2 = 4, |
| 164 | .ts_quirks = TS_QUIRK_REVERSED, |
| 165 | }; |
| 166 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 167 | static const struct ddb_info ddb_v7a = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 168 | .type = DDB_OCTOPUS, |
| 169 | .name = "Digital Devices Cine S2 V7 Advanced DVB adapter", |
| 170 | .regmap = &octopus_map, |
| 171 | .port_num = 4, |
| 172 | .i2c_mask = 0x0f, |
| 173 | .board_control = 2, |
| 174 | .board_control_2 = 4, |
| 175 | .ts_quirks = TS_QUIRK_REVERSED, |
| 176 | }; |
| 177 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 178 | static const struct ddb_info ddb_ctv7 = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 179 | .type = DDB_OCTOPUS, |
| 180 | .name = "Digital Devices Cine CT V7 DVB adapter", |
| 181 | .regmap = &octopus_map, |
| 182 | .port_num = 4, |
| 183 | .i2c_mask = 0x0f, |
| 184 | .board_control = 3, |
| 185 | .board_control_2 = 4, |
| 186 | }; |
| 187 | |
Daniel Scheller | 757d78d | 2017-10-15 16:51:51 -0400 | [diff] [blame] | 188 | static const struct ddb_info ddb_satixs2v3 = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 189 | .type = DDB_OCTOPUS, |
| 190 | .name = "Mystique SaTiX-S2 V3 DVB adapter", |
| 191 | .regmap = &octopus_map, |
| 192 | .port_num = 3, |
| 193 | .i2c_mask = 0x07, |
| 194 | }; |
| 195 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 196 | static const struct ddb_info ddb_ci = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 197 | .type = DDB_OCTOPUS_CI, |
| 198 | .name = "Digital Devices Octopus CI", |
| 199 | .regmap = &octopus_map, |
| 200 | .port_num = 4, |
| 201 | .i2c_mask = 0x03, |
| 202 | }; |
| 203 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 204 | static const struct ddb_info ddb_cis = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 205 | .type = DDB_OCTOPUS_CI, |
| 206 | .name = "Digital Devices Octopus CI single", |
| 207 | .regmap = &octopus_map, |
| 208 | .port_num = 3, |
| 209 | .i2c_mask = 0x03, |
| 210 | }; |
| 211 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 212 | static const struct ddb_info ddb_ci_s2_pro = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 213 | .type = DDB_OCTOPUS_CI, |
| 214 | .name = "Digital Devices Octopus CI S2 Pro", |
| 215 | .regmap = &octopus_map, |
| 216 | .port_num = 4, |
| 217 | .i2c_mask = 0x01, |
| 218 | .board_control = 2, |
| 219 | .board_control_2 = 4, |
| 220 | }; |
| 221 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 222 | static const struct ddb_info ddb_ci_s2_pro_a = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 223 | .type = DDB_OCTOPUS_CI, |
| 224 | .name = "Digital Devices Octopus CI S2 Pro Advanced", |
| 225 | .regmap = &octopus_map, |
| 226 | .port_num = 4, |
| 227 | .i2c_mask = 0x01, |
| 228 | .board_control = 2, |
| 229 | .board_control_2 = 4, |
| 230 | }; |
| 231 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 232 | static const struct ddb_info ddb_dvbct = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 233 | .type = DDB_OCTOPUS, |
| 234 | .name = "Digital Devices DVBCT V6.1 DVB adapter", |
| 235 | .regmap = &octopus_map, |
| 236 | .port_num = 3, |
| 237 | .i2c_mask = 0x07, |
| 238 | }; |
| 239 | |
| 240 | /****************************************************************************/ |
| 241 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 242 | static const struct ddb_info ddb_ct2_8 = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 243 | .type = DDB_OCTOPUS_MAX_CT, |
| 244 | .name = "Digital Devices MAX A8 CT2", |
| 245 | .regmap = &octopus_map, |
| 246 | .port_num = 4, |
| 247 | .i2c_mask = 0x0f, |
| 248 | .board_control = 0x0ff, |
| 249 | .board_control_2 = 0xf00, |
| 250 | .ts_quirks = TS_QUIRK_SERIAL, |
| 251 | .tempmon_irq = 24, |
| 252 | }; |
| 253 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 254 | static const struct ddb_info ddb_c2t2_8 = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 255 | .type = DDB_OCTOPUS_MAX_CT, |
| 256 | .name = "Digital Devices MAX A8 C2T2", |
| 257 | .regmap = &octopus_map, |
| 258 | .port_num = 4, |
| 259 | .i2c_mask = 0x0f, |
| 260 | .board_control = 0x0ff, |
| 261 | .board_control_2 = 0xf00, |
| 262 | .ts_quirks = TS_QUIRK_SERIAL, |
| 263 | .tempmon_irq = 24, |
| 264 | }; |
| 265 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 266 | static const struct ddb_info ddb_isdbt_8 = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 267 | .type = DDB_OCTOPUS_MAX_CT, |
| 268 | .name = "Digital Devices MAX A8 ISDBT", |
| 269 | .regmap = &octopus_map, |
| 270 | .port_num = 4, |
| 271 | .i2c_mask = 0x0f, |
| 272 | .board_control = 0x0ff, |
| 273 | .board_control_2 = 0xf00, |
| 274 | .ts_quirks = TS_QUIRK_SERIAL, |
| 275 | .tempmon_irq = 24, |
| 276 | }; |
| 277 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 278 | static const struct ddb_info ddb_c2t2i_v0_8 = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 279 | .type = DDB_OCTOPUS_MAX_CT, |
| 280 | .name = "Digital Devices MAX A8 C2T2I V0", |
| 281 | .regmap = &octopus_map, |
| 282 | .port_num = 4, |
| 283 | .i2c_mask = 0x0f, |
| 284 | .board_control = 0x0ff, |
| 285 | .board_control_2 = 0xf00, |
| 286 | .ts_quirks = TS_QUIRK_SERIAL | TS_QUIRK_ALT_OSC, |
| 287 | .tempmon_irq = 24, |
| 288 | }; |
| 289 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 290 | static const struct ddb_info ddb_c2t2i_8 = { |
Daniel Scheller | 6971693 | 2017-08-12 07:55:54 -0400 | [diff] [blame] | 291 | .type = DDB_OCTOPUS_MAX_CT, |
| 292 | .name = "Digital Devices MAX A8 C2T2I", |
| 293 | .regmap = &octopus_map, |
| 294 | .port_num = 4, |
| 295 | .i2c_mask = 0x0f, |
| 296 | .board_control = 0x0ff, |
| 297 | .board_control_2 = 0xf00, |
| 298 | .ts_quirks = TS_QUIRK_SERIAL, |
| 299 | .tempmon_irq = 24, |
| 300 | }; |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 301 | |
| 302 | /****************************************************************************/ |
| 303 | |
Daniel Scheller | ae30a0d | 2017-08-20 06:41:12 -0400 | [diff] [blame] | 304 | static const struct ddb_info ddb_s2_48 = { |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 305 | .type = DDB_OCTOPUS_MAX, |
| 306 | .name = "Digital Devices MAX S8 4/8", |
| 307 | .regmap = &octopus_map, |
| 308 | .port_num = 4, |
| 309 | .i2c_mask = 0x01, |
| 310 | .board_control = 1, |
| 311 | .tempmon_irq = 24, |
| 312 | }; |
Daniel Scheller | 66cc3d9 | 2017-08-20 06:41:11 -0400 | [diff] [blame] | 313 | |
Daniel Scheller | c3eda33 | 2018-04-09 12:47:50 -0400 | [diff] [blame] | 314 | static const struct ddb_info ddb_s2x_48 = { |
| 315 | .type = DDB_OCTOPUS_MCI, |
| 316 | .name = "Digital Devices MAX SX8", |
| 317 | .regmap = &octopus_map, |
| 318 | .port_num = 4, |
| 319 | .i2c_mask = 0x00, |
| 320 | .tempmon_irq = 24, |
Daniel Scheller | 07b12de | 2018-06-23 11:36:09 -0400 | [diff] [blame] | 321 | .mci_ports = 4, |
| 322 | .mci_type = 0, |
Daniel Scheller | c3eda33 | 2018-04-09 12:47:50 -0400 | [diff] [blame] | 323 | }; |
| 324 | |
Daniel Scheller | 66cc3d9 | 2017-08-20 06:41:11 -0400 | [diff] [blame] | 325 | /****************************************************************************/ |
| 326 | /****************************************************************************/ |
| 327 | /****************************************************************************/ |
| 328 | |
| 329 | #define DDB_DEVID(_device, _subdevice, _info) { \ |
| 330 | .vendor = DDVID, \ |
| 331 | .device = _device, \ |
| 332 | .subvendor = DDVID, \ |
| 333 | .subdevice = _subdevice, \ |
| 334 | .info = &_info } |
| 335 | |
| 336 | static const struct ddb_device_id ddb_device_ids[] = { |
| 337 | /* PCIe devices */ |
| 338 | DDB_DEVID(0x0002, 0x0001, ddb_octopus), |
| 339 | DDB_DEVID(0x0003, 0x0001, ddb_octopus), |
| 340 | DDB_DEVID(0x0005, 0x0004, ddb_octopusv3), |
| 341 | DDB_DEVID(0x0003, 0x0002, ddb_octopus_le), |
| 342 | DDB_DEVID(0x0003, 0x0003, ddb_octopus_oem), |
| 343 | DDB_DEVID(0x0003, 0x0010, ddb_octopus_mini), |
| 344 | DDB_DEVID(0x0005, 0x0011, ddb_octopus_mini), |
| 345 | DDB_DEVID(0x0003, 0x0020, ddb_v6), |
| 346 | DDB_DEVID(0x0003, 0x0021, ddb_v6_5), |
| 347 | DDB_DEVID(0x0006, 0x0022, ddb_v7), |
| 348 | DDB_DEVID(0x0006, 0x0024, ddb_v7a), |
| 349 | DDB_DEVID(0x0003, 0x0030, ddb_dvbct), |
Daniel Scheller | 757d78d | 2017-10-15 16:51:51 -0400 | [diff] [blame] | 350 | DDB_DEVID(0x0003, 0xdb03, ddb_satixs2v3), |
Daniel Scheller | 66cc3d9 | 2017-08-20 06:41:11 -0400 | [diff] [blame] | 351 | DDB_DEVID(0x0006, 0x0031, ddb_ctv7), |
| 352 | DDB_DEVID(0x0006, 0x0032, ddb_ctv7), |
| 353 | DDB_DEVID(0x0006, 0x0033, ddb_ctv7), |
| 354 | DDB_DEVID(0x0007, 0x0023, ddb_s2_48), |
| 355 | DDB_DEVID(0x0008, 0x0034, ddb_ct2_8), |
| 356 | DDB_DEVID(0x0008, 0x0035, ddb_c2t2_8), |
| 357 | DDB_DEVID(0x0008, 0x0036, ddb_isdbt_8), |
| 358 | DDB_DEVID(0x0008, 0x0037, ddb_c2t2i_v0_8), |
| 359 | DDB_DEVID(0x0008, 0x0038, ddb_c2t2i_8), |
Daniel Scheller | c3eda33 | 2018-04-09 12:47:50 -0400 | [diff] [blame] | 360 | DDB_DEVID(0x0009, 0x0025, ddb_s2x_48), |
Daniel Scheller | 66cc3d9 | 2017-08-20 06:41:11 -0400 | [diff] [blame] | 361 | DDB_DEVID(0x0006, 0x0039, ddb_ctv7), |
| 362 | DDB_DEVID(0x0011, 0x0040, ddb_ci), |
| 363 | DDB_DEVID(0x0011, 0x0041, ddb_cis), |
| 364 | DDB_DEVID(0x0012, 0x0042, ddb_ci), |
| 365 | DDB_DEVID(0x0013, 0x0043, ddb_ci_s2_pro), |
| 366 | DDB_DEVID(0x0013, 0x0044, ddb_ci_s2_pro_a), |
| 367 | }; |
| 368 | |
| 369 | /****************************************************************************/ |
| 370 | |
| 371 | const struct ddb_info *get_ddb_info(u16 vendor, u16 device, |
| 372 | u16 subvendor, u16 subdevice) |
| 373 | { |
| 374 | int i; |
| 375 | |
| 376 | for (i = 0; i < ARRAY_SIZE(ddb_device_ids); i++) { |
| 377 | const struct ddb_device_id *id = &ddb_device_ids[i]; |
| 378 | |
| 379 | if (vendor == id->vendor && |
| 380 | device == id->device && |
| 381 | subvendor == id->subvendor && |
Daniel Scheller | 757d78d | 2017-10-15 16:51:51 -0400 | [diff] [blame] | 382 | (subdevice == id->subdevice || |
| 383 | id->subdevice == 0xffff)) |
Daniel Scheller | 66cc3d9 | 2017-08-20 06:41:11 -0400 | [diff] [blame] | 384 | return id->info; |
| 385 | } |
| 386 | |
| 387 | return &ddb_none; |
| 388 | } |