Thomas Gleixner | c942fdd | 2019-05-27 08:55:06 +0200 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * descriptions + helper functions for simple dvb plls. |
| 4 | * |
| 5 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | */ |
| 7 | |
Mauro Carvalho Chehab | 5479a58 | 2016-10-13 15:32:32 -0300 | [diff] [blame] | 8 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 9 | |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 10 | #include <linux/slab.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | #include <linux/module.h> |
| 12 | #include <linux/dvb/frontend.h> |
| 13 | #include <asm/types.h> |
| 14 | |
| 15 | #include "dvb-pll.h" |
| 16 | |
Mauro Carvalho Chehab | 5479a58 | 2016-10-13 15:32:32 -0300 | [diff] [blame] | 17 | #define dprintk(fmt, arg...) \ |
| 18 | printk(KERN_DEBUG pr_fmt("%s: " fmt), __func__, ##arg) |
| 19 | |
Michael Krufky | 05a4611 | 2007-09-07 18:19:57 -0300 | [diff] [blame] | 20 | struct dvb_pll_priv { |
| 21 | /* pll number */ |
| 22 | int nr; |
| 23 | |
| 24 | /* i2c details */ |
| 25 | int pll_i2c_address; |
| 26 | struct i2c_adapter *i2c; |
| 27 | |
| 28 | /* the PLL descriptor */ |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 29 | const struct dvb_pll_desc *pll_desc; |
Michael Krufky | 05a4611 | 2007-09-07 18:19:57 -0300 | [diff] [blame] | 30 | |
| 31 | /* cached frequency/bandwidth */ |
| 32 | u32 frequency; |
| 33 | u32 bandwidth; |
| 34 | }; |
| 35 | |
Michael Krufky | ff3e7dd | 2007-09-09 13:00:45 -0300 | [diff] [blame] | 36 | #define DVB_PLL_MAX 64 |
Michael Krufky | 05a4611 | 2007-09-07 18:19:57 -0300 | [diff] [blame] | 37 | |
| 38 | static unsigned int dvb_pll_devcount; |
| 39 | |
Douglas Schilling Landgraf | ff699e6 | 2008-04-22 14:41:48 -0300 | [diff] [blame] | 40 | static int debug; |
Michael Krufky | 05a4611 | 2007-09-07 18:19:57 -0300 | [diff] [blame] | 41 | module_param(debug, int, 0644); |
| 42 | MODULE_PARM_DESC(debug, "enable verbose debug messages"); |
| 43 | |
Michael Krufky | 704e39b | 2007-09-07 18:27:43 -0300 | [diff] [blame] | 44 | static unsigned int id[DVB_PLL_MAX] = |
| 45 | { [ 0 ... (DVB_PLL_MAX-1) ] = DVB_PLL_UNDEFINED }; |
| 46 | module_param_array(id, int, NULL, 0644); |
| 47 | MODULE_PARM_DESC(id, "force pll id to use (DEBUG ONLY)"); |
| 48 | |
Michael Krufky | 05a4611 | 2007-09-07 18:19:57 -0300 | [diff] [blame] | 49 | /* ----------------------------------------------------------- */ |
| 50 | |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame] | 51 | struct dvb_pll_desc { |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 52 | const char *name; |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame] | 53 | u32 min; |
| 54 | u32 max; |
| 55 | u32 iffreq; |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 56 | void (*set)(struct dvb_frontend *fe, u8 *buf); |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame] | 57 | u8 *initdata; |
Malcolm Priestley | 2b74334 | 2011-02-06 12:29:51 -0300 | [diff] [blame] | 58 | u8 *initdata2; |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame] | 59 | u8 *sleepdata; |
| 60 | int count; |
| 61 | struct { |
| 62 | u32 limit; |
| 63 | u32 stepsize; |
| 64 | u8 config; |
| 65 | u8 cb; |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 66 | } entries[]; |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame] | 67 | }; |
| 68 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | /* ----------------------------------------------------------- */ |
| 70 | /* descriptions */ |
| 71 | |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 72 | static const struct dvb_pll_desc dvb_pll_thomson_dtt7579 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 73 | .name = "Thomson dtt7579", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 74 | .min = 177 * MHz, |
| 75 | .max = 858 * MHz, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 76 | .iffreq= 36166667, |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame] | 77 | .sleepdata = (u8[]){ 2, 0xb4, 0x03 }, |
| 78 | .count = 4, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 80 | { 443250000, 166667, 0xb4, 0x02 }, |
| 81 | { 542000000, 166667, 0xb4, 0x08 }, |
| 82 | { 771000000, 166667, 0xbc, 0x08 }, |
| 83 | { 999999999, 166667, 0xf4, 0x08 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 84 | }, |
| 85 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 87 | static void thomson_dtt759x_bw(struct dvb_frontend *fe, u8 *buf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 88 | { |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 89 | u32 bw = fe->dtv_property_cache.bandwidth_hz; |
| 90 | if (bw == 7000000) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 91 | buf[3] |= 0x10; |
| 92 | } |
| 93 | |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 94 | static const struct dvb_pll_desc dvb_pll_thomson_dtt759x = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 95 | .name = "Thomson dtt759x", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 96 | .min = 177 * MHz, |
| 97 | .max = 896 * MHz, |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 98 | .set = thomson_dtt759x_bw, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 99 | .iffreq= 36166667, |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame] | 100 | .sleepdata = (u8[]){ 2, 0x84, 0x03 }, |
| 101 | .count = 5, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 102 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 103 | { 264000000, 166667, 0xb4, 0x02 }, |
| 104 | { 470000000, 166667, 0xbc, 0x02 }, |
| 105 | { 735000000, 166667, 0xbc, 0x08 }, |
| 106 | { 835000000, 166667, 0xf4, 0x08 }, |
| 107 | { 999999999, 166667, 0xfc, 0x08 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 108 | }, |
| 109 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 110 | |
Patrice Chotard | 5fb6707 | 2012-07-31 15:31:20 -0300 | [diff] [blame] | 111 | static void thomson_dtt7520x_bw(struct dvb_frontend *fe, u8 *buf) |
| 112 | { |
| 113 | u32 bw = fe->dtv_property_cache.bandwidth_hz; |
| 114 | if (bw == 8000000) |
| 115 | buf[3] ^= 0x10; |
| 116 | } |
| 117 | |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 118 | static const struct dvb_pll_desc dvb_pll_thomson_dtt7520x = { |
Patrice Chotard | 5fb6707 | 2012-07-31 15:31:20 -0300 | [diff] [blame] | 119 | .name = "Thomson dtt7520x", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 120 | .min = 185 * MHz, |
| 121 | .max = 900 * MHz, |
Patrice Chotard | 5fb6707 | 2012-07-31 15:31:20 -0300 | [diff] [blame] | 122 | .set = thomson_dtt7520x_bw, |
| 123 | .iffreq = 36166667, |
| 124 | .count = 7, |
| 125 | .entries = { |
| 126 | { 305000000, 166667, 0xb4, 0x12 }, |
| 127 | { 405000000, 166667, 0xbc, 0x12 }, |
| 128 | { 445000000, 166667, 0xbc, 0x12 }, |
| 129 | { 465000000, 166667, 0xf4, 0x18 }, |
| 130 | { 735000000, 166667, 0xfc, 0x18 }, |
| 131 | { 835000000, 166667, 0xbc, 0x18 }, |
| 132 | { 999999999, 166667, 0xfc, 0x18 }, |
| 133 | }, |
| 134 | }; |
| 135 | |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 136 | static const struct dvb_pll_desc dvb_pll_lg_z201 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 137 | .name = "LG z201", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 138 | .min = 174 * MHz, |
| 139 | .max = 862 * MHz, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 140 | .iffreq= 36166667, |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame] | 141 | .sleepdata = (u8[]){ 2, 0xbc, 0x03 }, |
| 142 | .count = 5, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 143 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 144 | { 157500000, 166667, 0xbc, 0x01 }, |
| 145 | { 443250000, 166667, 0xbc, 0x02 }, |
| 146 | { 542000000, 166667, 0xbc, 0x04 }, |
| 147 | { 830000000, 166667, 0xf4, 0x04 }, |
| 148 | { 999999999, 166667, 0xfc, 0x04 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 149 | }, |
| 150 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 152 | static const struct dvb_pll_desc dvb_pll_unknown_1 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | .name = "unknown 1", /* used by dntv live dvb-t */ |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 154 | .min = 174 * MHz, |
| 155 | .max = 862 * MHz, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 156 | .iffreq= 36166667, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 157 | .count = 9, |
| 158 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 159 | { 150000000, 166667, 0xb4, 0x01 }, |
| 160 | { 173000000, 166667, 0xbc, 0x01 }, |
| 161 | { 250000000, 166667, 0xb4, 0x02 }, |
| 162 | { 400000000, 166667, 0xbc, 0x02 }, |
| 163 | { 420000000, 166667, 0xf4, 0x02 }, |
| 164 | { 470000000, 166667, 0xfc, 0x02 }, |
| 165 | { 600000000, 166667, 0xbc, 0x08 }, |
| 166 | { 730000000, 166667, 0xf4, 0x08 }, |
| 167 | { 999999999, 166667, 0xfc, 0x08 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 168 | }, |
| 169 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 170 | |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 171 | /* Infineon TUA6010XS |
| 172 | * used in Thomson Cable Tuner |
| 173 | */ |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 174 | static const struct dvb_pll_desc dvb_pll_tua6010xs = { |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 175 | .name = "Infineon TUA6010XS", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 176 | .min = 44250 * kHz, |
| 177 | .max = 858 * MHz, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 178 | .iffreq= 36125000, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 179 | .count = 3, |
| 180 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 181 | { 115750000, 62500, 0x8e, 0x03 }, |
| 182 | { 403250000, 62500, 0x8e, 0x06 }, |
| 183 | { 999999999, 62500, 0x8e, 0x85 }, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 184 | }, |
| 185 | }; |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 186 | |
| 187 | /* Panasonic env57h1xd5 (some Philips PLL ?) */ |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 188 | static const struct dvb_pll_desc dvb_pll_env57h1xd5 = { |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 189 | .name = "Panasonic ENV57H1XD5", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 190 | .min = 44250 * kHz, |
| 191 | .max = 858 * MHz, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 192 | .iffreq= 36125000, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 193 | .count = 4, |
| 194 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 195 | { 153000000, 166667, 0xc2, 0x41 }, |
| 196 | { 470000000, 166667, 0xc2, 0x42 }, |
| 197 | { 526000000, 166667, 0xc2, 0x84 }, |
| 198 | { 999999999, 166667, 0xc2, 0xa4 }, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 199 | }, |
| 200 | }; |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 201 | |
| 202 | /* Philips TDA6650/TDA6651 |
| 203 | * used in Panasonic ENV77H11D5 |
| 204 | */ |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 205 | static void tda665x_bw(struct dvb_frontend *fe, u8 *buf) |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 206 | { |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 207 | u32 bw = fe->dtv_property_cache.bandwidth_hz; |
| 208 | if (bw == 8000000) |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 209 | buf[3] |= 0x08; |
| 210 | } |
| 211 | |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 212 | static const struct dvb_pll_desc dvb_pll_tda665x = { |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 213 | .name = "Philips TDA6650/TDA6651", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 214 | .min = 44250 * kHz, |
| 215 | .max = 858 * MHz, |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 216 | .set = tda665x_bw, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 217 | .iffreq= 36166667, |
Michael Krufky | fbfee86 | 2007-05-09 15:58:17 -0300 | [diff] [blame] | 218 | .initdata = (u8[]){ 4, 0x0b, 0xf5, 0x85, 0xab }, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 219 | .count = 12, |
| 220 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 221 | { 93834000, 166667, 0xca, 0x61 /* 011 0 0 0 01 */ }, |
| 222 | { 123834000, 166667, 0xca, 0xa1 /* 101 0 0 0 01 */ }, |
| 223 | { 161000000, 166667, 0xca, 0xa1 /* 101 0 0 0 01 */ }, |
| 224 | { 163834000, 166667, 0xca, 0xc2 /* 110 0 0 0 10 */ }, |
| 225 | { 253834000, 166667, 0xca, 0x62 /* 011 0 0 0 10 */ }, |
| 226 | { 383834000, 166667, 0xca, 0xa2 /* 101 0 0 0 10 */ }, |
| 227 | { 443834000, 166667, 0xca, 0xc2 /* 110 0 0 0 10 */ }, |
| 228 | { 444000000, 166667, 0xca, 0xc4 /* 110 0 0 1 00 */ }, |
| 229 | { 583834000, 166667, 0xca, 0x64 /* 011 0 0 1 00 */ }, |
| 230 | { 793834000, 166667, 0xca, 0xa4 /* 101 0 0 1 00 */ }, |
| 231 | { 444834000, 166667, 0xca, 0xc4 /* 110 0 0 1 00 */ }, |
| 232 | { 861000000, 166667, 0xca, 0xe4 /* 111 0 0 1 00 */ }, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 233 | } |
| 234 | }; |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 235 | |
| 236 | /* Infineon TUA6034 |
| 237 | * used in LG TDTP E102P |
| 238 | */ |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 239 | static void tua6034_bw(struct dvb_frontend *fe, u8 *buf) |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 240 | { |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 241 | u32 bw = fe->dtv_property_cache.bandwidth_hz; |
| 242 | if (bw == 7000000) |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 243 | buf[3] |= 0x08; |
| 244 | } |
| 245 | |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 246 | static const struct dvb_pll_desc dvb_pll_tua6034 = { |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 247 | .name = "Infineon TUA6034", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 248 | .min = 44250 * kHz, |
| 249 | .max = 858 * MHz, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 250 | .iffreq= 36166667, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 251 | .count = 3, |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 252 | .set = tua6034_bw, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 253 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 254 | { 174500000, 62500, 0xce, 0x01 }, |
| 255 | { 230000000, 62500, 0xce, 0x02 }, |
| 256 | { 999999999, 62500, 0xce, 0x04 }, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 257 | }, |
| 258 | }; |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 259 | |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 260 | /* ALPS TDED4 |
| 261 | * used in Nebula-Cards and USB boxes |
| 262 | */ |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 263 | static void tded4_bw(struct dvb_frontend *fe, u8 *buf) |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 264 | { |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 265 | u32 bw = fe->dtv_property_cache.bandwidth_hz; |
| 266 | if (bw == 8000000) |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 267 | buf[3] |= 0x04; |
| 268 | } |
| 269 | |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 270 | static const struct dvb_pll_desc dvb_pll_tded4 = { |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 271 | .name = "ALPS TDED4", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 272 | .min = 47 * MHz, |
| 273 | .max = 863 * MHz, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 274 | .iffreq= 36166667, |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 275 | .set = tded4_bw, |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 276 | .count = 4, |
| 277 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 278 | { 153000000, 166667, 0x85, 0x01 }, |
| 279 | { 470000000, 166667, 0x85, 0x02 }, |
| 280 | { 823000000, 166667, 0x85, 0x08 }, |
| 281 | { 999999999, 166667, 0x85, 0x88 }, |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 282 | } |
| 283 | }; |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 284 | |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 285 | /* ALPS TDHU2 |
| 286 | * used in AverTVHD MCE A180 |
| 287 | */ |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 288 | static const struct dvb_pll_desc dvb_pll_tdhu2 = { |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 289 | .name = "ALPS TDHU2", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 290 | .min = 54 * MHz, |
| 291 | .max = 864 * MHz, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 292 | .iffreq= 44000000, |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 293 | .count = 4, |
| 294 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 295 | { 162000000, 62500, 0x85, 0x01 }, |
| 296 | { 426000000, 62500, 0x85, 0x02 }, |
| 297 | { 782000000, 62500, 0x85, 0x08 }, |
| 298 | { 999999999, 62500, 0x85, 0x88 }, |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 299 | } |
| 300 | }; |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 301 | |
Michael Krufky | d76a617 | 2006-01-23 17:11:06 -0200 | [diff] [blame] | 302 | /* Samsung TBMV30111IN / TBMV30712IN1 |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 303 | * used in Air2PC ATSC - 2nd generation (nxt2002) |
| 304 | */ |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 305 | static const struct dvb_pll_desc dvb_pll_samsung_tbmv = { |
Michael Krufky | 28f3d4b | 2006-01-23 17:11:07 -0200 | [diff] [blame] | 306 | .name = "Samsung TBMV30111IN / TBMV30712IN1", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 307 | .min = 54 * MHz, |
| 308 | .max = 860 * MHz, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 309 | .iffreq= 44000000, |
Michael Krufky | 17c37ef | 2006-01-15 19:04:04 -0200 | [diff] [blame] | 310 | .count = 6, |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 311 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 312 | { 172000000, 166667, 0xb4, 0x01 }, |
| 313 | { 214000000, 166667, 0xb4, 0x02 }, |
| 314 | { 467000000, 166667, 0xbc, 0x02 }, |
| 315 | { 721000000, 166667, 0xbc, 0x08 }, |
| 316 | { 841000000, 166667, 0xf4, 0x08 }, |
| 317 | { 999999999, 166667, 0xfc, 0x02 }, |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 318 | } |
| 319 | }; |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 320 | |
Regis Prevot | f8bf134 | 2006-01-11 23:31:53 -0200 | [diff] [blame] | 321 | /* |
| 322 | * Philips SD1878 Tuner. |
| 323 | */ |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 324 | static const struct dvb_pll_desc dvb_pll_philips_sd1878_tda8261 = { |
Regis Prevot | f8bf134 | 2006-01-11 23:31:53 -0200 | [diff] [blame] | 325 | .name = "Philips SD1878", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 326 | .min = 950 * MHz, |
| 327 | .max = 2150 * MHz, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 328 | .iffreq= 249, /* zero-IF, offset 249 is to round up */ |
Regis Prevot | f8bf134 | 2006-01-11 23:31:53 -0200 | [diff] [blame] | 329 | .count = 4, |
| 330 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 331 | { 1250000, 500, 0xc4, 0x00}, |
Manu Abraham | b3332a9 | 2007-07-03 09:58:57 -0300 | [diff] [blame] | 332 | { 1450000, 500, 0xc4, 0x40}, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 333 | { 2050000, 500, 0xc4, 0x80}, |
| 334 | { 2150000, 500, 0xc4, 0xc0}, |
Regis Prevot | f8bf134 | 2006-01-11 23:31:53 -0200 | [diff] [blame] | 335 | }, |
| 336 | }; |
Regis Prevot | f8bf134 | 2006-01-11 23:31:53 -0200 | [diff] [blame] | 337 | |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 338 | static void opera1_bw(struct dvb_frontend *fe, u8 *buf) |
Marco Gittler | 941491f | 2007-04-19 11:26:47 -0300 | [diff] [blame] | 339 | { |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 340 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
Malcolm Priestley | 2b74334 | 2011-02-06 12:29:51 -0300 | [diff] [blame] | 341 | struct dvb_pll_priv *priv = fe->tuner_priv; |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 342 | u32 b_w = (c->symbol_rate * 27) / 32000; |
Malcolm Priestley | 2b74334 | 2011-02-06 12:29:51 -0300 | [diff] [blame] | 343 | struct i2c_msg msg = { |
| 344 | .addr = priv->pll_i2c_address, |
| 345 | .flags = 0, |
| 346 | .buf = buf, |
| 347 | .len = 4 |
| 348 | }; |
| 349 | int result; |
| 350 | u8 lpf; |
| 351 | |
| 352 | if (fe->ops.i2c_gate_ctrl) |
| 353 | fe->ops.i2c_gate_ctrl(fe, 1); |
| 354 | |
| 355 | result = i2c_transfer(priv->i2c, &msg, 1); |
| 356 | if (result != 1) |
Mauro Carvalho Chehab | 5479a58 | 2016-10-13 15:32:32 -0300 | [diff] [blame] | 357 | pr_err("%s: i2c_transfer failed:%d", |
Malcolm Priestley | 2b74334 | 2011-02-06 12:29:51 -0300 | [diff] [blame] | 358 | __func__, result); |
| 359 | |
| 360 | if (b_w <= 10000) |
| 361 | lpf = 0xc; |
| 362 | else if (b_w <= 12000) |
| 363 | lpf = 0x2; |
| 364 | else if (b_w <= 14000) |
| 365 | lpf = 0xa; |
| 366 | else if (b_w <= 16000) |
| 367 | lpf = 0x6; |
| 368 | else if (b_w <= 18000) |
| 369 | lpf = 0xe; |
| 370 | else if (b_w <= 20000) |
| 371 | lpf = 0x1; |
| 372 | else if (b_w <= 22000) |
| 373 | lpf = 0x9; |
| 374 | else if (b_w <= 24000) |
| 375 | lpf = 0x5; |
| 376 | else if (b_w <= 26000) |
| 377 | lpf = 0xd; |
| 378 | else if (b_w <= 28000) |
| 379 | lpf = 0x3; |
| 380 | else |
| 381 | lpf = 0xb; |
| 382 | buf[2] ^= 0x1c; /* Flip bits 3-5 */ |
| 383 | /* Set lpf */ |
| 384 | buf[2] |= ((lpf >> 2) & 0x3) << 3; |
| 385 | buf[3] |= (lpf & 0x3) << 2; |
| 386 | |
| 387 | return; |
Marco Gittler | 941491f | 2007-04-19 11:26:47 -0300 | [diff] [blame] | 388 | } |
| 389 | |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 390 | static const struct dvb_pll_desc dvb_pll_opera1 = { |
Marco Gittler | 941491f | 2007-04-19 11:26:47 -0300 | [diff] [blame] | 391 | .name = "Opera Tuner", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 392 | .min = 900 * MHz, |
| 393 | .max = 2250 * MHz, |
Malcolm Priestley | 2b74334 | 2011-02-06 12:29:51 -0300 | [diff] [blame] | 394 | .initdata = (u8[]){ 4, 0x08, 0xe5, 0xe1, 0x00 }, |
| 395 | .initdata2 = (u8[]){ 4, 0x08, 0xe5, 0xe5, 0x00 }, |
Marco Gittler | 941491f | 2007-04-19 11:26:47 -0300 | [diff] [blame] | 396 | .iffreq= 0, |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 397 | .set = opera1_bw, |
Marco Gittler | 941491f | 2007-04-19 11:26:47 -0300 | [diff] [blame] | 398 | .count = 8, |
| 399 | .entries = { |
Malcolm Priestley | 2b74334 | 2011-02-06 12:29:51 -0300 | [diff] [blame] | 400 | { 1064000, 500, 0xf9, 0xc2 }, |
| 401 | { 1169000, 500, 0xf9, 0xe2 }, |
| 402 | { 1299000, 500, 0xf9, 0x20 }, |
| 403 | { 1444000, 500, 0xf9, 0x40 }, |
| 404 | { 1606000, 500, 0xf9, 0x60 }, |
| 405 | { 1777000, 500, 0xf9, 0x80 }, |
| 406 | { 1941000, 500, 0xf9, 0xa0 }, |
| 407 | { 2250000, 500, 0xf9, 0xc0 }, |
Marco Gittler | 941491f | 2007-04-19 11:26:47 -0300 | [diff] [blame] | 408 | } |
| 409 | }; |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame] | 410 | |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 411 | static void samsung_dtos403ih102a_set(struct dvb_frontend *fe, u8 *buf) |
Antti Palosaari | 139dfeb | 2008-05-17 23:02:00 -0300 | [diff] [blame] | 412 | { |
| 413 | struct dvb_pll_priv *priv = fe->tuner_priv; |
| 414 | struct i2c_msg msg = { |
| 415 | .addr = priv->pll_i2c_address, |
| 416 | .flags = 0, |
| 417 | .buf = buf, |
| 418 | .len = 4 |
| 419 | }; |
| 420 | int result; |
| 421 | |
| 422 | if (fe->ops.i2c_gate_ctrl) |
| 423 | fe->ops.i2c_gate_ctrl(fe, 1); |
| 424 | |
| 425 | result = i2c_transfer(priv->i2c, &msg, 1); |
| 426 | if (result != 1) |
Mauro Carvalho Chehab | 5479a58 | 2016-10-13 15:32:32 -0300 | [diff] [blame] | 427 | pr_err("%s: i2c_transfer failed:%d", |
Antti Palosaari | 139dfeb | 2008-05-17 23:02:00 -0300 | [diff] [blame] | 428 | __func__, result); |
| 429 | |
| 430 | buf[2] = 0x9e; |
| 431 | buf[3] = 0x90; |
| 432 | |
| 433 | return; |
| 434 | } |
| 435 | |
| 436 | /* unknown pll used in Samsung DTOS403IH102A DVB-C tuner */ |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 437 | static const struct dvb_pll_desc dvb_pll_samsung_dtos403ih102a = { |
Antti Palosaari | 139dfeb | 2008-05-17 23:02:00 -0300 | [diff] [blame] | 438 | .name = "Samsung DTOS403IH102A", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 439 | .min = 44250 * kHz, |
| 440 | .max = 858 * MHz, |
Antti Palosaari | 139dfeb | 2008-05-17 23:02:00 -0300 | [diff] [blame] | 441 | .iffreq = 36125000, |
| 442 | .count = 8, |
| 443 | .set = samsung_dtos403ih102a_set, |
| 444 | .entries = { |
| 445 | { 135000000, 62500, 0xbe, 0x01 }, |
| 446 | { 177000000, 62500, 0xf6, 0x01 }, |
| 447 | { 370000000, 62500, 0xbe, 0x02 }, |
| 448 | { 450000000, 62500, 0xf6, 0x02 }, |
| 449 | { 466000000, 62500, 0xfe, 0x02 }, |
| 450 | { 538000000, 62500, 0xbe, 0x08 }, |
| 451 | { 826000000, 62500, 0xf6, 0x08 }, |
| 452 | { 999999999, 62500, 0xfe, 0x08 }, |
| 453 | } |
| 454 | }; |
| 455 | |
Trent Piepho | a104ed0 | 2009-06-11 19:21:34 -0300 | [diff] [blame] | 456 | /* Samsung TDTC9251DH0 DVB-T NIM, as used on AirStar 2 */ |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 457 | static const struct dvb_pll_desc dvb_pll_samsung_tdtc9251dh0 = { |
Trent Piepho | a104ed0 | 2009-06-11 19:21:34 -0300 | [diff] [blame] | 458 | .name = "Samsung TDTC9251DH0", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 459 | .min = 48 * MHz, |
| 460 | .max = 863 * MHz, |
Trent Piepho | a104ed0 | 2009-06-11 19:21:34 -0300 | [diff] [blame] | 461 | .iffreq = 36166667, |
| 462 | .count = 3, |
| 463 | .entries = { |
| 464 | { 157500000, 166667, 0xcc, 0x09 }, |
| 465 | { 443000000, 166667, 0xcc, 0x0a }, |
| 466 | { 863000000, 166667, 0xcc, 0x08 }, |
| 467 | } |
| 468 | }; |
| 469 | |
Trent Piepho | f52c485 | 2009-06-11 19:21:34 -0300 | [diff] [blame] | 470 | /* Samsung TBDU18132 DVB-S NIM with TSA5059 PLL, used in SkyStar2 DVB-S 2.3 */ |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 471 | static const struct dvb_pll_desc dvb_pll_samsung_tbdu18132 = { |
Trent Piepho | f52c485 | 2009-06-11 19:21:34 -0300 | [diff] [blame] | 472 | .name = "Samsung TBDU18132", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 473 | .min = 950 * MHz, |
| 474 | .max = 2150 * MHz, /* guesses */ |
Trent Piepho | f52c485 | 2009-06-11 19:21:34 -0300 | [diff] [blame] | 475 | .iffreq = 0, |
| 476 | .count = 2, |
| 477 | .entries = { |
| 478 | { 1550000, 125, 0x84, 0x82 }, |
| 479 | { 4095937, 125, 0x84, 0x80 }, |
| 480 | } |
| 481 | /* TSA5059 PLL has a 17 bit divisor rather than the 15 bits supported |
| 482 | * by this driver. The two extra bits are 0x60 in the third byte. 15 |
| 483 | * bits is enough for over 4 GHz, which is enough to cover the range |
| 484 | * of this tuner. We could use the additional divisor bits by adding |
| 485 | * more entries, e.g. |
| 486 | { 0x0ffff * 125 + 125/2, 125, 0x84 | 0x20, }, |
| 487 | { 0x17fff * 125 + 125/2, 125, 0x84 | 0x40, }, |
| 488 | { 0x1ffff * 125 + 125/2, 125, 0x84 | 0x60, }, */ |
| 489 | }; |
| 490 | |
Trent Piepho | 9d5d75a | 2009-06-11 19:21:34 -0300 | [diff] [blame] | 491 | /* Samsung TBMU24112 DVB-S NIM with SL1935 zero-IF tuner */ |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 492 | static const struct dvb_pll_desc dvb_pll_samsung_tbmu24112 = { |
Trent Piepho | 9d5d75a | 2009-06-11 19:21:34 -0300 | [diff] [blame] | 493 | .name = "Samsung TBMU24112", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 494 | .min = 950 * MHz, |
| 495 | .max = 2150 * MHz, /* guesses */ |
Trent Piepho | 9d5d75a | 2009-06-11 19:21:34 -0300 | [diff] [blame] | 496 | .iffreq = 0, |
| 497 | .count = 2, |
| 498 | .entries = { |
| 499 | { 1500000, 125, 0x84, 0x18 }, |
| 500 | { 9999999, 125, 0x84, 0x08 }, |
| 501 | } |
| 502 | }; |
| 503 | |
Trent Piepho | d799ce5 | 2009-06-11 19:24:00 -0300 | [diff] [blame] | 504 | /* Alps TDEE4 DVB-C NIM, used on Cablestar 2 */ |
| 505 | /* byte 4 : 1 * * AGD R3 R2 R1 R0 |
| 506 | * byte 5 : C1 * RE RTS BS4 BS3 BS2 BS1 |
| 507 | * AGD = 1, R3 R2 R1 R0 = 0 1 0 1 => byte 4 = 1**10101 = 0x95 |
| 508 | * Range(MHz) C1 * RE RTS BS4 BS3 BS2 BS1 Byte 5 |
| 509 | * 47 - 153 0 * 0 0 0 0 0 1 0x01 |
| 510 | * 153 - 430 0 * 0 0 0 0 1 0 0x02 |
| 511 | * 430 - 822 0 * 0 0 1 0 0 0 0x08 |
| 512 | * 822 - 862 1 * 0 0 1 0 0 0 0x88 */ |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 513 | static const struct dvb_pll_desc dvb_pll_alps_tdee4 = { |
Trent Piepho | d799ce5 | 2009-06-11 19:24:00 -0300 | [diff] [blame] | 514 | .name = "ALPS TDEE4", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 515 | .min = 47 * MHz, |
| 516 | .max = 862 * MHz, |
Trent Piepho | d799ce5 | 2009-06-11 19:24:00 -0300 | [diff] [blame] | 517 | .iffreq = 36125000, |
| 518 | .count = 4, |
| 519 | .entries = { |
| 520 | { 153000000, 62500, 0x95, 0x01 }, |
| 521 | { 430000000, 62500, 0x95, 0x02 }, |
| 522 | { 822000000, 62500, 0x95, 0x08 }, |
| 523 | { 999999999, 62500, 0x95, 0x88 }, |
| 524 | } |
| 525 | }; |
| 526 | |
Akihiro Tsukada | 1745972 | 2018-04-08 13:21:35 -0400 | [diff] [blame] | 527 | /* Infineon TUA6034 ISDB-T, used in Friio */ |
| 528 | /* CP cur. 50uA, AGC takeover: 103dBuV, PORT3 on */ |
| 529 | static const struct dvb_pll_desc dvb_pll_tua6034_friio = { |
| 530 | .name = "Infineon TUA6034 ISDB-T (Friio)", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 531 | .min = 90 * MHz, |
| 532 | .max = 770 * MHz, |
Akihiro Tsukada | 1745972 | 2018-04-08 13:21:35 -0400 | [diff] [blame] | 533 | .iffreq = 57000000, |
| 534 | .initdata = (u8[]){ 4, 0x9a, 0x50, 0xb2, 0x08 }, |
| 535 | .sleepdata = (u8[]){ 4, 0x9a, 0x70, 0xb3, 0x0b }, |
| 536 | .count = 3, |
| 537 | .entries = { |
| 538 | { 170000000, 142857, 0xba, 0x09 }, |
| 539 | { 470000000, 142857, 0xba, 0x0a }, |
| 540 | { 770000000, 142857, 0xb2, 0x08 }, |
| 541 | } |
| 542 | }; |
| 543 | |
Akihiro Tsukada | 648db06 | 2018-04-08 13:39:49 -0400 | [diff] [blame] | 544 | /* Philips TDA6651 ISDB-T, used in Earthsoft PT1 */ |
| 545 | static const struct dvb_pll_desc dvb_pll_tda665x_earth_pt1 = { |
| 546 | .name = "Philips TDA6651 ISDB-T (EarthSoft PT1)", |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 547 | .min = 90 * MHz, |
| 548 | .max = 770 * MHz, |
Akihiro Tsukada | 648db06 | 2018-04-08 13:39:49 -0400 | [diff] [blame] | 549 | .iffreq = 57000000, |
| 550 | .initdata = (u8[]){ 5, 0x0e, 0x7f, 0xc1, 0x80, 0x80 }, |
| 551 | .count = 10, |
| 552 | .entries = { |
| 553 | { 140000000, 142857, 0xc1, 0x81 }, |
| 554 | { 170000000, 142857, 0xc1, 0xa1 }, |
| 555 | { 220000000, 142857, 0xc1, 0x62 }, |
| 556 | { 330000000, 142857, 0xc1, 0xa2 }, |
| 557 | { 402000000, 142857, 0xc1, 0xe2 }, |
| 558 | { 450000000, 142857, 0xc1, 0x64 }, |
| 559 | { 550000000, 142857, 0xc1, 0x84 }, |
| 560 | { 600000000, 142857, 0xc1, 0xa4 }, |
| 561 | { 700000000, 142857, 0xc1, 0xc4 }, |
| 562 | { 770000000, 142857, 0xc1, 0xe4 }, |
| 563 | } |
| 564 | }; |
| 565 | |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame] | 566 | /* ----------------------------------------------------------- */ |
| 567 | |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 568 | static const struct dvb_pll_desc *pll_list[] = { |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame] | 569 | [DVB_PLL_UNDEFINED] = NULL, |
| 570 | [DVB_PLL_THOMSON_DTT7579] = &dvb_pll_thomson_dtt7579, |
| 571 | [DVB_PLL_THOMSON_DTT759X] = &dvb_pll_thomson_dtt759x, |
Patrice Chotard | 5fb6707 | 2012-07-31 15:31:20 -0300 | [diff] [blame] | 572 | [DVB_PLL_THOMSON_DTT7520X] = &dvb_pll_thomson_dtt7520x, |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame] | 573 | [DVB_PLL_LG_Z201] = &dvb_pll_lg_z201, |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame] | 574 | [DVB_PLL_UNKNOWN_1] = &dvb_pll_unknown_1, |
| 575 | [DVB_PLL_TUA6010XS] = &dvb_pll_tua6010xs, |
| 576 | [DVB_PLL_ENV57H1XD5] = &dvb_pll_env57h1xd5, |
| 577 | [DVB_PLL_TUA6034] = &dvb_pll_tua6034, |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame] | 578 | [DVB_PLL_TDA665X] = &dvb_pll_tda665x, |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame] | 579 | [DVB_PLL_TDED4] = &dvb_pll_tded4, |
Trent Piepho | d799ce5 | 2009-06-11 19:24:00 -0300 | [diff] [blame] | 580 | [DVB_PLL_TDEE4] = &dvb_pll_alps_tdee4, |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame] | 581 | [DVB_PLL_TDHU2] = &dvb_pll_tdhu2, |
| 582 | [DVB_PLL_SAMSUNG_TBMV] = &dvb_pll_samsung_tbmv, |
| 583 | [DVB_PLL_PHILIPS_SD1878_TDA8261] = &dvb_pll_philips_sd1878_tda8261, |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame] | 584 | [DVB_PLL_OPERA1] = &dvb_pll_opera1, |
Antti Palosaari | 139dfeb | 2008-05-17 23:02:00 -0300 | [diff] [blame] | 585 | [DVB_PLL_SAMSUNG_DTOS403IH102A] = &dvb_pll_samsung_dtos403ih102a, |
Trent Piepho | a104ed0 | 2009-06-11 19:21:34 -0300 | [diff] [blame] | 586 | [DVB_PLL_SAMSUNG_TDTC9251DH0] = &dvb_pll_samsung_tdtc9251dh0, |
Trent Piepho | f52c485 | 2009-06-11 19:21:34 -0300 | [diff] [blame] | 587 | [DVB_PLL_SAMSUNG_TBDU18132] = &dvb_pll_samsung_tbdu18132, |
Trent Piepho | 9d5d75a | 2009-06-11 19:21:34 -0300 | [diff] [blame] | 588 | [DVB_PLL_SAMSUNG_TBMU24112] = &dvb_pll_samsung_tbmu24112, |
Akihiro Tsukada | 1745972 | 2018-04-08 13:21:35 -0400 | [diff] [blame] | 589 | [DVB_PLL_TUA6034_FRIIO] = &dvb_pll_tua6034_friio, |
Akihiro Tsukada | 648db06 | 2018-04-08 13:39:49 -0400 | [diff] [blame] | 590 | [DVB_PLL_TDA665X_EARTH_PT1] = &dvb_pll_tda665x_earth_pt1, |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame] | 591 | }; |
| 592 | |
| 593 | /* ----------------------------------------------------------- */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 594 | /* code */ |
| 595 | |
Michael Krufky | 5d7802b | 2007-09-07 18:03:58 -0300 | [diff] [blame] | 596 | static int dvb_pll_configure(struct dvb_frontend *fe, u8 *buf, |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 597 | const u32 frequency) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 598 | { |
Michael Krufky | 5d7802b | 2007-09-07 18:03:58 -0300 | [diff] [blame] | 599 | struct dvb_pll_priv *priv = fe->tuner_priv; |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 600 | const struct dvb_pll_desc *desc = priv->pll_desc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 601 | u32 div; |
| 602 | int i; |
| 603 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 604 | for (i = 0; i < desc->count; i++) { |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 605 | if (frequency > desc->entries[i].limit) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 606 | continue; |
| 607 | break; |
| 608 | } |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 609 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 610 | if (debug) |
Mauro Carvalho Chehab | 5479a58 | 2016-10-13 15:32:32 -0300 | [diff] [blame] | 611 | dprintk("pll: %s: freq=%d | i=%d/%d\n", desc->name, |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 612 | frequency, i, desc->count); |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 613 | if (i == desc->count) |
| 614 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 615 | |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 616 | div = (frequency + desc->iffreq + |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 617 | desc->entries[i].stepsize/2) / desc->entries[i].stepsize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 618 | buf[0] = div >> 8; |
| 619 | buf[1] = div & 0xff; |
Michael Krufky | ab66b22 | 2006-01-23 17:11:11 -0200 | [diff] [blame] | 620 | buf[2] = desc->entries[i].config; |
| 621 | buf[3] = desc->entries[i].cb; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 622 | |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 623 | if (desc->set) |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 624 | desc->set(fe, buf); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 625 | |
| 626 | if (debug) |
Mauro Carvalho Chehab | 5479a58 | 2016-10-13 15:32:32 -0300 | [diff] [blame] | 627 | dprintk("pll: %s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 628 | desc->name, div, buf[0], buf[1], buf[2], buf[3]); |
| 629 | |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 630 | // calculate the frequency we set it to |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 631 | return (div * desc->entries[i].stepsize) - desc->iffreq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 632 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 633 | |
Mauro Carvalho Chehab | f2709c2 | 2016-11-18 20:30:51 -0200 | [diff] [blame] | 634 | static void dvb_pll_release(struct dvb_frontend *fe) |
| 635 | { |
| 636 | kfree(fe->tuner_priv); |
| 637 | fe->tuner_priv = NULL; |
| 638 | } |
| 639 | |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 640 | static int dvb_pll_sleep(struct dvb_frontend *fe) |
| 641 | { |
| 642 | struct dvb_pll_priv *priv = fe->tuner_priv; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 643 | |
Chris Pascoe | c162dff | 2006-08-08 15:48:08 -0300 | [diff] [blame] | 644 | if (priv->i2c == NULL) |
| 645 | return -EINVAL; |
| 646 | |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame] | 647 | if (priv->pll_desc->sleepdata) { |
| 648 | struct i2c_msg msg = { .flags = 0, |
| 649 | .addr = priv->pll_i2c_address, |
| 650 | .buf = priv->pll_desc->sleepdata + 1, |
| 651 | .len = priv->pll_desc->sleepdata[0] }; |
| 652 | |
| 653 | int result; |
| 654 | |
| 655 | if (fe->ops.i2c_gate_ctrl) |
| 656 | fe->ops.i2c_gate_ctrl(fe, 1); |
| 657 | if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) { |
| 658 | return result; |
| 659 | } |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 660 | return 0; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 661 | } |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame] | 662 | /* Shouldn't be called when initdata is NULL, maybe BUG()? */ |
| 663 | return -EINVAL; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 664 | } |
| 665 | |
Mauro Carvalho Chehab | 14d24d1 | 2011-12-24 12:24:33 -0300 | [diff] [blame] | 666 | static int dvb_pll_set_params(struct dvb_frontend *fe) |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 667 | { |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 668 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 669 | struct dvb_pll_priv *priv = fe->tuner_priv; |
| 670 | u8 buf[4]; |
| 671 | struct i2c_msg msg = |
Michael Krufky | 47ae9ae | 2006-11-20 16:38:42 -0300 | [diff] [blame] | 672 | { .addr = priv->pll_i2c_address, .flags = 0, |
| 673 | .buf = buf, .len = sizeof(buf) }; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 674 | int result; |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 675 | u32 frequency = 0; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 676 | |
| 677 | if (priv->i2c == NULL) |
| 678 | return -EINVAL; |
| 679 | |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 680 | result = dvb_pll_configure(fe, buf, c->frequency); |
| 681 | if (result < 0) |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 682 | return result; |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 683 | else |
| 684 | frequency = result; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 685 | |
Patrick Boettcher | dea7486 | 2006-05-14 05:01:31 -0300 | [diff] [blame] | 686 | if (fe->ops.i2c_gate_ctrl) |
| 687 | fe->ops.i2c_gate_ctrl(fe, 1); |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 688 | if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) { |
| 689 | return result; |
| 690 | } |
| 691 | |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 692 | priv->frequency = frequency; |
Mauro Carvalho Chehab | c6f56e7 | 2011-12-26 20:02:28 -0300 | [diff] [blame] | 693 | priv->bandwidth = c->bandwidth_hz; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 694 | |
| 695 | return 0; |
| 696 | } |
| 697 | |
Michael Krufky | 47ae9ae | 2006-11-20 16:38:42 -0300 | [diff] [blame] | 698 | static int dvb_pll_calc_regs(struct dvb_frontend *fe, |
Michael Krufky | 47ae9ae | 2006-11-20 16:38:42 -0300 | [diff] [blame] | 699 | u8 *buf, int buf_len) |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 700 | { |
Mauro Carvalho Chehab | 249fa0b | 2011-12-24 12:03:05 -0300 | [diff] [blame] | 701 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 702 | struct dvb_pll_priv *priv = fe->tuner_priv; |
| 703 | int result; |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 704 | u32 frequency = 0; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 705 | |
| 706 | if (buf_len < 5) |
| 707 | return -EINVAL; |
| 708 | |
Mauro Carvalho Chehab | 249fa0b | 2011-12-24 12:03:05 -0300 | [diff] [blame] | 709 | result = dvb_pll_configure(fe, buf + 1, c->frequency); |
Mauro Carvalho Chehab | 80d8d49 | 2011-12-21 11:16:39 -0300 | [diff] [blame] | 710 | if (result < 0) |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 711 | return result; |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 712 | else |
| 713 | frequency = result; |
| 714 | |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 715 | buf[0] = priv->pll_i2c_address; |
| 716 | |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 717 | priv->frequency = frequency; |
Mauro Carvalho Chehab | 249fa0b | 2011-12-24 12:03:05 -0300 | [diff] [blame] | 718 | priv->bandwidth = c->bandwidth_hz; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 719 | |
| 720 | return 5; |
| 721 | } |
| 722 | |
| 723 | static int dvb_pll_get_frequency(struct dvb_frontend *fe, u32 *frequency) |
| 724 | { |
| 725 | struct dvb_pll_priv *priv = fe->tuner_priv; |
| 726 | *frequency = priv->frequency; |
| 727 | return 0; |
| 728 | } |
| 729 | |
| 730 | static int dvb_pll_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth) |
| 731 | { |
| 732 | struct dvb_pll_priv *priv = fe->tuner_priv; |
| 733 | *bandwidth = priv->bandwidth; |
| 734 | return 0; |
| 735 | } |
| 736 | |
Trent Piepho | 26aed92 | 2007-04-27 12:31:29 -0300 | [diff] [blame] | 737 | static int dvb_pll_init(struct dvb_frontend *fe) |
| 738 | { |
| 739 | struct dvb_pll_priv *priv = fe->tuner_priv; |
| 740 | |
| 741 | if (priv->i2c == NULL) |
| 742 | return -EINVAL; |
| 743 | |
| 744 | if (priv->pll_desc->initdata) { |
| 745 | struct i2c_msg msg = { .flags = 0, |
| 746 | .addr = priv->pll_i2c_address, |
| 747 | .buf = priv->pll_desc->initdata + 1, |
| 748 | .len = priv->pll_desc->initdata[0] }; |
| 749 | |
| 750 | int result; |
| 751 | if (fe->ops.i2c_gate_ctrl) |
| 752 | fe->ops.i2c_gate_ctrl(fe, 1); |
Malcolm Priestley | 2b74334 | 2011-02-06 12:29:51 -0300 | [diff] [blame] | 753 | result = i2c_transfer(priv->i2c, &msg, 1); |
| 754 | if (result != 1) |
Trent Piepho | 26aed92 | 2007-04-27 12:31:29 -0300 | [diff] [blame] | 755 | return result; |
Malcolm Priestley | 2b74334 | 2011-02-06 12:29:51 -0300 | [diff] [blame] | 756 | if (priv->pll_desc->initdata2) { |
| 757 | msg.buf = priv->pll_desc->initdata2 + 1; |
| 758 | msg.len = priv->pll_desc->initdata2[0]; |
| 759 | if (fe->ops.i2c_gate_ctrl) |
| 760 | fe->ops.i2c_gate_ctrl(fe, 1); |
| 761 | result = i2c_transfer(priv->i2c, &msg, 1); |
| 762 | if (result != 1) |
| 763 | return result; |
Trent Piepho | 26aed92 | 2007-04-27 12:31:29 -0300 | [diff] [blame] | 764 | } |
| 765 | return 0; |
| 766 | } |
| 767 | /* Shouldn't be called when initdata is NULL, maybe BUG()? */ |
| 768 | return -EINVAL; |
| 769 | } |
| 770 | |
Julia Lawall | 14c4bf3 | 2016-09-11 11:44:12 -0300 | [diff] [blame] | 771 | static const struct dvb_tuner_ops dvb_pll_tuner_ops = { |
Mauro Carvalho Chehab | f2709c2 | 2016-11-18 20:30:51 -0200 | [diff] [blame] | 772 | .release = dvb_pll_release, |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 773 | .sleep = dvb_pll_sleep, |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame] | 774 | .init = dvb_pll_init, |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 775 | .set_params = dvb_pll_set_params, |
Andrew de Quincey | bd4956b | 2006-04-18 21:38:49 -0300 | [diff] [blame] | 776 | .calc_regs = dvb_pll_calc_regs, |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 777 | .get_frequency = dvb_pll_get_frequency, |
| 778 | .get_bandwidth = dvb_pll_get_bandwidth, |
| 779 | }; |
| 780 | |
Michael Krufky | 47ae9ae | 2006-11-20 16:38:42 -0300 | [diff] [blame] | 781 | struct dvb_frontend *dvb_pll_attach(struct dvb_frontend *fe, int pll_addr, |
| 782 | struct i2c_adapter *i2c, |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame] | 783 | unsigned int pll_desc_id) |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 784 | { |
Sean Young | b475670 | 2017-09-02 07:42:42 -0400 | [diff] [blame] | 785 | u8 *b1; |
| 786 | struct i2c_msg msg = { .addr = pll_addr, .flags = I2C_M_RD, .len = 1 }; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 787 | struct dvb_pll_priv *priv = NULL; |
Andrew de Quincey | 061b623 | 2006-07-10 03:34:14 -0300 | [diff] [blame] | 788 | int ret; |
Joe Perches | 548146f | 2015-07-30 14:08:53 -0300 | [diff] [blame] | 789 | const struct dvb_pll_desc *desc; |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame] | 790 | |
Sean Young | b475670 | 2017-09-02 07:42:42 -0400 | [diff] [blame] | 791 | b1 = kmalloc(1, GFP_KERNEL); |
| 792 | if (!b1) |
| 793 | return NULL; |
| 794 | |
| 795 | b1[0] = 0; |
| 796 | msg.buf = b1; |
| 797 | |
Michael Krufky | 704e39b | 2007-09-07 18:27:43 -0300 | [diff] [blame] | 798 | if ((id[dvb_pll_devcount] > DVB_PLL_UNDEFINED) && |
| 799 | (id[dvb_pll_devcount] < ARRAY_SIZE(pll_list))) |
| 800 | pll_desc_id = id[dvb_pll_devcount]; |
| 801 | |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame] | 802 | BUG_ON(pll_desc_id < 1 || pll_desc_id >= ARRAY_SIZE(pll_list)); |
| 803 | |
| 804 | desc = pll_list[pll_desc_id]; |
Andrew de Quincey | 061b623 | 2006-07-10 03:34:14 -0300 | [diff] [blame] | 805 | |
Andrew de Quincey | 55c05b6 | 2006-07-16 19:41:41 -0300 | [diff] [blame] | 806 | if (i2c != NULL) { |
| 807 | if (fe->ops.i2c_gate_ctrl) |
| 808 | fe->ops.i2c_gate_ctrl(fe, 1); |
Andrew de Quincey | 061b623 | 2006-07-10 03:34:14 -0300 | [diff] [blame] | 809 | |
Andrew de Quincey | 95faba2 | 2006-07-18 16:37:13 -0300 | [diff] [blame] | 810 | ret = i2c_transfer (i2c, &msg, 1); |
Sean Young | b475670 | 2017-09-02 07:42:42 -0400 | [diff] [blame] | 811 | if (ret != 1) { |
| 812 | kfree(b1); |
Andrew de Quincey | 2bfe031 | 2006-08-08 09:10:08 -0300 | [diff] [blame] | 813 | return NULL; |
Sean Young | b475670 | 2017-09-02 07:42:42 -0400 | [diff] [blame] | 814 | } |
Andrew de Quincey | 55c05b6 | 2006-07-16 19:41:41 -0300 | [diff] [blame] | 815 | if (fe->ops.i2c_gate_ctrl) |
| 816 | fe->ops.i2c_gate_ctrl(fe, 0); |
| 817 | } |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 818 | |
| 819 | priv = kzalloc(sizeof(struct dvb_pll_priv), GFP_KERNEL); |
Sean Young | b475670 | 2017-09-02 07:42:42 -0400 | [diff] [blame] | 820 | if (!priv) { |
| 821 | kfree(b1); |
Andrew de Quincey | 2bfe031 | 2006-08-08 09:10:08 -0300 | [diff] [blame] | 822 | return NULL; |
Sean Young | b475670 | 2017-09-02 07:42:42 -0400 | [diff] [blame] | 823 | } |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 824 | |
| 825 | priv->pll_i2c_address = pll_addr; |
| 826 | priv->i2c = i2c; |
| 827 | priv->pll_desc = desc; |
Michael Krufky | a27e5e7 | 2007-09-07 18:11:15 -0300 | [diff] [blame] | 828 | priv->nr = dvb_pll_devcount++; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 829 | |
Michael Krufky | 47ae9ae | 2006-11-20 16:38:42 -0300 | [diff] [blame] | 830 | memcpy(&fe->ops.tuner_ops, &dvb_pll_tuner_ops, |
| 831 | sizeof(struct dvb_tuner_ops)); |
| 832 | |
Mauro Carvalho Chehab | 85709cb | 2018-09-10 08:19:16 -0400 | [diff] [blame] | 833 | strscpy(fe->ops.tuner_ops.info.name, desc->name, |
Trent Piepho | 982dd1b | 2007-04-27 12:31:27 -0300 | [diff] [blame] | 834 | sizeof(fe->ops.tuner_ops.info.name)); |
Mauro Carvalho Chehab | 3d8e450 | 2018-11-20 05:19:36 -0500 | [diff] [blame] | 835 | |
| 836 | fe->ops.tuner_ops.info.frequency_min_hz = desc->min; |
| 837 | fe->ops.tuner_ops.info.frequency_max_hz = desc->max; |
| 838 | |
| 839 | dprintk("%s tuner, frequency range: %u...%u\n", |
| 840 | desc->name, desc->min, desc->max); |
Mauro Carvalho Chehab | a3f90c7 | 2018-07-05 18:59:35 -0400 | [diff] [blame] | 841 | |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame] | 842 | if (!desc->initdata) |
| 843 | fe->ops.tuner_ops.init = NULL; |
| 844 | if (!desc->sleepdata) |
| 845 | fe->ops.tuner_ops.sleep = NULL; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 846 | |
| 847 | fe->tuner_priv = priv; |
Michael Krufky | a27e5e7 | 2007-09-07 18:11:15 -0300 | [diff] [blame] | 848 | |
Michael Krufky | 8528fa4 | 2007-09-09 05:08:30 -0300 | [diff] [blame] | 849 | if ((debug) || (id[priv->nr] == pll_desc_id)) { |
Mauro Carvalho Chehab | 5479a58 | 2016-10-13 15:32:32 -0300 | [diff] [blame] | 850 | dprintk("dvb-pll[%d]", priv->nr); |
Michael Krufky | a27e5e7 | 2007-09-07 18:11:15 -0300 | [diff] [blame] | 851 | if (i2c != NULL) |
Mauro Carvalho Chehab | 5479a58 | 2016-10-13 15:32:32 -0300 | [diff] [blame] | 852 | pr_cont(" %d-%04x", i2c_adapter_id(i2c), pll_addr); |
| 853 | pr_cont(": id# %d (%s) attached, %s\n", pll_desc_id, desc->name, |
Michael Krufky | 704e39b | 2007-09-07 18:27:43 -0300 | [diff] [blame] | 854 | id[priv->nr] == pll_desc_id ? |
| 855 | "insmod option" : "autodetected"); |
Michael Krufky | 4562fbe | 2007-09-09 05:16:34 -0300 | [diff] [blame] | 856 | } |
Michael Krufky | a27e5e7 | 2007-09-07 18:11:15 -0300 | [diff] [blame] | 857 | |
Sean Young | b475670 | 2017-09-02 07:42:42 -0400 | [diff] [blame] | 858 | kfree(b1); |
| 859 | |
Andrew de Quincey | 2bfe031 | 2006-08-08 09:10:08 -0300 | [diff] [blame] | 860 | return fe; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 861 | } |
| 862 | EXPORT_SYMBOL(dvb_pll_attach); |
| 863 | |
Akihiro Tsukada | eaa51fe | 2018-04-08 13:21:34 -0400 | [diff] [blame] | 864 | |
| 865 | static int |
| 866 | dvb_pll_probe(struct i2c_client *client, const struct i2c_device_id *id) |
| 867 | { |
| 868 | struct dvb_pll_config *cfg; |
| 869 | struct dvb_frontend *fe; |
| 870 | unsigned int desc_id; |
| 871 | |
| 872 | cfg = client->dev.platform_data; |
| 873 | fe = cfg->fe; |
| 874 | i2c_set_clientdata(client, fe); |
| 875 | desc_id = (unsigned int) id->driver_data; |
| 876 | |
| 877 | if (!dvb_pll_attach(fe, client->addr, client->adapter, desc_id)) |
| 878 | return -ENOMEM; |
| 879 | |
Akihiro Tsukada | f917fc0 | 2018-06-10 10:49:15 -0400 | [diff] [blame] | 880 | /* |
| 881 | * Unset tuner_ops.release (== dvb_pll_release) |
| 882 | * which has been just set in the above dvb_pll_attach(), |
| 883 | * because if tuner_ops.release was left defined, |
| 884 | * this module would be 'put' twice on exit: |
| 885 | * once by dvb_frontend_detach() and another by dvb_module_release(). |
| 886 | * |
| 887 | * dvb_pll_release is instead executed in the i2c driver's .remove(), |
| 888 | * keeping dvb_pll_attach untouched for legacy (dvb_attach) drivers. |
| 889 | */ |
| 890 | fe->ops.tuner_ops.release = NULL; |
Akihiro Tsukada | eaa51fe | 2018-04-08 13:21:34 -0400 | [diff] [blame] | 891 | dev_info(&client->dev, "DVB Simple Tuner attached.\n"); |
| 892 | return 0; |
| 893 | } |
| 894 | |
| 895 | static int dvb_pll_remove(struct i2c_client *client) |
| 896 | { |
| 897 | struct dvb_frontend *fe; |
| 898 | |
| 899 | fe = i2c_get_clientdata(client); |
| 900 | dvb_pll_release(fe); |
| 901 | return 0; |
| 902 | } |
| 903 | |
| 904 | |
| 905 | static const struct i2c_device_id dvb_pll_id[] = { |
| 906 | {"dtt7579", DVB_PLL_THOMSON_DTT7579}, |
| 907 | {"dtt759x", DVB_PLL_THOMSON_DTT759X}, |
| 908 | {"z201", DVB_PLL_LG_Z201}, |
| 909 | {"unknown_1", DVB_PLL_UNKNOWN_1}, |
| 910 | {"tua6010xs", DVB_PLL_TUA6010XS}, |
| 911 | {"env57h1xd5", DVB_PLL_ENV57H1XD5}, |
| 912 | {"tua6034", DVB_PLL_TUA6034}, |
| 913 | {"tda665x", DVB_PLL_TDA665X}, |
| 914 | {"tded4", DVB_PLL_TDED4}, |
| 915 | {"tdhu2", DVB_PLL_TDHU2}, |
| 916 | {"tbmv", DVB_PLL_SAMSUNG_TBMV}, |
| 917 | {"sd1878_tda8261", DVB_PLL_PHILIPS_SD1878_TDA8261}, |
| 918 | {"opera1", DVB_PLL_OPERA1}, |
| 919 | {"dtos403ih102a", DVB_PLL_SAMSUNG_DTOS403IH102A}, |
| 920 | {"tdtc9251dh0", DVB_PLL_SAMSUNG_TDTC9251DH0}, |
| 921 | {"tbdu18132", DVB_PLL_SAMSUNG_TBDU18132}, |
| 922 | {"tbmu24112", DVB_PLL_SAMSUNG_TBMU24112}, |
| 923 | {"tdee4", DVB_PLL_TDEE4}, |
| 924 | {"dtt7520x", DVB_PLL_THOMSON_DTT7520X}, |
Akihiro Tsukada | 1745972 | 2018-04-08 13:21:35 -0400 | [diff] [blame] | 925 | {"tua6034_friio", DVB_PLL_TUA6034_FRIIO}, |
Akihiro Tsukada | 648db06 | 2018-04-08 13:39:49 -0400 | [diff] [blame] | 926 | {"tda665x_earthpt1", DVB_PLL_TDA665X_EARTH_PT1}, |
Akihiro Tsukada | eaa51fe | 2018-04-08 13:21:34 -0400 | [diff] [blame] | 927 | {} |
| 928 | }; |
| 929 | |
| 930 | |
| 931 | MODULE_DEVICE_TABLE(i2c, dvb_pll_id); |
| 932 | |
| 933 | static struct i2c_driver dvb_pll_driver = { |
| 934 | .driver = { |
| 935 | .name = "dvb_pll", |
| 936 | }, |
| 937 | .probe = dvb_pll_probe, |
| 938 | .remove = dvb_pll_remove, |
| 939 | .id_table = dvb_pll_id, |
| 940 | }; |
| 941 | |
| 942 | module_i2c_driver(dvb_pll_driver); |
| 943 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 944 | MODULE_DESCRIPTION("dvb pll library"); |
| 945 | MODULE_AUTHOR("Gerd Knorr"); |
| 946 | MODULE_LICENSE("GPL"); |