Thomas Gleixner | c942fdd | 2019-05-27 08:55:06 +0200 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl>, |
| 4 | Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker |
| 5 | <mdsxyz123@yahoo.com> |
Jean Delvare | b3b8df9 | 2014-11-12 10:20:40 +0100 | [diff] [blame] | 6 | Copyright (C) 2007 - 2014 Jean Delvare <jdelvare@suse.de> |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 7 | Copyright (C) 2010 Intel Corporation, |
| 8 | David Woodhouse <dwmw2@infradead.org> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | */ |
| 11 | |
| 12 | /* |
Jean Delvare | ce31611 | 2014-07-17 15:03:24 +0200 | [diff] [blame] | 13 | * Supports the following Intel I/O Controller Hubs (ICH): |
| 14 | * |
| 15 | * I/O Block I2C |
| 16 | * region SMBus Block proc. block |
| 17 | * Chip name PCI ID size PEC buffer call read |
| 18 | * --------------------------------------------------------------------------- |
| 19 | * 82801AA (ICH) 0x2413 16 no no no no |
| 20 | * 82801AB (ICH0) 0x2423 16 no no no no |
| 21 | * 82801BA (ICH2) 0x2443 16 no no no no |
| 22 | * 82801CA (ICH3) 0x2483 32 soft no no no |
| 23 | * 82801DB (ICH4) 0x24c3 32 hard yes no no |
| 24 | * 82801E (ICH5) 0x24d3 32 hard yes yes yes |
| 25 | * 6300ESB 0x25a4 32 hard yes yes yes |
| 26 | * 82801F (ICH6) 0x266a 32 hard yes yes yes |
| 27 | * 6310ESB/6320ESB 0x269b 32 hard yes yes yes |
| 28 | * 82801G (ICH7) 0x27da 32 hard yes yes yes |
| 29 | * 82801H (ICH8) 0x283e 32 hard yes yes yes |
| 30 | * 82801I (ICH9) 0x2930 32 hard yes yes yes |
| 31 | * EP80579 (Tolapai) 0x5032 32 hard yes yes yes |
| 32 | * ICH10 0x3a30 32 hard yes yes yes |
| 33 | * ICH10 0x3a60 32 hard yes yes yes |
| 34 | * 5/3400 Series (PCH) 0x3b30 32 hard yes yes yes |
| 35 | * 6 Series (PCH) 0x1c22 32 hard yes yes yes |
| 36 | * Patsburg (PCH) 0x1d22 32 hard yes yes yes |
| 37 | * Patsburg (PCH) IDF 0x1d70 32 hard yes yes yes |
| 38 | * Patsburg (PCH) IDF 0x1d71 32 hard yes yes yes |
| 39 | * Patsburg (PCH) IDF 0x1d72 32 hard yes yes yes |
| 40 | * DH89xxCC (PCH) 0x2330 32 hard yes yes yes |
| 41 | * Panther Point (PCH) 0x1e22 32 hard yes yes yes |
| 42 | * Lynx Point (PCH) 0x8c22 32 hard yes yes yes |
| 43 | * Lynx Point-LP (PCH) 0x9c22 32 hard yes yes yes |
| 44 | * Avoton (SOC) 0x1f3c 32 hard yes yes yes |
| 45 | * Wellsburg (PCH) 0x8d22 32 hard yes yes yes |
| 46 | * Wellsburg (PCH) MS 0x8d7d 32 hard yes yes yes |
| 47 | * Wellsburg (PCH) MS 0x8d7e 32 hard yes yes yes |
| 48 | * Wellsburg (PCH) MS 0x8d7f 32 hard yes yes yes |
| 49 | * Coleto Creek (PCH) 0x23b0 32 hard yes yes yes |
Jean Delvare | b299de8 | 2014-07-17 15:04:41 +0200 | [diff] [blame] | 50 | * Wildcat Point (PCH) 0x8ca2 32 hard yes yes yes |
Jean Delvare | ce31611 | 2014-07-17 15:03:24 +0200 | [diff] [blame] | 51 | * Wildcat Point-LP (PCH) 0x9ca2 32 hard yes yes yes |
| 52 | * BayTrail (SOC) 0x0f12 32 hard yes yes yes |
Jarkko Nikula | 1540779 | 2018-02-16 11:24:29 +0200 | [diff] [blame] | 53 | * Braswell (SOC) 0x2292 32 hard yes yes yes |
james.d.ralston@intel.com | 3e27a84 | 2014-10-13 15:20:24 -0700 | [diff] [blame] | 54 | * Sunrise Point-H (PCH) 0xa123 32 hard yes yes yes |
Devin Ryles | 3eee1799 | 2014-11-05 16:30:03 -0500 | [diff] [blame] | 55 | * Sunrise Point-LP (PCH) 0x9d23 32 hard yes yes yes |
Mika Westerberg | 84d7f2e | 2015-10-13 15:41:39 +0300 | [diff] [blame] | 56 | * DNV (SOC) 0x19df 32 hard yes yes yes |
Jarkko Nikula | dd77f42 | 2015-10-22 17:16:58 +0300 | [diff] [blame] | 57 | * Broxton (SOC) 0x5ad4 32 hard yes yes yes |
Alexandra Yates | cdc5a31 | 2015-11-05 11:40:25 -0800 | [diff] [blame] | 58 | * Lewisburg (PCH) 0xa1a3 32 hard yes yes yes |
| 59 | * Lewisburg Supersku (PCH) 0xa223 32 hard yes yes yes |
Andy Shevchenko | 3115876 | 2016-09-23 11:56:01 +0300 | [diff] [blame] | 60 | * Kaby Lake PCH-H (PCH) 0xa2a3 32 hard yes yes yes |
Mika Westerberg | 9827f9e | 2017-02-01 19:20:59 +0300 | [diff] [blame] | 61 | * Gemini Lake (SOC) 0x31d4 32 hard yes yes yes |
Srinivas Pandruvada | 09a1de0 | 2017-05-18 11:23:06 +0300 | [diff] [blame] | 62 | * Cannon Lake-H (PCH) 0xa323 32 hard yes yes yes |
| 63 | * Cannon Lake-LP (PCH) 0x9da3 32 hard yes yes yes |
Jarkko Nikula | cb09d94 | 2017-09-21 16:23:16 +0300 | [diff] [blame] | 64 | * Cedar Fork (PCH) 0x18df 32 hard yes yes yes |
Mika Westerberg | 0bff2a8 | 2018-06-28 16:08:24 +0300 | [diff] [blame] | 65 | * Ice Lake-LP (PCH) 0x34a3 32 hard yes yes yes |
Jarkko Nikula | 5cd1c56 | 2019-03-15 12:56:49 +0200 | [diff] [blame] | 66 | * Comet Lake (PCH) 0x02a3 32 hard yes yes yes |
Jean Delvare | ce31611 | 2014-07-17 15:03:24 +0200 | [diff] [blame] | 67 | * |
| 68 | * Features supported by this driver: |
| 69 | * Software PEC no |
| 70 | * Hardware PEC yes |
| 71 | * Block buffer yes |
| 72 | * Block process call transaction no |
| 73 | * I2C block read transaction yes (doesn't use the block buffer) |
| 74 | * Slave mode no |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 75 | * SMBus Host Notify yes |
Jean Delvare | ce31611 | 2014-07-17 15:03:24 +0200 | [diff] [blame] | 76 | * Interrupt processing yes |
| 77 | * |
| 78 | * See the file Documentation/i2c/busses/i2c-i801 for details. |
| 79 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 | |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 81 | #include <linux/interrupt.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 82 | #include <linux/module.h> |
| 83 | #include <linux/pci.h> |
| 84 | #include <linux/kernel.h> |
| 85 | #include <linux/stddef.h> |
| 86 | #include <linux/delay.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 87 | #include <linux/ioport.h> |
| 88 | #include <linux/init.h> |
| 89 | #include <linux/i2c.h> |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 90 | #include <linux/i2c-smbus.h> |
Jean Delvare | 54fb4a05 | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 91 | #include <linux/acpi.h> |
Jean Delvare | 1561bfe | 2009-01-07 14:29:17 +0100 | [diff] [blame] | 92 | #include <linux/io.h> |
Hans de Goede | fa5bfab | 2009-03-30 21:46:44 +0200 | [diff] [blame] | 93 | #include <linux/dmi.h> |
Ben Hutchings | 665a96b | 2011-01-10 22:11:22 +0100 | [diff] [blame] | 94 | #include <linux/slab.h> |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 95 | #include <linux/wait.h> |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 96 | #include <linux/err.h> |
Mika Westerberg | 9424693 | 2015-08-06 13:46:25 +0100 | [diff] [blame] | 97 | #include <linux/platform_device.h> |
| 98 | #include <linux/platform_data/itco_wdt.h> |
Jarkko Nikula | a7401ca | 2016-03-10 14:12:22 +0200 | [diff] [blame] | 99 | #include <linux/pm_runtime.h> |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 100 | |
Javier Martinez Canillas | 175c708 | 2016-07-21 12:11:01 -0400 | [diff] [blame] | 101 | #if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 102 | #include <linux/gpio.h> |
Wolfram Sang | 62ea22c | 2018-04-19 22:00:08 +0200 | [diff] [blame] | 103 | #include <linux/platform_data/i2c-mux-gpio.h> |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 104 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 105 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 106 | /* I801 SMBus address offsets */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 107 | #define SMBHSTSTS(p) (0 + (p)->smba) |
| 108 | #define SMBHSTCNT(p) (2 + (p)->smba) |
| 109 | #define SMBHSTCMD(p) (3 + (p)->smba) |
| 110 | #define SMBHSTADD(p) (4 + (p)->smba) |
| 111 | #define SMBHSTDAT0(p) (5 + (p)->smba) |
| 112 | #define SMBHSTDAT1(p) (6 + (p)->smba) |
| 113 | #define SMBBLKDAT(p) (7 + (p)->smba) |
| 114 | #define SMBPEC(p) (8 + (p)->smba) /* ICH3 and later */ |
| 115 | #define SMBAUXSTS(p) (12 + (p)->smba) /* ICH4 and later */ |
| 116 | #define SMBAUXCTL(p) (13 + (p)->smba) /* ICH4 and later */ |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 117 | #define SMBSLVSTS(p) (16 + (p)->smba) /* ICH3 and later */ |
| 118 | #define SMBSLVCMD(p) (17 + (p)->smba) /* ICH3 and later */ |
| 119 | #define SMBNTFDADD(p) (20 + (p)->smba) /* ICH3 and later */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 120 | |
| 121 | /* PCI Address Constants */ |
Jean Delvare | 6dcc19d | 2006-06-12 21:53:02 +0200 | [diff] [blame] | 122 | #define SMBBAR 4 |
Jean Delvare | aeb8a3d | 2014-11-12 10:25:37 +0100 | [diff] [blame] | 123 | #define SMBPCICTL 0x004 |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 124 | #define SMBPCISTS 0x006 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 125 | #define SMBHSTCFG 0x040 |
Mika Westerberg | 9424693 | 2015-08-06 13:46:25 +0100 | [diff] [blame] | 126 | #define TCOBASE 0x050 |
| 127 | #define TCOCTL 0x054 |
| 128 | |
| 129 | #define ACPIBASE 0x040 |
| 130 | #define ACPIBASE_SMI_OFF 0x030 |
| 131 | #define ACPICTRL 0x044 |
| 132 | #define ACPICTRL_EN 0x080 |
| 133 | |
| 134 | #define SBREG_BAR 0x10 |
| 135 | #define SBREG_SMBCTRL 0xc6000c |
Felipe Balbi | 851a151 | 2018-09-03 11:24:57 +0300 | [diff] [blame] | 136 | #define SBREG_SMBCTRL_DNV 0xcf000c |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 137 | |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 138 | /* Host status bits for SMBPCISTS */ |
Benjamin Tissoires | fe9ba3e | 2016-10-13 14:10:37 +0200 | [diff] [blame] | 139 | #define SMBPCISTS_INTS BIT(3) |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 140 | |
Jean Delvare | aeb8a3d | 2014-11-12 10:25:37 +0100 | [diff] [blame] | 141 | /* Control bits for SMBPCICTL */ |
Benjamin Tissoires | fe9ba3e | 2016-10-13 14:10:37 +0200 | [diff] [blame] | 142 | #define SMBPCICTL_INTDIS BIT(10) |
Jean Delvare | aeb8a3d | 2014-11-12 10:25:37 +0100 | [diff] [blame] | 143 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | /* Host configuration bits for SMBHSTCFG */ |
Benjamin Tissoires | fe9ba3e | 2016-10-13 14:10:37 +0200 | [diff] [blame] | 145 | #define SMBHSTCFG_HST_EN BIT(0) |
| 146 | #define SMBHSTCFG_SMB_SMI_EN BIT(1) |
| 147 | #define SMBHSTCFG_I2C_EN BIT(2) |
| 148 | #define SMBHSTCFG_SPD_WD BIT(4) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 149 | |
Mika Westerberg | 9424693 | 2015-08-06 13:46:25 +0100 | [diff] [blame] | 150 | /* TCO configuration bits for TCOCTL */ |
Benjamin Tissoires | fe9ba3e | 2016-10-13 14:10:37 +0200 | [diff] [blame] | 151 | #define TCOCTL_EN BIT(8) |
Mika Westerberg | 9424693 | 2015-08-06 13:46:25 +0100 | [diff] [blame] | 152 | |
Ellen Wang | 97d34ec | 2016-07-01 22:42:15 +0200 | [diff] [blame] | 153 | /* Auxiliary status register bits, ICH4+ only */ |
Benjamin Tissoires | fe9ba3e | 2016-10-13 14:10:37 +0200 | [diff] [blame] | 154 | #define SMBAUXSTS_CRCE BIT(0) |
| 155 | #define SMBAUXSTS_STCO BIT(1) |
Ellen Wang | 97d34ec | 2016-07-01 22:42:15 +0200 | [diff] [blame] | 156 | |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 157 | /* Auxiliary control register bits, ICH4+ only */ |
Benjamin Tissoires | fe9ba3e | 2016-10-13 14:10:37 +0200 | [diff] [blame] | 158 | #define SMBAUXCTL_CRC BIT(0) |
| 159 | #define SMBAUXCTL_E32B BIT(1) |
Oleg Ryjkov | ca8b9e3 | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 160 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 161 | /* Other settings */ |
Jean Delvare | 84c1af4 | 2012-03-26 21:47:19 +0200 | [diff] [blame] | 162 | #define MAX_RETRIES 400 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 163 | |
| 164 | /* I801 command constants */ |
| 165 | #define I801_QUICK 0x00 |
| 166 | #define I801_BYTE 0x04 |
| 167 | #define I801_BYTE_DATA 0x08 |
| 168 | #define I801_WORD_DATA 0x0C |
Jean Delvare | ae7b049 | 2008-01-27 18:14:49 +0100 | [diff] [blame] | 169 | #define I801_PROC_CALL 0x10 /* unimplemented */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 170 | #define I801_BLOCK_DATA 0x14 |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 171 | #define I801_I2C_BLOCK_DATA 0x18 /* ICH5 and later */ |
Daniel Kurtz | edbeea6 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 172 | |
| 173 | /* I801 Host Control register bits */ |
Benjamin Tissoires | fe9ba3e | 2016-10-13 14:10:37 +0200 | [diff] [blame] | 174 | #define SMBHSTCNT_INTREN BIT(0) |
| 175 | #define SMBHSTCNT_KILL BIT(1) |
| 176 | #define SMBHSTCNT_LAST_BYTE BIT(5) |
| 177 | #define SMBHSTCNT_START BIT(6) |
| 178 | #define SMBHSTCNT_PEC_EN BIT(7) /* ICH3 and later */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 179 | |
Oleg Ryjkov | ca8b9e3 | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 180 | /* I801 Hosts Status register bits */ |
Benjamin Tissoires | fe9ba3e | 2016-10-13 14:10:37 +0200 | [diff] [blame] | 181 | #define SMBHSTSTS_BYTE_DONE BIT(7) |
| 182 | #define SMBHSTSTS_INUSE_STS BIT(6) |
| 183 | #define SMBHSTSTS_SMBALERT_STS BIT(5) |
| 184 | #define SMBHSTSTS_FAILED BIT(4) |
| 185 | #define SMBHSTSTS_BUS_ERR BIT(3) |
| 186 | #define SMBHSTSTS_DEV_ERR BIT(2) |
| 187 | #define SMBHSTSTS_INTR BIT(1) |
| 188 | #define SMBHSTSTS_HOST_BUSY BIT(0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 189 | |
Benjamin Tissoires | 9786b1f | 2016-10-13 14:10:36 +0200 | [diff] [blame] | 190 | /* Host Notify Status register bits */ |
Benjamin Tissoires | fe9ba3e | 2016-10-13 14:10:37 +0200 | [diff] [blame] | 191 | #define SMBSLVSTS_HST_NTFY_STS BIT(0) |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 192 | |
Benjamin Tissoires | 9786b1f | 2016-10-13 14:10:36 +0200 | [diff] [blame] | 193 | /* Host Notify Command register bits */ |
Benjamin Tissoires | fe9ba3e | 2016-10-13 14:10:37 +0200 | [diff] [blame] | 194 | #define SMBSLVCMD_HST_NTFY_INTREN BIT(0) |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 195 | |
Daniel Kurtz | 70a1cc1 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 196 | #define STATUS_ERROR_FLAGS (SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | \ |
| 197 | SMBHSTSTS_DEV_ERR) |
| 198 | |
| 199 | #define STATUS_FLAGS (SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR | \ |
| 200 | STATUS_ERROR_FLAGS) |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 201 | |
Jean Delvare | a6e5e2b | 2011-05-01 18:18:49 +0200 | [diff] [blame] | 202 | /* Older devices have their ID defined in <linux/pci_ids.h> */ |
Jean Delvare | ce31611 | 2014-07-17 15:03:24 +0200 | [diff] [blame] | 203 | #define PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS 0x0f12 |
Jarkko Nikula | cb09d94 | 2017-09-21 16:23:16 +0300 | [diff] [blame] | 204 | #define PCI_DEVICE_ID_INTEL_CDF_SMBUS 0x18df |
Andy Shevchenko | 34b57f4 | 2016-03-09 14:14:17 +0200 | [diff] [blame] | 205 | #define PCI_DEVICE_ID_INTEL_DNV_SMBUS 0x19df |
Jean Delvare | ce31611 | 2014-07-17 15:03:24 +0200 | [diff] [blame] | 206 | #define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22 |
| 207 | #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22 |
David Woodhouse | 55fee8d | 2010-10-31 21:07:00 +0100 | [diff] [blame] | 208 | /* Patsburg also has three 'Integrated Device Function' SMBus controllers */ |
Jean Delvare | ce31611 | 2014-07-17 15:03:24 +0200 | [diff] [blame] | 209 | #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0 0x1d70 |
| 210 | #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71 |
| 211 | #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72 |
| 212 | #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS 0x1e22 |
| 213 | #define PCI_DEVICE_ID_INTEL_AVOTON_SMBUS 0x1f3c |
Andy Shevchenko | 34b57f4 | 2016-03-09 14:14:17 +0200 | [diff] [blame] | 214 | #define PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS 0x2292 |
Jean Delvare | ce31611 | 2014-07-17 15:03:24 +0200 | [diff] [blame] | 215 | #define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS 0x2330 |
| 216 | #define PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS 0x23b0 |
Mika Westerberg | 9827f9e | 2017-02-01 19:20:59 +0300 | [diff] [blame] | 217 | #define PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS 0x31d4 |
Mika Westerberg | 0bff2a8 | 2018-06-28 16:08:24 +0300 | [diff] [blame] | 218 | #define PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS 0x34a3 |
Jean Delvare | ce31611 | 2014-07-17 15:03:24 +0200 | [diff] [blame] | 219 | #define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30 |
Andy Shevchenko | 34b57f4 | 2016-03-09 14:14:17 +0200 | [diff] [blame] | 220 | #define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS 0x5ad4 |
Jean Delvare | ce31611 | 2014-07-17 15:03:24 +0200 | [diff] [blame] | 221 | #define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22 |
Jean Delvare | b299de8 | 2014-07-17 15:04:41 +0200 | [diff] [blame] | 222 | #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS 0x8ca2 |
Jean Delvare | ce31611 | 2014-07-17 15:03:24 +0200 | [diff] [blame] | 223 | #define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS 0x8d22 |
| 224 | #define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0 0x8d7d |
| 225 | #define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1 0x8d7e |
| 226 | #define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2 0x8d7f |
| 227 | #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS 0x9c22 |
James Ralston | afc6592 | 2013-11-04 09:29:48 -0800 | [diff] [blame] | 228 | #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS 0x9ca2 |
Devin Ryles | 3eee1799 | 2014-11-05 16:30:03 -0500 | [diff] [blame] | 229 | #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS 0x9d23 |
Srinivas Pandruvada | 09a1de0 | 2017-05-18 11:23:06 +0300 | [diff] [blame] | 230 | #define PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS 0x9da3 |
Andy Shevchenko | 34b57f4 | 2016-03-09 14:14:17 +0200 | [diff] [blame] | 231 | #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS 0xa123 |
Alexandra Yates | cdc5a31 | 2015-11-05 11:40:25 -0800 | [diff] [blame] | 232 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS 0xa1a3 |
| 233 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS 0xa223 |
Andy Shevchenko | 3115876 | 2016-09-23 11:56:01 +0300 | [diff] [blame] | 234 | #define PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS 0xa2a3 |
Srinivas Pandruvada | 09a1de0 | 2017-05-18 11:23:06 +0300 | [diff] [blame] | 235 | #define PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS 0xa323 |
Jarkko Nikula | 5cd1c56 | 2019-03-15 12:56:49 +0200 | [diff] [blame] | 236 | #define PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS 0x02a3 |
David Woodhouse | 55fee8d | 2010-10-31 21:07:00 +0100 | [diff] [blame] | 237 | |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 238 | struct i801_mux_config { |
| 239 | char *gpio_chip; |
| 240 | unsigned values[3]; |
| 241 | int n_values; |
| 242 | unsigned classes[3]; |
| 243 | unsigned gpios[2]; /* Relative to gpio_chip->base */ |
| 244 | int n_gpios; |
| 245 | }; |
| 246 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 247 | struct i801_priv { |
| 248 | struct i2c_adapter adapter; |
| 249 | unsigned long smba; |
| 250 | unsigned char original_hstcfg; |
Benjamin Tissoires | 22e94bd | 2016-10-13 14:10:35 +0200 | [diff] [blame] | 251 | unsigned char original_slvcmd; |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 252 | struct pci_dev *pci_dev; |
| 253 | unsigned int features; |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 254 | |
| 255 | /* isr processing */ |
| 256 | wait_queue_head_t waitq; |
| 257 | u8 status; |
Daniel Kurtz | d3ff6ce | 2012-07-24 14:13:59 +0200 | [diff] [blame] | 258 | |
| 259 | /* Command state used by isr for byte-by-byte block transactions */ |
| 260 | u8 cmd; |
| 261 | bool is_read; |
| 262 | int count; |
| 263 | int len; |
| 264 | u8 *data; |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 265 | |
Javier Martinez Canillas | 175c708 | 2016-07-21 12:11:01 -0400 | [diff] [blame] | 266 | #if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 267 | const struct i801_mux_config *mux_drvdata; |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 268 | struct platform_device *mux_pdev; |
| 269 | #endif |
Mika Westerberg | 9424693 | 2015-08-06 13:46:25 +0100 | [diff] [blame] | 270 | struct platform_device *tco_pdev; |
Mika Westerberg | a7ae819 | 2016-06-09 16:56:28 +0300 | [diff] [blame] | 271 | |
| 272 | /* |
| 273 | * If set to true the host controller registers are reserved for |
| 274 | * ACPI AML use. Protected by acpi_lock. |
| 275 | */ |
| 276 | bool acpi_reserved; |
| 277 | struct mutex acpi_lock; |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 278 | }; |
| 279 | |
Benjamin Tissoires | f91fba6 | 2016-10-13 14:10:38 +0200 | [diff] [blame] | 280 | #define FEATURE_SMBUS_PEC BIT(0) |
| 281 | #define FEATURE_BLOCK_BUFFER BIT(1) |
| 282 | #define FEATURE_BLOCK_PROC BIT(2) |
| 283 | #define FEATURE_I2C_BLOCK_READ BIT(3) |
| 284 | #define FEATURE_IRQ BIT(4) |
| 285 | #define FEATURE_HOST_NOTIFY BIT(5) |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 286 | /* Not really a feature, but it's convenient to handle it as such */ |
Benjamin Tissoires | f91fba6 | 2016-10-13 14:10:38 +0200 | [diff] [blame] | 287 | #define FEATURE_IDF BIT(15) |
| 288 | #define FEATURE_TCO BIT(16) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 289 | |
Jean Delvare | adff687 | 2010-05-21 18:40:54 +0200 | [diff] [blame] | 290 | static const char *i801_feature_names[] = { |
| 291 | "SMBus PEC", |
| 292 | "Block buffer", |
| 293 | "Block process call", |
| 294 | "I2C block read", |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 295 | "Interrupt", |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 296 | "SMBus Host Notify", |
Jean Delvare | adff687 | 2010-05-21 18:40:54 +0200 | [diff] [blame] | 297 | }; |
| 298 | |
| 299 | static unsigned int disable_features; |
| 300 | module_param(disable_features, uint, S_IRUGO | S_IWUSR); |
Jean Delvare | 5322934 | 2013-05-15 02:44:10 +0000 | [diff] [blame] | 301 | MODULE_PARM_DESC(disable_features, "Disable selected driver features:\n" |
| 302 | "\t\t 0x01 disable SMBus PEC\n" |
| 303 | "\t\t 0x02 disable the block buffer\n" |
| 304 | "\t\t 0x08 disable the I2C block read functionality\n" |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 305 | "\t\t 0x10 don't use interrupts\n" |
| 306 | "\t\t 0x20 disable SMBus Host Notify "); |
Jean Delvare | adff687 | 2010-05-21 18:40:54 +0200 | [diff] [blame] | 307 | |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 308 | /* Make sure the SMBus host is ready to start transmitting. |
| 309 | Return 0 if it is, -EBUSY if it is not. */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 310 | static int i801_check_pre(struct i801_priv *priv) |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 311 | { |
| 312 | int status; |
| 313 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 314 | status = inb_p(SMBHSTSTS(priv)); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 315 | if (status & SMBHSTSTS_HOST_BUSY) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 316 | dev_err(&priv->pci_dev->dev, "SMBus is busy, can't use it!\n"); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 317 | return -EBUSY; |
| 318 | } |
| 319 | |
| 320 | status &= STATUS_FLAGS; |
| 321 | if (status) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 322 | dev_dbg(&priv->pci_dev->dev, "Clearing status flags (%02x)\n", |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 323 | status); |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 324 | outb_p(status, SMBHSTSTS(priv)); |
| 325 | status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS; |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 326 | if (status) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 327 | dev_err(&priv->pci_dev->dev, |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 328 | "Failed clearing status flags (%02x)\n", |
| 329 | status); |
| 330 | return -EBUSY; |
| 331 | } |
| 332 | } |
| 333 | |
Ellen Wang | 97d34ec | 2016-07-01 22:42:15 +0200 | [diff] [blame] | 334 | /* |
| 335 | * Clear CRC status if needed. |
| 336 | * During normal operation, i801_check_post() takes care |
| 337 | * of it after every operation. We do it here only in case |
| 338 | * the hardware was already in this state when the driver |
| 339 | * started. |
| 340 | */ |
| 341 | if (priv->features & FEATURE_SMBUS_PEC) { |
| 342 | status = inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE; |
| 343 | if (status) { |
| 344 | dev_dbg(&priv->pci_dev->dev, |
| 345 | "Clearing aux status flags (%02x)\n", status); |
| 346 | outb_p(status, SMBAUXSTS(priv)); |
| 347 | status = inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE; |
| 348 | if (status) { |
| 349 | dev_err(&priv->pci_dev->dev, |
| 350 | "Failed clearing aux status flags (%02x)\n", |
| 351 | status); |
| 352 | return -EBUSY; |
| 353 | } |
| 354 | } |
| 355 | } |
| 356 | |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 357 | return 0; |
| 358 | } |
| 359 | |
Jean Delvare | 6cad93c | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 360 | /* |
| 361 | * Convert the status register to an error code, and clear it. |
| 362 | * Note that status only contains the bits we want to clear, not the |
| 363 | * actual register value. |
| 364 | */ |
| 365 | static int i801_check_post(struct i801_priv *priv, int status) |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 366 | { |
| 367 | int result = 0; |
| 368 | |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 369 | /* |
| 370 | * If the SMBus is still busy, we give up |
| 371 | * Note: This timeout condition only happens when using polling |
| 372 | * transactions. For interrupt operation, NAK/timeout is indicated by |
| 373 | * DEV_ERR. |
| 374 | */ |
Jean Delvare | 6cad93c | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 375 | if (unlikely(status < 0)) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 376 | dev_err(&priv->pci_dev->dev, "Transaction timeout\n"); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 377 | /* try to stop the current command */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 378 | dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n"); |
| 379 | outb_p(inb_p(SMBHSTCNT(priv)) | SMBHSTCNT_KILL, |
| 380 | SMBHSTCNT(priv)); |
Jean Delvare | 84c1af4 | 2012-03-26 21:47:19 +0200 | [diff] [blame] | 381 | usleep_range(1000, 2000); |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 382 | outb_p(inb_p(SMBHSTCNT(priv)) & (~SMBHSTCNT_KILL), |
| 383 | SMBHSTCNT(priv)); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 384 | |
| 385 | /* Check if it worked */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 386 | status = inb_p(SMBHSTSTS(priv)); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 387 | if ((status & SMBHSTSTS_HOST_BUSY) || |
| 388 | !(status & SMBHSTSTS_FAILED)) |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 389 | dev_err(&priv->pci_dev->dev, |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 390 | "Failed terminating the transaction\n"); |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 391 | outb_p(STATUS_FLAGS, SMBHSTSTS(priv)); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 392 | return -ETIMEDOUT; |
| 393 | } |
| 394 | |
| 395 | if (status & SMBHSTSTS_FAILED) { |
| 396 | result = -EIO; |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 397 | dev_err(&priv->pci_dev->dev, "Transaction failed\n"); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 398 | } |
| 399 | if (status & SMBHSTSTS_DEV_ERR) { |
Ellen Wang | 97d34ec | 2016-07-01 22:42:15 +0200 | [diff] [blame] | 400 | /* |
| 401 | * This may be a PEC error, check and clear it. |
| 402 | * |
| 403 | * AUXSTS is handled differently from HSTSTS. |
| 404 | * For HSTSTS, i801_isr() or i801_wait_intr() |
| 405 | * has already cleared the error bits in hardware, |
| 406 | * and we are passed a copy of the original value |
| 407 | * in "status". |
| 408 | * For AUXSTS, the hardware register is left |
| 409 | * for us to handle here. |
| 410 | * This is asymmetric, slightly iffy, but safe, |
| 411 | * since all this code is serialized and the CRCE |
| 412 | * bit is harmless as long as it's cleared before |
| 413 | * the next operation. |
| 414 | */ |
| 415 | if ((priv->features & FEATURE_SMBUS_PEC) && |
| 416 | (inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE)) { |
| 417 | outb_p(SMBAUXSTS_CRCE, SMBAUXSTS(priv)); |
| 418 | result = -EBADMSG; |
| 419 | dev_dbg(&priv->pci_dev->dev, "PEC error\n"); |
| 420 | } else { |
| 421 | result = -ENXIO; |
| 422 | dev_dbg(&priv->pci_dev->dev, "No response\n"); |
| 423 | } |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 424 | } |
| 425 | if (status & SMBHSTSTS_BUS_ERR) { |
| 426 | result = -EAGAIN; |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 427 | dev_dbg(&priv->pci_dev->dev, "Lost arbitration\n"); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 428 | } |
| 429 | |
Jean Delvare | 6cad93c | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 430 | /* Clear status flags except BYTE_DONE, to be cleared by caller */ |
| 431 | outb_p(status, SMBHSTSTS(priv)); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 432 | |
| 433 | return result; |
| 434 | } |
| 435 | |
Jean Delvare | 6cad93c | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 436 | /* Wait for BUSY being cleared and either INTR or an error flag being set */ |
| 437 | static int i801_wait_intr(struct i801_priv *priv) |
| 438 | { |
| 439 | int timeout = 0; |
| 440 | int status; |
| 441 | |
| 442 | /* We will always wait for a fraction of a second! */ |
| 443 | do { |
| 444 | usleep_range(250, 500); |
| 445 | status = inb_p(SMBHSTSTS(priv)); |
| 446 | } while (((status & SMBHSTSTS_HOST_BUSY) || |
| 447 | !(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR))) && |
| 448 | (timeout++ < MAX_RETRIES)); |
| 449 | |
| 450 | if (timeout > MAX_RETRIES) { |
| 451 | dev_dbg(&priv->pci_dev->dev, "INTR Timeout!\n"); |
| 452 | return -ETIMEDOUT; |
| 453 | } |
| 454 | return status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR); |
| 455 | } |
| 456 | |
| 457 | /* Wait for either BYTE_DONE or an error flag being set */ |
| 458 | static int i801_wait_byte_done(struct i801_priv *priv) |
| 459 | { |
| 460 | int timeout = 0; |
| 461 | int status; |
| 462 | |
| 463 | /* We will always wait for a fraction of a second! */ |
| 464 | do { |
| 465 | usleep_range(250, 500); |
| 466 | status = inb_p(SMBHSTSTS(priv)); |
| 467 | } while (!(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_BYTE_DONE)) && |
| 468 | (timeout++ < MAX_RETRIES)); |
| 469 | |
| 470 | if (timeout > MAX_RETRIES) { |
| 471 | dev_dbg(&priv->pci_dev->dev, "BYTE_DONE Timeout!\n"); |
| 472 | return -ETIMEDOUT; |
| 473 | } |
| 474 | return status & STATUS_ERROR_FLAGS; |
| 475 | } |
| 476 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 477 | static int i801_transaction(struct i801_priv *priv, int xact) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 478 | { |
Jean Delvare | 2b73809 | 2008-07-14 22:38:32 +0200 | [diff] [blame] | 479 | int status; |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 480 | int result; |
Jean Delvare | b3b8df9 | 2014-11-12 10:20:40 +0100 | [diff] [blame] | 481 | const struct i2c_adapter *adap = &priv->adapter; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 482 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 483 | result = i801_check_pre(priv); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 484 | if (result < 0) |
| 485 | return result; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 486 | |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 487 | if (priv->features & FEATURE_IRQ) { |
| 488 | outb_p(xact | SMBHSTCNT_INTREN | SMBHSTCNT_START, |
| 489 | SMBHSTCNT(priv)); |
Jean Delvare | b3b8df9 | 2014-11-12 10:20:40 +0100 | [diff] [blame] | 490 | result = wait_event_timeout(priv->waitq, |
| 491 | (status = priv->status), |
| 492 | adap->timeout); |
| 493 | if (!result) { |
| 494 | status = -ETIMEDOUT; |
| 495 | dev_warn(&priv->pci_dev->dev, |
| 496 | "Timeout waiting for interrupt!\n"); |
| 497 | } |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 498 | priv->status = 0; |
| 499 | return i801_check_post(priv, status); |
| 500 | } |
| 501 | |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 502 | /* the current contents of SMBHSTCNT can be overwritten, since PEC, |
Daniel Kurtz | 37af871 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 503 | * SMBSCMD are passed in xact */ |
Daniel Kurtz | edbeea6 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 504 | outb_p(xact | SMBHSTCNT_START, SMBHSTCNT(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 505 | |
Jean Delvare | 6cad93c | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 506 | status = i801_wait_intr(priv); |
| 507 | return i801_check_post(priv, status); |
Oleg Ryjkov | ca8b9e3 | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 508 | } |
| 509 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 510 | static int i801_block_transaction_by_block(struct i801_priv *priv, |
| 511 | union i2c_smbus_data *data, |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 512 | char read_write, int hwpec) |
| 513 | { |
| 514 | int i, len; |
David Brownell | 9714034 | 2008-07-14 22:38:25 +0200 | [diff] [blame] | 515 | int status; |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 516 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 517 | inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */ |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 518 | |
| 519 | /* Use 32-byte buffer to process this transaction */ |
| 520 | if (read_write == I2C_SMBUS_WRITE) { |
| 521 | len = data->block[0]; |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 522 | outb_p(len, SMBHSTDAT0(priv)); |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 523 | for (i = 0; i < len; i++) |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 524 | outb_p(data->block[i+1], SMBBLKDAT(priv)); |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 525 | } |
| 526 | |
Daniel Kurtz | 37af871 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 527 | status = i801_transaction(priv, I801_BLOCK_DATA | |
Daniel Kurtz | edbeea6 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 528 | (hwpec ? SMBHSTCNT_PEC_EN : 0)); |
David Brownell | 9714034 | 2008-07-14 22:38:25 +0200 | [diff] [blame] | 529 | if (status) |
| 530 | return status; |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 531 | |
| 532 | if (read_write == I2C_SMBUS_READ) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 533 | len = inb_p(SMBHSTDAT0(priv)); |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 534 | if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) |
David Brownell | 9714034 | 2008-07-14 22:38:25 +0200 | [diff] [blame] | 535 | return -EPROTO; |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 536 | |
| 537 | data->block[0] = len; |
| 538 | for (i = 0; i < len; i++) |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 539 | data->block[i + 1] = inb_p(SMBBLKDAT(priv)); |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 540 | } |
| 541 | return 0; |
| 542 | } |
| 543 | |
Daniel Kurtz | d3ff6ce | 2012-07-24 14:13:59 +0200 | [diff] [blame] | 544 | static void i801_isr_byte_done(struct i801_priv *priv) |
| 545 | { |
| 546 | if (priv->is_read) { |
| 547 | /* For SMBus block reads, length is received with first byte */ |
| 548 | if (((priv->cmd & 0x1c) == I801_BLOCK_DATA) && |
| 549 | (priv->count == 0)) { |
| 550 | priv->len = inb_p(SMBHSTDAT0(priv)); |
| 551 | if (priv->len < 1 || priv->len > I2C_SMBUS_BLOCK_MAX) { |
| 552 | dev_err(&priv->pci_dev->dev, |
| 553 | "Illegal SMBus block read size %d\n", |
| 554 | priv->len); |
| 555 | /* FIXME: Recover */ |
| 556 | priv->len = I2C_SMBUS_BLOCK_MAX; |
| 557 | } else { |
| 558 | dev_dbg(&priv->pci_dev->dev, |
| 559 | "SMBus block read size is %d\n", |
| 560 | priv->len); |
| 561 | } |
| 562 | priv->data[-1] = priv->len; |
| 563 | } |
| 564 | |
| 565 | /* Read next byte */ |
| 566 | if (priv->count < priv->len) |
| 567 | priv->data[priv->count++] = inb(SMBBLKDAT(priv)); |
| 568 | else |
| 569 | dev_dbg(&priv->pci_dev->dev, |
| 570 | "Discarding extra byte on block read\n"); |
| 571 | |
| 572 | /* Set LAST_BYTE for last byte of read transaction */ |
| 573 | if (priv->count == priv->len - 1) |
| 574 | outb_p(priv->cmd | SMBHSTCNT_LAST_BYTE, |
| 575 | SMBHSTCNT(priv)); |
| 576 | } else if (priv->count < priv->len - 1) { |
| 577 | /* Write next byte, except for IRQ after last byte */ |
| 578 | outb_p(priv->data[++priv->count], SMBBLKDAT(priv)); |
| 579 | } |
| 580 | |
| 581 | /* Clear BYTE_DONE to continue with next byte */ |
| 582 | outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv)); |
| 583 | } |
| 584 | |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 585 | static irqreturn_t i801_host_notify_isr(struct i801_priv *priv) |
| 586 | { |
| 587 | unsigned short addr; |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 588 | |
| 589 | addr = inb_p(SMBNTFDADD(priv)) >> 1; |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 590 | |
Benjamin Tissoires | c912a25 | 2016-10-13 14:10:39 +0200 | [diff] [blame] | 591 | /* |
| 592 | * With the tested platforms, reading SMBNTFDDAT (22 + (p)->smba) |
Benjamin Tissoires | 4d5538f | 2016-10-13 14:10:40 +0200 | [diff] [blame] | 593 | * always returns 0. Our current implementation doesn't provide |
| 594 | * data, so we just ignore it. |
Benjamin Tissoires | c912a25 | 2016-10-13 14:10:39 +0200 | [diff] [blame] | 595 | */ |
Benjamin Tissoires | 4d5538f | 2016-10-13 14:10:40 +0200 | [diff] [blame] | 596 | i2c_handle_smbus_host_notify(&priv->adapter, addr); |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 597 | |
| 598 | /* clear Host Notify bit and return */ |
| 599 | outb_p(SMBSLVSTS_HST_NTFY_STS, SMBSLVSTS(priv)); |
| 600 | return IRQ_HANDLED; |
| 601 | } |
| 602 | |
Daniel Kurtz | efa3cb1 | 2012-07-24 14:13:57 +0200 | [diff] [blame] | 603 | /* |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 604 | * There are three kinds of interrupts: |
Daniel Kurtz | d3ff6ce | 2012-07-24 14:13:59 +0200 | [diff] [blame] | 605 | * |
| 606 | * 1) i801 signals transaction completion with one of these interrupts: |
| 607 | * INTR - Success |
| 608 | * DEV_ERR - Invalid command, NAK or communication timeout |
| 609 | * BUS_ERR - SMI# transaction collision |
| 610 | * FAILED - transaction was canceled due to a KILL request |
| 611 | * When any of these occur, update ->status and wake up the waitq. |
| 612 | * ->status must be cleared before kicking off the next transaction. |
| 613 | * |
| 614 | * 2) For byte-by-byte (I2C read/write) transactions, one BYTE_DONE interrupt |
| 615 | * occurs for each byte of a byte-by-byte to prepare the next byte. |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 616 | * |
| 617 | * 3) Host Notify interrupts |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 618 | */ |
| 619 | static irqreturn_t i801_isr(int irq, void *dev_id) |
| 620 | { |
| 621 | struct i801_priv *priv = dev_id; |
| 622 | u16 pcists; |
| 623 | u8 status; |
| 624 | |
| 625 | /* Confirm this is our interrupt */ |
| 626 | pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists); |
| 627 | if (!(pcists & SMBPCISTS_INTS)) |
| 628 | return IRQ_NONE; |
| 629 | |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 630 | if (priv->features & FEATURE_HOST_NOTIFY) { |
| 631 | status = inb_p(SMBSLVSTS(priv)); |
| 632 | if (status & SMBSLVSTS_HST_NTFY_STS) |
| 633 | return i801_host_notify_isr(priv); |
| 634 | } |
| 635 | |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 636 | status = inb_p(SMBHSTSTS(priv)); |
Daniel Kurtz | d3ff6ce | 2012-07-24 14:13:59 +0200 | [diff] [blame] | 637 | if (status & SMBHSTSTS_BYTE_DONE) |
| 638 | i801_isr_byte_done(priv); |
| 639 | |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 640 | /* |
| 641 | * Clear irq sources and report transaction result. |
| 642 | * ->status must be cleared before the next transaction is started. |
| 643 | */ |
| 644 | status &= SMBHSTSTS_INTR | STATUS_ERROR_FLAGS; |
| 645 | if (status) { |
| 646 | outb_p(status, SMBHSTSTS(priv)); |
Jean Delvare | a90bc5d | 2016-05-25 09:37:02 +0200 | [diff] [blame] | 647 | priv->status = status; |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 648 | wake_up(&priv->waitq); |
| 649 | } |
| 650 | |
| 651 | return IRQ_HANDLED; |
| 652 | } |
| 653 | |
| 654 | /* |
Daniel Kurtz | efa3cb1 | 2012-07-24 14:13:57 +0200 | [diff] [blame] | 655 | * For "byte-by-byte" block transactions: |
| 656 | * I2C write uses cmd=I801_BLOCK_DATA, I2C_EN=1 |
| 657 | * I2C read uses cmd=I801_I2C_BLOCK_DATA |
| 658 | */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 659 | static int i801_block_transaction_byte_by_byte(struct i801_priv *priv, |
| 660 | union i2c_smbus_data *data, |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 661 | char read_write, int command, |
| 662 | int hwpec) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 663 | { |
| 664 | int i, len; |
| 665 | int smbcmd; |
Jean Delvare | 2b73809 | 2008-07-14 22:38:32 +0200 | [diff] [blame] | 666 | int status; |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 667 | int result; |
Jean Delvare | b3b8df9 | 2014-11-12 10:20:40 +0100 | [diff] [blame] | 668 | const struct i2c_adapter *adap = &priv->adapter; |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 669 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 670 | result = i801_check_pre(priv); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 671 | if (result < 0) |
| 672 | return result; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 673 | |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 674 | len = data->block[0]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 675 | |
| 676 | if (read_write == I2C_SMBUS_WRITE) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 677 | outb_p(len, SMBHSTDAT0(priv)); |
| 678 | outb_p(data->block[1], SMBBLKDAT(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 679 | } |
| 680 | |
Daniel Kurtz | efa3cb1 | 2012-07-24 14:13:57 +0200 | [diff] [blame] | 681 | if (command == I2C_SMBUS_I2C_BLOCK_DATA && |
| 682 | read_write == I2C_SMBUS_READ) |
| 683 | smbcmd = I801_I2C_BLOCK_DATA; |
| 684 | else |
| 685 | smbcmd = I801_BLOCK_DATA; |
| 686 | |
Daniel Kurtz | d3ff6ce | 2012-07-24 14:13:59 +0200 | [diff] [blame] | 687 | if (priv->features & FEATURE_IRQ) { |
| 688 | priv->is_read = (read_write == I2C_SMBUS_READ); |
| 689 | if (len == 1 && priv->is_read) |
| 690 | smbcmd |= SMBHSTCNT_LAST_BYTE; |
| 691 | priv->cmd = smbcmd | SMBHSTCNT_INTREN; |
| 692 | priv->len = len; |
| 693 | priv->count = 0; |
| 694 | priv->data = &data->block[1]; |
| 695 | |
| 696 | outb_p(priv->cmd | SMBHSTCNT_START, SMBHSTCNT(priv)); |
Jean Delvare | b3b8df9 | 2014-11-12 10:20:40 +0100 | [diff] [blame] | 697 | result = wait_event_timeout(priv->waitq, |
| 698 | (status = priv->status), |
| 699 | adap->timeout); |
| 700 | if (!result) { |
| 701 | status = -ETIMEDOUT; |
| 702 | dev_warn(&priv->pci_dev->dev, |
| 703 | "Timeout waiting for interrupt!\n"); |
| 704 | } |
Daniel Kurtz | d3ff6ce | 2012-07-24 14:13:59 +0200 | [diff] [blame] | 705 | priv->status = 0; |
| 706 | return i801_check_post(priv, status); |
| 707 | } |
| 708 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 709 | for (i = 1; i <= len; i++) { |
Daniel Kurtz | efa3cb1 | 2012-07-24 14:13:57 +0200 | [diff] [blame] | 710 | if (i == len && read_write == I2C_SMBUS_READ) |
Daniel Kurtz | edbeea6 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 711 | smbcmd |= SMBHSTCNT_LAST_BYTE; |
Daniel Kurtz | 37af871 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 712 | outb_p(smbcmd, SMBHSTCNT(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 713 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 714 | if (i == 1) |
Daniel Kurtz | edbeea6 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 715 | outb_p(inb(SMBHSTCNT(priv)) | SMBHSTCNT_START, |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 716 | SMBHSTCNT(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 717 | |
Jean Delvare | 6cad93c | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 718 | status = i801_wait_byte_done(priv); |
| 719 | if (status) |
| 720 | goto exit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 721 | |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 722 | if (i == 1 && read_write == I2C_SMBUS_READ |
| 723 | && command != I2C_SMBUS_I2C_BLOCK_DATA) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 724 | len = inb_p(SMBHSTDAT0(priv)); |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 725 | if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 726 | dev_err(&priv->pci_dev->dev, |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 727 | "Illegal SMBus block read size %d\n", |
| 728 | len); |
| 729 | /* Recover */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 730 | while (inb_p(SMBHSTSTS(priv)) & |
| 731 | SMBHSTSTS_HOST_BUSY) |
| 732 | outb_p(SMBHSTSTS_BYTE_DONE, |
| 733 | SMBHSTSTS(priv)); |
| 734 | outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv)); |
David Brownell | 9714034 | 2008-07-14 22:38:25 +0200 | [diff] [blame] | 735 | return -EPROTO; |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 736 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 737 | data->block[0] = len; |
| 738 | } |
| 739 | |
| 740 | /* Retrieve/store value in SMBBLKDAT */ |
| 741 | if (read_write == I2C_SMBUS_READ) |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 742 | data->block[i] = inb_p(SMBBLKDAT(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 743 | if (read_write == I2C_SMBUS_WRITE && i+1 <= len) |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 744 | outb_p(data->block[i+1], SMBBLKDAT(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 745 | |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 746 | /* signals SMBBLKDAT ready */ |
Jean Delvare | 6cad93c | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 747 | outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv)); |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 748 | } |
Jean Delvare | cf898dc | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 749 | |
Jean Delvare | 6cad93c | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 750 | status = i801_wait_intr(priv); |
| 751 | exit: |
| 752 | return i801_check_post(priv, status); |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 753 | } |
| 754 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 755 | static int i801_set_block_buffer_mode(struct i801_priv *priv) |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 756 | { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 757 | outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv)); |
| 758 | if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0) |
David Brownell | 9714034 | 2008-07-14 22:38:25 +0200 | [diff] [blame] | 759 | return -EIO; |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 760 | return 0; |
| 761 | } |
| 762 | |
| 763 | /* Block transaction function */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 764 | static int i801_block_transaction(struct i801_priv *priv, |
| 765 | union i2c_smbus_data *data, char read_write, |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 766 | int command, int hwpec) |
| 767 | { |
| 768 | int result = 0; |
| 769 | unsigned char hostc; |
| 770 | |
| 771 | if (command == I2C_SMBUS_I2C_BLOCK_DATA) { |
| 772 | if (read_write == I2C_SMBUS_WRITE) { |
| 773 | /* set I2C_EN bit in configuration register */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 774 | pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc); |
| 775 | pci_write_config_byte(priv->pci_dev, SMBHSTCFG, |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 776 | hostc | SMBHSTCFG_I2C_EN); |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 777 | } else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) { |
| 778 | dev_err(&priv->pci_dev->dev, |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 779 | "I2C block read is unsupported!\n"); |
David Brownell | 9714034 | 2008-07-14 22:38:25 +0200 | [diff] [blame] | 780 | return -EOPNOTSUPP; |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 781 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 782 | } |
| 783 | |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 784 | if (read_write == I2C_SMBUS_WRITE |
| 785 | || command == I2C_SMBUS_I2C_BLOCK_DATA) { |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 786 | if (data->block[0] < 1) |
| 787 | data->block[0] = 1; |
| 788 | if (data->block[0] > I2C_SMBUS_BLOCK_MAX) |
| 789 | data->block[0] = I2C_SMBUS_BLOCK_MAX; |
| 790 | } else { |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 791 | data->block[0] = 32; /* max for SMBus block reads */ |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 792 | } |
| 793 | |
Jean Delvare | c074c39 | 2010-03-13 20:56:53 +0100 | [diff] [blame] | 794 | /* Experience has shown that the block buffer can only be used for |
| 795 | SMBus (not I2C) block transactions, even though the datasheet |
| 796 | doesn't mention this limitation. */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 797 | if ((priv->features & FEATURE_BLOCK_BUFFER) |
Jean Delvare | c074c39 | 2010-03-13 20:56:53 +0100 | [diff] [blame] | 798 | && command != I2C_SMBUS_I2C_BLOCK_DATA |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 799 | && i801_set_block_buffer_mode(priv) == 0) |
| 800 | result = i801_block_transaction_by_block(priv, data, |
| 801 | read_write, hwpec); |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 802 | else |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 803 | result = i801_block_transaction_byte_by_byte(priv, data, |
| 804 | read_write, |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 805 | command, hwpec); |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 806 | |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 807 | if (command == I2C_SMBUS_I2C_BLOCK_DATA |
| 808 | && read_write == I2C_SMBUS_WRITE) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 809 | /* restore saved configuration register value */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 810 | pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 811 | } |
| 812 | return result; |
| 813 | } |
| 814 | |
David Brownell | 9714034 | 2008-07-14 22:38:25 +0200 | [diff] [blame] | 815 | /* Return negative errno on error. */ |
Ivo Manca | 3fb21c6 | 2010-05-21 18:40:55 +0200 | [diff] [blame] | 816 | static s32 i801_access(struct i2c_adapter *adap, u16 addr, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 817 | unsigned short flags, char read_write, u8 command, |
Ivo Manca | 3fb21c6 | 2010-05-21 18:40:55 +0200 | [diff] [blame] | 818 | int size, union i2c_smbus_data *data) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 819 | { |
Jean Delvare | e8aac4a | 2005-10-26 21:34:42 +0200 | [diff] [blame] | 820 | int hwpec; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 821 | int block = 0; |
Jarkko Nikula | a7401ca | 2016-03-10 14:12:22 +0200 | [diff] [blame] | 822 | int ret = 0, xact = 0; |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 823 | struct i801_priv *priv = i2c_get_adapdata(adap); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 824 | |
Mika Westerberg | a7ae819 | 2016-06-09 16:56:28 +0300 | [diff] [blame] | 825 | mutex_lock(&priv->acpi_lock); |
| 826 | if (priv->acpi_reserved) { |
| 827 | mutex_unlock(&priv->acpi_lock); |
| 828 | return -EBUSY; |
| 829 | } |
| 830 | |
Jarkko Nikula | a7401ca | 2016-03-10 14:12:22 +0200 | [diff] [blame] | 831 | pm_runtime_get_sync(&priv->pci_dev->dev); |
| 832 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 833 | hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC) |
Jean Delvare | e8aac4a | 2005-10-26 21:34:42 +0200 | [diff] [blame] | 834 | && size != I2C_SMBUS_QUICK |
| 835 | && size != I2C_SMBUS_I2C_BLOCK_DATA; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 836 | |
| 837 | switch (size) { |
| 838 | case I2C_SMBUS_QUICK: |
| 839 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 840 | SMBHSTADD(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 841 | xact = I801_QUICK; |
| 842 | break; |
| 843 | case I2C_SMBUS_BYTE: |
| 844 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 845 | SMBHSTADD(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 846 | if (read_write == I2C_SMBUS_WRITE) |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 847 | outb_p(command, SMBHSTCMD(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 848 | xact = I801_BYTE; |
| 849 | break; |
| 850 | case I2C_SMBUS_BYTE_DATA: |
| 851 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 852 | SMBHSTADD(priv)); |
| 853 | outb_p(command, SMBHSTCMD(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 854 | if (read_write == I2C_SMBUS_WRITE) |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 855 | outb_p(data->byte, SMBHSTDAT0(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 856 | xact = I801_BYTE_DATA; |
| 857 | break; |
| 858 | case I2C_SMBUS_WORD_DATA: |
| 859 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 860 | SMBHSTADD(priv)); |
| 861 | outb_p(command, SMBHSTCMD(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 862 | if (read_write == I2C_SMBUS_WRITE) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 863 | outb_p(data->word & 0xff, SMBHSTDAT0(priv)); |
| 864 | outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 865 | } |
| 866 | xact = I801_WORD_DATA; |
| 867 | break; |
| 868 | case I2C_SMBUS_BLOCK_DATA: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 869 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 870 | SMBHSTADD(priv)); |
| 871 | outb_p(command, SMBHSTCMD(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 872 | block = 1; |
| 873 | break; |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 874 | case I2C_SMBUS_I2C_BLOCK_DATA: |
Jean Delvare | ba9ad2a | 2016-10-11 13:13:27 +0200 | [diff] [blame] | 875 | /* |
| 876 | * NB: page 240 of ICH5 datasheet shows that the R/#W |
| 877 | * bit should be cleared here, even when reading. |
| 878 | * However if SPD Write Disable is set (Lynx Point and later), |
| 879 | * the read will fail if we don't set the R/#W bit. |
| 880 | */ |
| 881 | outb_p(((addr & 0x7f) << 1) | |
| 882 | ((priv->original_hstcfg & SMBHSTCFG_SPD_WD) ? |
| 883 | (read_write & 0x01) : 0), |
| 884 | SMBHSTADD(priv)); |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 885 | if (read_write == I2C_SMBUS_READ) { |
| 886 | /* NB: page 240 of ICH5 datasheet also shows |
| 887 | * that DATA1 is the cmd field when reading */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 888 | outb_p(command, SMBHSTDAT1(priv)); |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 889 | } else |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 890 | outb_p(command, SMBHSTCMD(priv)); |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 891 | block = 1; |
| 892 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 893 | default: |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 894 | dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n", |
| 895 | size); |
Jarkko Nikula | a7401ca | 2016-03-10 14:12:22 +0200 | [diff] [blame] | 896 | ret = -EOPNOTSUPP; |
| 897 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 898 | } |
| 899 | |
Oleg Ryjkov | ca8b9e3 | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 900 | if (hwpec) /* enable/disable hardware PEC */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 901 | outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv)); |
Oleg Ryjkov | ca8b9e3 | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 902 | else |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 903 | outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC), |
| 904 | SMBAUXCTL(priv)); |
Jean Delvare | e8aac4a | 2005-10-26 21:34:42 +0200 | [diff] [blame] | 905 | |
Ivo Manca | 3fb21c6 | 2010-05-21 18:40:55 +0200 | [diff] [blame] | 906 | if (block) |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 907 | ret = i801_block_transaction(priv, data, read_write, size, |
| 908 | hwpec); |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 909 | else |
Daniel Kurtz | 37af871 | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 910 | ret = i801_transaction(priv, xact); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 911 | |
Jean Delvare | c79cfba | 2006-04-20 02:43:18 -0700 | [diff] [blame] | 912 | /* Some BIOSes don't like it when PEC is enabled at reboot or resume |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 913 | time, so we forcibly disable it after every transaction. Turn off |
| 914 | E32B for the same reason. */ |
Jean Delvare | a0921b6 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 915 | if (hwpec || block) |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 916 | outb_p(inb_p(SMBAUXCTL(priv)) & |
| 917 | ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv)); |
Jean Delvare | c79cfba | 2006-04-20 02:43:18 -0700 | [diff] [blame] | 918 | |
Ivo Manca | 3fb21c6 | 2010-05-21 18:40:55 +0200 | [diff] [blame] | 919 | if (block) |
Jarkko Nikula | a7401ca | 2016-03-10 14:12:22 +0200 | [diff] [blame] | 920 | goto out; |
Ivo Manca | 3fb21c6 | 2010-05-21 18:40:55 +0200 | [diff] [blame] | 921 | if (ret) |
Jarkko Nikula | a7401ca | 2016-03-10 14:12:22 +0200 | [diff] [blame] | 922 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 923 | if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK)) |
Jarkko Nikula | a7401ca | 2016-03-10 14:12:22 +0200 | [diff] [blame] | 924 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 925 | |
| 926 | switch (xact & 0x7f) { |
| 927 | case I801_BYTE: /* Result put in SMBHSTDAT0 */ |
| 928 | case I801_BYTE_DATA: |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 929 | data->byte = inb_p(SMBHSTDAT0(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 930 | break; |
| 931 | case I801_WORD_DATA: |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 932 | data->word = inb_p(SMBHSTDAT0(priv)) + |
| 933 | (inb_p(SMBHSTDAT1(priv)) << 8); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 934 | break; |
| 935 | } |
Jarkko Nikula | a7401ca | 2016-03-10 14:12:22 +0200 | [diff] [blame] | 936 | |
| 937 | out: |
| 938 | pm_runtime_mark_last_busy(&priv->pci_dev->dev); |
| 939 | pm_runtime_put_autosuspend(&priv->pci_dev->dev); |
Mika Westerberg | a7ae819 | 2016-06-09 16:56:28 +0300 | [diff] [blame] | 940 | mutex_unlock(&priv->acpi_lock); |
Jarkko Nikula | a7401ca | 2016-03-10 14:12:22 +0200 | [diff] [blame] | 941 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 942 | } |
| 943 | |
| 944 | |
| 945 | static u32 i801_func(struct i2c_adapter *adapter) |
| 946 | { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 947 | struct i801_priv *priv = i2c_get_adapdata(adapter); |
| 948 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 949 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | |
Jean Delvare | 369f6f4 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 950 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | |
| 951 | I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 952 | ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) | |
| 953 | ((priv->features & FEATURE_I2C_BLOCK_READ) ? |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 954 | I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0) | |
| 955 | ((priv->features & FEATURE_HOST_NOTIFY) ? |
| 956 | I2C_FUNC_SMBUS_HOST_NOTIFY : 0); |
| 957 | } |
| 958 | |
Benjamin Tissoires | 4d5538f | 2016-10-13 14:10:40 +0200 | [diff] [blame] | 959 | static void i801_enable_host_notify(struct i2c_adapter *adapter) |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 960 | { |
| 961 | struct i801_priv *priv = i2c_get_adapdata(adapter); |
| 962 | |
| 963 | if (!(priv->features & FEATURE_HOST_NOTIFY)) |
Benjamin Tissoires | 4d5538f | 2016-10-13 14:10:40 +0200 | [diff] [blame] | 964 | return; |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 965 | |
Benjamin Tissoires | 22e94bd | 2016-10-13 14:10:35 +0200 | [diff] [blame] | 966 | if (!(SMBSLVCMD_HST_NTFY_INTREN & priv->original_slvcmd)) |
| 967 | outb_p(SMBSLVCMD_HST_NTFY_INTREN | priv->original_slvcmd, |
| 968 | SMBSLVCMD(priv)); |
| 969 | |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 970 | /* clear Host Notify bit to allow a new notification */ |
| 971 | outb_p(SMBSLVSTS_HST_NTFY_STS, SMBSLVSTS(priv)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 972 | } |
| 973 | |
Benjamin Tissoires | 22e94bd | 2016-10-13 14:10:35 +0200 | [diff] [blame] | 974 | static void i801_disable_host_notify(struct i801_priv *priv) |
| 975 | { |
| 976 | if (!(priv->features & FEATURE_HOST_NOTIFY)) |
| 977 | return; |
| 978 | |
| 979 | outb_p(priv->original_slvcmd, SMBSLVCMD(priv)); |
| 980 | } |
| 981 | |
Jean Delvare | 8f9082c | 2006-09-03 22:39:46 +0200 | [diff] [blame] | 982 | static const struct i2c_algorithm smbus_algorithm = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 983 | .smbus_xfer = i801_access, |
| 984 | .functionality = i801_func, |
| 985 | }; |
| 986 | |
Jingoo Han | 392debf | 2013-12-03 08:11:20 +0900 | [diff] [blame] | 987 | static const struct pci_device_id i801_ids[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 988 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) }, |
| 989 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) }, |
| 990 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_2) }, |
| 991 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_3) }, |
| 992 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_3) }, |
| 993 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_3) }, |
| 994 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_4) }, |
| 995 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_16) }, |
| 996 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_17) }, |
Jason Gaston | b0a70b5 | 2005-04-16 15:24:45 -0700 | [diff] [blame] | 997 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) }, |
Jason Gaston | 8254fc4 | 2006-01-09 10:58:08 -0800 | [diff] [blame] | 998 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) }, |
Jason Gaston | adbc2a1 | 2006-11-22 15:19:12 -0800 | [diff] [blame] | 999 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) }, |
Seth Heasley | cb04e95 | 2010-10-04 13:27:14 -0700 | [diff] [blame] | 1000 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EP80579_1) }, |
Gaston, Jason D | d28dc71 | 2008-02-24 20:03:42 +0100 | [diff] [blame] | 1001 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) }, |
| 1002 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) }, |
Seth Heasley | cb04e95 | 2010-10-04 13:27:14 -0700 | [diff] [blame] | 1003 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS) }, |
| 1004 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS) }, |
Seth Heasley | e30d985 | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1005 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS) }, |
David Woodhouse | 55fee8d | 2010-10-31 21:07:00 +0100 | [diff] [blame] | 1006 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0) }, |
| 1007 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1) }, |
| 1008 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2) }, |
Seth Heasley | 662cda8 | 2011-03-20 14:50:53 +0100 | [diff] [blame] | 1009 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS) }, |
Seth Heasley | 6e2a851 | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1010 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS) }, |
Seth Heasley | 062737f | 2012-03-26 21:47:19 +0200 | [diff] [blame] | 1011 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS) }, |
James Ralston | 4a8f1dd | 2012-09-10 10:14:02 +0200 | [diff] [blame] | 1012 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS) }, |
Seth Heasley | c2db409c | 2013-01-30 15:25:32 +0000 | [diff] [blame] | 1013 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMBUS) }, |
James Ralston | a3fc0ff | 2013-02-14 09:15:33 +0000 | [diff] [blame] | 1014 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS) }, |
| 1015 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0) }, |
| 1016 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1) }, |
| 1017 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2) }, |
Seth Heasley | f39901c | 2013-06-19 16:59:57 -0700 | [diff] [blame] | 1018 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS) }, |
Mika Westerberg | 9827f9e | 2017-02-01 19:20:59 +0300 | [diff] [blame] | 1019 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS) }, |
Jean Delvare | b299de8 | 2014-07-17 15:04:41 +0200 | [diff] [blame] | 1020 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS) }, |
James Ralston | afc6592 | 2013-11-04 09:29:48 -0800 | [diff] [blame] | 1021 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS) }, |
Chew, Kean ho | 1b31e9b | 2014-03-01 00:03:56 +0800 | [diff] [blame] | 1022 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS) }, |
Alan Cox | 39e8e30 | 2014-08-19 17:37:28 +0300 | [diff] [blame] | 1023 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS) }, |
james.d.ralston@intel.com | 3e27a84 | 2014-10-13 15:20:24 -0700 | [diff] [blame] | 1024 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS) }, |
Devin Ryles | 3eee1799 | 2014-11-05 16:30:03 -0500 | [diff] [blame] | 1025 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS) }, |
Jarkko Nikula | cb09d94 | 2017-09-21 16:23:16 +0300 | [diff] [blame] | 1026 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CDF_SMBUS) }, |
Mika Westerberg | 84d7f2e | 2015-10-13 15:41:39 +0300 | [diff] [blame] | 1027 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMBUS) }, |
Jarkko Nikula | dd77f42 | 2015-10-22 17:16:58 +0300 | [diff] [blame] | 1028 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BROXTON_SMBUS) }, |
Alexandra Yates | cdc5a31 | 2015-11-05 11:40:25 -0800 | [diff] [blame] | 1029 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS) }, |
| 1030 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS) }, |
Andy Shevchenko | 3115876 | 2016-09-23 11:56:01 +0300 | [diff] [blame] | 1031 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS) }, |
Srinivas Pandruvada | 09a1de0 | 2017-05-18 11:23:06 +0300 | [diff] [blame] | 1032 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS) }, |
| 1033 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS) }, |
Mika Westerberg | 0bff2a8 | 2018-06-28 16:08:24 +0300 | [diff] [blame] | 1034 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS) }, |
Jarkko Nikula | 5cd1c56 | 2019-03-15 12:56:49 +0200 | [diff] [blame] | 1035 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS) }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1036 | { 0, } |
| 1037 | }; |
| 1038 | |
Ivo Manca | 3fb21c6 | 2010-05-21 18:40:55 +0200 | [diff] [blame] | 1039 | MODULE_DEVICE_TABLE(pci, i801_ids); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1040 | |
Jean Delvare | 8eacfce | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1041 | #if defined CONFIG_X86 && defined CONFIG_DMI |
Jean Delvare | 1561bfe | 2009-01-07 14:29:17 +0100 | [diff] [blame] | 1042 | static unsigned char apanel_addr; |
| 1043 | |
| 1044 | /* Scan the system ROM for the signature "FJKEYINF" */ |
| 1045 | static __init const void __iomem *bios_signature(const void __iomem *bios) |
| 1046 | { |
| 1047 | ssize_t offset; |
| 1048 | const unsigned char signature[] = "FJKEYINF"; |
| 1049 | |
| 1050 | for (offset = 0; offset < 0x10000; offset += 0x10) { |
| 1051 | if (check_signature(bios + offset, signature, |
| 1052 | sizeof(signature)-1)) |
| 1053 | return bios + offset; |
| 1054 | } |
| 1055 | return NULL; |
| 1056 | } |
| 1057 | |
| 1058 | static void __init input_apanel_init(void) |
| 1059 | { |
| 1060 | void __iomem *bios; |
| 1061 | const void __iomem *p; |
| 1062 | |
| 1063 | bios = ioremap(0xF0000, 0x10000); /* Can't fail */ |
| 1064 | p = bios_signature(bios); |
| 1065 | if (p) { |
| 1066 | /* just use the first address */ |
| 1067 | apanel_addr = readb(p + 8 + 3) >> 1; |
| 1068 | } |
| 1069 | iounmap(bios); |
| 1070 | } |
Jean Delvare | 1561bfe | 2009-01-07 14:29:17 +0100 | [diff] [blame] | 1071 | |
Hans de Goede | fa5bfab | 2009-03-30 21:46:44 +0200 | [diff] [blame] | 1072 | struct dmi_onboard_device_info { |
| 1073 | const char *name; |
| 1074 | u8 type; |
| 1075 | unsigned short i2c_addr; |
| 1076 | const char *i2c_type; |
| 1077 | }; |
| 1078 | |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 1079 | static const struct dmi_onboard_device_info dmi_devices[] = { |
Hans de Goede | fa5bfab | 2009-03-30 21:46:44 +0200 | [diff] [blame] | 1080 | { "Syleus", DMI_DEV_TYPE_OTHER, 0x73, "fscsyl" }, |
| 1081 | { "Hermes", DMI_DEV_TYPE_OTHER, 0x73, "fscher" }, |
| 1082 | { "Hades", DMI_DEV_TYPE_OTHER, 0x73, "fschds" }, |
| 1083 | }; |
| 1084 | |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 1085 | static void dmi_check_onboard_device(u8 type, const char *name, |
| 1086 | struct i2c_adapter *adap) |
Hans de Goede | fa5bfab | 2009-03-30 21:46:44 +0200 | [diff] [blame] | 1087 | { |
| 1088 | int i; |
| 1089 | struct i2c_board_info info; |
| 1090 | |
| 1091 | for (i = 0; i < ARRAY_SIZE(dmi_devices); i++) { |
| 1092 | /* & ~0x80, ignore enabled/disabled bit */ |
| 1093 | if ((type & ~0x80) != dmi_devices[i].type) |
| 1094 | continue; |
Jean Delvare | faabd47 | 2010-07-09 16:22:51 +0200 | [diff] [blame] | 1095 | if (strcasecmp(name, dmi_devices[i].name)) |
Hans de Goede | fa5bfab | 2009-03-30 21:46:44 +0200 | [diff] [blame] | 1096 | continue; |
| 1097 | |
| 1098 | memset(&info, 0, sizeof(struct i2c_board_info)); |
| 1099 | info.addr = dmi_devices[i].i2c_addr; |
| 1100 | strlcpy(info.type, dmi_devices[i].i2c_type, I2C_NAME_SIZE); |
| 1101 | i2c_new_device(adap, &info); |
| 1102 | break; |
| 1103 | } |
| 1104 | } |
| 1105 | |
| 1106 | /* We use our own function to check for onboard devices instead of |
| 1107 | dmi_find_device() as some buggy BIOS's have the devices we are interested |
| 1108 | in marked as disabled */ |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 1109 | static void dmi_check_onboard_devices(const struct dmi_header *dm, void *adap) |
Hans de Goede | fa5bfab | 2009-03-30 21:46:44 +0200 | [diff] [blame] | 1110 | { |
| 1111 | int i, count; |
| 1112 | |
| 1113 | if (dm->type != 10) |
| 1114 | return; |
| 1115 | |
| 1116 | count = (dm->length - sizeof(struct dmi_header)) / 2; |
| 1117 | for (i = 0; i < count; i++) { |
| 1118 | const u8 *d = (char *)(dm + 1) + (i * 2); |
| 1119 | const char *name = ((char *) dm) + dm->length; |
| 1120 | u8 type = d[0]; |
| 1121 | u8 s = d[1]; |
| 1122 | |
| 1123 | if (!s) |
| 1124 | continue; |
| 1125 | s--; |
| 1126 | while (s > 0 && name[0]) { |
| 1127 | name += strlen(name) + 1; |
| 1128 | s--; |
| 1129 | } |
| 1130 | if (name[0] == 0) /* Bogus string reference */ |
| 1131 | continue; |
| 1132 | |
| 1133 | dmi_check_onboard_device(type, name, adap); |
| 1134 | } |
| 1135 | } |
Hans de Goede | fa5bfab | 2009-03-30 21:46:44 +0200 | [diff] [blame] | 1136 | |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1137 | /* Register optional slaves */ |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 1138 | static void i801_probe_optional_slaves(struct i801_priv *priv) |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1139 | { |
| 1140 | /* Only register slaves on main SMBus channel */ |
| 1141 | if (priv->features & FEATURE_IDF) |
| 1142 | return; |
| 1143 | |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1144 | if (apanel_addr) { |
| 1145 | struct i2c_board_info info; |
| 1146 | |
| 1147 | memset(&info, 0, sizeof(struct i2c_board_info)); |
| 1148 | info.addr = apanel_addr; |
| 1149 | strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE); |
| 1150 | i2c_new_device(&priv->adapter, &info); |
| 1151 | } |
Jean Delvare | 8eacfce | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1152 | |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1153 | if (dmi_name_in_vendors("FUJITSU")) |
| 1154 | dmi_walk(dmi_check_onboard_devices, &priv->adapter); |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1155 | } |
Jean Delvare | 8eacfce | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1156 | #else |
| 1157 | static void __init input_apanel_init(void) {} |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 1158 | static void i801_probe_optional_slaves(struct i801_priv *priv) {} |
Jean Delvare | 8eacfce | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1159 | #endif /* CONFIG_X86 && CONFIG_DMI */ |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1160 | |
Javier Martinez Canillas | 175c708 | 2016-07-21 12:11:01 -0400 | [diff] [blame] | 1161 | #if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1162 | static struct i801_mux_config i801_mux_config_asus_z8_d12 = { |
| 1163 | .gpio_chip = "gpio_ich", |
| 1164 | .values = { 0x02, 0x03 }, |
| 1165 | .n_values = 2, |
| 1166 | .classes = { I2C_CLASS_SPD, I2C_CLASS_SPD }, |
| 1167 | .gpios = { 52, 53 }, |
| 1168 | .n_gpios = 2, |
| 1169 | }; |
| 1170 | |
| 1171 | static struct i801_mux_config i801_mux_config_asus_z8_d18 = { |
| 1172 | .gpio_chip = "gpio_ich", |
| 1173 | .values = { 0x02, 0x03, 0x01 }, |
| 1174 | .n_values = 3, |
| 1175 | .classes = { I2C_CLASS_SPD, I2C_CLASS_SPD, I2C_CLASS_SPD }, |
| 1176 | .gpios = { 52, 53 }, |
| 1177 | .n_gpios = 2, |
| 1178 | }; |
| 1179 | |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 1180 | static const struct dmi_system_id mux_dmi_table[] = { |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1181 | { |
| 1182 | .matches = { |
| 1183 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 1184 | DMI_MATCH(DMI_BOARD_NAME, "Z8NA-D6(C)"), |
| 1185 | }, |
| 1186 | .driver_data = &i801_mux_config_asus_z8_d12, |
| 1187 | }, |
| 1188 | { |
| 1189 | .matches = { |
| 1190 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 1191 | DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)E-D12(X)"), |
| 1192 | }, |
| 1193 | .driver_data = &i801_mux_config_asus_z8_d12, |
| 1194 | }, |
| 1195 | { |
| 1196 | .matches = { |
| 1197 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 1198 | DMI_MATCH(DMI_BOARD_NAME, "Z8NH-D12"), |
| 1199 | }, |
| 1200 | .driver_data = &i801_mux_config_asus_z8_d12, |
| 1201 | }, |
| 1202 | { |
| 1203 | .matches = { |
| 1204 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 1205 | DMI_MATCH(DMI_BOARD_NAME, "Z8PH-D12/IFB"), |
| 1206 | }, |
| 1207 | .driver_data = &i801_mux_config_asus_z8_d12, |
| 1208 | }, |
| 1209 | { |
| 1210 | .matches = { |
| 1211 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 1212 | DMI_MATCH(DMI_BOARD_NAME, "Z8NR-D12"), |
| 1213 | }, |
| 1214 | .driver_data = &i801_mux_config_asus_z8_d12, |
| 1215 | }, |
| 1216 | { |
| 1217 | .matches = { |
| 1218 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 1219 | DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)H-D12"), |
| 1220 | }, |
| 1221 | .driver_data = &i801_mux_config_asus_z8_d12, |
| 1222 | }, |
| 1223 | { |
| 1224 | .matches = { |
| 1225 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 1226 | DMI_MATCH(DMI_BOARD_NAME, "Z8PG-D18"), |
| 1227 | }, |
| 1228 | .driver_data = &i801_mux_config_asus_z8_d18, |
| 1229 | }, |
| 1230 | { |
| 1231 | .matches = { |
| 1232 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 1233 | DMI_MATCH(DMI_BOARD_NAME, "Z8PE-D18"), |
| 1234 | }, |
| 1235 | .driver_data = &i801_mux_config_asus_z8_d18, |
| 1236 | }, |
| 1237 | { |
| 1238 | .matches = { |
| 1239 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 1240 | DMI_MATCH(DMI_BOARD_NAME, "Z8PS-D12"), |
| 1241 | }, |
| 1242 | .driver_data = &i801_mux_config_asus_z8_d12, |
| 1243 | }, |
| 1244 | { } |
| 1245 | }; |
| 1246 | |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1247 | /* Setup multiplexing if needed */ |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 1248 | static int i801_add_mux(struct i801_priv *priv) |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1249 | { |
| 1250 | struct device *dev = &priv->adapter.dev; |
| 1251 | const struct i801_mux_config *mux_config; |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1252 | struct i2c_mux_gpio_platform_data gpio_data; |
Jean Delvare | f82b862 | 2012-10-05 22:23:54 +0200 | [diff] [blame] | 1253 | int err; |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1254 | |
| 1255 | if (!priv->mux_drvdata) |
| 1256 | return 0; |
| 1257 | mux_config = priv->mux_drvdata; |
| 1258 | |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1259 | /* Prepare the platform data */ |
| 1260 | memset(&gpio_data, 0, sizeof(struct i2c_mux_gpio_platform_data)); |
| 1261 | gpio_data.parent = priv->adapter.nr; |
| 1262 | gpio_data.values = mux_config->values; |
| 1263 | gpio_data.n_values = mux_config->n_values; |
| 1264 | gpio_data.classes = mux_config->classes; |
Jean Delvare | f82b862 | 2012-10-05 22:23:54 +0200 | [diff] [blame] | 1265 | gpio_data.gpio_chip = mux_config->gpio_chip; |
| 1266 | gpio_data.gpios = mux_config->gpios; |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1267 | gpio_data.n_gpios = mux_config->n_gpios; |
| 1268 | gpio_data.idle = I2C_MUX_GPIO_NO_IDLE; |
| 1269 | |
| 1270 | /* Register the mux device */ |
| 1271 | priv->mux_pdev = platform_device_register_data(dev, "i2c-mux-gpio", |
Jean Delvare | f82b862 | 2012-10-05 22:23:54 +0200 | [diff] [blame] | 1272 | PLATFORM_DEVID_AUTO, &gpio_data, |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1273 | sizeof(struct i2c_mux_gpio_platform_data)); |
| 1274 | if (IS_ERR(priv->mux_pdev)) { |
| 1275 | err = PTR_ERR(priv->mux_pdev); |
| 1276 | priv->mux_pdev = NULL; |
| 1277 | dev_err(dev, "Failed to register i2c-mux-gpio device\n"); |
| 1278 | return err; |
| 1279 | } |
| 1280 | |
| 1281 | return 0; |
| 1282 | } |
| 1283 | |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 1284 | static void i801_del_mux(struct i801_priv *priv) |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1285 | { |
| 1286 | if (priv->mux_pdev) |
| 1287 | platform_device_unregister(priv->mux_pdev); |
| 1288 | } |
| 1289 | |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 1290 | static unsigned int i801_get_adapter_class(struct i801_priv *priv) |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1291 | { |
| 1292 | const struct dmi_system_id *id; |
| 1293 | const struct i801_mux_config *mux_config; |
| 1294 | unsigned int class = I2C_CLASS_HWMON | I2C_CLASS_SPD; |
| 1295 | int i; |
| 1296 | |
| 1297 | id = dmi_first_match(mux_dmi_table); |
| 1298 | if (id) { |
Jean Delvare | 28901f5 | 2012-10-28 21:37:01 +0100 | [diff] [blame] | 1299 | /* Remove branch classes from trunk */ |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1300 | mux_config = id->driver_data; |
| 1301 | for (i = 0; i < mux_config->n_values; i++) |
| 1302 | class &= ~mux_config->classes[i]; |
| 1303 | |
| 1304 | /* Remember for later */ |
| 1305 | priv->mux_drvdata = mux_config; |
| 1306 | } |
| 1307 | |
| 1308 | return class; |
| 1309 | } |
| 1310 | #else |
| 1311 | static inline int i801_add_mux(struct i801_priv *priv) { return 0; } |
| 1312 | static inline void i801_del_mux(struct i801_priv *priv) { } |
| 1313 | |
| 1314 | static inline unsigned int i801_get_adapter_class(struct i801_priv *priv) |
| 1315 | { |
| 1316 | return I2C_CLASS_HWMON | I2C_CLASS_SPD; |
| 1317 | } |
| 1318 | #endif |
| 1319 | |
Mika Westerberg | 9424693 | 2015-08-06 13:46:25 +0100 | [diff] [blame] | 1320 | static const struct itco_wdt_platform_data tco_platform_data = { |
| 1321 | .name = "Intel PCH", |
| 1322 | .version = 4, |
| 1323 | }; |
| 1324 | |
| 1325 | static DEFINE_SPINLOCK(p2sb_spinlock); |
| 1326 | |
| 1327 | static void i801_add_tco(struct i801_priv *priv) |
| 1328 | { |
| 1329 | struct pci_dev *pci_dev = priv->pci_dev; |
| 1330 | struct resource tco_res[3], *res; |
| 1331 | struct platform_device *pdev; |
| 1332 | unsigned int devfn; |
| 1333 | u32 tco_base, tco_ctl; |
| 1334 | u32 base_addr, ctrl_val; |
| 1335 | u64 base64_addr; |
Qiuxu Zhuo | bfd4473 | 2017-08-15 00:04:50 +0800 | [diff] [blame] | 1336 | u8 hidden; |
Mika Westerberg | 9424693 | 2015-08-06 13:46:25 +0100 | [diff] [blame] | 1337 | |
| 1338 | if (!(priv->features & FEATURE_TCO)) |
| 1339 | return; |
| 1340 | |
| 1341 | pci_read_config_dword(pci_dev, TCOBASE, &tco_base); |
| 1342 | pci_read_config_dword(pci_dev, TCOCTL, &tco_ctl); |
| 1343 | if (!(tco_ctl & TCOCTL_EN)) |
| 1344 | return; |
| 1345 | |
| 1346 | memset(tco_res, 0, sizeof(tco_res)); |
| 1347 | |
| 1348 | res = &tco_res[ICH_RES_IO_TCO]; |
| 1349 | res->start = tco_base & ~1; |
| 1350 | res->end = res->start + 32 - 1; |
| 1351 | res->flags = IORESOURCE_IO; |
| 1352 | |
| 1353 | /* |
| 1354 | * Power Management registers. |
| 1355 | */ |
| 1356 | devfn = PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 2); |
| 1357 | pci_bus_read_config_dword(pci_dev->bus, devfn, ACPIBASE, &base_addr); |
| 1358 | |
| 1359 | res = &tco_res[ICH_RES_IO_SMI]; |
| 1360 | res->start = (base_addr & ~1) + ACPIBASE_SMI_OFF; |
| 1361 | res->end = res->start + 3; |
| 1362 | res->flags = IORESOURCE_IO; |
| 1363 | |
| 1364 | /* |
| 1365 | * Enable the ACPI I/O space. |
| 1366 | */ |
| 1367 | pci_bus_read_config_dword(pci_dev->bus, devfn, ACPICTRL, &ctrl_val); |
| 1368 | ctrl_val |= ACPICTRL_EN; |
| 1369 | pci_bus_write_config_dword(pci_dev->bus, devfn, ACPICTRL, ctrl_val); |
| 1370 | |
| 1371 | /* |
| 1372 | * We must access the NO_REBOOT bit over the Primary to Sideband |
| 1373 | * bridge (P2SB). The BIOS prevents the P2SB device from being |
| 1374 | * enumerated by the PCI subsystem, so we need to unhide/hide it |
| 1375 | * to lookup the P2SB BAR. |
| 1376 | */ |
| 1377 | spin_lock(&p2sb_spinlock); |
| 1378 | |
| 1379 | devfn = PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 1); |
| 1380 | |
Qiuxu Zhuo | bfd4473 | 2017-08-15 00:04:50 +0800 | [diff] [blame] | 1381 | /* Unhide the P2SB device, if it is hidden */ |
| 1382 | pci_bus_read_config_byte(pci_dev->bus, devfn, 0xe1, &hidden); |
| 1383 | if (hidden) |
| 1384 | pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, 0x0); |
Mika Westerberg | 9424693 | 2015-08-06 13:46:25 +0100 | [diff] [blame] | 1385 | |
| 1386 | pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR, &base_addr); |
| 1387 | base64_addr = base_addr & 0xfffffff0; |
| 1388 | |
| 1389 | pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR + 0x4, &base_addr); |
| 1390 | base64_addr |= (u64)base_addr << 32; |
| 1391 | |
Qiuxu Zhuo | bfd4473 | 2017-08-15 00:04:50 +0800 | [diff] [blame] | 1392 | /* Hide the P2SB device, if it was hidden before */ |
| 1393 | if (hidden) |
| 1394 | pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, hidden); |
Mika Westerberg | 9424693 | 2015-08-06 13:46:25 +0100 | [diff] [blame] | 1395 | spin_unlock(&p2sb_spinlock); |
| 1396 | |
| 1397 | res = &tco_res[ICH_RES_MEM_OFF]; |
Felipe Balbi | 851a151 | 2018-09-03 11:24:57 +0300 | [diff] [blame] | 1398 | if (pci_dev->device == PCI_DEVICE_ID_INTEL_DNV_SMBUS) |
| 1399 | res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL_DNV; |
| 1400 | else |
| 1401 | res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL; |
| 1402 | |
Mika Westerberg | 9424693 | 2015-08-06 13:46:25 +0100 | [diff] [blame] | 1403 | res->end = res->start + 3; |
| 1404 | res->flags = IORESOURCE_MEM; |
| 1405 | |
| 1406 | pdev = platform_device_register_resndata(&pci_dev->dev, "iTCO_wdt", -1, |
| 1407 | tco_res, 3, &tco_platform_data, |
| 1408 | sizeof(tco_platform_data)); |
| 1409 | if (IS_ERR(pdev)) { |
| 1410 | dev_warn(&pci_dev->dev, "failed to create iTCO device\n"); |
| 1411 | return; |
| 1412 | } |
| 1413 | |
| 1414 | priv->tco_pdev = pdev; |
| 1415 | } |
| 1416 | |
Mika Westerberg | a7ae819 | 2016-06-09 16:56:28 +0300 | [diff] [blame] | 1417 | #ifdef CONFIG_ACPI |
Mika Westerberg | 7fd6d98 | 2018-08-30 11:50:13 +0300 | [diff] [blame] | 1418 | static bool i801_acpi_is_smbus_ioport(const struct i801_priv *priv, |
| 1419 | acpi_physical_address address) |
| 1420 | { |
| 1421 | return address >= priv->smba && |
| 1422 | address <= pci_resource_end(priv->pci_dev, SMBBAR); |
| 1423 | } |
| 1424 | |
Mika Westerberg | a7ae819 | 2016-06-09 16:56:28 +0300 | [diff] [blame] | 1425 | static acpi_status |
| 1426 | i801_acpi_io_handler(u32 function, acpi_physical_address address, u32 bits, |
| 1427 | u64 *value, void *handler_context, void *region_context) |
| 1428 | { |
| 1429 | struct i801_priv *priv = handler_context; |
| 1430 | struct pci_dev *pdev = priv->pci_dev; |
| 1431 | acpi_status status; |
| 1432 | |
| 1433 | /* |
| 1434 | * Once BIOS AML code touches the OpRegion we warn and inhibit any |
| 1435 | * further access from the driver itself. This device is now owned |
| 1436 | * by the system firmware. |
| 1437 | */ |
| 1438 | mutex_lock(&priv->acpi_lock); |
| 1439 | |
Mika Westerberg | 7fd6d98 | 2018-08-30 11:50:13 +0300 | [diff] [blame] | 1440 | if (!priv->acpi_reserved && i801_acpi_is_smbus_ioport(priv, address)) { |
Mika Westerberg | a7ae819 | 2016-06-09 16:56:28 +0300 | [diff] [blame] | 1441 | priv->acpi_reserved = true; |
| 1442 | |
| 1443 | dev_warn(&pdev->dev, "BIOS is accessing SMBus registers\n"); |
| 1444 | dev_warn(&pdev->dev, "Driver SMBus register access inhibited\n"); |
| 1445 | |
| 1446 | /* |
| 1447 | * BIOS is accessing the host controller so prevent it from |
| 1448 | * suspending automatically from now on. |
| 1449 | */ |
| 1450 | pm_runtime_get_sync(&pdev->dev); |
| 1451 | } |
| 1452 | |
| 1453 | if ((function & ACPI_IO_MASK) == ACPI_READ) |
| 1454 | status = acpi_os_read_port(address, (u32 *)value, bits); |
| 1455 | else |
| 1456 | status = acpi_os_write_port(address, (u32)*value, bits); |
| 1457 | |
| 1458 | mutex_unlock(&priv->acpi_lock); |
| 1459 | |
| 1460 | return status; |
| 1461 | } |
| 1462 | |
| 1463 | static int i801_acpi_probe(struct i801_priv *priv) |
| 1464 | { |
| 1465 | struct acpi_device *adev; |
| 1466 | acpi_status status; |
| 1467 | |
| 1468 | adev = ACPI_COMPANION(&priv->pci_dev->dev); |
| 1469 | if (adev) { |
| 1470 | status = acpi_install_address_space_handler(adev->handle, |
| 1471 | ACPI_ADR_SPACE_SYSTEM_IO, i801_acpi_io_handler, |
| 1472 | NULL, priv); |
| 1473 | if (ACPI_SUCCESS(status)) |
| 1474 | return 0; |
| 1475 | } |
| 1476 | |
| 1477 | return acpi_check_resource_conflict(&priv->pci_dev->resource[SMBBAR]); |
| 1478 | } |
| 1479 | |
| 1480 | static void i801_acpi_remove(struct i801_priv *priv) |
| 1481 | { |
| 1482 | struct acpi_device *adev; |
| 1483 | |
| 1484 | adev = ACPI_COMPANION(&priv->pci_dev->dev); |
| 1485 | if (!adev) |
| 1486 | return; |
| 1487 | |
| 1488 | acpi_remove_address_space_handler(adev->handle, |
| 1489 | ACPI_ADR_SPACE_SYSTEM_IO, i801_acpi_io_handler); |
| 1490 | |
| 1491 | mutex_lock(&priv->acpi_lock); |
| 1492 | if (priv->acpi_reserved) |
| 1493 | pm_runtime_put(&priv->pci_dev->dev); |
| 1494 | mutex_unlock(&priv->acpi_lock); |
| 1495 | } |
| 1496 | #else |
| 1497 | static inline int i801_acpi_probe(struct i801_priv *priv) { return 0; } |
| 1498 | static inline void i801_acpi_remove(struct i801_priv *priv) { } |
| 1499 | #endif |
| 1500 | |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 1501 | static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1502 | { |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1503 | unsigned char temp; |
Jean Delvare | adff687 | 2010-05-21 18:40:54 +0200 | [diff] [blame] | 1504 | int err, i; |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1505 | struct i801_priv *priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1506 | |
Jarkko Nikula | 1621c59 | 2015-02-13 15:52:23 +0200 | [diff] [blame] | 1507 | priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL); |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1508 | if (!priv) |
| 1509 | return -ENOMEM; |
| 1510 | |
| 1511 | i2c_set_adapdata(&priv->adapter, priv); |
| 1512 | priv->adapter.owner = THIS_MODULE; |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1513 | priv->adapter.class = i801_get_adapter_class(priv); |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1514 | priv->adapter.algo = &smbus_algorithm; |
Dustin Byford | 8eb5c87 | 2015-10-23 12:27:07 -0700 | [diff] [blame] | 1515 | priv->adapter.dev.parent = &dev->dev; |
| 1516 | ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&dev->dev)); |
| 1517 | priv->adapter.retries = 3; |
Mika Westerberg | a7ae819 | 2016-06-09 16:56:28 +0300 | [diff] [blame] | 1518 | mutex_init(&priv->acpi_lock); |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1519 | |
| 1520 | priv->pci_dev = dev; |
Jean Delvare | 250d1bd | 2006-12-10 21:21:33 +0100 | [diff] [blame] | 1521 | switch (dev->device) { |
Mika Westerberg | 9424693 | 2015-08-06 13:46:25 +0100 | [diff] [blame] | 1522 | case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS: |
| 1523 | case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS: |
Srinivas Pandruvada | 09a1de0 | 2017-05-18 11:23:06 +0300 | [diff] [blame] | 1524 | case PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS: |
| 1525 | case PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS: |
Alexandra Yates | 1a1503c | 2016-02-17 18:21:21 -0800 | [diff] [blame] | 1526 | case PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS: |
| 1527 | case PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS: |
Jarkko Nikula | cb09d94 | 2017-09-21 16:23:16 +0300 | [diff] [blame] | 1528 | case PCI_DEVICE_ID_INTEL_CDF_SMBUS: |
Mika Westerberg | 84d7f2e | 2015-10-13 15:41:39 +0300 | [diff] [blame] | 1529 | case PCI_DEVICE_ID_INTEL_DNV_SMBUS: |
Andy Shevchenko | 3115876 | 2016-09-23 11:56:01 +0300 | [diff] [blame] | 1530 | case PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS: |
Mika Westerberg | 0bff2a8 | 2018-06-28 16:08:24 +0300 | [diff] [blame] | 1531 | case PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS: |
Jarkko Nikula | 5cd1c56 | 2019-03-15 12:56:49 +0200 | [diff] [blame] | 1532 | case PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS: |
Mika Westerberg | 9424693 | 2015-08-06 13:46:25 +0100 | [diff] [blame] | 1533 | priv->features |= FEATURE_I2C_BLOCK_READ; |
| 1534 | priv->features |= FEATURE_IRQ; |
| 1535 | priv->features |= FEATURE_SMBUS_PEC; |
| 1536 | priv->features |= FEATURE_BLOCK_BUFFER; |
Mika Westerberg | 1f6dbb0 | 2016-09-20 15:30:53 +0300 | [diff] [blame] | 1537 | /* If we have ACPI based watchdog use that instead */ |
| 1538 | if (!acpi_has_watchdog()) |
| 1539 | priv->features |= FEATURE_TCO; |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 1540 | priv->features |= FEATURE_HOST_NOTIFY; |
Mika Westerberg | 9424693 | 2015-08-06 13:46:25 +0100 | [diff] [blame] | 1541 | break; |
| 1542 | |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1543 | case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0: |
| 1544 | case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1: |
| 1545 | case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2: |
James Ralston | a3fc0ff | 2013-02-14 09:15:33 +0000 | [diff] [blame] | 1546 | case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0: |
| 1547 | case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1: |
| 1548 | case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2: |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1549 | priv->features |= FEATURE_IDF; |
| 1550 | /* fall through */ |
Jean Delvare | e0e8398c | 2010-05-21 18:40:55 +0200 | [diff] [blame] | 1551 | default: |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1552 | priv->features |= FEATURE_I2C_BLOCK_READ; |
Jean Delvare | 6676a84 | 2012-12-16 21:11:55 +0100 | [diff] [blame] | 1553 | priv->features |= FEATURE_IRQ; |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 1554 | /* fall through */ |
| 1555 | case PCI_DEVICE_ID_INTEL_82801DB_3: |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1556 | priv->features |= FEATURE_SMBUS_PEC; |
| 1557 | priv->features |= FEATURE_BLOCK_BUFFER; |
Jean Delvare | e0e8398c | 2010-05-21 18:40:55 +0200 | [diff] [blame] | 1558 | /* fall through */ |
| 1559 | case PCI_DEVICE_ID_INTEL_82801CA_3: |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 1560 | priv->features |= FEATURE_HOST_NOTIFY; |
| 1561 | /* fall through */ |
Jean Delvare | e0e8398c | 2010-05-21 18:40:55 +0200 | [diff] [blame] | 1562 | case PCI_DEVICE_ID_INTEL_82801BA_2: |
| 1563 | case PCI_DEVICE_ID_INTEL_82801AB_3: |
| 1564 | case PCI_DEVICE_ID_INTEL_82801AA_3: |
Jean Delvare | 250d1bd | 2006-12-10 21:21:33 +0100 | [diff] [blame] | 1565 | break; |
Jean Delvare | 250d1bd | 2006-12-10 21:21:33 +0100 | [diff] [blame] | 1566 | } |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1567 | |
Jean Delvare | adff687 | 2010-05-21 18:40:54 +0200 | [diff] [blame] | 1568 | /* Disable features on user request */ |
| 1569 | for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1570 | if (priv->features & disable_features & (1 << i)) |
Jean Delvare | adff687 | 2010-05-21 18:40:54 +0200 | [diff] [blame] | 1571 | dev_notice(&dev->dev, "%s disabled by user\n", |
| 1572 | i801_feature_names[i]); |
| 1573 | } |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1574 | priv->features &= ~disable_features; |
Jean Delvare | adff687 | 2010-05-21 18:40:54 +0200 | [diff] [blame] | 1575 | |
Jarkko Nikula | fef220d | 2015-02-13 15:52:25 +0200 | [diff] [blame] | 1576 | err = pcim_enable_device(dev); |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1577 | if (err) { |
| 1578 | dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n", |
| 1579 | err); |
Jarkko Nikula | fef220d | 2015-02-13 15:52:25 +0200 | [diff] [blame] | 1580 | return err; |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1581 | } |
Jarkko Nikula | fef220d | 2015-02-13 15:52:25 +0200 | [diff] [blame] | 1582 | pcim_pin_device(dev); |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1583 | |
| 1584 | /* Determine the address of the SMBus area */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1585 | priv->smba = pci_resource_start(dev, SMBBAR); |
| 1586 | if (!priv->smba) { |
Jarkko Nikula | 9cbbf3d | 2015-02-13 15:52:21 +0200 | [diff] [blame] | 1587 | dev_err(&dev->dev, |
| 1588 | "SMBus base address uninitialized, upgrade BIOS\n"); |
Jarkko Nikula | fef220d | 2015-02-13 15:52:25 +0200 | [diff] [blame] | 1589 | return -ENODEV; |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1590 | } |
| 1591 | |
Mika Westerberg | a7ae819 | 2016-06-09 16:56:28 +0300 | [diff] [blame] | 1592 | if (i801_acpi_probe(priv)) |
Jarkko Nikula | fef220d | 2015-02-13 15:52:25 +0200 | [diff] [blame] | 1593 | return -ENODEV; |
Jean Delvare | 54fb4a05 | 2008-07-14 22:38:33 +0200 | [diff] [blame] | 1594 | |
Jarkko Nikula | fef220d | 2015-02-13 15:52:25 +0200 | [diff] [blame] | 1595 | err = pcim_iomap_regions(dev, 1 << SMBBAR, |
| 1596 | dev_driver_string(&dev->dev)); |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1597 | if (err) { |
Jarkko Nikula | 9cbbf3d | 2015-02-13 15:52:21 +0200 | [diff] [blame] | 1598 | dev_err(&dev->dev, |
| 1599 | "Failed to request SMBus region 0x%lx-0x%Lx\n", |
| 1600 | priv->smba, |
Andrew Morton | 598736c | 2006-06-30 01:56:20 -0700 | [diff] [blame] | 1601 | (unsigned long long)pci_resource_end(dev, SMBBAR)); |
Mika Westerberg | a7ae819 | 2016-06-09 16:56:28 +0300 | [diff] [blame] | 1602 | i801_acpi_remove(priv); |
Jarkko Nikula | fef220d | 2015-02-13 15:52:25 +0200 | [diff] [blame] | 1603 | return err; |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1604 | } |
| 1605 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1606 | pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &temp); |
| 1607 | priv->original_hstcfg = temp; |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1608 | temp &= ~SMBHSTCFG_I2C_EN; /* SMBus timing */ |
| 1609 | if (!(temp & SMBHSTCFG_HST_EN)) { |
| 1610 | dev_info(&dev->dev, "Enabling SMBus device\n"); |
| 1611 | temp |= SMBHSTCFG_HST_EN; |
| 1612 | } |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1613 | pci_write_config_byte(priv->pci_dev, SMBHSTCFG, temp); |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1614 | |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1615 | if (temp & SMBHSTCFG_SMB_SMI_EN) { |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1616 | dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n"); |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1617 | /* Disable SMBus interrupt feature if SMBus using SMI# */ |
| 1618 | priv->features &= ~FEATURE_IRQ; |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1619 | } |
Jean Delvare | ba9ad2a | 2016-10-11 13:13:27 +0200 | [diff] [blame] | 1620 | if (temp & SMBHSTCFG_SPD_WD) |
| 1621 | dev_info(&dev->dev, "SPD Write Disable is set\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1622 | |
Jean Delvare | a0921b6 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 1623 | /* Clear special mode bits */ |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1624 | if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER)) |
| 1625 | outb_p(inb_p(SMBAUXCTL(priv)) & |
| 1626 | ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv)); |
Jean Delvare | a0921b6 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 1627 | |
Jean Delvare | a086bb8 | 2018-04-11 18:03:31 +0200 | [diff] [blame] | 1628 | /* Remember original Host Notify setting */ |
| 1629 | if (priv->features & FEATURE_HOST_NOTIFY) |
| 1630 | priv->original_slvcmd = inb_p(SMBSLVCMD(priv)); |
| 1631 | |
Jean Delvare | b3b8df9 | 2014-11-12 10:20:40 +0100 | [diff] [blame] | 1632 | /* Default timeout in interrupt mode: 200 ms */ |
| 1633 | priv->adapter.timeout = HZ / 5; |
| 1634 | |
Hans de Goede | 6e0c950 | 2017-11-22 12:28:17 +0100 | [diff] [blame] | 1635 | if (dev->irq == IRQ_NOTCONNECTED) |
| 1636 | priv->features &= ~FEATURE_IRQ; |
| 1637 | |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1638 | if (priv->features & FEATURE_IRQ) { |
Jean Delvare | aeb8a3d | 2014-11-12 10:25:37 +0100 | [diff] [blame] | 1639 | u16 pcictl, pcists; |
| 1640 | |
| 1641 | /* Complain if an interrupt is already pending */ |
| 1642 | pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists); |
| 1643 | if (pcists & SMBPCISTS_INTS) |
| 1644 | dev_warn(&dev->dev, "An interrupt is pending!\n"); |
| 1645 | |
| 1646 | /* Check if interrupts have been disabled */ |
| 1647 | pci_read_config_word(priv->pci_dev, SMBPCICTL, &pcictl); |
| 1648 | if (pcictl & SMBPCICTL_INTDIS) { |
| 1649 | dev_info(&dev->dev, "Interrupts are disabled\n"); |
| 1650 | priv->features &= ~FEATURE_IRQ; |
| 1651 | } |
| 1652 | } |
| 1653 | |
| 1654 | if (priv->features & FEATURE_IRQ) { |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1655 | init_waitqueue_head(&priv->waitq); |
| 1656 | |
Jarkko Nikula | 1621c59 | 2015-02-13 15:52:23 +0200 | [diff] [blame] | 1657 | err = devm_request_irq(&dev->dev, dev->irq, i801_isr, |
| 1658 | IRQF_SHARED, |
| 1659 | dev_driver_string(&dev->dev), priv); |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1660 | if (err) { |
| 1661 | dev_err(&dev->dev, "Failed to allocate irq %d: %d\n", |
| 1662 | dev->irq, err); |
Jean Delvare | ae94471 | 2014-11-12 10:24:07 +0100 | [diff] [blame] | 1663 | priv->features &= ~FEATURE_IRQ; |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1664 | } |
| 1665 | } |
Jean Delvare | ae94471 | 2014-11-12 10:24:07 +0100 | [diff] [blame] | 1666 | dev_info(&dev->dev, "SMBus using %s\n", |
| 1667 | priv->features & FEATURE_IRQ ? "PCI interrupt" : "polling"); |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1668 | |
Mika Westerberg | 9424693 | 2015-08-06 13:46:25 +0100 | [diff] [blame] | 1669 | i801_add_tco(priv); |
| 1670 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1671 | snprintf(priv->adapter.name, sizeof(priv->adapter.name), |
| 1672 | "SMBus I801 adapter at %04lx", priv->smba); |
| 1673 | err = i2c_add_adapter(&priv->adapter); |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1674 | if (err) { |
Mika Westerberg | a7ae819 | 2016-06-09 16:56:28 +0300 | [diff] [blame] | 1675 | i801_acpi_remove(priv); |
Jarkko Nikula | fef220d | 2015-02-13 15:52:25 +0200 | [diff] [blame] | 1676 | return err; |
Jean Delvare | 02dd7ae | 2006-06-12 21:53:41 +0200 | [diff] [blame] | 1677 | } |
Jean Delvare | 1561bfe | 2009-01-07 14:29:17 +0100 | [diff] [blame] | 1678 | |
Benjamin Tissoires | 4d5538f | 2016-10-13 14:10:40 +0200 | [diff] [blame] | 1679 | i801_enable_host_notify(&priv->adapter); |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 1680 | |
Jean Delvare | e7198fb | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1681 | i801_probe_optional_slaves(priv); |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1682 | /* We ignore errors - multiplexing is optional */ |
| 1683 | i801_add_mux(priv); |
Jean Delvare | 1561bfe | 2009-01-07 14:29:17 +0100 | [diff] [blame] | 1684 | |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1685 | pci_set_drvdata(dev, priv); |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1686 | |
Jarkko Nikula | a7401ca | 2016-03-10 14:12:22 +0200 | [diff] [blame] | 1687 | pm_runtime_set_autosuspend_delay(&dev->dev, 1000); |
| 1688 | pm_runtime_use_autosuspend(&dev->dev); |
| 1689 | pm_runtime_put_autosuspend(&dev->dev); |
| 1690 | pm_runtime_allow(&dev->dev); |
| 1691 | |
Daniel Ritz | d6fcb3b | 2006-06-27 18:40:54 +0200 | [diff] [blame] | 1692 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1693 | } |
| 1694 | |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 1695 | static void i801_remove(struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1696 | { |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1697 | struct i801_priv *priv = pci_get_drvdata(dev); |
| 1698 | |
Jarkko Nikula | a7401ca | 2016-03-10 14:12:22 +0200 | [diff] [blame] | 1699 | pm_runtime_forbid(&dev->dev); |
| 1700 | pm_runtime_get_noresume(&dev->dev); |
| 1701 | |
Benjamin Tissoires | 22e94bd | 2016-10-13 14:10:35 +0200 | [diff] [blame] | 1702 | i801_disable_host_notify(priv); |
Jean Delvare | 3ad7ea1 | 2012-10-05 22:23:53 +0200 | [diff] [blame] | 1703 | i801_del_mux(priv); |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1704 | i2c_del_adapter(&priv->adapter); |
Mika Westerberg | a7ae819 | 2016-06-09 16:56:28 +0300 | [diff] [blame] | 1705 | i801_acpi_remove(priv); |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1706 | pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg); |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 1707 | |
Mika Westerberg | 9424693 | 2015-08-06 13:46:25 +0100 | [diff] [blame] | 1708 | platform_device_unregister(priv->tco_pdev); |
| 1709 | |
Daniel Ritz | d6fcb3b | 2006-06-27 18:40:54 +0200 | [diff] [blame] | 1710 | /* |
| 1711 | * do not call pci_disable_device(dev) since it can cause hard hangs on |
| 1712 | * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010) |
| 1713 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1714 | } |
| 1715 | |
Jean Delvare | f7f6d91 | 2018-04-11 18:05:34 +0200 | [diff] [blame] | 1716 | static void i801_shutdown(struct pci_dev *dev) |
| 1717 | { |
| 1718 | struct i801_priv *priv = pci_get_drvdata(dev); |
| 1719 | |
| 1720 | /* Restore config registers to avoid hard hang on some systems */ |
| 1721 | i801_disable_host_notify(priv); |
| 1722 | pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg); |
| 1723 | } |
| 1724 | |
Anders Roxell | 4b2f9bd5 | 2018-05-14 11:33:26 +0200 | [diff] [blame] | 1725 | #ifdef CONFIG_PM_SLEEP |
Jarkko Nikula | 2ee73c4 | 2016-03-10 14:12:21 +0200 | [diff] [blame] | 1726 | static int i801_suspend(struct device *dev) |
Jean Delvare | a5aaea3 | 2007-03-22 19:49:01 +0100 | [diff] [blame] | 1727 | { |
Jarkko Nikula | 2ee73c4 | 2016-03-10 14:12:21 +0200 | [diff] [blame] | 1728 | struct pci_dev *pci_dev = to_pci_dev(dev); |
| 1729 | struct i801_priv *priv = pci_get_drvdata(pci_dev); |
David Woodhouse | 0cd96eb | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 1730 | |
Jarkko Nikula | 2ee73c4 | 2016-03-10 14:12:21 +0200 | [diff] [blame] | 1731 | pci_write_config_byte(pci_dev, SMBHSTCFG, priv->original_hstcfg); |
Jean Delvare | a5aaea3 | 2007-03-22 19:49:01 +0100 | [diff] [blame] | 1732 | return 0; |
| 1733 | } |
| 1734 | |
Jarkko Nikula | 2ee73c4 | 2016-03-10 14:12:21 +0200 | [diff] [blame] | 1735 | static int i801_resume(struct device *dev) |
Jean Delvare | a5aaea3 | 2007-03-22 19:49:01 +0100 | [diff] [blame] | 1736 | { |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 1737 | struct pci_dev *pci_dev = to_pci_dev(dev); |
| 1738 | struct i801_priv *priv = pci_get_drvdata(pci_dev); |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 1739 | |
Benjamin Tissoires | 4d5538f | 2016-10-13 14:10:40 +0200 | [diff] [blame] | 1740 | i801_enable_host_notify(&priv->adapter); |
Benjamin Tissoires | 7b0ed33 | 2016-06-24 16:39:49 +0200 | [diff] [blame] | 1741 | |
Jarkko Nikula | f85da3f | 2015-02-13 15:52:24 +0200 | [diff] [blame] | 1742 | return 0; |
Jean Delvare | a5aaea3 | 2007-03-22 19:49:01 +0100 | [diff] [blame] | 1743 | } |
Jean Delvare | a5aaea3 | 2007-03-22 19:49:01 +0100 | [diff] [blame] | 1744 | #endif |
| 1745 | |
Jean Delvare | a9c8088 | 2018-04-25 11:53:40 +0200 | [diff] [blame] | 1746 | static SIMPLE_DEV_PM_OPS(i801_pm_ops, i801_suspend, i801_resume); |
Jarkko Nikula | 2ee73c4 | 2016-03-10 14:12:21 +0200 | [diff] [blame] | 1747 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1748 | static struct pci_driver i801_driver = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1749 | .name = "i801_smbus", |
| 1750 | .id_table = i801_ids, |
| 1751 | .probe = i801_probe, |
Bill Pemberton | 0b255e9 | 2012-11-27 15:59:38 -0500 | [diff] [blame] | 1752 | .remove = i801_remove, |
Jean Delvare | f7f6d91 | 2018-04-11 18:05:34 +0200 | [diff] [blame] | 1753 | .shutdown = i801_shutdown, |
Jarkko Nikula | 2ee73c4 | 2016-03-10 14:12:21 +0200 | [diff] [blame] | 1754 | .driver = { |
| 1755 | .pm = &i801_pm_ops, |
| 1756 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1757 | }; |
| 1758 | |
| 1759 | static int __init i2c_i801_init(void) |
| 1760 | { |
Jean Delvare | 6aa1464 | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 1761 | if (dmi_name_in_vendors("FUJITSU")) |
| 1762 | input_apanel_init(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1763 | return pci_register_driver(&i801_driver); |
| 1764 | } |
| 1765 | |
| 1766 | static void __exit i2c_i801_exit(void) |
| 1767 | { |
| 1768 | pci_unregister_driver(&i801_driver); |
| 1769 | } |
| 1770 | |
Jean Delvare | 7c81c60f | 2014-01-29 20:40:08 +0100 | [diff] [blame] | 1771 | MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>, Jean Delvare <jdelvare@suse.de>"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1772 | MODULE_DESCRIPTION("I801 SMBus driver"); |
| 1773 | MODULE_LICENSE("GPL"); |
| 1774 | |
| 1775 | module_init(i2c_i801_init); |
| 1776 | module_exit(i2c_i801_exit); |