| Thomas Gleixner | c942fdd | 2019-05-27 08:55:06 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| Jiancheng Xue | 707d33c | 2016-10-29 14:13:37 +0800 | [diff] [blame] | 2 | /* |
| 3 | * HiSilicon Clock and Reset Driver Header |
| 4 | * |
| 5 | * Copyright (c) 2016 HiSilicon Limited. |
| Jiancheng Xue | 707d33c | 2016-10-29 14:13:37 +0800 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __HISI_CRG_H |
| 9 | #define __HISI_CRG_H |
| 10 | |
| 11 | struct hisi_clock_data; |
| 12 | struct hisi_reset_controller; |
| 13 | |
| 14 | struct hisi_crg_funcs { |
| 15 | struct hisi_clock_data* (*register_clks)(struct platform_device *pdev); |
| 16 | void (*unregister_clks)(struct platform_device *pdev); |
| 17 | }; |
| 18 | |
| 19 | struct hisi_crg_dev { |
| 20 | struct hisi_clock_data *clk_data; |
| 21 | struct hisi_reset_controller *rstc; |
| 22 | const struct hisi_crg_funcs *funcs; |
| 23 | }; |
| 24 | |
| 25 | #endif /* __HISI_CRG_H */ |