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Krzysztof Kozlowski84b21702017-12-25 20:54:32 +01001// SPDX-License-Identifier: GPL-2.0
2//
3// Copyright (c) 2003-2004 Simtec Electronics
4// Ben Dooks <ben@simtec.co.uk>
5//
6// http://www.handhelds.org/projects/rx3715.html
Linus Torvalds1da177e2005-04-16 15:20:36 -07007
8#include <linux/kernel.h>
9#include <linux/types.h>
10#include <linux/interrupt.h>
11#include <linux/list.h>
Russell King8d717a52010-05-22 19:47:18 +010012#include <linux/memblock.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070013#include <linux/timer.h>
14#include <linux/init.h>
15#include <linux/tty.h>
16#include <linux/console.h>
Kay Sieversedbaa602011-12-21 16:26:03 -080017#include <linux/device.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010018#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019#include <linux/serial_core.h>
Tushar Behera334a1c72014-02-14 10:32:45 +090020#include <linux/serial_s3c.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070021#include <linux/serial.h>
Russell Kingfced80c2008-09-06 12:10:45 +010022#include <linux/io.h>
Ben Dooks272eb572006-04-02 16:16:15 +010023#include <linux/mtd/mtd.h>
Boris Brezillond4092d72017-08-04 17:29:10 +020024#include <linux/mtd/rawnand.h>
Ben Dooks272eb572006-04-02 16:16:15 +010025#include <linux/mtd/nand_ecc.h>
26#include <linux/mtd/partitions.h>
27
Linus Torvalds1da177e2005-04-16 15:20:36 -070028#include <asm/mach/arch.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070029#include <asm/mach/irq.h>
Kukjin Kim232910d2013-01-02 10:18:58 -080030#include <asm/mach/map.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070031
Kukjin Kim232910d2013-01-02 10:18:58 -080032#include <linux/platform_data/mtd-nand-s3c2410.h>
33
Linus Torvalds1da177e2005-04-16 15:20:36 -070034#include <asm/irq.h>
35#include <asm/mach-types.h>
36
Kukjin Kim232910d2013-01-02 10:18:58 -080037#include <mach/fb.h>
38#include <mach/hardware.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010039#include <mach/regs-gpio.h>
40#include <mach/regs-lcd.h>
Linus Walleijb0161ca2014-01-14 14:24:24 +010041#include <mach/gpio-samsung.h>
Ben Dookse838ffc2005-11-01 19:44:28 +000042
Ben Dooksa2b7ba92008-10-07 22:26:09 +010043#include <plat/cpu.h>
Kukjin Kim232910d2013-01-02 10:18:58 -080044#include <plat/devs.h>
Ben Dooksa2b7ba92008-10-07 22:26:09 +010045#include <plat/pm.h>
Romain Naour7f78b6e2013-01-09 18:47:04 -080046#include <plat/samsung-time.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070047
Kukjin Kimb27b0722012-01-03 14:02:03 +010048#include "common.h"
Kukjin Kim232910d2013-01-02 10:18:58 -080049#include "h1940.h"
Kukjin Kimb27b0722012-01-03 14:02:03 +010050
Linus Torvalds1da177e2005-04-16 15:20:36 -070051static struct map_desc rx3715_iodesc[] __initdata = {
52 /* dump ISA space somewhere unused */
53
Ben Dooksff6ffa82005-11-09 14:05:31 +000054 {
55 .virtual = (u32)S3C24XX_VA_ISA_WORD,
56 .pfn = __phys_to_pfn(S3C2410_CS3),
57 .length = SZ_1M,
58 .type = MT_DEVICE,
59 }, {
60 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
61 .pfn = __phys_to_pfn(S3C2410_CS3),
62 .length = SZ_1M,
63 .type = MT_DEVICE,
64 },
Linus Torvalds1da177e2005-04-16 15:20:36 -070065};
66
Linus Torvalds1da177e2005-04-16 15:20:36 -070067static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
68 [0] = {
69 .hwport = 0,
70 .flags = 0,
71 .ucon = 0x3c5,
72 .ulcon = 0x03,
73 .ufcon = 0x51,
Thomas Abrahamafba7f92011-10-24 11:47:51 +020074 .clk_sel = S3C2410_UCON_CLKSEL3,
Linus Torvalds1da177e2005-04-16 15:20:36 -070075 },
76 [1] = {
77 .hwport = 1,
78 .flags = 0,
79 .ucon = 0x3c5,
80 .ulcon = 0x03,
81 .ufcon = 0x00,
Thomas Abrahamafba7f92011-10-24 11:47:51 +020082 .clk_sel = S3C2410_UCON_CLKSEL3,
Linus Torvalds1da177e2005-04-16 15:20:36 -070083 },
84 /* IR port */
85 [2] = {
86 .hwport = 2,
87 .uart_flags = UPF_CONS_FLOW,
88 .ucon = 0x3c5,
89 .ulcon = 0x43,
90 .ufcon = 0x51,
Thomas Abrahamafba7f92011-10-24 11:47:51 +020091 .clk_sel = S3C2410_UCON_CLKSEL3,
Linus Torvalds1da177e2005-04-16 15:20:36 -070092 }
93};
94
Ben Dookse838ffc2005-11-01 19:44:28 +000095/* framebuffer lcd controller information */
96
Krzysztof Helt09fe75f2007-10-16 01:28:56 -070097static struct s3c2410fb_display rx3715_lcdcfg __initdata = {
Krzysztof Heltf28ef572007-10-16 01:28:58 -070098 .lcdcon5 = S3C2410_LCDCON5_INVVLINE |
99 S3C2410_LCDCON5_FRM565 |
100 S3C2410_LCDCON5_HWSWP,
Ben Dookse838ffc2005-11-01 19:44:28 +0000101
Krzysztof Helt1f411532007-10-16 01:28:57 -0700102 .type = S3C2410_LCDCON1_TFT,
103 .width = 240,
104 .height = 320,
Krzysztof Helt09fe75f2007-10-16 01:28:56 -0700105
Krzysztof Helt69816692007-10-16 01:29:06 -0700106 .pixclock = 260000,
Krzysztof Helt1f411532007-10-16 01:28:57 -0700107 .xres = 240,
108 .yres = 320,
109 .bpp = 16,
110 .left_margin = 36,
111 .right_margin = 36,
Krzysztof Helt93d11f52007-10-16 01:29:00 -0700112 .hsync_len = 8,
Krzysztof Helt5f20f692007-10-16 01:28:59 -0700113 .upper_margin = 6,
114 .lower_margin = 7,
Krzysztof Helt93d11f52007-10-16 01:29:00 -0700115 .vsync_len = 3,
Krzysztof Helt09fe75f2007-10-16 01:28:56 -0700116};
117
118static struct s3c2410fb_mach_info rx3715_fb_info __initdata = {
119
120 .displays = &rx3715_lcdcfg,
121 .num_displays = 1,
122 .default_display = 0,
123
Ben Dookse838ffc2005-11-01 19:44:28 +0000124 .lpcsel = 0xf82,
125
126 .gpccon = 0xaa955699,
127 .gpccon_mask = 0xffc003cc,
128 .gpcup = 0x0000ffff,
129 .gpcup_mask = 0xffffffff,
130
131 .gpdcon = 0xaa95aaa1,
132 .gpdcon_mask = 0xffc0fff0,
133 .gpdup = 0x0000faff,
134 .gpdup_mask = 0xffffffff,
Ben Dookse838ffc2005-11-01 19:44:28 +0000135};
136
Ben Dooks2a3a1802009-09-28 13:59:49 +0300137static struct mtd_partition __initdata rx3715_nand_part[] = {
Ben Dooks272eb572006-04-02 16:16:15 +0100138 [0] = {
139 .name = "Whole Flash",
140 .offset = 0,
141 .size = MTDPART_SIZ_FULL,
142 .mask_flags = MTD_WRITEABLE,
143 }
144};
145
Ben Dooks2a3a1802009-09-28 13:59:49 +0300146static struct s3c2410_nand_set __initdata rx3715_nand_sets[] = {
Ben Dooks272eb572006-04-02 16:16:15 +0100147 [0] = {
148 .name = "Internal",
149 .nr_chips = 1,
150 .nr_partitions = ARRAY_SIZE(rx3715_nand_part),
151 .partitions = rx3715_nand_part,
152 },
153};
154
Ben Dooks2a3a1802009-09-28 13:59:49 +0300155static struct s3c2410_platform_nand __initdata rx3715_nand_info = {
Ben Dooks272eb572006-04-02 16:16:15 +0100156 .tacls = 25,
157 .twrph0 = 50,
158 .twrph1 = 15,
159 .nr_sets = ARRAY_SIZE(rx3715_nand_sets),
160 .sets = rx3715_nand_sets,
Sergio Pradoe9f66ae2016-10-20 19:42:44 -0200161 .ecc_mode = NAND_ECC_SOFT,
Ben Dooks272eb572006-04-02 16:16:15 +0100162};
163
Linus Torvalds1da177e2005-04-16 15:20:36 -0700164static struct platform_device *rx3715_devices[] __initdata = {
Ben Dooksb8132482009-11-23 00:13:39 +0000165 &s3c_device_ohci,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166 &s3c_device_lcd,
167 &s3c_device_wdt,
Ben Dooks3e1b7762008-10-31 16:14:40 +0000168 &s3c_device_i2c0,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169 &s3c_device_iis,
Ben Dooks272eb572006-04-02 16:16:15 +0100170 &s3c_device_nand,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171};
172
Ben Dooks5fe10ab2005-09-20 17:24:33 +0100173static void __init rx3715_map_io(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174{
175 s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176 s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs));
Romain Naour7f78b6e2013-01-09 18:47:04 -0800177 samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178}
179
Heiko Stuebnera28d6182014-05-09 05:49:19 +0900180static void __init rx3715_init_time(void)
181{
182 s3c2440_init_clocks(16934000);
183 samsung_timer_init();
184}
185
Russell King98c672c2010-05-22 18:18:57 +0100186/* H1940 and RX3715 need to reserve this for suspend */
187static void __init rx3715_reserve(void)
188{
Russell King8d717a52010-05-22 19:47:18 +0100189 memblock_reserve(0x30003000, 0x1000);
190 memblock_reserve(0x30081000, 0x1000);
Russell King98c672c2010-05-22 18:18:57 +0100191}
192
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193static void __init rx3715_init_machine(void)
194{
Krzysztof Heltb1dfe1f2007-03-19 15:10:20 +0100195#ifdef CONFIG_PM_H1940
Ben Dooksbbf6f282006-12-07 20:47:58 +0100196 memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
Krzysztof Heltb1dfe1f2007-03-19 15:10:20 +0100197#endif
Ben Dooks4e59c252008-12-12 00:24:18 +0000198 s3c_pm_init();
Ben Dooksbbf6f282006-12-07 20:47:58 +0100199
Ben Dooks2a3a1802009-09-28 13:59:49 +0300200 s3c_nand_set_platdata(&rx3715_nand_info);
Krzysztof Helt09fe75f2007-10-16 01:28:56 -0700201 s3c24xx_fb_set_platdata(&rx3715_fb_info);
Ben Dooks57e51712007-04-20 11:19:16 +0100202 platform_add_devices(rx3715_devices, ARRAY_SIZE(rx3715_devices));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700203}
Ben Dookse838ffc2005-11-01 19:44:28 +0000204
Linus Torvalds1da177e2005-04-16 15:20:36 -0700205MACHINE_START(RX3715, "IPAQ-RX3715")
Ben Dooksafdd2252010-05-07 09:24:05 +0900206 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
Nicolas Pitre69d50712011-07-05 22:38:17 -0400207 .atag_offset = 0x100,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100208 .map_io = rx3715_map_io,
Russell King98c672c2010-05-22 18:18:57 +0100209 .reserve = rx3715_reserve,
Heiko Stuebnerce6c1642013-02-12 09:59:20 -0800210 .init_irq = s3c2440_init_irq,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100211 .init_machine = rx3715_init_machine,
Heiko Stuebnera28d6182014-05-09 05:49:19 +0900212 .init_time = rx3715_init_time,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213MACHINE_END