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Boris Brezillon9b2d61f2016-06-08 10:34:57 +02001/*
2 * Copyright (C) 2017 Free Electrons
3 * Copyright (C) 2017 NextThing Co
4 *
5 * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
Boris Brezillon348d56a2018-09-07 00:38:48 +020018#include "internals.h"
Boris Brezillon9b2d61f2016-06-08 10:34:57 +020019
KOBAYASHI Yoshitakef2237132018-08-04 14:25:52 +090020/* Bit for detecting BENAND */
21#define TOSHIBA_NAND_ID4_IS_BENAND BIT(7)
22
23/* Recommended to rewrite for BENAND */
24#define TOSHIBA_NAND_STATUS_REWRITE_RECOMMENDED BIT(3)
25
Miquel Raynale9836762018-09-24 11:35:18 +020026static int toshiba_nand_benand_eccstatus(struct nand_chip *chip)
KOBAYASHI Yoshitakef2237132018-08-04 14:25:52 +090027{
Miquel Raynale9836762018-09-24 11:35:18 +020028 struct mtd_info *mtd = nand_to_mtd(chip);
KOBAYASHI Yoshitakef2237132018-08-04 14:25:52 +090029 int ret;
30 unsigned int max_bitflips = 0;
31 u8 status;
32
33 /* Check Status */
34 ret = nand_status_op(chip, &status);
35 if (ret)
36 return ret;
37
38 if (status & NAND_STATUS_FAIL) {
39 /* uncorrected */
40 mtd->ecc_stats.failed++;
41 } else if (status & TOSHIBA_NAND_STATUS_REWRITE_RECOMMENDED) {
42 /* corrected */
43 max_bitflips = mtd->bitflip_threshold;
44 mtd->ecc_stats.corrected += max_bitflips;
45 }
46
47 return max_bitflips;
48}
49
50static int
Boris Brezillonb9761682018-09-06 14:05:20 +020051toshiba_nand_read_page_benand(struct nand_chip *chip, uint8_t *buf,
KOBAYASHI Yoshitakef2237132018-08-04 14:25:52 +090052 int oob_required, int page)
53{
54 int ret;
55
Boris Brezillonb9761682018-09-06 14:05:20 +020056 ret = nand_read_page_raw(chip, buf, oob_required, page);
KOBAYASHI Yoshitakef2237132018-08-04 14:25:52 +090057 if (ret)
58 return ret;
59
Miquel Raynale9836762018-09-24 11:35:18 +020060 return toshiba_nand_benand_eccstatus(chip);
KOBAYASHI Yoshitakef2237132018-08-04 14:25:52 +090061}
62
63static int
Boris Brezillonb9761682018-09-06 14:05:20 +020064toshiba_nand_read_subpage_benand(struct nand_chip *chip, uint32_t data_offs,
KOBAYASHI Yoshitakef2237132018-08-04 14:25:52 +090065 uint32_t readlen, uint8_t *bufpoi, int page)
66{
67 int ret;
68
69 ret = nand_read_page_op(chip, page, data_offs,
70 bufpoi + data_offs, readlen);
71 if (ret)
72 return ret;
73
Miquel Raynale9836762018-09-24 11:35:18 +020074 return toshiba_nand_benand_eccstatus(chip);
KOBAYASHI Yoshitakef2237132018-08-04 14:25:52 +090075}
76
77static void toshiba_nand_benand_init(struct nand_chip *chip)
78{
79 struct mtd_info *mtd = nand_to_mtd(chip);
80
81 /*
82 * On BENAND, the entire OOB region can be used by the MTD user.
83 * The calculated ECC bytes are stored into other isolated
84 * area which is not accessible to users.
85 * This is why chip->ecc.bytes = 0.
86 */
87 chip->ecc.bytes = 0;
88 chip->ecc.size = 512;
89 chip->ecc.strength = 8;
90 chip->ecc.read_page = toshiba_nand_read_page_benand;
91 chip->ecc.read_subpage = toshiba_nand_read_subpage_benand;
92 chip->ecc.write_page = nand_write_page_raw;
93 chip->ecc.read_page_raw = nand_read_page_raw_notsupp;
94 chip->ecc.write_page_raw = nand_write_page_raw_notsupp;
95
96 chip->options |= NAND_SUBPAGE_READ;
97
98 mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
99}
100
Boris Brezillon9b2d61f2016-06-08 10:34:57 +0200101static void toshiba_nand_decode_id(struct nand_chip *chip)
102{
103 struct mtd_info *mtd = nand_to_mtd(chip);
Boris Brezillon629a4422018-10-25 17:10:37 +0200104 struct nand_memory_organization *memorg;
105
106 memorg = nanddev_get_memorg(&chip->base);
Boris Brezillon9b2d61f2016-06-08 10:34:57 +0200107
108 nand_decode_ext_id(chip);
109
110 /*
111 * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per
112 * 512B page. For Toshiba SLC, we decode the 5th/6th byte as
113 * follows:
114 * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm,
115 * 110b -> 24nm
116 * - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC
117 */
118 if (chip->id.len >= 6 && nand_is_slc(chip) &&
119 (chip->id.data[5] & 0x7) == 0x6 /* 24nm */ &&
Boris Brezillon629a4422018-10-25 17:10:37 +0200120 !(chip->id.data[4] & 0x80) /* !BENAND */) {
121 memorg->oobsize = 32 * memorg->pagesize >> 9;
122 mtd->oobsize = memorg->oobsize;
123 }
KOBAYASHI Yoshitakefb3bff52018-02-15 00:35:06 +0900124
125 /*
126 * Extract ECC requirements from 6th id byte.
127 * For Toshiba SLC, ecc requrements are as follows:
128 * - 43nm: 1 bit ECC for each 512Byte is required.
129 * - 32nm: 4 bit ECC for each 512Byte is required.
130 * - 24nm: 8 bit ECC for each 512Byte is required.
131 */
132 if (chip->id.len >= 6 && nand_is_slc(chip)) {
Boris Brezillon6a1b66d2018-11-04 16:09:42 +0100133 chip->base.eccreq.step_size = 512;
KOBAYASHI Yoshitakefb3bff52018-02-15 00:35:06 +0900134 switch (chip->id.data[5] & 0x7) {
135 case 0x4:
Boris Brezillon6a1b66d2018-11-04 16:09:42 +0100136 chip->base.eccreq.strength = 1;
KOBAYASHI Yoshitakefb3bff52018-02-15 00:35:06 +0900137 break;
138 case 0x5:
Boris Brezillon6a1b66d2018-11-04 16:09:42 +0100139 chip->base.eccreq.strength = 4;
KOBAYASHI Yoshitakefb3bff52018-02-15 00:35:06 +0900140 break;
141 case 0x6:
Boris Brezillon6a1b66d2018-11-04 16:09:42 +0100142 chip->base.eccreq.strength = 8;
KOBAYASHI Yoshitakefb3bff52018-02-15 00:35:06 +0900143 break;
144 default:
145 WARN(1, "Could not get ECC info");
Boris Brezillon6a1b66d2018-11-04 16:09:42 +0100146 chip->base.eccreq.step_size = 0;
KOBAYASHI Yoshitakefb3bff52018-02-15 00:35:06 +0900147 break;
148 }
149 }
Boris Brezillon9b2d61f2016-06-08 10:34:57 +0200150}
151
152static int toshiba_nand_init(struct nand_chip *chip)
153{
154 if (nand_is_slc(chip))
Frieder Schrempfbb592542019-04-17 12:36:36 +0000155 chip->options |= NAND_BBM_FIRSTPAGE | NAND_BBM_SECONDPAGE;
Boris Brezillon9b2d61f2016-06-08 10:34:57 +0200156
KOBAYASHI Yoshitakef2237132018-08-04 14:25:52 +0900157 /* Check that chip is BENAND and ECC mode is on-die */
158 if (nand_is_slc(chip) && chip->ecc.mode == NAND_ECC_ON_DIE &&
159 chip->id.data[4] & TOSHIBA_NAND_ID4_IS_BENAND)
160 toshiba_nand_benand_init(chip);
161
Boris Brezillon9b2d61f2016-06-08 10:34:57 +0200162 return 0;
163}
164
165const struct nand_manufacturer_ops toshiba_nand_manuf_ops = {
166 .detect = toshiba_nand_decode_id,
167 .init = toshiba_nand_init,
168};