Boris Brezillon | 9b2d61f | 2016-06-08 10:34:57 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2017 Free Electrons |
| 3 | * Copyright (C) 2017 NextThing Co |
| 4 | * |
| 5 | * Author: Boris Brezillon <boris.brezillon@free-electrons.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | */ |
| 17 | |
Boris Brezillon | d4092d7 | 2017-08-04 17:29:10 +0200 | [diff] [blame] | 18 | #include <linux/mtd/rawnand.h> |
Boris Brezillon | 9b2d61f | 2016-06-08 10:34:57 +0200 | [diff] [blame] | 19 | |
KOBAYASHI Yoshitake | f223713 | 2018-08-04 14:25:52 +0900 | [diff] [blame] | 20 | /* Bit for detecting BENAND */ |
| 21 | #define TOSHIBA_NAND_ID4_IS_BENAND BIT(7) |
| 22 | |
| 23 | /* Recommended to rewrite for BENAND */ |
| 24 | #define TOSHIBA_NAND_STATUS_REWRITE_RECOMMENDED BIT(3) |
| 25 | |
| 26 | static int toshiba_nand_benand_eccstatus(struct mtd_info *mtd, |
| 27 | struct nand_chip *chip) |
| 28 | { |
| 29 | int ret; |
| 30 | unsigned int max_bitflips = 0; |
| 31 | u8 status; |
| 32 | |
| 33 | /* Check Status */ |
| 34 | ret = nand_status_op(chip, &status); |
| 35 | if (ret) |
| 36 | return ret; |
| 37 | |
| 38 | if (status & NAND_STATUS_FAIL) { |
| 39 | /* uncorrected */ |
| 40 | mtd->ecc_stats.failed++; |
| 41 | } else if (status & TOSHIBA_NAND_STATUS_REWRITE_RECOMMENDED) { |
| 42 | /* corrected */ |
| 43 | max_bitflips = mtd->bitflip_threshold; |
| 44 | mtd->ecc_stats.corrected += max_bitflips; |
| 45 | } |
| 46 | |
| 47 | return max_bitflips; |
| 48 | } |
| 49 | |
| 50 | static int |
Boris Brezillon | b976168 | 2018-09-06 14:05:20 +0200 | [diff] [blame^] | 51 | toshiba_nand_read_page_benand(struct nand_chip *chip, uint8_t *buf, |
KOBAYASHI Yoshitake | f223713 | 2018-08-04 14:25:52 +0900 | [diff] [blame] | 52 | int oob_required, int page) |
| 53 | { |
Boris Brezillon | b976168 | 2018-09-06 14:05:20 +0200 | [diff] [blame^] | 54 | struct mtd_info *mtd = nand_to_mtd(chip); |
KOBAYASHI Yoshitake | f223713 | 2018-08-04 14:25:52 +0900 | [diff] [blame] | 55 | int ret; |
| 56 | |
Boris Brezillon | b976168 | 2018-09-06 14:05:20 +0200 | [diff] [blame^] | 57 | ret = nand_read_page_raw(chip, buf, oob_required, page); |
KOBAYASHI Yoshitake | f223713 | 2018-08-04 14:25:52 +0900 | [diff] [blame] | 58 | if (ret) |
| 59 | return ret; |
| 60 | |
| 61 | return toshiba_nand_benand_eccstatus(mtd, chip); |
| 62 | } |
| 63 | |
| 64 | static int |
Boris Brezillon | b976168 | 2018-09-06 14:05:20 +0200 | [diff] [blame^] | 65 | toshiba_nand_read_subpage_benand(struct nand_chip *chip, uint32_t data_offs, |
KOBAYASHI Yoshitake | f223713 | 2018-08-04 14:25:52 +0900 | [diff] [blame] | 66 | uint32_t readlen, uint8_t *bufpoi, int page) |
| 67 | { |
Boris Brezillon | b976168 | 2018-09-06 14:05:20 +0200 | [diff] [blame^] | 68 | struct mtd_info *mtd = nand_to_mtd(chip); |
KOBAYASHI Yoshitake | f223713 | 2018-08-04 14:25:52 +0900 | [diff] [blame] | 69 | int ret; |
| 70 | |
| 71 | ret = nand_read_page_op(chip, page, data_offs, |
| 72 | bufpoi + data_offs, readlen); |
| 73 | if (ret) |
| 74 | return ret; |
| 75 | |
| 76 | return toshiba_nand_benand_eccstatus(mtd, chip); |
| 77 | } |
| 78 | |
| 79 | static void toshiba_nand_benand_init(struct nand_chip *chip) |
| 80 | { |
| 81 | struct mtd_info *mtd = nand_to_mtd(chip); |
| 82 | |
| 83 | /* |
| 84 | * On BENAND, the entire OOB region can be used by the MTD user. |
| 85 | * The calculated ECC bytes are stored into other isolated |
| 86 | * area which is not accessible to users. |
| 87 | * This is why chip->ecc.bytes = 0. |
| 88 | */ |
| 89 | chip->ecc.bytes = 0; |
| 90 | chip->ecc.size = 512; |
| 91 | chip->ecc.strength = 8; |
| 92 | chip->ecc.read_page = toshiba_nand_read_page_benand; |
| 93 | chip->ecc.read_subpage = toshiba_nand_read_subpage_benand; |
| 94 | chip->ecc.write_page = nand_write_page_raw; |
| 95 | chip->ecc.read_page_raw = nand_read_page_raw_notsupp; |
| 96 | chip->ecc.write_page_raw = nand_write_page_raw_notsupp; |
| 97 | |
| 98 | chip->options |= NAND_SUBPAGE_READ; |
| 99 | |
| 100 | mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); |
| 101 | } |
| 102 | |
Boris Brezillon | 9b2d61f | 2016-06-08 10:34:57 +0200 | [diff] [blame] | 103 | static void toshiba_nand_decode_id(struct nand_chip *chip) |
| 104 | { |
| 105 | struct mtd_info *mtd = nand_to_mtd(chip); |
| 106 | |
| 107 | nand_decode_ext_id(chip); |
| 108 | |
| 109 | /* |
| 110 | * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per |
| 111 | * 512B page. For Toshiba SLC, we decode the 5th/6th byte as |
| 112 | * follows: |
| 113 | * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm, |
| 114 | * 110b -> 24nm |
| 115 | * - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC |
| 116 | */ |
| 117 | if (chip->id.len >= 6 && nand_is_slc(chip) && |
| 118 | (chip->id.data[5] & 0x7) == 0x6 /* 24nm */ && |
| 119 | !(chip->id.data[4] & 0x80) /* !BENAND */) |
| 120 | mtd->oobsize = 32 * mtd->writesize >> 9; |
KOBAYASHI Yoshitake | fb3bff5 | 2018-02-15 00:35:06 +0900 | [diff] [blame] | 121 | |
| 122 | /* |
| 123 | * Extract ECC requirements from 6th id byte. |
| 124 | * For Toshiba SLC, ecc requrements are as follows: |
| 125 | * - 43nm: 1 bit ECC for each 512Byte is required. |
| 126 | * - 32nm: 4 bit ECC for each 512Byte is required. |
| 127 | * - 24nm: 8 bit ECC for each 512Byte is required. |
| 128 | */ |
| 129 | if (chip->id.len >= 6 && nand_is_slc(chip)) { |
| 130 | chip->ecc_step_ds = 512; |
| 131 | switch (chip->id.data[5] & 0x7) { |
| 132 | case 0x4: |
| 133 | chip->ecc_strength_ds = 1; |
| 134 | break; |
| 135 | case 0x5: |
| 136 | chip->ecc_strength_ds = 4; |
| 137 | break; |
| 138 | case 0x6: |
| 139 | chip->ecc_strength_ds = 8; |
| 140 | break; |
| 141 | default: |
| 142 | WARN(1, "Could not get ECC info"); |
| 143 | chip->ecc_step_ds = 0; |
| 144 | break; |
| 145 | } |
| 146 | } |
Boris Brezillon | 9b2d61f | 2016-06-08 10:34:57 +0200 | [diff] [blame] | 147 | } |
| 148 | |
| 149 | static int toshiba_nand_init(struct nand_chip *chip) |
| 150 | { |
| 151 | if (nand_is_slc(chip)) |
| 152 | chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; |
| 153 | |
KOBAYASHI Yoshitake | f223713 | 2018-08-04 14:25:52 +0900 | [diff] [blame] | 154 | /* Check that chip is BENAND and ECC mode is on-die */ |
| 155 | if (nand_is_slc(chip) && chip->ecc.mode == NAND_ECC_ON_DIE && |
| 156 | chip->id.data[4] & TOSHIBA_NAND_ID4_IS_BENAND) |
| 157 | toshiba_nand_benand_init(chip); |
| 158 | |
Boris Brezillon | 9b2d61f | 2016-06-08 10:34:57 +0200 | [diff] [blame] | 159 | return 0; |
| 160 | } |
| 161 | |
| 162 | const struct nand_manufacturer_ops toshiba_nand_manuf_ops = { |
| 163 | .detect = toshiba_nand_decode_id, |
| 164 | .init = toshiba_nand_init, |
| 165 | }; |