blob: 8cbff218debb1a739b6574b743bf786b7efc1602 [file] [log] [blame]
Ryder Lee785e5c62016-12-19 10:20:44 +08001/*
2 * Cryptographic API.
3 *
4 * Driver for EIP97 SHA1/SHA2(HMAC) acceleration.
5 *
6 * Copyright (c) 2016 Ryder Lee <ryder.lee@mediatek.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Some ideas are from atmel-sha.c and omap-sham.c drivers.
13 */
14
15#include <crypto/sha.h>
16#include "mtk-platform.h"
17
18#define SHA_ALIGN_MSK (sizeof(u32) - 1)
19#define SHA_QUEUE_SIZE 512
20#define SHA_TMP_BUF_SIZE 512
21#define SHA_BUF_SIZE ((u32)PAGE_SIZE)
22
23#define SHA_OP_UPDATE 1
24#define SHA_OP_FINAL 2
25
26#define SHA_DATA_LEN_MSK cpu_to_le32(GENMASK(16, 0))
27
28/* SHA command token */
29#define SHA_CT_SIZE 5
30#define SHA_CT_CTRL_HDR cpu_to_le32(0x02220000)
Ryder Leea87399622017-01-20 13:41:08 +080031#define SHA_CMD0 cpu_to_le32(0x03020000)
32#define SHA_CMD1 cpu_to_le32(0x21060000)
33#define SHA_CMD2 cpu_to_le32(0xe0e63802)
Ryder Lee785e5c62016-12-19 10:20:44 +080034
35/* SHA transform information */
36#define SHA_TFM_HASH cpu_to_le32(0x2 << 0)
37#define SHA_TFM_INNER_DIG cpu_to_le32(0x1 << 21)
38#define SHA_TFM_SIZE(x) cpu_to_le32((x) << 8)
39#define SHA_TFM_START cpu_to_le32(0x1 << 4)
40#define SHA_TFM_CONTINUE cpu_to_le32(0x1 << 5)
41#define SHA_TFM_HASH_STORE cpu_to_le32(0x1 << 19)
42#define SHA_TFM_SHA1 cpu_to_le32(0x2 << 23)
43#define SHA_TFM_SHA256 cpu_to_le32(0x3 << 23)
44#define SHA_TFM_SHA224 cpu_to_le32(0x4 << 23)
45#define SHA_TFM_SHA512 cpu_to_le32(0x5 << 23)
46#define SHA_TFM_SHA384 cpu_to_le32(0x6 << 23)
47#define SHA_TFM_DIGEST(x) cpu_to_le32(((x) & GENMASK(3, 0)) << 24)
48
49/* SHA flags */
50#define SHA_FLAGS_BUSY BIT(0)
51#define SHA_FLAGS_FINAL BIT(1)
52#define SHA_FLAGS_FINUP BIT(2)
53#define SHA_FLAGS_SG BIT(3)
54#define SHA_FLAGS_ALGO_MSK GENMASK(8, 4)
55#define SHA_FLAGS_SHA1 BIT(4)
56#define SHA_FLAGS_SHA224 BIT(5)
57#define SHA_FLAGS_SHA256 BIT(6)
58#define SHA_FLAGS_SHA384 BIT(7)
59#define SHA_FLAGS_SHA512 BIT(8)
60#define SHA_FLAGS_HMAC BIT(9)
61#define SHA_FLAGS_PAD BIT(10)
62
63/**
64 * mtk_sha_ct is a set of hardware instructions(command token)
65 * that are used to control engine's processing flow of SHA,
66 * and it contains the first two words of transform state.
67 */
68struct mtk_sha_ct {
Ryder Leea87399622017-01-20 13:41:08 +080069 __le32 ctrl[2];
70 __le32 cmd[3];
Ryder Lee785e5c62016-12-19 10:20:44 +080071};
72
73/**
74 * mtk_sha_tfm is used to define SHA transform state
75 * and store result digest that produced by engine.
76 */
77struct mtk_sha_tfm {
Ryder Leea87399622017-01-20 13:41:08 +080078 __le32 ctrl[2];
Ryder Lee785e5c62016-12-19 10:20:44 +080079 __le32 digest[SIZE_IN_WORDS(SHA512_DIGEST_SIZE)];
80};
81
82/**
83 * mtk_sha_info consists of command token and transform state
84 * of SHA, its role is similar to mtk_aes_info.
85 */
86struct mtk_sha_info {
87 struct mtk_sha_ct ct;
88 struct mtk_sha_tfm tfm;
89};
90
91struct mtk_sha_reqctx {
92 struct mtk_sha_info info;
93 unsigned long flags;
94 unsigned long op;
95
96 u64 digcnt;
97 bool start;
98 size_t bufcnt;
99 dma_addr_t dma_addr;
100
Ryder Leea87399622017-01-20 13:41:08 +0800101 __le32 ct_hdr;
102 u32 ct_size;
103 dma_addr_t ct_dma;
104 dma_addr_t tfm_dma;
105
Ryder Lee785e5c62016-12-19 10:20:44 +0800106 /* Walk state */
107 struct scatterlist *sg;
108 u32 offset; /* Offset in current sg */
109 u32 total; /* Total request */
110 size_t ds;
111 size_t bs;
112
113 u8 *buffer;
114};
115
116struct mtk_sha_hmac_ctx {
117 struct crypto_shash *shash;
118 u8 ipad[SHA512_BLOCK_SIZE] __aligned(sizeof(u32));
119 u8 opad[SHA512_BLOCK_SIZE] __aligned(sizeof(u32));
120};
121
122struct mtk_sha_ctx {
123 struct mtk_cryp *cryp;
124 unsigned long flags;
125 u8 id;
126 u8 buf[SHA_BUF_SIZE] __aligned(sizeof(u32));
127
128 struct mtk_sha_hmac_ctx base[0];
129};
130
131struct mtk_sha_drv {
132 struct list_head dev_list;
133 /* Device list lock */
134 spinlock_t lock;
135};
136
137static struct mtk_sha_drv mtk_sha = {
138 .dev_list = LIST_HEAD_INIT(mtk_sha.dev_list),
139 .lock = __SPIN_LOCK_UNLOCKED(mtk_sha.lock),
140};
141
142static int mtk_sha_handle_queue(struct mtk_cryp *cryp, u8 id,
143 struct ahash_request *req);
144
145static inline u32 mtk_sha_read(struct mtk_cryp *cryp, u32 offset)
146{
147 return readl_relaxed(cryp->base + offset);
148}
149
150static inline void mtk_sha_write(struct mtk_cryp *cryp,
151 u32 offset, u32 value)
152{
153 writel_relaxed(value, cryp->base + offset);
154}
155
156static struct mtk_cryp *mtk_sha_find_dev(struct mtk_sha_ctx *tctx)
157{
158 struct mtk_cryp *cryp = NULL;
159 struct mtk_cryp *tmp;
160
161 spin_lock_bh(&mtk_sha.lock);
162 if (!tctx->cryp) {
163 list_for_each_entry(tmp, &mtk_sha.dev_list, sha_list) {
164 cryp = tmp;
165 break;
166 }
167 tctx->cryp = cryp;
168 } else {
169 cryp = tctx->cryp;
170 }
171
172 /*
173 * Assign record id to tfm in round-robin fashion, and this
174 * will help tfm to bind to corresponding descriptor rings.
175 */
176 tctx->id = cryp->rec;
177 cryp->rec = !cryp->rec;
178
179 spin_unlock_bh(&mtk_sha.lock);
180
181 return cryp;
182}
183
184static int mtk_sha_append_sg(struct mtk_sha_reqctx *ctx)
185{
186 size_t count;
187
188 while ((ctx->bufcnt < SHA_BUF_SIZE) && ctx->total) {
189 count = min(ctx->sg->length - ctx->offset, ctx->total);
190 count = min(count, SHA_BUF_SIZE - ctx->bufcnt);
191
192 if (count <= 0) {
193 /*
194 * Check if count <= 0 because the buffer is full or
195 * because the sg length is 0. In the latest case,
196 * check if there is another sg in the list, a 0 length
197 * sg doesn't necessarily mean the end of the sg list.
198 */
199 if ((ctx->sg->length == 0) && !sg_is_last(ctx->sg)) {
200 ctx->sg = sg_next(ctx->sg);
201 continue;
202 } else {
203 break;
204 }
205 }
206
207 scatterwalk_map_and_copy(ctx->buffer + ctx->bufcnt, ctx->sg,
208 ctx->offset, count, 0);
209
210 ctx->bufcnt += count;
211 ctx->offset += count;
212 ctx->total -= count;
213
214 if (ctx->offset == ctx->sg->length) {
215 ctx->sg = sg_next(ctx->sg);
216 if (ctx->sg)
217 ctx->offset = 0;
218 else
219 ctx->total = 0;
220 }
221 }
222
223 return 0;
224}
225
226/*
227 * The purpose of this padding is to ensure that the padded message is a
228 * multiple of 512 bits (SHA1/SHA224/SHA256) or 1024 bits (SHA384/SHA512).
229 * The bit "1" is appended at the end of the message followed by
230 * "padlen-1" zero bits. Then a 64 bits block (SHA1/SHA224/SHA256) or
231 * 128 bits block (SHA384/SHA512) equals to the message length in bits
232 * is appended.
233 *
234 * For SHA1/SHA224/SHA256, padlen is calculated as followed:
235 * - if message length < 56 bytes then padlen = 56 - message length
236 * - else padlen = 64 + 56 - message length
237 *
238 * For SHA384/SHA512, padlen is calculated as followed:
239 * - if message length < 112 bytes then padlen = 112 - message length
240 * - else padlen = 128 + 112 - message length
241 */
242static void mtk_sha_fill_padding(struct mtk_sha_reqctx *ctx, u32 len)
243{
244 u32 index, padlen;
245 u64 bits[2];
246 u64 size = ctx->digcnt;
247
248 size += ctx->bufcnt;
249 size += len;
250
251 bits[1] = cpu_to_be64(size << 3);
252 bits[0] = cpu_to_be64(size >> 61);
253
254 if (ctx->flags & (SHA_FLAGS_SHA384 | SHA_FLAGS_SHA512)) {
255 index = ctx->bufcnt & 0x7f;
256 padlen = (index < 112) ? (112 - index) : ((128 + 112) - index);
257 *(ctx->buffer + ctx->bufcnt) = 0x80;
258 memset(ctx->buffer + ctx->bufcnt + 1, 0, padlen - 1);
259 memcpy(ctx->buffer + ctx->bufcnt + padlen, bits, 16);
260 ctx->bufcnt += padlen + 16;
261 ctx->flags |= SHA_FLAGS_PAD;
262 } else {
263 index = ctx->bufcnt & 0x3f;
264 padlen = (index < 56) ? (56 - index) : ((64 + 56) - index);
265 *(ctx->buffer + ctx->bufcnt) = 0x80;
266 memset(ctx->buffer + ctx->bufcnt + 1, 0, padlen - 1);
267 memcpy(ctx->buffer + ctx->bufcnt + padlen, &bits[1], 8);
268 ctx->bufcnt += padlen + 8;
269 ctx->flags |= SHA_FLAGS_PAD;
270 }
271}
272
273/* Initialize basic transform information of SHA */
Ryder Leea87399622017-01-20 13:41:08 +0800274static void mtk_sha_info_init(struct mtk_sha_reqctx *ctx)
Ryder Lee785e5c62016-12-19 10:20:44 +0800275{
Ryder Leea87399622017-01-20 13:41:08 +0800276 struct mtk_sha_ct *ct = &ctx->info.ct;
277 struct mtk_sha_tfm *tfm = &ctx->info.tfm;
Ryder Lee785e5c62016-12-19 10:20:44 +0800278
Ryder Leea87399622017-01-20 13:41:08 +0800279 ctx->ct_hdr = SHA_CT_CTRL_HDR;
280 ctx->ct_size = SHA_CT_SIZE;
Ryder Lee785e5c62016-12-19 10:20:44 +0800281
Ryder Leea87399622017-01-20 13:41:08 +0800282 tfm->ctrl[0] = SHA_TFM_HASH | SHA_TFM_INNER_DIG |
283 SHA_TFM_SIZE(SIZE_IN_WORDS(ctx->ds));
Ryder Lee785e5c62016-12-19 10:20:44 +0800284
285 switch (ctx->flags & SHA_FLAGS_ALGO_MSK) {
286 case SHA_FLAGS_SHA1:
Ryder Leea87399622017-01-20 13:41:08 +0800287 tfm->ctrl[0] |= SHA_TFM_SHA1;
Ryder Lee785e5c62016-12-19 10:20:44 +0800288 break;
289 case SHA_FLAGS_SHA224:
Ryder Leea87399622017-01-20 13:41:08 +0800290 tfm->ctrl[0] |= SHA_TFM_SHA224;
Ryder Lee785e5c62016-12-19 10:20:44 +0800291 break;
292 case SHA_FLAGS_SHA256:
Ryder Leea87399622017-01-20 13:41:08 +0800293 tfm->ctrl[0] |= SHA_TFM_SHA256;
Ryder Lee785e5c62016-12-19 10:20:44 +0800294 break;
295 case SHA_FLAGS_SHA384:
Ryder Leea87399622017-01-20 13:41:08 +0800296 tfm->ctrl[0] |= SHA_TFM_SHA384;
Ryder Lee785e5c62016-12-19 10:20:44 +0800297 break;
298 case SHA_FLAGS_SHA512:
Ryder Leea87399622017-01-20 13:41:08 +0800299 tfm->ctrl[0] |= SHA_TFM_SHA512;
Ryder Lee785e5c62016-12-19 10:20:44 +0800300 break;
301
302 default:
303 /* Should not happen... */
304 return;
305 }
306
Ryder Leea87399622017-01-20 13:41:08 +0800307 tfm->ctrl[1] = SHA_TFM_HASH_STORE;
308 ct->ctrl[0] = tfm->ctrl[0] | SHA_TFM_CONTINUE | SHA_TFM_START;
309 ct->ctrl[1] = tfm->ctrl[1];
Ryder Lee785e5c62016-12-19 10:20:44 +0800310
Ryder Leea87399622017-01-20 13:41:08 +0800311 ct->cmd[0] = SHA_CMD0;
312 ct->cmd[1] = SHA_CMD1;
313 ct->cmd[2] = SHA_CMD2 | SHA_TFM_DIGEST(SIZE_IN_WORDS(ctx->ds));
Ryder Lee785e5c62016-12-19 10:20:44 +0800314}
315
316/*
317 * Update input data length field of transform information and
318 * map it to DMA region.
319 */
320static int mtk_sha_info_map(struct mtk_cryp *cryp,
321 struct mtk_sha_rec *sha,
322 size_t len)
323{
324 struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req);
Ryder Leea87399622017-01-20 13:41:08 +0800325 struct mtk_sha_info *info = &ctx->info;
Ryder Lee785e5c62016-12-19 10:20:44 +0800326 struct mtk_sha_ct *ct = &info->ct;
327
328 if (ctx->start)
329 ctx->start = false;
330 else
Ryder Leea87399622017-01-20 13:41:08 +0800331 ct->ctrl[0] &= ~SHA_TFM_START;
Ryder Lee785e5c62016-12-19 10:20:44 +0800332
Ryder Leea87399622017-01-20 13:41:08 +0800333 ctx->ct_hdr &= ~SHA_DATA_LEN_MSK;
334 ctx->ct_hdr |= cpu_to_le32(len);
335 ct->cmd[0] &= ~SHA_DATA_LEN_MSK;
336 ct->cmd[0] |= cpu_to_le32(len);
Ryder Lee785e5c62016-12-19 10:20:44 +0800337
338 ctx->digcnt += len;
339
Ryder Leea87399622017-01-20 13:41:08 +0800340 ctx->ct_dma = dma_map_single(cryp->dev, info, sizeof(*info),
Ryder Lee785e5c62016-12-19 10:20:44 +0800341 DMA_BIDIRECTIONAL);
Ryder Leea87399622017-01-20 13:41:08 +0800342 if (unlikely(dma_mapping_error(cryp->dev, ctx->ct_dma))) {
Arnd Bergmann41e05322017-01-11 14:55:20 +0100343 dev_err(cryp->dev, "dma %zu bytes error\n", sizeof(*info));
Ryder Lee785e5c62016-12-19 10:20:44 +0800344 return -EINVAL;
345 }
Ryder Leea87399622017-01-20 13:41:08 +0800346 ctx->tfm_dma = ctx->ct_dma + sizeof(*ct);
Ryder Lee785e5c62016-12-19 10:20:44 +0800347
348 return 0;
349}
350
351/*
352 * Because of hardware limitation, we must pre-calculate the inner
353 * and outer digest that need to be processed firstly by engine, then
354 * apply the result digest to the input message. These complex hashing
355 * procedures limits HMAC performance, so we use fallback SW encoding.
356 */
357static int mtk_sha_finish_hmac(struct ahash_request *req)
358{
359 struct mtk_sha_ctx *tctx = crypto_tfm_ctx(req->base.tfm);
360 struct mtk_sha_hmac_ctx *bctx = tctx->base;
361 struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
362
363 SHASH_DESC_ON_STACK(shash, bctx->shash);
364
365 shash->tfm = bctx->shash;
366 shash->flags = 0; /* not CRYPTO_TFM_REQ_MAY_SLEEP */
367
368 return crypto_shash_init(shash) ?:
369 crypto_shash_update(shash, bctx->opad, ctx->bs) ?:
370 crypto_shash_finup(shash, req->result, ctx->ds, req->result);
371}
372
373/* Initialize request context */
374static int mtk_sha_init(struct ahash_request *req)
375{
376 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
377 struct mtk_sha_ctx *tctx = crypto_ahash_ctx(tfm);
378 struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
379
380 ctx->flags = 0;
381 ctx->ds = crypto_ahash_digestsize(tfm);
382
383 switch (ctx->ds) {
384 case SHA1_DIGEST_SIZE:
385 ctx->flags |= SHA_FLAGS_SHA1;
386 ctx->bs = SHA1_BLOCK_SIZE;
387 break;
388 case SHA224_DIGEST_SIZE:
389 ctx->flags |= SHA_FLAGS_SHA224;
390 ctx->bs = SHA224_BLOCK_SIZE;
391 break;
392 case SHA256_DIGEST_SIZE:
393 ctx->flags |= SHA_FLAGS_SHA256;
394 ctx->bs = SHA256_BLOCK_SIZE;
395 break;
396 case SHA384_DIGEST_SIZE:
397 ctx->flags |= SHA_FLAGS_SHA384;
398 ctx->bs = SHA384_BLOCK_SIZE;
399 break;
400 case SHA512_DIGEST_SIZE:
401 ctx->flags |= SHA_FLAGS_SHA512;
402 ctx->bs = SHA512_BLOCK_SIZE;
403 break;
404 default:
405 return -EINVAL;
406 }
407
408 ctx->bufcnt = 0;
409 ctx->digcnt = 0;
410 ctx->buffer = tctx->buf;
411 ctx->start = true;
412
413 if (tctx->flags & SHA_FLAGS_HMAC) {
414 struct mtk_sha_hmac_ctx *bctx = tctx->base;
415
416 memcpy(ctx->buffer, bctx->ipad, ctx->bs);
417 ctx->bufcnt = ctx->bs;
418 ctx->flags |= SHA_FLAGS_HMAC;
419 }
420
421 return 0;
422}
423
424static int mtk_sha_xmit(struct mtk_cryp *cryp, struct mtk_sha_rec *sha,
425 dma_addr_t addr, size_t len)
426{
Ryder Leea87399622017-01-20 13:41:08 +0800427 struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req);
Ryder Lee785e5c62016-12-19 10:20:44 +0800428 struct mtk_ring *ring = cryp->ring[sha->id];
429 struct mtk_desc *cmd = ring->cmd_base + ring->pos;
430 struct mtk_desc *res = ring->res_base + ring->pos;
431 int err;
432
433 err = mtk_sha_info_map(cryp, sha, len);
434 if (err)
435 return err;
436
437 /* Fill in the command/result descriptors */
438 res->hdr = MTK_DESC_FIRST |
439 MTK_DESC_LAST |
440 MTK_DESC_BUF_LEN(len);
441
442 res->buf = cpu_to_le32(cryp->tmp_dma);
443
444 cmd->hdr = MTK_DESC_FIRST |
445 MTK_DESC_LAST |
446 MTK_DESC_BUF_LEN(len) |
Ryder Leea87399622017-01-20 13:41:08 +0800447 MTK_DESC_CT_LEN(ctx->ct_size);
Ryder Lee785e5c62016-12-19 10:20:44 +0800448
449 cmd->buf = cpu_to_le32(addr);
Ryder Leea87399622017-01-20 13:41:08 +0800450 cmd->ct = cpu_to_le32(ctx->ct_dma);
451 cmd->ct_hdr = ctx->ct_hdr;
452 cmd->tfm = cpu_to_le32(ctx->tfm_dma);
Ryder Lee785e5c62016-12-19 10:20:44 +0800453
454 if (++ring->pos == MTK_DESC_NUM)
455 ring->pos = 0;
456
457 /*
458 * Make sure that all changes to the DMA ring are done before we
459 * start engine.
460 */
461 wmb();
462 /* Start DMA transfer */
463 mtk_sha_write(cryp, RDR_PREP_COUNT(sha->id), MTK_DESC_CNT(1));
464 mtk_sha_write(cryp, CDR_PREP_COUNT(sha->id), MTK_DESC_CNT(1));
465
466 return -EINPROGRESS;
467}
468
469static int mtk_sha_xmit2(struct mtk_cryp *cryp,
470 struct mtk_sha_rec *sha,
471 struct mtk_sha_reqctx *ctx,
472 size_t len1, size_t len2)
473{
474 struct mtk_ring *ring = cryp->ring[sha->id];
475 struct mtk_desc *cmd = ring->cmd_base + ring->pos;
476 struct mtk_desc *res = ring->res_base + ring->pos;
477 int err;
478
479 err = mtk_sha_info_map(cryp, sha, len1 + len2);
480 if (err)
481 return err;
482
483 /* Fill in the command/result descriptors */
484 res->hdr = MTK_DESC_BUF_LEN(len1) | MTK_DESC_FIRST;
485 res->buf = cpu_to_le32(cryp->tmp_dma);
486
487 cmd->hdr = MTK_DESC_BUF_LEN(len1) |
488 MTK_DESC_FIRST |
Ryder Leea87399622017-01-20 13:41:08 +0800489 MTK_DESC_CT_LEN(ctx->ct_size);
Ryder Lee785e5c62016-12-19 10:20:44 +0800490 cmd->buf = cpu_to_le32(sg_dma_address(ctx->sg));
Ryder Leea87399622017-01-20 13:41:08 +0800491 cmd->ct = cpu_to_le32(ctx->ct_dma);
492 cmd->ct_hdr = ctx->ct_hdr;
493 cmd->tfm = cpu_to_le32(ctx->tfm_dma);
Ryder Lee785e5c62016-12-19 10:20:44 +0800494
495 if (++ring->pos == MTK_DESC_NUM)
496 ring->pos = 0;
497
498 cmd = ring->cmd_base + ring->pos;
499 res = ring->res_base + ring->pos;
500
501 res->hdr = MTK_DESC_BUF_LEN(len2) | MTK_DESC_LAST;
502 res->buf = cpu_to_le32(cryp->tmp_dma);
503
504 cmd->hdr = MTK_DESC_BUF_LEN(len2) | MTK_DESC_LAST;
505 cmd->buf = cpu_to_le32(ctx->dma_addr);
506
507 if (++ring->pos == MTK_DESC_NUM)
508 ring->pos = 0;
509
510 /*
511 * Make sure that all changes to the DMA ring are done before we
512 * start engine.
513 */
514 wmb();
515 /* Start DMA transfer */
516 mtk_sha_write(cryp, RDR_PREP_COUNT(sha->id), MTK_DESC_CNT(2));
517 mtk_sha_write(cryp, CDR_PREP_COUNT(sha->id), MTK_DESC_CNT(2));
518
519 return -EINPROGRESS;
520}
521
522static int mtk_sha_dma_map(struct mtk_cryp *cryp,
523 struct mtk_sha_rec *sha,
524 struct mtk_sha_reqctx *ctx,
525 size_t count)
526{
527 ctx->dma_addr = dma_map_single(cryp->dev, ctx->buffer,
528 SHA_BUF_SIZE, DMA_TO_DEVICE);
529 if (unlikely(dma_mapping_error(cryp->dev, ctx->dma_addr))) {
530 dev_err(cryp->dev, "dma map error\n");
531 return -EINVAL;
532 }
533
534 ctx->flags &= ~SHA_FLAGS_SG;
535
536 return mtk_sha_xmit(cryp, sha, ctx->dma_addr, count);
537}
538
539static int mtk_sha_update_slow(struct mtk_cryp *cryp,
540 struct mtk_sha_rec *sha)
541{
542 struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req);
543 size_t count;
544 u32 final;
545
546 mtk_sha_append_sg(ctx);
547
548 final = (ctx->flags & SHA_FLAGS_FINUP) && !ctx->total;
549
Arnd Bergmann41e05322017-01-11 14:55:20 +0100550 dev_dbg(cryp->dev, "slow: bufcnt: %zu\n", ctx->bufcnt);
Ryder Lee785e5c62016-12-19 10:20:44 +0800551
552 if (final) {
553 sha->flags |= SHA_FLAGS_FINAL;
554 mtk_sha_fill_padding(ctx, 0);
555 }
556
557 if (final || (ctx->bufcnt == SHA_BUF_SIZE && ctx->total)) {
558 count = ctx->bufcnt;
559 ctx->bufcnt = 0;
560
561 return mtk_sha_dma_map(cryp, sha, ctx, count);
562 }
563 return 0;
564}
565
566static int mtk_sha_update_start(struct mtk_cryp *cryp,
567 struct mtk_sha_rec *sha)
568{
569 struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req);
570 u32 len, final, tail;
571 struct scatterlist *sg;
572
573 if (!ctx->total)
574 return 0;
575
576 if (ctx->bufcnt || ctx->offset)
577 return mtk_sha_update_slow(cryp, sha);
578
579 sg = ctx->sg;
580
581 if (!IS_ALIGNED(sg->offset, sizeof(u32)))
582 return mtk_sha_update_slow(cryp, sha);
583
584 if (!sg_is_last(sg) && !IS_ALIGNED(sg->length, ctx->bs))
585 /* size is not ctx->bs aligned */
586 return mtk_sha_update_slow(cryp, sha);
587
588 len = min(ctx->total, sg->length);
589
590 if (sg_is_last(sg)) {
591 if (!(ctx->flags & SHA_FLAGS_FINUP)) {
592 /* not last sg must be ctx->bs aligned */
593 tail = len & (ctx->bs - 1);
594 len -= tail;
595 }
596 }
597
598 ctx->total -= len;
599 ctx->offset = len; /* offset where to start slow */
600
601 final = (ctx->flags & SHA_FLAGS_FINUP) && !ctx->total;
602
603 /* Add padding */
604 if (final) {
605 size_t count;
606
607 tail = len & (ctx->bs - 1);
608 len -= tail;
609 ctx->total += tail;
610 ctx->offset = len; /* offset where to start slow */
611
612 sg = ctx->sg;
613 mtk_sha_append_sg(ctx);
614 mtk_sha_fill_padding(ctx, len);
615
616 ctx->dma_addr = dma_map_single(cryp->dev, ctx->buffer,
617 SHA_BUF_SIZE, DMA_TO_DEVICE);
618 if (unlikely(dma_mapping_error(cryp->dev, ctx->dma_addr))) {
619 dev_err(cryp->dev, "dma map bytes error\n");
620 return -EINVAL;
621 }
622
623 sha->flags |= SHA_FLAGS_FINAL;
624 count = ctx->bufcnt;
625 ctx->bufcnt = 0;
626
627 if (len == 0) {
628 ctx->flags &= ~SHA_FLAGS_SG;
629 return mtk_sha_xmit(cryp, sha, ctx->dma_addr, count);
630
631 } else {
632 ctx->sg = sg;
633 if (!dma_map_sg(cryp->dev, ctx->sg, 1, DMA_TO_DEVICE)) {
634 dev_err(cryp->dev, "dma_map_sg error\n");
635 return -EINVAL;
636 }
637
638 ctx->flags |= SHA_FLAGS_SG;
639 return mtk_sha_xmit2(cryp, sha, ctx, len, count);
640 }
641 }
642
643 if (!dma_map_sg(cryp->dev, ctx->sg, 1, DMA_TO_DEVICE)) {
644 dev_err(cryp->dev, "dma_map_sg error\n");
645 return -EINVAL;
646 }
647
648 ctx->flags |= SHA_FLAGS_SG;
649
650 return mtk_sha_xmit(cryp, sha, sg_dma_address(ctx->sg), len);
651}
652
653static int mtk_sha_final_req(struct mtk_cryp *cryp,
654 struct mtk_sha_rec *sha)
655{
656 struct ahash_request *req = sha->req;
657 struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
658 size_t count;
659
660 mtk_sha_fill_padding(ctx, 0);
661
662 sha->flags |= SHA_FLAGS_FINAL;
663 count = ctx->bufcnt;
664 ctx->bufcnt = 0;
665
666 return mtk_sha_dma_map(cryp, sha, ctx, count);
667}
668
669/* Copy ready hash (+ finalize hmac) */
670static int mtk_sha_finish(struct ahash_request *req)
671{
672 struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
673 u32 *digest = ctx->info.tfm.digest;
674 u32 *result = (u32 *)req->result;
675 int i;
676
677 /* Get the hash from the digest buffer */
678 for (i = 0; i < SIZE_IN_WORDS(ctx->ds); i++)
679 result[i] = le32_to_cpu(digest[i]);
680
681 if (ctx->flags & SHA_FLAGS_HMAC)
682 return mtk_sha_finish_hmac(req);
683
684 return 0;
685}
686
687static void mtk_sha_finish_req(struct mtk_cryp *cryp,
688 struct mtk_sha_rec *sha, int err)
689{
690 if (likely(!err && (SHA_FLAGS_FINAL & sha->flags)))
691 err = mtk_sha_finish(sha->req);
692
693 sha->flags &= ~(SHA_FLAGS_BUSY | SHA_FLAGS_FINAL);
694
695 sha->req->base.complete(&sha->req->base, err);
696
697 /* Handle new request */
698 mtk_sha_handle_queue(cryp, sha->id - RING2, NULL);
699}
700
701static int mtk_sha_handle_queue(struct mtk_cryp *cryp, u8 id,
702 struct ahash_request *req)
703{
704 struct mtk_sha_rec *sha = cryp->sha[id];
705 struct crypto_async_request *async_req, *backlog;
706 struct mtk_sha_reqctx *ctx;
707 unsigned long flags;
708 int err = 0, ret = 0;
709
710 spin_lock_irqsave(&sha->lock, flags);
711 if (req)
712 ret = ahash_enqueue_request(&sha->queue, req);
713
714 if (SHA_FLAGS_BUSY & sha->flags) {
715 spin_unlock_irqrestore(&sha->lock, flags);
716 return ret;
717 }
718
719 backlog = crypto_get_backlog(&sha->queue);
720 async_req = crypto_dequeue_request(&sha->queue);
721 if (async_req)
722 sha->flags |= SHA_FLAGS_BUSY;
723 spin_unlock_irqrestore(&sha->lock, flags);
724
725 if (!async_req)
726 return ret;
727
728 if (backlog)
729 backlog->complete(backlog, -EINPROGRESS);
730
731 req = ahash_request_cast(async_req);
732 ctx = ahash_request_ctx(req);
733
734 sha->req = req;
Ryder Lee785e5c62016-12-19 10:20:44 +0800735
Ryder Leea87399622017-01-20 13:41:08 +0800736 mtk_sha_info_init(ctx);
Ryder Lee785e5c62016-12-19 10:20:44 +0800737
738 if (ctx->op == SHA_OP_UPDATE) {
739 err = mtk_sha_update_start(cryp, sha);
740 if (err != -EINPROGRESS && (ctx->flags & SHA_FLAGS_FINUP))
741 /* No final() after finup() */
742 err = mtk_sha_final_req(cryp, sha);
743 } else if (ctx->op == SHA_OP_FINAL) {
744 err = mtk_sha_final_req(cryp, sha);
745 }
746
747 if (unlikely(err != -EINPROGRESS))
748 /* Task will not finish it, so do it here */
749 mtk_sha_finish_req(cryp, sha, err);
750
751 return ret;
752}
753
754static int mtk_sha_enqueue(struct ahash_request *req, u32 op)
755{
756 struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
757 struct mtk_sha_ctx *tctx = crypto_tfm_ctx(req->base.tfm);
758
759 ctx->op = op;
760
761 return mtk_sha_handle_queue(tctx->cryp, tctx->id, req);
762}
763
764static void mtk_sha_unmap(struct mtk_cryp *cryp, struct mtk_sha_rec *sha)
765{
766 struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req);
767
Ryder Leea87399622017-01-20 13:41:08 +0800768 dma_unmap_single(cryp->dev, ctx->ct_dma, sizeof(ctx->info),
769 DMA_BIDIRECTIONAL);
Ryder Lee785e5c62016-12-19 10:20:44 +0800770
771 if (ctx->flags & SHA_FLAGS_SG) {
772 dma_unmap_sg(cryp->dev, ctx->sg, 1, DMA_TO_DEVICE);
773 if (ctx->sg->length == ctx->offset) {
774 ctx->sg = sg_next(ctx->sg);
775 if (ctx->sg)
776 ctx->offset = 0;
777 }
778 if (ctx->flags & SHA_FLAGS_PAD) {
779 dma_unmap_single(cryp->dev, ctx->dma_addr,
780 SHA_BUF_SIZE, DMA_TO_DEVICE);
781 }
782 } else
783 dma_unmap_single(cryp->dev, ctx->dma_addr,
784 SHA_BUF_SIZE, DMA_TO_DEVICE);
785}
786
787static void mtk_sha_complete(struct mtk_cryp *cryp,
788 struct mtk_sha_rec *sha)
789{
790 int err = 0;
791
792 err = mtk_sha_update_start(cryp, sha);
793 if (err != -EINPROGRESS)
794 mtk_sha_finish_req(cryp, sha, err);
795}
796
797static int mtk_sha_update(struct ahash_request *req)
798{
799 struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
800
801 ctx->total = req->nbytes;
802 ctx->sg = req->src;
803 ctx->offset = 0;
804
805 if ((ctx->bufcnt + ctx->total < SHA_BUF_SIZE) &&
806 !(ctx->flags & SHA_FLAGS_FINUP))
807 return mtk_sha_append_sg(ctx);
808
809 return mtk_sha_enqueue(req, SHA_OP_UPDATE);
810}
811
812static int mtk_sha_final(struct ahash_request *req)
813{
814 struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
815
816 ctx->flags |= SHA_FLAGS_FINUP;
817
818 if (ctx->flags & SHA_FLAGS_PAD)
819 return mtk_sha_finish(req);
820
821 return mtk_sha_enqueue(req, SHA_OP_FINAL);
822}
823
824static int mtk_sha_finup(struct ahash_request *req)
825{
826 struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
827 int err1, err2;
828
829 ctx->flags |= SHA_FLAGS_FINUP;
830
831 err1 = mtk_sha_update(req);
832 if (err1 == -EINPROGRESS || err1 == -EBUSY)
833 return err1;
834 /*
835 * final() has to be always called to cleanup resources
836 * even if update() failed
837 */
838 err2 = mtk_sha_final(req);
839
840 return err1 ?: err2;
841}
842
843static int mtk_sha_digest(struct ahash_request *req)
844{
845 return mtk_sha_init(req) ?: mtk_sha_finup(req);
846}
847
848static int mtk_sha_setkey(struct crypto_ahash *tfm,
849 const unsigned char *key, u32 keylen)
850{
851 struct mtk_sha_ctx *tctx = crypto_ahash_ctx(tfm);
852 struct mtk_sha_hmac_ctx *bctx = tctx->base;
853 size_t bs = crypto_shash_blocksize(bctx->shash);
854 size_t ds = crypto_shash_digestsize(bctx->shash);
855 int err, i;
856
857 SHASH_DESC_ON_STACK(shash, bctx->shash);
858
859 shash->tfm = bctx->shash;
860 shash->flags = crypto_shash_get_flags(bctx->shash) &
861 CRYPTO_TFM_REQ_MAY_SLEEP;
862
863 if (keylen > bs) {
864 err = crypto_shash_digest(shash, key, keylen, bctx->ipad);
865 if (err)
866 return err;
867 keylen = ds;
868 } else {
869 memcpy(bctx->ipad, key, keylen);
870 }
871
872 memset(bctx->ipad + keylen, 0, bs - keylen);
873 memcpy(bctx->opad, bctx->ipad, bs);
874
875 for (i = 0; i < bs; i++) {
876 bctx->ipad[i] ^= 0x36;
877 bctx->opad[i] ^= 0x5c;
878 }
879
Colin Ian Kingf2831482017-01-03 13:21:22 +0000880 return 0;
Ryder Lee785e5c62016-12-19 10:20:44 +0800881}
882
883static int mtk_sha_export(struct ahash_request *req, void *out)
884{
885 const struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
886
887 memcpy(out, ctx, sizeof(*ctx));
888 return 0;
889}
890
891static int mtk_sha_import(struct ahash_request *req, const void *in)
892{
893 struct mtk_sha_reqctx *ctx = ahash_request_ctx(req);
894
895 memcpy(ctx, in, sizeof(*ctx));
896 return 0;
897}
898
899static int mtk_sha_cra_init_alg(struct crypto_tfm *tfm,
900 const char *alg_base)
901{
902 struct mtk_sha_ctx *tctx = crypto_tfm_ctx(tfm);
903 struct mtk_cryp *cryp = NULL;
904
905 cryp = mtk_sha_find_dev(tctx);
906 if (!cryp)
907 return -ENODEV;
908
909 crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
910 sizeof(struct mtk_sha_reqctx));
911
912 if (alg_base) {
913 struct mtk_sha_hmac_ctx *bctx = tctx->base;
914
915 tctx->flags |= SHA_FLAGS_HMAC;
916 bctx->shash = crypto_alloc_shash(alg_base, 0,
917 CRYPTO_ALG_NEED_FALLBACK);
918 if (IS_ERR(bctx->shash)) {
919 pr_err("base driver %s could not be loaded.\n",
920 alg_base);
921
922 return PTR_ERR(bctx->shash);
923 }
924 }
925 return 0;
926}
927
928static int mtk_sha_cra_init(struct crypto_tfm *tfm)
929{
930 return mtk_sha_cra_init_alg(tfm, NULL);
931}
932
933static int mtk_sha_cra_sha1_init(struct crypto_tfm *tfm)
934{
935 return mtk_sha_cra_init_alg(tfm, "sha1");
936}
937
938static int mtk_sha_cra_sha224_init(struct crypto_tfm *tfm)
939{
940 return mtk_sha_cra_init_alg(tfm, "sha224");
941}
942
943static int mtk_sha_cra_sha256_init(struct crypto_tfm *tfm)
944{
945 return mtk_sha_cra_init_alg(tfm, "sha256");
946}
947
948static int mtk_sha_cra_sha384_init(struct crypto_tfm *tfm)
949{
950 return mtk_sha_cra_init_alg(tfm, "sha384");
951}
952
953static int mtk_sha_cra_sha512_init(struct crypto_tfm *tfm)
954{
955 return mtk_sha_cra_init_alg(tfm, "sha512");
956}
957
958static void mtk_sha_cra_exit(struct crypto_tfm *tfm)
959{
960 struct mtk_sha_ctx *tctx = crypto_tfm_ctx(tfm);
961
962 if (tctx->flags & SHA_FLAGS_HMAC) {
963 struct mtk_sha_hmac_ctx *bctx = tctx->base;
964
965 crypto_free_shash(bctx->shash);
966 }
967}
968
969static struct ahash_alg algs_sha1_sha224_sha256[] = {
970{
971 .init = mtk_sha_init,
972 .update = mtk_sha_update,
973 .final = mtk_sha_final,
974 .finup = mtk_sha_finup,
975 .digest = mtk_sha_digest,
976 .export = mtk_sha_export,
977 .import = mtk_sha_import,
978 .halg.digestsize = SHA1_DIGEST_SIZE,
979 .halg.statesize = sizeof(struct mtk_sha_reqctx),
980 .halg.base = {
981 .cra_name = "sha1",
982 .cra_driver_name = "mtk-sha1",
983 .cra_priority = 400,
984 .cra_flags = CRYPTO_ALG_ASYNC,
985 .cra_blocksize = SHA1_BLOCK_SIZE,
986 .cra_ctxsize = sizeof(struct mtk_sha_ctx),
987 .cra_alignmask = SHA_ALIGN_MSK,
988 .cra_module = THIS_MODULE,
989 .cra_init = mtk_sha_cra_init,
990 .cra_exit = mtk_sha_cra_exit,
991 }
992},
993{
994 .init = mtk_sha_init,
995 .update = mtk_sha_update,
996 .final = mtk_sha_final,
997 .finup = mtk_sha_finup,
998 .digest = mtk_sha_digest,
999 .export = mtk_sha_export,
1000 .import = mtk_sha_import,
1001 .halg.digestsize = SHA224_DIGEST_SIZE,
1002 .halg.statesize = sizeof(struct mtk_sha_reqctx),
1003 .halg.base = {
1004 .cra_name = "sha224",
1005 .cra_driver_name = "mtk-sha224",
1006 .cra_priority = 400,
1007 .cra_flags = CRYPTO_ALG_ASYNC,
1008 .cra_blocksize = SHA224_BLOCK_SIZE,
1009 .cra_ctxsize = sizeof(struct mtk_sha_ctx),
1010 .cra_alignmask = SHA_ALIGN_MSK,
1011 .cra_module = THIS_MODULE,
1012 .cra_init = mtk_sha_cra_init,
1013 .cra_exit = mtk_sha_cra_exit,
1014 }
1015},
1016{
1017 .init = mtk_sha_init,
1018 .update = mtk_sha_update,
1019 .final = mtk_sha_final,
1020 .finup = mtk_sha_finup,
1021 .digest = mtk_sha_digest,
1022 .export = mtk_sha_export,
1023 .import = mtk_sha_import,
1024 .halg.digestsize = SHA256_DIGEST_SIZE,
1025 .halg.statesize = sizeof(struct mtk_sha_reqctx),
1026 .halg.base = {
1027 .cra_name = "sha256",
1028 .cra_driver_name = "mtk-sha256",
1029 .cra_priority = 400,
1030 .cra_flags = CRYPTO_ALG_ASYNC,
1031 .cra_blocksize = SHA256_BLOCK_SIZE,
1032 .cra_ctxsize = sizeof(struct mtk_sha_ctx),
1033 .cra_alignmask = SHA_ALIGN_MSK,
1034 .cra_module = THIS_MODULE,
1035 .cra_init = mtk_sha_cra_init,
1036 .cra_exit = mtk_sha_cra_exit,
1037 }
1038},
1039{
1040 .init = mtk_sha_init,
1041 .update = mtk_sha_update,
1042 .final = mtk_sha_final,
1043 .finup = mtk_sha_finup,
1044 .digest = mtk_sha_digest,
1045 .export = mtk_sha_export,
1046 .import = mtk_sha_import,
1047 .setkey = mtk_sha_setkey,
1048 .halg.digestsize = SHA1_DIGEST_SIZE,
1049 .halg.statesize = sizeof(struct mtk_sha_reqctx),
1050 .halg.base = {
1051 .cra_name = "hmac(sha1)",
1052 .cra_driver_name = "mtk-hmac-sha1",
1053 .cra_priority = 400,
1054 .cra_flags = CRYPTO_ALG_ASYNC |
1055 CRYPTO_ALG_NEED_FALLBACK,
1056 .cra_blocksize = SHA1_BLOCK_SIZE,
1057 .cra_ctxsize = sizeof(struct mtk_sha_ctx) +
1058 sizeof(struct mtk_sha_hmac_ctx),
1059 .cra_alignmask = SHA_ALIGN_MSK,
1060 .cra_module = THIS_MODULE,
1061 .cra_init = mtk_sha_cra_sha1_init,
1062 .cra_exit = mtk_sha_cra_exit,
1063 }
1064},
1065{
1066 .init = mtk_sha_init,
1067 .update = mtk_sha_update,
1068 .final = mtk_sha_final,
1069 .finup = mtk_sha_finup,
1070 .digest = mtk_sha_digest,
1071 .export = mtk_sha_export,
1072 .import = mtk_sha_import,
1073 .setkey = mtk_sha_setkey,
1074 .halg.digestsize = SHA224_DIGEST_SIZE,
1075 .halg.statesize = sizeof(struct mtk_sha_reqctx),
1076 .halg.base = {
1077 .cra_name = "hmac(sha224)",
1078 .cra_driver_name = "mtk-hmac-sha224",
1079 .cra_priority = 400,
1080 .cra_flags = CRYPTO_ALG_ASYNC |
1081 CRYPTO_ALG_NEED_FALLBACK,
1082 .cra_blocksize = SHA224_BLOCK_SIZE,
1083 .cra_ctxsize = sizeof(struct mtk_sha_ctx) +
1084 sizeof(struct mtk_sha_hmac_ctx),
1085 .cra_alignmask = SHA_ALIGN_MSK,
1086 .cra_module = THIS_MODULE,
1087 .cra_init = mtk_sha_cra_sha224_init,
1088 .cra_exit = mtk_sha_cra_exit,
1089 }
1090},
1091{
1092 .init = mtk_sha_init,
1093 .update = mtk_sha_update,
1094 .final = mtk_sha_final,
1095 .finup = mtk_sha_finup,
1096 .digest = mtk_sha_digest,
1097 .export = mtk_sha_export,
1098 .import = mtk_sha_import,
1099 .setkey = mtk_sha_setkey,
1100 .halg.digestsize = SHA256_DIGEST_SIZE,
1101 .halg.statesize = sizeof(struct mtk_sha_reqctx),
1102 .halg.base = {
1103 .cra_name = "hmac(sha256)",
1104 .cra_driver_name = "mtk-hmac-sha256",
1105 .cra_priority = 400,
1106 .cra_flags = CRYPTO_ALG_ASYNC |
1107 CRYPTO_ALG_NEED_FALLBACK,
1108 .cra_blocksize = SHA256_BLOCK_SIZE,
1109 .cra_ctxsize = sizeof(struct mtk_sha_ctx) +
1110 sizeof(struct mtk_sha_hmac_ctx),
1111 .cra_alignmask = SHA_ALIGN_MSK,
1112 .cra_module = THIS_MODULE,
1113 .cra_init = mtk_sha_cra_sha256_init,
1114 .cra_exit = mtk_sha_cra_exit,
1115 }
1116},
1117};
1118
1119static struct ahash_alg algs_sha384_sha512[] = {
1120{
1121 .init = mtk_sha_init,
1122 .update = mtk_sha_update,
1123 .final = mtk_sha_final,
1124 .finup = mtk_sha_finup,
1125 .digest = mtk_sha_digest,
1126 .export = mtk_sha_export,
1127 .import = mtk_sha_import,
1128 .halg.digestsize = SHA384_DIGEST_SIZE,
1129 .halg.statesize = sizeof(struct mtk_sha_reqctx),
1130 .halg.base = {
1131 .cra_name = "sha384",
1132 .cra_driver_name = "mtk-sha384",
1133 .cra_priority = 400,
1134 .cra_flags = CRYPTO_ALG_ASYNC,
1135 .cra_blocksize = SHA384_BLOCK_SIZE,
1136 .cra_ctxsize = sizeof(struct mtk_sha_ctx),
1137 .cra_alignmask = SHA_ALIGN_MSK,
1138 .cra_module = THIS_MODULE,
1139 .cra_init = mtk_sha_cra_init,
1140 .cra_exit = mtk_sha_cra_exit,
1141 }
1142},
1143{
1144 .init = mtk_sha_init,
1145 .update = mtk_sha_update,
1146 .final = mtk_sha_final,
1147 .finup = mtk_sha_finup,
1148 .digest = mtk_sha_digest,
1149 .export = mtk_sha_export,
1150 .import = mtk_sha_import,
1151 .halg.digestsize = SHA512_DIGEST_SIZE,
1152 .halg.statesize = sizeof(struct mtk_sha_reqctx),
1153 .halg.base = {
1154 .cra_name = "sha512",
1155 .cra_driver_name = "mtk-sha512",
1156 .cra_priority = 400,
1157 .cra_flags = CRYPTO_ALG_ASYNC,
1158 .cra_blocksize = SHA512_BLOCK_SIZE,
1159 .cra_ctxsize = sizeof(struct mtk_sha_ctx),
1160 .cra_alignmask = SHA_ALIGN_MSK,
1161 .cra_module = THIS_MODULE,
1162 .cra_init = mtk_sha_cra_init,
1163 .cra_exit = mtk_sha_cra_exit,
1164 }
1165},
1166{
1167 .init = mtk_sha_init,
1168 .update = mtk_sha_update,
1169 .final = mtk_sha_final,
1170 .finup = mtk_sha_finup,
1171 .digest = mtk_sha_digest,
1172 .export = mtk_sha_export,
1173 .import = mtk_sha_import,
1174 .setkey = mtk_sha_setkey,
1175 .halg.digestsize = SHA384_DIGEST_SIZE,
1176 .halg.statesize = sizeof(struct mtk_sha_reqctx),
1177 .halg.base = {
1178 .cra_name = "hmac(sha384)",
1179 .cra_driver_name = "mtk-hmac-sha384",
1180 .cra_priority = 400,
1181 .cra_flags = CRYPTO_ALG_ASYNC |
1182 CRYPTO_ALG_NEED_FALLBACK,
1183 .cra_blocksize = SHA384_BLOCK_SIZE,
1184 .cra_ctxsize = sizeof(struct mtk_sha_ctx) +
1185 sizeof(struct mtk_sha_hmac_ctx),
1186 .cra_alignmask = SHA_ALIGN_MSK,
1187 .cra_module = THIS_MODULE,
1188 .cra_init = mtk_sha_cra_sha384_init,
1189 .cra_exit = mtk_sha_cra_exit,
1190 }
1191},
1192{
1193 .init = mtk_sha_init,
1194 .update = mtk_sha_update,
1195 .final = mtk_sha_final,
1196 .finup = mtk_sha_finup,
1197 .digest = mtk_sha_digest,
1198 .export = mtk_sha_export,
1199 .import = mtk_sha_import,
1200 .setkey = mtk_sha_setkey,
1201 .halg.digestsize = SHA512_DIGEST_SIZE,
1202 .halg.statesize = sizeof(struct mtk_sha_reqctx),
1203 .halg.base = {
1204 .cra_name = "hmac(sha512)",
1205 .cra_driver_name = "mtk-hmac-sha512",
1206 .cra_priority = 400,
1207 .cra_flags = CRYPTO_ALG_ASYNC |
1208 CRYPTO_ALG_NEED_FALLBACK,
1209 .cra_blocksize = SHA512_BLOCK_SIZE,
1210 .cra_ctxsize = sizeof(struct mtk_sha_ctx) +
1211 sizeof(struct mtk_sha_hmac_ctx),
1212 .cra_alignmask = SHA_ALIGN_MSK,
1213 .cra_module = THIS_MODULE,
1214 .cra_init = mtk_sha_cra_sha512_init,
1215 .cra_exit = mtk_sha_cra_exit,
1216 }
1217},
1218};
1219
1220static void mtk_sha_task0(unsigned long data)
1221{
1222 struct mtk_cryp *cryp = (struct mtk_cryp *)data;
1223 struct mtk_sha_rec *sha = cryp->sha[0];
1224
1225 mtk_sha_unmap(cryp, sha);
1226 mtk_sha_complete(cryp, sha);
1227}
1228
1229static void mtk_sha_task1(unsigned long data)
1230{
1231 struct mtk_cryp *cryp = (struct mtk_cryp *)data;
1232 struct mtk_sha_rec *sha = cryp->sha[1];
1233
1234 mtk_sha_unmap(cryp, sha);
1235 mtk_sha_complete(cryp, sha);
1236}
1237
1238static irqreturn_t mtk_sha_ring2_irq(int irq, void *dev_id)
1239{
1240 struct mtk_cryp *cryp = (struct mtk_cryp *)dev_id;
1241 struct mtk_sha_rec *sha = cryp->sha[0];
1242 u32 val = mtk_sha_read(cryp, RDR_STAT(RING2));
1243
1244 mtk_sha_write(cryp, RDR_STAT(RING2), val);
1245
1246 if (likely((SHA_FLAGS_BUSY & sha->flags))) {
1247 mtk_sha_write(cryp, RDR_PROC_COUNT(RING2), MTK_CNT_RST);
1248 mtk_sha_write(cryp, RDR_THRESH(RING2),
1249 MTK_RDR_PROC_THRESH | MTK_RDR_PROC_MODE);
1250
1251 tasklet_schedule(&sha->task);
1252 } else {
1253 dev_warn(cryp->dev, "AES interrupt when no active requests.\n");
1254 }
1255 return IRQ_HANDLED;
1256}
1257
1258static irqreturn_t mtk_sha_ring3_irq(int irq, void *dev_id)
1259{
1260 struct mtk_cryp *cryp = (struct mtk_cryp *)dev_id;
1261 struct mtk_sha_rec *sha = cryp->sha[1];
1262 u32 val = mtk_sha_read(cryp, RDR_STAT(RING3));
1263
1264 mtk_sha_write(cryp, RDR_STAT(RING3), val);
1265
1266 if (likely((SHA_FLAGS_BUSY & sha->flags))) {
1267 mtk_sha_write(cryp, RDR_PROC_COUNT(RING3), MTK_CNT_RST);
1268 mtk_sha_write(cryp, RDR_THRESH(RING3),
1269 MTK_RDR_PROC_THRESH | MTK_RDR_PROC_MODE);
1270
1271 tasklet_schedule(&sha->task);
1272 } else {
1273 dev_warn(cryp->dev, "AES interrupt when no active requests.\n");
1274 }
1275 return IRQ_HANDLED;
1276}
1277
1278/*
1279 * The purpose of two SHA records is used to get extra performance.
1280 * It is similar to mtk_aes_record_init().
1281 */
1282static int mtk_sha_record_init(struct mtk_cryp *cryp)
1283{
1284 struct mtk_sha_rec **sha = cryp->sha;
1285 int i, err = -ENOMEM;
1286
1287 for (i = 0; i < MTK_REC_NUM; i++) {
1288 sha[i] = kzalloc(sizeof(**sha), GFP_KERNEL);
1289 if (!sha[i])
1290 goto err_cleanup;
1291
1292 sha[i]->id = i + RING2;
1293
1294 spin_lock_init(&sha[i]->lock);
1295 crypto_init_queue(&sha[i]->queue, SHA_QUEUE_SIZE);
1296 }
1297
1298 tasklet_init(&sha[0]->task, mtk_sha_task0, (unsigned long)cryp);
1299 tasklet_init(&sha[1]->task, mtk_sha_task1, (unsigned long)cryp);
1300
1301 cryp->rec = 1;
1302
1303 return 0;
1304
1305err_cleanup:
1306 for (; i--; )
1307 kfree(sha[i]);
1308 return err;
1309}
1310
1311static void mtk_sha_record_free(struct mtk_cryp *cryp)
1312{
1313 int i;
1314
1315 for (i = 0; i < MTK_REC_NUM; i++) {
1316 tasklet_kill(&cryp->sha[i]->task);
1317 kfree(cryp->sha[i]);
1318 }
1319}
1320
1321static void mtk_sha_unregister_algs(void)
1322{
1323 int i;
1324
1325 for (i = 0; i < ARRAY_SIZE(algs_sha1_sha224_sha256); i++)
1326 crypto_unregister_ahash(&algs_sha1_sha224_sha256[i]);
1327
1328 for (i = 0; i < ARRAY_SIZE(algs_sha384_sha512); i++)
1329 crypto_unregister_ahash(&algs_sha384_sha512[i]);
1330}
1331
1332static int mtk_sha_register_algs(void)
1333{
1334 int err, i;
1335
1336 for (i = 0; i < ARRAY_SIZE(algs_sha1_sha224_sha256); i++) {
1337 err = crypto_register_ahash(&algs_sha1_sha224_sha256[i]);
1338 if (err)
1339 goto err_sha_224_256_algs;
1340 }
1341
1342 for (i = 0; i < ARRAY_SIZE(algs_sha384_sha512); i++) {
1343 err = crypto_register_ahash(&algs_sha384_sha512[i]);
1344 if (err)
1345 goto err_sha_384_512_algs;
1346 }
1347
1348 return 0;
1349
1350err_sha_384_512_algs:
1351 for (; i--; )
1352 crypto_unregister_ahash(&algs_sha384_sha512[i]);
1353 i = ARRAY_SIZE(algs_sha1_sha224_sha256);
1354err_sha_224_256_algs:
1355 for (; i--; )
1356 crypto_unregister_ahash(&algs_sha1_sha224_sha256[i]);
1357
1358 return err;
1359}
1360
1361int mtk_hash_alg_register(struct mtk_cryp *cryp)
1362{
1363 int err;
1364
1365 INIT_LIST_HEAD(&cryp->sha_list);
1366
1367 /* Initialize two hash records */
1368 err = mtk_sha_record_init(cryp);
1369 if (err)
1370 goto err_record;
1371
1372 /* Ring2 is use by SHA record0 */
1373 err = devm_request_irq(cryp->dev, cryp->irq[RING2],
1374 mtk_sha_ring2_irq, IRQF_TRIGGER_LOW,
1375 "mtk-sha", cryp);
1376 if (err) {
1377 dev_err(cryp->dev, "unable to request sha irq0.\n");
1378 goto err_res;
1379 }
1380
1381 /* Ring3 is use by SHA record1 */
1382 err = devm_request_irq(cryp->dev, cryp->irq[RING3],
1383 mtk_sha_ring3_irq, IRQF_TRIGGER_LOW,
1384 "mtk-sha", cryp);
1385 if (err) {
1386 dev_err(cryp->dev, "unable to request sha irq1.\n");
1387 goto err_res;
1388 }
1389
1390 /* Enable ring2 and ring3 interrupt for hash */
1391 mtk_sha_write(cryp, AIC_ENABLE_SET(RING2), MTK_IRQ_RDR2);
1392 mtk_sha_write(cryp, AIC_ENABLE_SET(RING3), MTK_IRQ_RDR3);
1393
1394 cryp->tmp = dma_alloc_coherent(cryp->dev, SHA_TMP_BUF_SIZE,
1395 &cryp->tmp_dma, GFP_KERNEL);
1396 if (!cryp->tmp) {
1397 dev_err(cryp->dev, "unable to allocate tmp buffer.\n");
1398 err = -EINVAL;
1399 goto err_res;
1400 }
1401
1402 spin_lock(&mtk_sha.lock);
1403 list_add_tail(&cryp->sha_list, &mtk_sha.dev_list);
1404 spin_unlock(&mtk_sha.lock);
1405
1406 err = mtk_sha_register_algs();
1407 if (err)
1408 goto err_algs;
1409
1410 return 0;
1411
1412err_algs:
1413 spin_lock(&mtk_sha.lock);
1414 list_del(&cryp->sha_list);
1415 spin_unlock(&mtk_sha.lock);
1416 dma_free_coherent(cryp->dev, SHA_TMP_BUF_SIZE,
1417 cryp->tmp, cryp->tmp_dma);
1418err_res:
1419 mtk_sha_record_free(cryp);
1420err_record:
1421
1422 dev_err(cryp->dev, "mtk-sha initialization failed.\n");
1423 return err;
1424}
1425
1426void mtk_hash_alg_release(struct mtk_cryp *cryp)
1427{
1428 spin_lock(&mtk_sha.lock);
1429 list_del(&cryp->sha_list);
1430 spin_unlock(&mtk_sha.lock);
1431
1432 mtk_sha_unregister_algs();
1433 dma_free_coherent(cryp->dev, SHA_TMP_BUF_SIZE,
1434 cryp->tmp, cryp->tmp_dma);
1435 mtk_sha_record_free(cryp);
1436}