Kevin Wells | 19d95e1 | 2010-07-27 08:44:37 -0700 | [diff] [blame] | 1 | /* |
Roland Stigge | f5c4227 | 2012-04-22 12:01:19 +0200 | [diff] [blame] | 2 | * Platform support for LPC32xx SoC |
Kevin Wells | 19d95e1 | 2010-07-27 08:44:37 -0700 | [diff] [blame] | 3 | * |
| 4 | * Author: Kevin Wells <kevin.wells@nxp.com> |
| 5 | * |
Roland Stigge | f5c4227 | 2012-04-22 12:01:19 +0200 | [diff] [blame] | 6 | * Copyright (C) 2012 Roland Stigge <stigge@antcom.de> |
Kevin Wells | 19d95e1 | 2010-07-27 08:44:37 -0700 | [diff] [blame] | 7 | * Copyright (C) 2010 NXP Semiconductors |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | */ |
| 19 | |
Roland Stigge | 291dd71 | 2012-06-14 16:16:17 +0200 | [diff] [blame] | 20 | #include <linux/amba/pl08x.h> |
Roland Stigge | 5b94123 | 2012-09-06 11:39:18 +0200 | [diff] [blame] | 21 | #include <linux/mtd/lpc32xx_mlc.h> |
Vladimir Zapolskiy | a1e65c2 | 2019-04-19 22:55:26 +0300 | [diff] [blame^] | 22 | #include <linux/mtd/lpc32xx_slc.h> |
| 23 | #include <linux/of_platform.h> |
Kevin Wells | 19d95e1 | 2010-07-27 08:44:37 -0700 | [diff] [blame] | 24 | |
Kevin Wells | 19d95e1 | 2010-07-27 08:44:37 -0700 | [diff] [blame] | 25 | #include <asm/mach/arch.h> |
Kevin Wells | 19d95e1 | 2010-07-27 08:44:37 -0700 | [diff] [blame] | 26 | #include "common.h" |
| 27 | |
Roland Stigge | d807af4 | 2012-06-14 16:16:17 +0200 | [diff] [blame] | 28 | static struct pl08x_channel_data pl08x_slave_channels[] = { |
| 29 | { |
| 30 | .bus_id = "nand-slc", |
| 31 | .min_signal = 1, /* SLC NAND Flash */ |
| 32 | .max_signal = 1, |
| 33 | .periph_buses = PL08X_AHB1, |
| 34 | }, |
| 35 | { |
| 36 | .bus_id = "nand-mlc", |
| 37 | .min_signal = 12, /* MLC NAND Flash */ |
| 38 | .max_signal = 12, |
| 39 | .periph_buses = PL08X_AHB1, |
| 40 | }, |
| 41 | }; |
| 42 | |
Roland Stigge | 8ba85f8 | 2012-07-12 14:01:04 +0200 | [diff] [blame] | 43 | static int pl08x_get_signal(const struct pl08x_channel_data *cd) |
Roland Stigge | d807af4 | 2012-06-14 16:16:17 +0200 | [diff] [blame] | 44 | { |
Roland Stigge | 8ba85f8 | 2012-07-12 14:01:04 +0200 | [diff] [blame] | 45 | return cd->min_signal; |
Roland Stigge | d807af4 | 2012-06-14 16:16:17 +0200 | [diff] [blame] | 46 | } |
| 47 | |
Roland Stigge | 8ba85f8 | 2012-07-12 14:01:04 +0200 | [diff] [blame] | 48 | static void pl08x_put_signal(const struct pl08x_channel_data *cd, int ch) |
Roland Stigge | d807af4 | 2012-06-14 16:16:17 +0200 | [diff] [blame] | 49 | { |
| 50 | } |
| 51 | |
Roland Stigge | f5c4227 | 2012-04-22 12:01:19 +0200 | [diff] [blame] | 52 | static struct pl08x_platform_data pl08x_pd = { |
Linus Walleij | 4166a56 | 2017-05-20 23:42:50 +0200 | [diff] [blame] | 53 | /* Some reasonable memcpy defaults */ |
| 54 | .memcpy_burst_size = PL08X_BURST_SZ_256, |
| 55 | .memcpy_bus_width = PL08X_BUS_WIDTH_32_BITS, |
Roland Stigge | d807af4 | 2012-06-14 16:16:17 +0200 | [diff] [blame] | 56 | .slave_channels = &pl08x_slave_channels[0], |
| 57 | .num_slave_channels = ARRAY_SIZE(pl08x_slave_channels), |
Mark Brown | d7cabee | 2013-06-19 20:38:28 +0100 | [diff] [blame] | 58 | .get_xfer_signal = pl08x_get_signal, |
| 59 | .put_xfer_signal = pl08x_put_signal, |
Roland Stigge | d807af4 | 2012-06-14 16:16:17 +0200 | [diff] [blame] | 60 | .lli_buses = PL08X_AHB1, |
| 61 | .mem_buses = PL08X_AHB1, |
Kevin Wells | 19d95e1 | 2010-07-27 08:44:37 -0700 | [diff] [blame] | 62 | }; |
| 63 | |
Roland Stigge | 5b94123 | 2012-09-06 11:39:18 +0200 | [diff] [blame] | 64 | static struct lpc32xx_slc_platform_data lpc32xx_slc_data = { |
| 65 | .dma_filter = pl08x_filter_id, |
| 66 | }; |
| 67 | |
| 68 | static struct lpc32xx_mlc_platform_data lpc32xx_mlc_data = { |
| 69 | .dma_filter = pl08x_filter_id, |
| 70 | }; |
| 71 | |
Vladimir Zapolskiy | 71d42e9 | 2016-04-18 04:37:38 +0300 | [diff] [blame] | 72 | static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = { |
Roland Stigge | a4bc787 | 2012-09-25 10:15:49 +0200 | [diff] [blame] | 73 | OF_DEV_AUXDATA("arm,pl022", 0x20084000, "dev:ssp0", NULL), |
| 74 | OF_DEV_AUXDATA("arm,pl022", 0x2008C000, "dev:ssp1", NULL), |
Roland Stigge | f5c4227 | 2012-04-22 12:01:19 +0200 | [diff] [blame] | 75 | OF_DEV_AUXDATA("arm,pl080", 0x31000000, "pl08xdmac", &pl08x_pd), |
Roland Stigge | 5b94123 | 2012-09-06 11:39:18 +0200 | [diff] [blame] | 76 | OF_DEV_AUXDATA("nxp,lpc3220-slc", 0x20020000, "20020000.flash", |
| 77 | &lpc32xx_slc_data), |
| 78 | OF_DEV_AUXDATA("nxp,lpc3220-mlc", 0x200a8000, "200a8000.flash", |
| 79 | &lpc32xx_mlc_data), |
Roland Stigge | f5c4227 | 2012-04-22 12:01:19 +0200 | [diff] [blame] | 80 | { } |
Kevin Wells | 19d95e1 | 2010-07-27 08:44:37 -0700 | [diff] [blame] | 81 | }; |
| 82 | |
Roland Stigge | f5c4227 | 2012-04-22 12:01:19 +0200 | [diff] [blame] | 83 | static void __init lpc3250_machine_init(void) |
Kevin Wells | 19d95e1 | 2010-07-27 08:44:37 -0700 | [diff] [blame] | 84 | { |
Kevin Wells | 19d95e1 | 2010-07-27 08:44:37 -0700 | [diff] [blame] | 85 | lpc32xx_serial_init(); |
| 86 | |
Kefeng Wang | 435ebcb | 2016-06-01 14:53:05 +0800 | [diff] [blame] | 87 | of_platform_default_populate(NULL, lpc32xx_auxdata_lookup, NULL); |
Kevin Wells | 19d95e1 | 2010-07-27 08:44:37 -0700 | [diff] [blame] | 88 | } |
| 89 | |
Nicolas Pitre | 19c233b | 2015-07-27 18:27:52 -0400 | [diff] [blame] | 90 | static const char *const lpc32xx_dt_compat[] __initconst = { |
Roland Stigge | f5c4227 | 2012-04-22 12:01:19 +0200 | [diff] [blame] | 91 | "nxp,lpc3220", |
| 92 | "nxp,lpc3230", |
| 93 | "nxp,lpc3240", |
| 94 | "nxp,lpc3250", |
| 95 | NULL |
| 96 | }; |
| 97 | |
| 98 | DT_MACHINE_START(LPC32XX_DT, "LPC32XX SoC (Flattened Device Tree)") |
Nicolas Pitre | bdec5dd | 2011-07-05 22:38:14 -0400 | [diff] [blame] | 99 | .atag_offset = 0x100, |
Kevin Wells | 19d95e1 | 2010-07-27 08:44:37 -0700 | [diff] [blame] | 100 | .map_io = lpc32xx_map_io, |
Roland Stigge | f5c4227 | 2012-04-22 12:01:19 +0200 | [diff] [blame] | 101 | .init_machine = lpc3250_machine_init, |
| 102 | .dt_compat = lpc32xx_dt_compat, |
Kevin Wells | 19d95e1 | 2010-07-27 08:44:37 -0700 | [diff] [blame] | 103 | MACHINE_END |