blob: 3ad915f3737600db94e5bfacfd1e286d0a412b9c [file] [log] [blame]
David Lechner9ab11022018-03-15 21:52:30 -05001// SPDX-License-Identifier: GPL-2.0
2/*
3 * PSC clock descriptions for TI DaVinci DM365
4 *
5 * Copyright (C) 2018 David Lechner <david@lechnology.com>
6 */
7
8#include <linux/clk-provider.h>
9#include <linux/clk.h>
10#include <linux/clkdev.h>
11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <linux/types.h>
14
15#include "psc.h"
16
17LPSC_CLKDEV1(vpss_slave_clkdev, "slave", "vpss");
18LPSC_CLKDEV1(spi1_clkdev, NULL, "spi_davinci.1");
19LPSC_CLKDEV1(mmcsd1_clkdev, NULL, "da830-mmc.1");
20LPSC_CLKDEV1(asp0_clkdev, NULL, "davinci-mcbsp");
21LPSC_CLKDEV1(usb_clkdev, "usb", NULL);
22LPSC_CLKDEV1(spi2_clkdev, NULL, "spi_davinci.2");
23LPSC_CLKDEV1(aemif_clkdev, "aemif", NULL);
24LPSC_CLKDEV1(mmcsd0_clkdev, NULL, "da830-mmc.0");
25LPSC_CLKDEV1(i2c_clkdev, NULL, "i2c_davinci.1");
26LPSC_CLKDEV1(uart0_clkdev, NULL, "serial8250.0");
27LPSC_CLKDEV1(uart1_clkdev, NULL, "serial8250.1");
28LPSC_CLKDEV1(spi0_clkdev, NULL, "spi_davinci.0");
29/* REVISIT: gpio-davinci.c should be modified to drop con_id */
30LPSC_CLKDEV1(gpio_clkdev, "gpio", NULL);
31LPSC_CLKDEV1(timer0_clkdev, "timer0", NULL);
32LPSC_CLKDEV1(timer2_clkdev, NULL, "davinci-wdt");
33LPSC_CLKDEV1(spi3_clkdev, NULL, "spi_davinci.3");
34LPSC_CLKDEV1(spi4_clkdev, NULL, "spi_davinci.4");
35LPSC_CLKDEV2(emac_clkdev, NULL, "davinci_emac.1",
36 "fck", "davinci_mdio.0");
37LPSC_CLKDEV1(voice_codec_clkdev, NULL, "davinci_voicecodec");
38LPSC_CLKDEV1(vpss_dac_clkdev, "vpss_dac", NULL);
39LPSC_CLKDEV1(vpss_master_clkdev, "master", "vpss");
40
41static const struct davinci_lpsc_clk_info dm365_psc_info[] = {
42 LPSC(1, 0, vpss_slave, pll1_sysclk5, vpss_slave_clkdev, 0),
43 LPSC(5, 0, timer3, pll1_auxclk, NULL, 0),
44 LPSC(6, 0, spi1, pll1_sysclk4, spi1_clkdev, 0),
45 LPSC(7, 0, mmcsd1, pll1_sysclk4, mmcsd1_clkdev, 0),
46 LPSC(8, 0, asp0, pll1_sysclk4, asp0_clkdev, 0),
47 LPSC(9, 0, usb, pll1_auxclk, usb_clkdev, 0),
48 LPSC(10, 0, pwm3, pll1_auxclk, NULL, 0),
49 LPSC(11, 0, spi2, pll1_sysclk4, spi2_clkdev, 0),
50 LPSC(12, 0, rto, pll1_sysclk4, NULL, 0),
51 LPSC(14, 0, aemif, pll1_sysclk4, aemif_clkdev, 0),
52 LPSC(15, 0, mmcsd0, pll1_sysclk8, mmcsd0_clkdev, 0),
53 LPSC(18, 0, i2c, pll1_auxclk, i2c_clkdev, 0),
54 LPSC(19, 0, uart0, pll1_auxclk, uart0_clkdev, 0),
55 LPSC(20, 0, uart1, pll1_sysclk4, uart1_clkdev, 0),
56 LPSC(22, 0, spi0, pll1_sysclk4, spi0_clkdev, 0),
57 LPSC(23, 0, pwm0, pll1_auxclk, NULL, 0),
58 LPSC(24, 0, pwm1, pll1_auxclk, NULL, 0),
59 LPSC(25, 0, pwm2, pll1_auxclk, NULL, 0),
60 LPSC(26, 0, gpio, pll1_sysclk4, gpio_clkdev, 0),
61 LPSC(27, 0, timer0, pll1_auxclk, timer0_clkdev, LPSC_ALWAYS_ENABLED),
62 LPSC(28, 0, timer1, pll1_auxclk, NULL, 0),
63 /* REVISIT: why can't this be disabled? */
64 LPSC(29, 0, timer2, pll1_auxclk, timer2_clkdev, LPSC_ALWAYS_ENABLED),
65 LPSC(31, 0, arm, pll2_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
66 LPSC(38, 0, spi3, pll1_sysclk4, spi3_clkdev, 0),
67 LPSC(39, 0, spi4, pll1_auxclk, spi4_clkdev, 0),
68 LPSC(40, 0, emac, pll2_sysclk4, emac_clkdev, 0),
69 LPSC(44, 1, voice_codec, pll1_sysclk3, voice_codec_clkdev, 0),
70 LPSC(46, 1, vpss_dac, pll1_sysclk3, vpss_dac_clkdev, 0),
71 LPSC(47, 0, vpss_master, pll1_sysclk5, vpss_master_clkdev, 0),
72 LPSC(50, 0, mjcp, pll1_sysclk3, NULL, 0),
73 { }
74};
75
76static int dm365_psc_init(struct device *dev, void __iomem *base)
77{
78 return davinci_psc_register_clocks(dev, dm365_psc_info, 52, base);
79}
80
81static struct clk_bulk_data dm365_psc_parent_clks[] = {
82 { .id = "pll1_sysclk1" },
83 { .id = "pll1_sysclk3" },
84 { .id = "pll1_sysclk4" },
85 { .id = "pll1_sysclk5" },
86 { .id = "pll1_sysclk8" },
87 { .id = "pll2_sysclk2" },
88 { .id = "pll2_sysclk4" },
89 { .id = "pll1_auxclk" },
90};
91
92const struct davinci_psc_init_data dm365_psc_init_data = {
93 .parent_clks = dm365_psc_parent_clks,
94 .num_parent_clks = ARRAY_SIZE(dm365_psc_parent_clks),
95 .psc_init = &dm365_psc_init,
96};