blob: f057e0341c86901a5d868fa76cb3e12d14e446ab [file] [log] [blame]
Paul Kocialkowski999400d2016-02-28 13:39:41 +01001/*
2 * Copyright (C) 2015-2016 Paul Kocialkowski <contact@paulk.fr>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10#include "omap36xx.dtsi"
11
12/ {
13 model = "LG Optimus Black";
14 compatible = "lg,omap3-sniper", "ti,omap36xx", "ti,omap3";
15
16 cpus {
17 cpu@0 {
18 cpu0-supply = <&vcc>;
19 };
20 };
21
22 memory {
23 device_type = "memory";
24 reg = <0x80000000 0x20000000>; /* 512 MB */
25 };
26};
27
28&omap3_pmx_core {
29 pinctrl-names = "default";
30
31 uart3_pins: pinmux_uart3_pins {
32 pinctrl-single,pins = <
33 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx */
34 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx */
35 >;
36 };
37
38 dp3t_sel_pins: pinmux_dp3t_sel_pins {
39 pinctrl-single,pins = <
40 OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE4) /* gpio_161 */
41 OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* gpio_162 */
42 >;
43 };
44
45 i2c1_pins: pinmux_i2c1_pins {
46 pinctrl-single,pins = <
47 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl */
48 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda */
49 >;
50 };
51
52 i2c2_pins: pinmux_i2c2_pins {
53 pinctrl-single,pins = <
54 OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
55 OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
56 >;
57 };
58
59 i2c3_pins: pinmux_i2c3_pins {
60 pinctrl-single,pins = <
61 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */
62 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */
63 >;
64 };
65
66 lp8720_en_pin: pinmux_lp8720_en_pin {
67 pinctrl-single,pins = <
68 OMAP3_CORE1_IOPAD(0x2080, PIN_OUTPUT | MUX_MODE4) /* gpio_37 */
69 >;
70 };
71
72 mmc1_pins: pinmux_mmc1_pins {
73 pinctrl-single,pins = <
74 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT | MUX_MODE0) /* sdmmc1_clk */
75 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT | MUX_MODE0) /* sdmmc1_cmd */
76 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat0 */
77 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat1 */
78 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat2 */
79 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat3 */
80 >;
81 };
82
83 mmc2_pins: pinmux_mmc2_pins {
84 pinctrl-single,pins = <
85 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT | MUX_MODE0) /* sdmmc2_clk */
86 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT | MUX_MODE0) /* sdmmc2_cmd */
87 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat0 */
88 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat1 */
89 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat2 */
90 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat3 */
91 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat4 */
92 OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat5 */
93 OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat6 */
94 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat7 */
95 >;
96 };
97};
98
99&omap3_pmx_wkup {
100 pinctrl-names = "default";
101
102 mmc1_cd_pin: pinmux_mmc1_cd_pin {
103 pinctrl-single,pins = <
104 OMAP3_WKUP_IOPAD(0x2a1a, PIN_INPUT | MUX_MODE4) /* gpio_10 */
105 >;
106 };
107};
108
109&gpio2 {
110 ti,no-reset-on-init;
111};
112
113&gpio5 {
114 ti,no-reset-on-init;
115};
116
117&gpio6 {
118 ti,no-reset-on-init;
119};
120
121&uart3 {
122 pinctrl-names = "default";
123 pinctrl-0 = <&uart3_pins &dp3t_sel_pins>;
124
125 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
126};
127
128&i2c1 {
129 pinctrl-names = "default";
130 pinctrl-0 = <&i2c1_pins>;
131
132 clock-frequency = <2600000>;
133
134 twl: twl@48 {
135 reg = <0x48>;
136 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
137 interrupt-parent = <&intc>;
138
139 power {
140 compatible = "ti,twl4030-power";
141 ti,use_poweroff;
142 };
143 };
144};
145
146&i2c2 {
147 pinctrl-names = "default";
148 pinctrl-0 = <&i2c2_pins>;
149
150 clock-frequency = <400000>;
151};
152
153&i2c3 {
154 pinctrl-names = "default";
155 pinctrl-0 = <&i2c3_pins>;
156
157 clock-frequency = <400000>;
158
159 lp8720@7d {
160 pinctrl-names = "default";
161 pinctrl-0 = <&lp8720_en_pin>;
162
163 compatible = "ti,lp8720";
164 reg = <0x7d>;
165
166 enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* gpio_37 */
167
168 lp8720_ldo1: ldo1 {
169 regulator-min-microvolt = <3000000>;
170 regulator-max-microvolt = <3000000>;
171 };
172 };
173};
174
175&mmc1 {
176 pinctrl-names = "default";
177 pinctrl-0 = <&mmc1_pins &mmc1_cd_pin>;
178 vmmc-supply = <&lp8720_ldo1>;
179 cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* gpio 10 */
180 bus-width = <4>;
181};
182
183&mmc2 {
184
185 pinctrl-names = "default";
186 pinctrl-0 = <&mmc2_pins>;
187 vmmc-supply = <&vmmc2>;
188 ti,non-removable;
189 bus-width = <8>;
190};
191
192&mmc3 {
193 status = "disabled";
194};
195
196#include "twl4030.dtsi"
197#include "twl4030_omap3.dtsi"
198
199/*
200 * The TWL4030 VAUX2 and VDAC regulators power sensors that are slaves on I2C3.
201 * When not powered, these sensors cause the I2C3 clock to stay low at all times,
202 * making it impossible to reach other devices on I2C3.
203 */
204
205&vaux2 {
206 regulator-min-microvolt = <2800000>;
207 regulator-max-microvolt = <2800000>;
208 regulator-always-on;
209};
210
211&vdac {
212 regulator-min-microvolt = <1800000>;
213 regulator-max-microvolt = <1800000>;
214 regulator-always-on;
215};