Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 1 | /* |
Daniel Scheller | 2d8c98b | 2017-10-15 16:51:54 -0400 | [diff] [blame^] | 2 | * ddbridge-max.c: Digital Devices bridge MAX card support |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2010-2017 Digital Devices GmbH |
| 5 | * Ralph Metzler <rjkm@metzlerbros.de> |
| 6 | * Marcus Metzler <mocm@metzlerbros.de> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License |
| 10 | * version 2 only, as published by the Free Software Foundation. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | */ |
| 18 | |
| 19 | #include <linux/module.h> |
| 20 | #include <linux/init.h> |
| 21 | #include <linux/interrupt.h> |
| 22 | #include <linux/delay.h> |
| 23 | #include <linux/slab.h> |
| 24 | #include <linux/poll.h> |
| 25 | #include <linux/io.h> |
| 26 | #include <linux/pci.h> |
| 27 | #include <linux/pci_ids.h> |
| 28 | #include <linux/timer.h> |
| 29 | #include <linux/i2c.h> |
| 30 | #include <linux/swab.h> |
| 31 | #include <linux/vmalloc.h> |
| 32 | |
| 33 | #include "ddbridge.h" |
| 34 | #include "ddbridge-regs.h" |
| 35 | #include "ddbridge-io.h" |
| 36 | |
Daniel Scheller | 2d8c98b | 2017-10-15 16:51:54 -0400 | [diff] [blame^] | 37 | #include "ddbridge-max.h" |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 38 | #include "mxl5xx.h" |
| 39 | |
| 40 | /******************************************************************************/ |
| 41 | |
| 42 | /* MaxS4/8 related modparams */ |
| 43 | static int fmode; |
| 44 | module_param(fmode, int, 0444); |
| 45 | MODULE_PARM_DESC(fmode, "frontend emulation mode"); |
| 46 | |
| 47 | static int fmode_sat = -1; |
| 48 | module_param(fmode_sat, int, 0444); |
| 49 | MODULE_PARM_DESC(fmode_sat, "set frontend emulation mode sat"); |
| 50 | |
| 51 | static int old_quattro; |
| 52 | module_param(old_quattro, int, 0444); |
| 53 | MODULE_PARM_DESC(old_quattro, "old quattro LNB input order "); |
| 54 | |
| 55 | /******************************************************************************/ |
| 56 | |
| 57 | static int lnb_command(struct ddb *dev, u32 link, u32 lnb, u32 cmd) |
| 58 | { |
| 59 | u32 c, v = 0, tag = DDB_LINK_TAG(link); |
| 60 | |
| 61 | v = LNB_TONE & (dev->link[link].lnb.tone << (15 - lnb)); |
| 62 | ddbwritel(dev, cmd | v, tag | LNB_CONTROL(lnb)); |
| 63 | for (c = 0; c < 10; c++) { |
| 64 | v = ddbreadl(dev, tag | LNB_CONTROL(lnb)); |
| 65 | if ((v & LNB_BUSY) == 0) |
| 66 | break; |
| 67 | msleep(20); |
| 68 | } |
| 69 | if (c == 10) |
| 70 | dev_info(dev->dev, "%s lnb = %08x cmd = %08x\n", |
Daniel Scheller | 757d78d | 2017-10-15 16:51:51 -0400 | [diff] [blame] | 71 | __func__, lnb, cmd); |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 72 | return 0; |
| 73 | } |
| 74 | |
| 75 | static int max_send_master_cmd(struct dvb_frontend *fe, |
| 76 | struct dvb_diseqc_master_cmd *cmd) |
| 77 | { |
| 78 | struct ddb_input *input = fe->sec_priv; |
| 79 | struct ddb_port *port = input->port; |
| 80 | struct ddb *dev = port->dev; |
| 81 | struct ddb_dvb *dvb = &port->dvb[input->nr & 1]; |
| 82 | u32 tag = DDB_LINK_TAG(port->lnr); |
| 83 | int i; |
| 84 | u32 fmode = dev->link[port->lnr].lnb.fmode; |
| 85 | |
| 86 | if (fmode == 2 || fmode == 1) |
| 87 | return 0; |
| 88 | if (dvb->diseqc_send_master_cmd) |
| 89 | dvb->diseqc_send_master_cmd(fe, cmd); |
| 90 | |
| 91 | mutex_lock(&dev->link[port->lnr].lnb.lock); |
| 92 | ddbwritel(dev, 0, tag | LNB_BUF_LEVEL(dvb->input)); |
| 93 | for (i = 0; i < cmd->msg_len; i++) |
| 94 | ddbwritel(dev, cmd->msg[i], tag | LNB_BUF_WRITE(dvb->input)); |
| 95 | lnb_command(dev, port->lnr, dvb->input, LNB_CMD_DISEQC); |
| 96 | mutex_unlock(&dev->link[port->lnr].lnb.lock); |
| 97 | return 0; |
| 98 | } |
| 99 | |
| 100 | static int lnb_send_diseqc(struct ddb *dev, u32 link, u32 input, |
| 101 | struct dvb_diseqc_master_cmd *cmd) |
| 102 | { |
| 103 | u32 tag = DDB_LINK_TAG(link); |
| 104 | int i; |
| 105 | |
| 106 | ddbwritel(dev, 0, tag | LNB_BUF_LEVEL(input)); |
| 107 | for (i = 0; i < cmd->msg_len; i++) |
| 108 | ddbwritel(dev, cmd->msg[i], tag | LNB_BUF_WRITE(input)); |
| 109 | lnb_command(dev, link, input, LNB_CMD_DISEQC); |
| 110 | return 0; |
| 111 | } |
| 112 | |
| 113 | static int lnb_set_sat(struct ddb *dev, u32 link, u32 input, u32 sat, u32 band, |
| 114 | u32 hor) |
| 115 | { |
| 116 | struct dvb_diseqc_master_cmd cmd = { |
| 117 | .msg = {0xe0, 0x10, 0x38, 0xf0, 0x00, 0x00}, |
| 118 | .msg_len = 4 |
| 119 | }; |
| 120 | cmd.msg[3] = 0xf0 | (((sat << 2) & 0x0c) | (band ? 1 : 0) | |
| 121 | (hor ? 2 : 0)); |
| 122 | return lnb_send_diseqc(dev, link, input, &cmd); |
| 123 | } |
| 124 | |
| 125 | static int lnb_set_tone(struct ddb *dev, u32 link, u32 input, |
Daniel Scheller | 757d78d | 2017-10-15 16:51:51 -0400 | [diff] [blame] | 126 | enum fe_sec_tone_mode tone) |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 127 | { |
| 128 | int s = 0; |
| 129 | u32 mask = (1ULL << input); |
| 130 | |
| 131 | switch (tone) { |
| 132 | case SEC_TONE_OFF: |
| 133 | if (!(dev->link[link].lnb.tone & mask)) |
| 134 | return 0; |
| 135 | dev->link[link].lnb.tone &= ~(1ULL << input); |
| 136 | break; |
| 137 | case SEC_TONE_ON: |
| 138 | if (dev->link[link].lnb.tone & mask) |
| 139 | return 0; |
| 140 | dev->link[link].lnb.tone |= (1ULL << input); |
| 141 | break; |
| 142 | default: |
| 143 | s = -EINVAL; |
| 144 | break; |
Fengguang Wu | 0779b88 | 2017-08-20 10:17:15 -0400 | [diff] [blame] | 145 | } |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 146 | if (!s) |
| 147 | s = lnb_command(dev, link, input, LNB_CMD_NOP); |
| 148 | return s; |
| 149 | } |
| 150 | |
| 151 | static int lnb_set_voltage(struct ddb *dev, u32 link, u32 input, |
Daniel Scheller | 757d78d | 2017-10-15 16:51:51 -0400 | [diff] [blame] | 152 | enum fe_sec_voltage voltage) |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 153 | { |
| 154 | int s = 0; |
| 155 | |
| 156 | if (dev->link[link].lnb.oldvoltage[input] == voltage) |
| 157 | return 0; |
| 158 | switch (voltage) { |
| 159 | case SEC_VOLTAGE_OFF: |
| 160 | if (dev->link[link].lnb.voltage[input]) |
| 161 | return 0; |
| 162 | lnb_command(dev, link, input, LNB_CMD_OFF); |
| 163 | break; |
| 164 | case SEC_VOLTAGE_13: |
| 165 | lnb_command(dev, link, input, LNB_CMD_LOW); |
| 166 | break; |
| 167 | case SEC_VOLTAGE_18: |
| 168 | lnb_command(dev, link, input, LNB_CMD_HIGH); |
| 169 | break; |
| 170 | default: |
| 171 | s = -EINVAL; |
| 172 | break; |
Fengguang Wu | 0779b88 | 2017-08-20 10:17:15 -0400 | [diff] [blame] | 173 | } |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 174 | dev->link[link].lnb.oldvoltage[input] = voltage; |
| 175 | return s; |
| 176 | } |
| 177 | |
| 178 | static int max_set_input_unlocked(struct dvb_frontend *fe, int in) |
| 179 | { |
| 180 | struct ddb_input *input = fe->sec_priv; |
| 181 | struct ddb_port *port = input->port; |
| 182 | struct ddb *dev = port->dev; |
| 183 | struct ddb_dvb *dvb = &port->dvb[input->nr & 1]; |
| 184 | int res = 0; |
| 185 | |
| 186 | if (in > 3) |
| 187 | return -EINVAL; |
| 188 | if (dvb->input != in) { |
| 189 | u32 bit = (1ULL << input->nr); |
Daniel Scheller | b9a92f6 | 2017-07-09 15:42:45 -0400 | [diff] [blame] | 190 | u32 obit = |
| 191 | dev->link[port->lnr].lnb.voltage[dvb->input & 3] & bit; |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 192 | |
Daniel Scheller | b9a92f6 | 2017-07-09 15:42:45 -0400 | [diff] [blame] | 193 | dev->link[port->lnr].lnb.voltage[dvb->input & 3] &= ~bit; |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 194 | dvb->input = in; |
Daniel Scheller | b9a92f6 | 2017-07-09 15:42:45 -0400 | [diff] [blame] | 195 | dev->link[port->lnr].lnb.voltage[dvb->input & 3] |= obit; |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 196 | } |
| 197 | res = dvb->set_input(fe, in); |
| 198 | return res; |
| 199 | } |
| 200 | |
| 201 | static int max_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone) |
| 202 | { |
| 203 | struct ddb_input *input = fe->sec_priv; |
| 204 | struct ddb_port *port = input->port; |
| 205 | struct ddb *dev = port->dev; |
| 206 | struct ddb_dvb *dvb = &port->dvb[input->nr & 1]; |
| 207 | int tuner = 0; |
| 208 | int res = 0; |
| 209 | u32 fmode = dev->link[port->lnr].lnb.fmode; |
| 210 | |
| 211 | mutex_lock(&dev->link[port->lnr].lnb.lock); |
| 212 | dvb->tone = tone; |
| 213 | switch (fmode) { |
| 214 | default: |
| 215 | case 0: |
| 216 | case 3: |
| 217 | res = lnb_set_tone(dev, port->lnr, dvb->input, tone); |
| 218 | break; |
| 219 | case 1: |
| 220 | case 2: |
| 221 | if (old_quattro) { |
| 222 | if (dvb->tone == SEC_TONE_ON) |
| 223 | tuner |= 2; |
| 224 | if (dvb->voltage == SEC_VOLTAGE_18) |
| 225 | tuner |= 1; |
| 226 | } else { |
| 227 | if (dvb->tone == SEC_TONE_ON) |
| 228 | tuner |= 1; |
| 229 | if (dvb->voltage == SEC_VOLTAGE_18) |
| 230 | tuner |= 2; |
| 231 | } |
| 232 | res = max_set_input_unlocked(fe, tuner); |
| 233 | break; |
| 234 | } |
| 235 | mutex_unlock(&dev->link[port->lnr].lnb.lock); |
| 236 | return res; |
| 237 | } |
| 238 | |
| 239 | static int max_set_voltage(struct dvb_frontend *fe, enum fe_sec_voltage voltage) |
| 240 | { |
| 241 | struct ddb_input *input = fe->sec_priv; |
| 242 | struct ddb_port *port = input->port; |
| 243 | struct ddb *dev = port->dev; |
| 244 | struct ddb_dvb *dvb = &port->dvb[input->nr & 1]; |
| 245 | int tuner = 0; |
| 246 | u32 nv, ov = dev->link[port->lnr].lnb.voltages; |
| 247 | int res = 0; |
| 248 | u32 fmode = dev->link[port->lnr].lnb.fmode; |
| 249 | |
| 250 | mutex_lock(&dev->link[port->lnr].lnb.lock); |
| 251 | dvb->voltage = voltage; |
| 252 | |
| 253 | switch (fmode) { |
| 254 | case 3: |
| 255 | default: |
| 256 | case 0: |
| 257 | if (fmode == 3) |
| 258 | max_set_input_unlocked(fe, 0); |
| 259 | if (voltage == SEC_VOLTAGE_OFF) |
| 260 | dev->link[port->lnr].lnb.voltage[dvb->input] &= |
| 261 | ~(1ULL << input->nr); |
| 262 | else |
| 263 | dev->link[port->lnr].lnb.voltage[dvb->input] |= |
| 264 | (1ULL << input->nr); |
| 265 | |
| 266 | res = lnb_set_voltage(dev, port->lnr, dvb->input, voltage); |
| 267 | break; |
| 268 | case 1: |
| 269 | case 2: |
| 270 | if (voltage == SEC_VOLTAGE_OFF) |
| 271 | dev->link[port->lnr].lnb.voltages &= |
| 272 | ~(1ULL << input->nr); |
| 273 | else |
| 274 | dev->link[port->lnr].lnb.voltages |= |
| 275 | (1ULL << input->nr); |
| 276 | |
| 277 | nv = dev->link[port->lnr].lnb.voltages; |
| 278 | |
| 279 | if (old_quattro) { |
| 280 | if (dvb->tone == SEC_TONE_ON) |
| 281 | tuner |= 2; |
| 282 | if (dvb->voltage == SEC_VOLTAGE_18) |
| 283 | tuner |= 1; |
| 284 | } else { |
| 285 | if (dvb->tone == SEC_TONE_ON) |
| 286 | tuner |= 1; |
| 287 | if (dvb->voltage == SEC_VOLTAGE_18) |
| 288 | tuner |= 2; |
| 289 | } |
| 290 | res = max_set_input_unlocked(fe, tuner); |
| 291 | |
| 292 | if (nv != ov) { |
| 293 | if (nv) { |
Daniel Scheller | 757d78d | 2017-10-15 16:51:51 -0400 | [diff] [blame] | 294 | lnb_set_voltage( |
| 295 | dev, port->lnr, |
| 296 | 0, SEC_VOLTAGE_13); |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 297 | if (fmode == 1) { |
Daniel Scheller | 757d78d | 2017-10-15 16:51:51 -0400 | [diff] [blame] | 298 | lnb_set_voltage( |
| 299 | dev, port->lnr, |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 300 | 0, SEC_VOLTAGE_13); |
| 301 | if (old_quattro) { |
Daniel Scheller | 757d78d | 2017-10-15 16:51:51 -0400 | [diff] [blame] | 302 | lnb_set_voltage( |
| 303 | dev, port->lnr, |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 304 | 1, SEC_VOLTAGE_18); |
Daniel Scheller | 757d78d | 2017-10-15 16:51:51 -0400 | [diff] [blame] | 305 | lnb_set_voltage( |
| 306 | dev, port->lnr, |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 307 | 2, SEC_VOLTAGE_13); |
| 308 | } else { |
Daniel Scheller | 757d78d | 2017-10-15 16:51:51 -0400 | [diff] [blame] | 309 | lnb_set_voltage( |
| 310 | dev, port->lnr, |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 311 | 1, SEC_VOLTAGE_13); |
Daniel Scheller | 757d78d | 2017-10-15 16:51:51 -0400 | [diff] [blame] | 312 | lnb_set_voltage( |
| 313 | dev, port->lnr, |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 314 | 2, SEC_VOLTAGE_18); |
| 315 | } |
Daniel Scheller | 757d78d | 2017-10-15 16:51:51 -0400 | [diff] [blame] | 316 | lnb_set_voltage( |
| 317 | dev, port->lnr, |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 318 | 3, SEC_VOLTAGE_18); |
| 319 | } |
| 320 | } else { |
Daniel Scheller | 757d78d | 2017-10-15 16:51:51 -0400 | [diff] [blame] | 321 | lnb_set_voltage( |
| 322 | dev, port->lnr, |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 323 | 0, SEC_VOLTAGE_OFF); |
| 324 | if (fmode == 1) { |
Daniel Scheller | 757d78d | 2017-10-15 16:51:51 -0400 | [diff] [blame] | 325 | lnb_set_voltage( |
| 326 | dev, port->lnr, |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 327 | 1, SEC_VOLTAGE_OFF); |
Daniel Scheller | 757d78d | 2017-10-15 16:51:51 -0400 | [diff] [blame] | 328 | lnb_set_voltage( |
| 329 | dev, port->lnr, |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 330 | 2, SEC_VOLTAGE_OFF); |
Daniel Scheller | 757d78d | 2017-10-15 16:51:51 -0400 | [diff] [blame] | 331 | lnb_set_voltage( |
| 332 | dev, port->lnr, |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 333 | 3, SEC_VOLTAGE_OFF); |
| 334 | } |
| 335 | } |
| 336 | } |
| 337 | break; |
| 338 | } |
| 339 | mutex_unlock(&dev->link[port->lnr].lnb.lock); |
| 340 | return res; |
| 341 | } |
| 342 | |
| 343 | static int max_enable_high_lnb_voltage(struct dvb_frontend *fe, long arg) |
| 344 | { |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 345 | return 0; |
| 346 | } |
| 347 | |
| 348 | static int max_send_burst(struct dvb_frontend *fe, enum fe_sec_mini_cmd burst) |
| 349 | { |
| 350 | return 0; |
| 351 | } |
| 352 | |
| 353 | static int mxl_fw_read(void *priv, u8 *buf, u32 len) |
| 354 | { |
| 355 | struct ddb_link *link = priv; |
| 356 | struct ddb *dev = link->dev; |
| 357 | |
| 358 | dev_info(dev->dev, "Read mxl_fw from link %u\n", link->nr); |
| 359 | |
| 360 | return ddbridge_flashread(dev, link->nr, buf, 0xc0000, len); |
| 361 | } |
| 362 | |
| 363 | int lnb_init_fmode(struct ddb *dev, struct ddb_link *link, u32 fm) |
| 364 | { |
| 365 | u32 l = link->nr; |
| 366 | |
| 367 | if (link->lnb.fmode == fm) |
| 368 | return 0; |
| 369 | dev_info(dev->dev, "Set fmode link %u = %u\n", l, fm); |
| 370 | mutex_lock(&link->lnb.lock); |
| 371 | if (fm == 2 || fm == 1) { |
| 372 | if (fmode_sat >= 0) { |
| 373 | lnb_set_sat(dev, l, 0, fmode_sat, 0, 0); |
| 374 | if (old_quattro) { |
| 375 | lnb_set_sat(dev, l, 1, fmode_sat, 0, 1); |
| 376 | lnb_set_sat(dev, l, 2, fmode_sat, 1, 0); |
| 377 | } else { |
| 378 | lnb_set_sat(dev, l, 1, fmode_sat, 1, 0); |
| 379 | lnb_set_sat(dev, l, 2, fmode_sat, 0, 1); |
| 380 | } |
| 381 | lnb_set_sat(dev, l, 3, fmode_sat, 1, 1); |
| 382 | } |
| 383 | lnb_set_tone(dev, l, 0, SEC_TONE_OFF); |
| 384 | if (old_quattro) { |
| 385 | lnb_set_tone(dev, l, 1, SEC_TONE_OFF); |
| 386 | lnb_set_tone(dev, l, 2, SEC_TONE_ON); |
| 387 | } else { |
| 388 | lnb_set_tone(dev, l, 1, SEC_TONE_ON); |
| 389 | lnb_set_tone(dev, l, 2, SEC_TONE_OFF); |
| 390 | } |
| 391 | lnb_set_tone(dev, l, 3, SEC_TONE_ON); |
| 392 | } |
| 393 | link->lnb.fmode = fm; |
| 394 | mutex_unlock(&link->lnb.lock); |
| 395 | return 0; |
| 396 | } |
| 397 | |
| 398 | static struct mxl5xx_cfg mxl5xx = { |
| 399 | .adr = 0x60, |
| 400 | .type = 0x01, |
| 401 | .clk = 27000000, |
| 402 | .ts_clk = 139, |
| 403 | .cap = 12, |
| 404 | .fw_read = mxl_fw_read, |
| 405 | }; |
| 406 | |
| 407 | int fe_attach_mxl5xx(struct ddb_input *input) |
| 408 | { |
| 409 | struct ddb *dev = input->port->dev; |
| 410 | struct i2c_adapter *i2c = &input->port->i2c->adap; |
| 411 | struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; |
| 412 | struct ddb_port *port = input->port; |
| 413 | struct ddb_link *link = &dev->link[port->lnr]; |
| 414 | struct mxl5xx_cfg cfg; |
| 415 | int demod, tuner; |
| 416 | |
| 417 | cfg = mxl5xx; |
| 418 | cfg.fw_priv = link; |
| 419 | dvb->set_input = NULL; |
| 420 | |
| 421 | demod = input->nr; |
| 422 | tuner = demod & 3; |
| 423 | if (fmode == 3) |
| 424 | tuner = 0; |
| 425 | |
| 426 | dvb->fe = dvb_attach(mxl5xx_attach, i2c, &cfg, |
Daniel Scheller | 757d78d | 2017-10-15 16:51:51 -0400 | [diff] [blame] | 427 | demod, tuner, &dvb->set_input); |
Daniel Scheller | bb4cec9 | 2017-07-09 15:42:44 -0400 | [diff] [blame] | 428 | |
| 429 | if (!dvb->fe) { |
| 430 | dev_err(dev->dev, "No MXL5XX found!\n"); |
| 431 | return -ENODEV; |
| 432 | } |
| 433 | |
| 434 | if (!dvb->set_input) { |
| 435 | dev_err(dev->dev, "No mxl5xx_set_input function pointer!\n"); |
| 436 | return -ENODEV; |
| 437 | } |
| 438 | |
| 439 | if (input->nr < 4) { |
| 440 | lnb_command(dev, port->lnr, input->nr, LNB_CMD_INIT); |
| 441 | lnb_set_voltage(dev, port->lnr, input->nr, SEC_VOLTAGE_OFF); |
| 442 | } |
| 443 | lnb_init_fmode(dev, link, fmode); |
| 444 | |
| 445 | dvb->fe->ops.set_voltage = max_set_voltage; |
| 446 | dvb->fe->ops.enable_high_lnb_voltage = max_enable_high_lnb_voltage; |
| 447 | dvb->fe->ops.set_tone = max_set_tone; |
| 448 | dvb->diseqc_send_master_cmd = dvb->fe->ops.diseqc_send_master_cmd; |
| 449 | dvb->fe->ops.diseqc_send_master_cmd = max_send_master_cmd; |
| 450 | dvb->fe->ops.diseqc_send_burst = max_send_burst; |
| 451 | dvb->fe->sec_priv = input; |
| 452 | dvb->input = tuner; |
| 453 | return 0; |
| 454 | } |