blob: 70782a41c493319a9c6c224312bc3458cd03e828 [file] [log] [blame]
Tony Lindgren92105bb2005-09-07 17:20:26 +01001/*
2 * linux/arch/arm/plat-omap/dmtimer.c
3 *
4 * OMAP Dual-Mode Timers
5 *
Tarun Kanti DebBarma97933d62011-09-20 17:00:17 +05306 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
7 * Tarun Kanti DebBarma <tarun.kanti@ti.com>
8 * Thara Gopinath <thara@ti.com>
9 *
10 * dmtimer adaptation to platform_driver.
11 *
Tony Lindgren92105bb2005-09-07 17:20:26 +010012 * Copyright (C) 2005 Nokia Corporation
Timo Teras77900a22006-06-26 16:16:12 -070013 * OMAP2 support by Juha Yrjola
14 * API improvements and OMAP2 clock framework support by Timo Teras
Tony Lindgren92105bb2005-09-07 17:20:26 +010015 *
Santosh Shilimkar44169072009-05-28 14:16:04 -070016 * Copyright (C) 2009 Texas Instruments
17 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
18 *
Tony Lindgren92105bb2005-09-07 17:20:26 +010019 * This program is free software; you can redistribute it and/or modify it
20 * under the terms of the GNU General Public License as published by the
21 * Free Software Foundation; either version 2 of the License, or (at your
22 * option) any later version.
23 *
24 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
27 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 * You should have received a copy of the GNU General Public License along
34 * with this program; if not, write to the Free Software Foundation, Inc.,
35 * 675 Mass Ave, Cambridge, MA 02139, USA.
36 */
37
Jon Hunterb1538832012-09-28 11:43:30 -050038#include <linux/clk.h>
Suman Annaea05d2e2015-10-05 18:28:21 -050039#include <linux/clk-provider.h>
Axel Lin869dec12011-11-02 09:49:46 +080040#include <linux/module.h>
Russell Kingfced80c2008-09-06 12:10:45 +010041#include <linux/io.h>
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +053042#include <linux/device.h>
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053043#include <linux/err.h>
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +053044#include <linux/pm_runtime.h>
Jon Hunter9725f442012-05-14 10:41:37 -050045#include <linux/of.h>
46#include <linux/of_device.h>
Jon Hunter40fc3bb2012-09-28 11:34:49 -050047#include <linux/platform_device.h>
48#include <linux/platform_data/dmtimer-omap.h>
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053049
Keerthy5ca467c2018-02-15 11:31:44 +053050#include <clocksource/timer-ti-dm.h>
Tony Lindgren2c799ce2012-02-24 10:34:35 -080051
Jon Hunterb7b4ff72012-06-05 12:34:51 -050052static u32 omap_reserved_systimers;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +053053static LIST_HEAD(omap_timer_list);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053054static DEFINE_SPINLOCK(dm_timer_lock);
Tony Lindgren92105bb2005-09-07 17:20:26 +010055
Jon Hunter8fc7fcb2013-03-19 12:38:17 -050056enum {
57 REQUEST_ANY = 0,
58 REQUEST_BY_ID,
59 REQUEST_BY_CAP,
60 REQUEST_BY_NODE,
61};
62
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053063/**
64 * omap_dm_timer_read_reg - read timer registers in posted and non-posted mode
65 * @timer: timer pointer over which read operation to perform
66 * @reg: lowest byte holds the register offset
67 *
68 * The posted mode bit is encoded in reg. Note that in posted mode write
69 * pending bit must be checked. Otherwise a read of a non completed write
70 * will produce an error.
Richard Woodruff0f0d0802008-07-03 12:24:30 +030071 */
72static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
Tony Lindgren92105bb2005-09-07 17:20:26 +010073{
Tony Lindgrenee17f112011-09-16 15:44:20 -070074 WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
75 return __omap_dm_timer_read(timer, reg, timer->posted);
Timo Teras77900a22006-06-26 16:16:12 -070076}
77
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053078/**
79 * omap_dm_timer_write_reg - write timer registers in posted and non-posted mode
80 * @timer: timer pointer over which write operation is to perform
81 * @reg: lowest byte holds the register offset
82 * @value: data to write into the register
83 *
84 * The posted mode bit is encoded in reg. Note that in posted mode the write
85 * pending bit must be checked. Otherwise a write on a register which has a
86 * pending write will be lost.
Richard Woodruff0f0d0802008-07-03 12:24:30 +030087 */
88static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
89 u32 value)
Timo Teras77900a22006-06-26 16:16:12 -070090{
Tony Lindgrenee17f112011-09-16 15:44:20 -070091 WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
92 __omap_dm_timer_write(timer, reg, value, timer->posted);
Tony Lindgren92105bb2005-09-07 17:20:26 +010093}
94
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +053095static void omap_timer_restore_context(struct omap_dm_timer *timer)
96{
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +053097 omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG,
98 timer->context.twer);
99 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG,
100 timer->context.tcrr);
101 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG,
102 timer->context.tldr);
103 omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG,
104 timer->context.tmar);
105 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG,
106 timer->context.tsicr);
Victor Kamensky834cacf2014-04-15 20:37:47 +0300107 writel_relaxed(timer->context.tier, timer->irq_ena);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530108 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG,
109 timer->context.tclr);
110}
111
Jon Hunterae6672c2012-07-11 13:47:38 -0500112static int omap_dm_timer_reset(struct omap_dm_timer *timer)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100113{
Jon Hunterae6672c2012-07-11 13:47:38 -0500114 u32 l, timeout = 100000;
Timo Teras77900a22006-06-26 16:16:12 -0700115
Jon Hunterae6672c2012-07-11 13:47:38 -0500116 if (timer->revision != 1)
117 return -EINVAL;
Tony Lindgrenee17f112011-09-16 15:44:20 -0700118
Jon Hunterffc957b2012-07-06 16:46:35 -0500119 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
Jon Hunterae6672c2012-07-11 13:47:38 -0500120
121 do {
122 l = __omap_dm_timer_read(timer,
123 OMAP_TIMER_V1_SYS_STAT_OFFSET, 0);
124 } while (!l && timeout--);
125
126 if (!timeout) {
127 dev_err(&timer->pdev->dev, "Timer failed to reset\n");
128 return -ETIMEDOUT;
129 }
130
131 /* Configure timer for smart-idle mode */
132 l = __omap_dm_timer_read(timer, OMAP_TIMER_OCP_CFG_OFFSET, 0);
133 l |= 0x2 << 0x3;
134 __omap_dm_timer_write(timer, OMAP_TIMER_OCP_CFG_OFFSET, l, 0);
135
136 timer->posted = 0;
137
138 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700139}
140
Neil Armstrong31a74482015-11-02 12:14:14 +0100141static int omap_dm_timer_of_set_source(struct omap_dm_timer *timer)
142{
143 int ret;
144 struct clk *parent;
145
146 /*
147 * FIXME: OMAP1 devices do not use the clock framework for dmtimers so
148 * do not call clk_get() for these devices.
149 */
150 if (!timer->fclk)
151 return -ENODEV;
152
153 parent = clk_get(&timer->pdev->dev, NULL);
154 if (IS_ERR(parent))
155 return -ENODEV;
156
157 ret = clk_set_parent(timer->fclk, parent);
158 if (ret < 0)
159 pr_err("%s: failed to set parent\n", __func__);
160
161 clk_put(parent);
162
163 return ret;
164}
165
Jon Hunterb0cadb32012-09-28 12:21:09 -0500166static int omap_dm_timer_prepare(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700167{
Jon Hunterae6672c2012-07-11 13:47:38 -0500168 int rc;
169
Jon Hunterbca45802012-06-05 12:34:58 -0500170 /*
171 * FIXME: OMAP1 devices do not use the clock framework for dmtimers so
172 * do not call clk_get() for these devices.
173 */
174 if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) {
175 timer->fclk = clk_get(&timer->pdev->dev, "fck");
Russell King86287952013-02-24 10:46:59 +0000176 if (WARN_ON_ONCE(IS_ERR(timer->fclk))) {
Jon Hunterbca45802012-06-05 12:34:58 -0500177 dev_err(&timer->pdev->dev, ": No fclk handle.\n");
178 return -EINVAL;
179 }
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530180 }
181
Jon Hunter7b44cf22012-07-06 16:45:04 -0500182 omap_dm_timer_enable(timer);
183
Jon Hunterae6672c2012-07-11 13:47:38 -0500184 if (timer->capability & OMAP_TIMER_NEEDS_RESET) {
185 rc = omap_dm_timer_reset(timer);
186 if (rc) {
187 omap_dm_timer_disable(timer);
188 return rc;
189 }
190 }
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530191
Jon Hunter7b44cf22012-07-06 16:45:04 -0500192 __omap_dm_timer_enable_posted(timer);
193 omap_dm_timer_disable(timer);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530194
Neil Armstrong31a74482015-11-02 12:14:14 +0100195 rc = omap_dm_timer_of_set_source(timer);
196 if (rc == -ENODEV)
197 return omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
198
199 return rc;
Timo Teras77900a22006-06-26 16:16:12 -0700200}
201
Jon Hunterb7b4ff72012-06-05 12:34:51 -0500202static inline u32 omap_dm_timer_reserved_systimer(int id)
203{
204 return (omap_reserved_systimers & (1 << (id - 1))) ? 1 : 0;
205}
206
207int omap_dm_timer_reserve_systimer(int id)
208{
209 if (omap_dm_timer_reserved_systimer(id))
210 return -ENODEV;
211
212 omap_reserved_systimers |= (1 << (id - 1));
213
214 return 0;
215}
216
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500217static struct omap_dm_timer *_omap_dm_timer_request(int req_type, void *data)
Timo Teras77900a22006-06-26 16:16:12 -0700218{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530219 struct omap_dm_timer *timer = NULL, *t;
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500220 struct device_node *np = NULL;
Timo Teras77900a22006-06-26 16:16:12 -0700221 unsigned long flags;
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500222 u32 cap = 0;
223 int id = 0;
224
225 switch (req_type) {
226 case REQUEST_BY_ID:
227 id = *(int *)data;
228 break;
229 case REQUEST_BY_CAP:
230 cap = *(u32 *)data;
231 break;
232 case REQUEST_BY_NODE:
233 np = (struct device_node *)data;
234 break;
235 default:
236 /* REQUEST_ANY */
237 break;
238 }
Timo Teras77900a22006-06-26 16:16:12 -0700239
240 spin_lock_irqsave(&dm_timer_lock, flags);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530241 list_for_each_entry(t, &omap_timer_list, node) {
242 if (t->reserved)
Timo Teras77900a22006-06-26 16:16:12 -0700243 continue;
244
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500245 switch (req_type) {
246 case REQUEST_BY_ID:
247 if (id == t->pdev->id) {
248 timer = t;
249 timer->reserved = 1;
250 goto found;
251 }
252 break;
253 case REQUEST_BY_CAP:
254 if (cap == (t->capability & cap)) {
255 /*
256 * If timer is not NULL, we have already found
Markus Elfring28fd7e92017-10-03 21:24:00 +0200257 * one timer. But it was not an exact match
258 * because it had more capabilities than what
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500259 * was required. Therefore, unreserve the last
260 * timer found and see if this one is a better
261 * match.
262 */
263 if (timer)
264 timer->reserved = 0;
265 timer = t;
266 timer->reserved = 1;
267
268 /* Exit loop early if we find an exact match */
269 if (t->capability == cap)
270 goto found;
271 }
272 break;
273 case REQUEST_BY_NODE:
274 if (np == t->pdev->dev.of_node) {
275 timer = t;
276 timer->reserved = 1;
277 goto found;
278 }
279 break;
280 default:
281 /* REQUEST_ANY */
282 timer = t;
283 timer->reserved = 1;
284 goto found;
285 }
Timo Teras77900a22006-06-26 16:16:12 -0700286 }
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500287found:
Timo Kokkonenc5491d12012-08-12 13:45:34 +0300288 spin_unlock_irqrestore(&dm_timer_lock, flags);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530289
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500290 if (timer && omap_dm_timer_prepare(timer)) {
291 timer->reserved = 0;
292 timer = NULL;
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530293 }
Timo Teras77900a22006-06-26 16:16:12 -0700294
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530295 if (!timer)
296 pr_debug("%s: timer request failed!\n", __func__);
Timo Teras83379c82006-06-26 16:16:23 -0700297
Timo Teras77900a22006-06-26 16:16:12 -0700298 return timer;
299}
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500300
301struct omap_dm_timer *omap_dm_timer_request(void)
302{
303 return _omap_dm_timer_request(REQUEST_ANY, NULL);
304}
Timo Teras77900a22006-06-26 16:16:12 -0700305
306struct omap_dm_timer *omap_dm_timer_request_specific(int id)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100307{
Jon Hunter9725f442012-05-14 10:41:37 -0500308 /* Requesting timer by ID is not supported when device tree is used */
309 if (of_have_populated_dt()) {
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500310 pr_warn("%s: Please use omap_dm_timer_request_by_cap/node()\n",
Jon Hunter9725f442012-05-14 10:41:37 -0500311 __func__);
312 return NULL;
313 }
314
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500315 return _omap_dm_timer_request(REQUEST_BY_ID, &id);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100316}
317
Jon Hunter373fe0b2012-09-06 15:28:00 -0500318/**
319 * omap_dm_timer_request_by_cap - Request a timer by capability
320 * @cap: Bit mask of capabilities to match
321 *
322 * Find a timer based upon capabilities bit mask. Callers of this function
323 * should use the definitions found in the plat/dmtimer.h file under the
324 * comment "timer capabilities used in hwmod database". Returns pointer to
325 * timer handle on success and a NULL pointer on failure.
326 */
327struct omap_dm_timer *omap_dm_timer_request_by_cap(u32 cap)
328{
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500329 return _omap_dm_timer_request(REQUEST_BY_CAP, &cap);
Jon Hunter373fe0b2012-09-06 15:28:00 -0500330}
Jon Hunter373fe0b2012-09-06 15:28:00 -0500331
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500332/**
333 * omap_dm_timer_request_by_node - Request a timer by device-tree node
334 * @np: Pointer to device-tree timer node
335 *
336 * Request a timer based upon a device node pointer. Returns pointer to
337 * timer handle on success and a NULL pointer on failure.
338 */
339struct omap_dm_timer *omap_dm_timer_request_by_node(struct device_node *np)
340{
341 if (!np)
342 return NULL;
343
344 return _omap_dm_timer_request(REQUEST_BY_NODE, np);
345}
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500346
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530347int omap_dm_timer_free(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700348{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530349 if (unlikely(!timer))
350 return -EINVAL;
351
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530352 clk_put(timer->fclk);
Timo Terasfa4bb622006-09-25 12:41:35 +0300353
Timo Teras77900a22006-06-26 16:16:12 -0700354 WARN_ON(!timer->reserved);
355 timer->reserved = 0;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530356 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700357}
358
Timo Teras12583a72006-09-25 12:41:42 +0300359void omap_dm_timer_enable(struct omap_dm_timer *timer)
360{
NeilBrown9cc268d2013-03-19 12:38:15 -0500361 int c;
362
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +0530363 pm_runtime_get_sync(&timer->pdev->dev);
NeilBrown9cc268d2013-03-19 12:38:15 -0500364
365 if (!(timer->capability & OMAP_TIMER_ALWON)) {
366 if (timer->get_context_loss_count) {
367 c = timer->get_context_loss_count(&timer->pdev->dev);
368 if (c != timer->ctx_loss_count) {
369 omap_timer_restore_context(timer);
370 timer->ctx_loss_count = c;
371 }
Jon Hunter385c4c72013-03-19 12:38:16 -0500372 } else {
373 omap_timer_restore_context(timer);
NeilBrown9cc268d2013-03-19 12:38:15 -0500374 }
375 }
Timo Teras12583a72006-09-25 12:41:42 +0300376}
377
378void omap_dm_timer_disable(struct omap_dm_timer *timer)
379{
Jon Hunter54f32a32012-07-13 15:12:03 -0500380 pm_runtime_put_sync(&timer->pdev->dev);
Timo Teras12583a72006-09-25 12:41:42 +0300381}
382
Timo Teras77900a22006-06-26 16:16:12 -0700383int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
384{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530385 if (timer)
386 return timer->irq;
387 return -EINVAL;
Timo Teras77900a22006-06-26 16:16:12 -0700388}
389
390#if defined(CONFIG_ARCH_OMAP1)
Tony Lindgren7136f8d2012-10-31 12:38:43 -0700391#include <mach/hardware.h>
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100392/**
393 * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR
394 * @inputmask: current value of idlect mask
395 */
396__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
397{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530398 int i = 0;
399 struct omap_dm_timer *timer = NULL;
400 unsigned long flags;
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100401
402 /* If ARMXOR cannot be idled this function call is unnecessary */
403 if (!(inputmask & (1 << 1)))
404 return inputmask;
405
406 /* If any active timer is using ARMXOR return modified mask */
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530407 spin_lock_irqsave(&dm_timer_lock, flags);
408 list_for_each_entry(timer, &omap_timer_list, node) {
Timo Teras77900a22006-06-26 16:16:12 -0700409 u32 l;
410
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530411 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
Timo Teras77900a22006-06-26 16:16:12 -0700412 if (l & OMAP_TIMER_CTRL_ST) {
413 if (((omap_readl(MOD_CONF_CTRL_1) >> (i * 2)) & 0x03) == 0)
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100414 inputmask &= ~(1 << 1);
415 else
416 inputmask &= ~(1 << 2);
417 }
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530418 i++;
Timo Teras77900a22006-06-26 16:16:12 -0700419 }
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530420 spin_unlock_irqrestore(&dm_timer_lock, flags);
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100421
422 return inputmask;
423}
424
Tony Lindgren140455f2010-02-12 12:26:48 -0800425#else
Timo Teras77900a22006-06-26 16:16:12 -0700426
427struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
428{
Russell King86287952013-02-24 10:46:59 +0000429 if (timer && !IS_ERR(timer->fclk))
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530430 return timer->fclk;
431 return NULL;
Timo Teras77900a22006-06-26 16:16:12 -0700432}
433
434__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
435{
436 BUG();
Dirk Behme21218802006-12-06 17:14:00 -0800437
438 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700439}
440
441#endif
442
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530443int omap_dm_timer_trigger(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700444{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530445 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
446 pr_err("%s: timer not available or enabled.\n", __func__);
447 return -EINVAL;
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530448 }
449
Timo Teras77900a22006-06-26 16:16:12 -0700450 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530451 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700452}
453
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530454int omap_dm_timer_start(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700455{
456 u32 l;
457
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530458 if (unlikely(!timer))
459 return -EINVAL;
460
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530461 omap_dm_timer_enable(timer);
462
Timo Teras77900a22006-06-26 16:16:12 -0700463 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
464 if (!(l & OMAP_TIMER_CTRL_ST)) {
465 l |= OMAP_TIMER_CTRL_ST;
466 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
467 }
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530468
469 /* Save the context */
470 timer->context.tclr = l;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530471 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700472}
473
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530474int omap_dm_timer_stop(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700475{
Tony Lindgrencaf64f22011-03-29 15:54:48 -0700476 unsigned long rate = 0;
Timo Teras77900a22006-06-26 16:16:12 -0700477
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530478 if (unlikely(!timer))
479 return -EINVAL;
480
Jon Hunter66159752012-06-05 12:34:57 -0500481 if (!(timer->capability & OMAP_TIMER_NEEDS_RESET))
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530482 rate = clk_get_rate(timer->fclk);
Tony Lindgrencaf64f22011-03-29 15:54:48 -0700483
Tony Lindgrenee17f112011-09-16 15:44:20 -0700484 __omap_dm_timer_stop(timer, timer->posted, rate);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530485
Tarun Kanti DebBarmadffc9da2012-03-05 16:11:00 -0800486 /*
487 * Since the register values are computed and written within
488 * __omap_dm_timer_stop, we need to use read to retrieve the
489 * context.
490 */
491 timer->context.tclr =
492 omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
Tarun Kanti DebBarmadffc9da2012-03-05 16:11:00 -0800493 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530494 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700495}
496
Paul Walmsleyf2480762009-04-23 21:11:10 -0600497int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100498{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530499 int ret;
Jon Hunter2b2d3522012-06-05 12:34:59 -0500500 char *parent_name = NULL;
Jon Hunterd7aba552012-07-18 20:10:12 -0500501 struct clk *parent;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530502 struct dmtimer_platform_data *pdata;
503
504 if (unlikely(!timer))
505 return -EINVAL;
506
507 pdata = timer->pdev->dev.platform_data;
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530508
Timo Teras77900a22006-06-26 16:16:12 -0700509 if (source < 0 || source >= 3)
Paul Walmsleyf2480762009-04-23 21:11:10 -0600510 return -EINVAL;
Timo Teras77900a22006-06-26 16:16:12 -0700511
Jon Hunter2b2d3522012-06-05 12:34:59 -0500512 /*
513 * FIXME: Used for OMAP1 devices only because they do not currently
514 * use the clock framework to set the parent clock. To be removed
515 * once OMAP1 migrated to using clock framework for dmtimers
516 */
Jon Hunter9725f442012-05-14 10:41:37 -0500517 if (pdata && pdata->set_timer_src)
Jon Hunter2b2d3522012-06-05 12:34:59 -0500518 return pdata->set_timer_src(timer->pdev, source);
519
Russell King86287952013-02-24 10:46:59 +0000520 if (IS_ERR(timer->fclk))
Jon Hunter2b2d3522012-06-05 12:34:59 -0500521 return -EINVAL;
Jon Hunter2b2d3522012-06-05 12:34:59 -0500522
Suman Annaea05d2e2015-10-05 18:28:21 -0500523#if defined(CONFIG_COMMON_CLK)
524 /* Check if the clock has configurable parents */
525 if (clk_hw_get_num_parents(__clk_get_hw(timer->fclk)) < 2)
526 return 0;
527#endif
528
Jon Hunter2b2d3522012-06-05 12:34:59 -0500529 switch (source) {
530 case OMAP_TIMER_SRC_SYS_CLK:
Jon Hunterc59b5372012-06-05 12:35:00 -0500531 parent_name = "timer_sys_ck";
Jon Hunter2b2d3522012-06-05 12:34:59 -0500532 break;
533
534 case OMAP_TIMER_SRC_32_KHZ:
Jon Hunterc59b5372012-06-05 12:35:00 -0500535 parent_name = "timer_32k_ck";
Jon Hunter2b2d3522012-06-05 12:34:59 -0500536 break;
537
538 case OMAP_TIMER_SRC_EXT_CLK:
Jon Hunterc59b5372012-06-05 12:35:00 -0500539 parent_name = "timer_ext_ck";
Jon Hunter2b2d3522012-06-05 12:34:59 -0500540 break;
541 }
542
543 parent = clk_get(&timer->pdev->dev, parent_name);
Russell King86287952013-02-24 10:46:59 +0000544 if (IS_ERR(parent)) {
Jon Hunter2b2d3522012-06-05 12:34:59 -0500545 pr_err("%s: %s not found\n", __func__, parent_name);
Jon Hunterd7aba552012-07-18 20:10:12 -0500546 return -EINVAL;
Jon Hunter2b2d3522012-06-05 12:34:59 -0500547 }
548
Jon Hunterd7aba552012-07-18 20:10:12 -0500549 ret = clk_set_parent(timer->fclk, parent);
Russell Kingc48cd652013-03-13 20:44:21 +0000550 if (ret < 0)
Jon Hunter2b2d3522012-06-05 12:34:59 -0500551 pr_err("%s: failed to set %s as parent\n", __func__,
552 parent_name);
553
554 clk_put(parent);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530555
556 return ret;
Timo Teras77900a22006-06-26 16:16:12 -0700557}
558
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530559int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
Timo Teras77900a22006-06-26 16:16:12 -0700560 unsigned int load)
561{
562 u32 l;
563
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530564 if (unlikely(!timer))
565 return -EINVAL;
566
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530567 omap_dm_timer_enable(timer);
Timo Teras77900a22006-06-26 16:16:12 -0700568 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
569 if (autoreload)
570 l |= OMAP_TIMER_CTRL_AR;
571 else
572 l &= ~OMAP_TIMER_CTRL_AR;
573 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
574 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
Richard Woodruff0f0d0802008-07-03 12:24:30 +0300575
Timo Teras77900a22006-06-26 16:16:12 -0700576 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530577 /* Save the context */
578 timer->context.tclr = l;
579 timer->context.tldr = load;
580 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530581 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700582}
583
Richard Woodruff3fddd092008-07-03 12:24:30 +0300584/* Optimized set_load which removes costly spin wait in timer_start */
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530585int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
Richard Woodruff3fddd092008-07-03 12:24:30 +0300586 unsigned int load)
587{
588 u32 l;
589
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530590 if (unlikely(!timer))
591 return -EINVAL;
592
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530593 omap_dm_timer_enable(timer);
594
Richard Woodruff3fddd092008-07-03 12:24:30 +0300595 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
Paul Walmsley64ce2902008-12-10 17:36:34 -0800596 if (autoreload) {
Richard Woodruff3fddd092008-07-03 12:24:30 +0300597 l |= OMAP_TIMER_CTRL_AR;
Paul Walmsley64ce2902008-12-10 17:36:34 -0800598 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
599 } else {
Richard Woodruff3fddd092008-07-03 12:24:30 +0300600 l &= ~OMAP_TIMER_CTRL_AR;
Paul Walmsley64ce2902008-12-10 17:36:34 -0800601 }
Richard Woodruff3fddd092008-07-03 12:24:30 +0300602 l |= OMAP_TIMER_CTRL_ST;
603
Tony Lindgrenee17f112011-09-16 15:44:20 -0700604 __omap_dm_timer_load_start(timer, l, load, timer->posted);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530605
606 /* Save the context */
607 timer->context.tclr = l;
608 timer->context.tldr = load;
609 timer->context.tcrr = load;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530610 return 0;
Richard Woodruff3fddd092008-07-03 12:24:30 +0300611}
612
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530613int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
Timo Teras77900a22006-06-26 16:16:12 -0700614 unsigned int match)
615{
616 u32 l;
617
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530618 if (unlikely(!timer))
619 return -EINVAL;
620
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530621 omap_dm_timer_enable(timer);
Timo Teras77900a22006-06-26 16:16:12 -0700622 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
Timo Teras83379c82006-06-26 16:16:23 -0700623 if (enable)
Timo Teras77900a22006-06-26 16:16:12 -0700624 l |= OMAP_TIMER_CTRL_CE;
625 else
626 l &= ~OMAP_TIMER_CTRL_CE;
Timo Teras77900a22006-06-26 16:16:12 -0700627 omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match);
Jon Hunter991ad162012-10-04 18:17:42 -0500628 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530629
630 /* Save the context */
631 timer->context.tclr = l;
632 timer->context.tmar = match;
633 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530634 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100635}
636
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530637int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
Timo Teras77900a22006-06-26 16:16:12 -0700638 int toggle, int trigger)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100639{
Timo Teras77900a22006-06-26 16:16:12 -0700640 u32 l;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100641
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530642 if (unlikely(!timer))
643 return -EINVAL;
644
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530645 omap_dm_timer_enable(timer);
Timo Teras77900a22006-06-26 16:16:12 -0700646 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
647 l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM |
648 OMAP_TIMER_CTRL_PT | (0x03 << 10));
649 if (def_on)
650 l |= OMAP_TIMER_CTRL_SCPWM;
651 if (toggle)
652 l |= OMAP_TIMER_CTRL_PT;
653 l |= trigger << 10;
654 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530655
656 /* Save the context */
657 timer->context.tclr = l;
658 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530659 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700660}
661
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530662int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
Timo Teras77900a22006-06-26 16:16:12 -0700663{
664 u32 l;
665
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530666 if (unlikely(!timer))
667 return -EINVAL;
668
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530669 omap_dm_timer_enable(timer);
Timo Teras77900a22006-06-26 16:16:12 -0700670 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
671 l &= ~(OMAP_TIMER_CTRL_PRE | (0x07 << 2));
672 if (prescaler >= 0x00 && prescaler <= 0x07) {
673 l |= OMAP_TIMER_CTRL_PRE;
674 l |= prescaler << 2;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100675 }
Timo Teras77900a22006-06-26 16:16:12 -0700676 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530677
678 /* Save the context */
679 timer->context.tclr = l;
680 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530681 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100682}
683
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530684int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
Timo Teras77900a22006-06-26 16:16:12 -0700685 unsigned int value)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100686{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530687 if (unlikely(!timer))
688 return -EINVAL;
689
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530690 omap_dm_timer_enable(timer);
Tony Lindgrenee17f112011-09-16 15:44:20 -0700691 __omap_dm_timer_int_enable(timer, value);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530692
693 /* Save the context */
694 timer->context.tier = value;
695 timer->context.twer = value;
696 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530697 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100698}
699
Jon Hunter4249d962012-07-13 14:03:18 -0500700/**
701 * omap_dm_timer_set_int_disable - disable timer interrupts
702 * @timer: pointer to timer handle
703 * @mask: bit mask of interrupts to be disabled
704 *
705 * Disables the specified timer interrupts for a timer.
706 */
707int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask)
708{
709 u32 l = mask;
710
711 if (unlikely(!timer))
712 return -EINVAL;
713
714 omap_dm_timer_enable(timer);
715
716 if (timer->revision == 1)
Victor Kamensky834cacf2014-04-15 20:37:47 +0300717 l = readl_relaxed(timer->irq_ena) & ~mask;
Jon Hunter4249d962012-07-13 14:03:18 -0500718
Victor Kamensky834cacf2014-04-15 20:37:47 +0300719 writel_relaxed(l, timer->irq_dis);
Jon Hunter4249d962012-07-13 14:03:18 -0500720 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_WAKEUP_EN_REG) & ~mask;
721 omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, l);
722
723 /* Save the context */
724 timer->context.tier &= ~mask;
725 timer->context.twer &= ~mask;
726 omap_dm_timer_disable(timer);
727 return 0;
728}
Jon Hunter4249d962012-07-13 14:03:18 -0500729
Tony Lindgren92105bb2005-09-07 17:20:26 +0100730unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
731{
Timo Terasfa4bb622006-09-25 12:41:35 +0300732 unsigned int l;
733
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530734 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
735 pr_err("%s: timer not available or enabled.\n", __func__);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530736 return 0;
737 }
738
Victor Kamensky834cacf2014-04-15 20:37:47 +0300739 l = readl_relaxed(timer->irq_stat);
Timo Terasfa4bb622006-09-25 12:41:35 +0300740
741 return l;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100742}
743
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530744int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100745{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530746 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev)))
747 return -EINVAL;
748
Tony Lindgrenee17f112011-09-16 15:44:20 -0700749 __omap_dm_timer_write_status(timer, value);
Jon Hunter1eaff712012-10-04 17:01:14 -0500750
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530751 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100752}
753
Tony Lindgren92105bb2005-09-07 17:20:26 +0100754unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
755{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530756 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
757 pr_err("%s: timer not iavailable or enabled.\n", __func__);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530758 return 0;
759 }
760
Tony Lindgrenee17f112011-09-16 15:44:20 -0700761 return __omap_dm_timer_read_counter(timer, timer->posted);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100762}
763
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530764int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
Timo Teras83379c82006-06-26 16:16:23 -0700765{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530766 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
767 pr_err("%s: timer not available or enabled.\n", __func__);
768 return -EINVAL;
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530769 }
770
Timo Terasfa4bb622006-09-25 12:41:35 +0300771 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530772
773 /* Save the context */
774 timer->context.tcrr = value;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530775 return 0;
Timo Teras83379c82006-06-26 16:16:23 -0700776}
777
Timo Teras77900a22006-06-26 16:16:12 -0700778int omap_dm_timers_active(void)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100779{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530780 struct omap_dm_timer *timer;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100781
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530782 list_for_each_entry(timer, &omap_timer_list, node) {
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +0530783 if (!timer->reserved)
Timo Teras12583a72006-09-25 12:41:42 +0300784 continue;
785
Timo Teras77900a22006-06-26 16:16:12 -0700786 if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG) &
Timo Terasfa4bb622006-09-25 12:41:35 +0300787 OMAP_TIMER_CTRL_ST) {
Timo Teras77900a22006-06-26 16:16:12 -0700788 return 1;
Timo Terasfa4bb622006-09-25 12:41:35 +0300789 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100790 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100791 return 0;
792}
793
Jon Hunterd1c6ccf2013-03-19 12:38:19 -0500794static const struct of_device_id omap_timer_match[];
795
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530796/**
797 * omap_dm_timer_probe - probe function called for every registered device
798 * @pdev: pointer to current timer platform device
799 *
800 * Called by driver framework at the end of device registration for all
801 * timer devices.
802 */
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800803static int omap_dm_timer_probe(struct platform_device *pdev)
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530804{
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530805 unsigned long flags;
806 struct omap_dm_timer *timer;
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530807 struct resource *mem, *irq;
808 struct device *dev = &pdev->dev;
Jon Hunterd1c6ccf2013-03-19 12:38:19 -0500809 const struct dmtimer_platform_data *pdata;
Suman Annaa76fc9d2015-03-16 20:14:02 -0500810 int ret;
Jon Hunterd1c6ccf2013-03-19 12:38:19 -0500811
Ladislav Michl1a3acad2018-02-15 11:31:49 +0530812 pdata = of_device_get_match_data(dev);
813 if (!pdata)
814 pdata = dev_get_platdata(dev);
815 else
816 dev->platform_data = (void *)pdata;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530817
Ladislav Michl1a3acad2018-02-15 11:31:49 +0530818 if (!pdata) {
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530819 dev_err(dev, "%s: no platform data.\n", __func__);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530820 return -ENODEV;
821 }
822
823 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
824 if (unlikely(!irq)) {
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530825 dev_err(dev, "%s: no IRQ resource.\n", __func__);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530826 return -ENODEV;
827 }
828
829 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
830 if (unlikely(!mem)) {
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530831 dev_err(dev, "%s: no memory resource.\n", __func__);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530832 return -ENODEV;
833 }
834
Markus Elfring16e7ea52017-10-03 20:46:48 +0200835 timer = devm_kzalloc(dev, sizeof(*timer), GFP_KERNEL);
Markus Elfringd6799502017-10-03 13:10:26 +0200836 if (!timer)
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530837 return -ENOMEM;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530838
Russell King86287952013-02-24 10:46:59 +0000839 timer->fclk = ERR_PTR(-ENODEV);
Thierry Reding5857bd92013-01-21 11:08:55 +0100840 timer->io_base = devm_ioremap_resource(dev, mem);
841 if (IS_ERR(timer->io_base))
842 return PTR_ERR(timer->io_base);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530843
Jon Hunter9725f442012-05-14 10:41:37 -0500844 if (dev->of_node) {
845 if (of_find_property(dev->of_node, "ti,timer-alwon", NULL))
846 timer->capability |= OMAP_TIMER_ALWON;
847 if (of_find_property(dev->of_node, "ti,timer-dsp", NULL))
848 timer->capability |= OMAP_TIMER_HAS_DSP_IRQ;
849 if (of_find_property(dev->of_node, "ti,timer-pwm", NULL))
850 timer->capability |= OMAP_TIMER_HAS_PWM;
851 if (of_find_property(dev->of_node, "ti,timer-secure", NULL))
852 timer->capability |= OMAP_TIMER_SECURE;
853 } else {
854 timer->id = pdev->id;
855 timer->capability = pdata->timer_capability;
856 timer->reserved = omap_dm_timer_reserved_systimer(timer->id);
Tony Lindgrenf56f52e2012-11-09 14:54:17 -0800857 timer->get_context_loss_count = pdata->get_context_loss_count;
Jon Hunter9725f442012-05-14 10:41:37 -0500858 }
859
Jon Hunterd1c6ccf2013-03-19 12:38:19 -0500860 if (pdata)
861 timer->errata = pdata->timer_errata;
862
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530863 timer->irq = irq->start;
864 timer->pdev = pdev;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530865
Tony Lindgrenba688782018-02-22 10:02:49 -0800866 pm_runtime_enable(dev);
867 pm_runtime_irq_safe(dev);
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +0530868
Tony Lindgren0dad9fa2011-09-21 16:38:51 -0700869 if (!timer->reserved) {
Suman Annaa76fc9d2015-03-16 20:14:02 -0500870 ret = pm_runtime_get_sync(dev);
871 if (ret < 0) {
872 dev_err(dev, "%s: pm_runtime_get_sync failed!\n",
873 __func__);
874 goto err_get_sync;
875 }
Tony Lindgren0dad9fa2011-09-21 16:38:51 -0700876 __omap_dm_timer_init_regs(timer);
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530877 pm_runtime_put(dev);
Tony Lindgren0dad9fa2011-09-21 16:38:51 -0700878 }
879
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530880 /* add the timer element to the list */
881 spin_lock_irqsave(&dm_timer_lock, flags);
882 list_add_tail(&timer->node, &omap_timer_list);
883 spin_unlock_irqrestore(&dm_timer_lock, flags);
884
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530885 dev_dbg(dev, "Device Probed.\n");
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530886
887 return 0;
Suman Annaa76fc9d2015-03-16 20:14:02 -0500888
889err_get_sync:
890 pm_runtime_put_noidle(dev);
891 pm_runtime_disable(dev);
892 return ret;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530893}
894
895/**
896 * omap_dm_timer_remove - cleanup a registered timer device
897 * @pdev: pointer to current timer platform device
898 *
899 * Called by driver framework whenever a timer device is unregistered.
900 * In addition to freeing platform resources it also deletes the timer
901 * entry from the local list.
902 */
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800903static int omap_dm_timer_remove(struct platform_device *pdev)
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530904{
905 struct omap_dm_timer *timer;
906 unsigned long flags;
907 int ret = -EINVAL;
908
909 spin_lock_irqsave(&dm_timer_lock, flags);
910 list_for_each_entry(timer, &omap_timer_list, node)
Jon Hunter9725f442012-05-14 10:41:37 -0500911 if (!strcmp(dev_name(&timer->pdev->dev),
912 dev_name(&pdev->dev))) {
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530913 list_del(&timer->node);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530914 ret = 0;
915 break;
916 }
917 spin_unlock_irqrestore(&dm_timer_lock, flags);
918
Suman Anna51b7e572015-03-16 20:14:03 -0500919 pm_runtime_disable(&pdev->dev);
920
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530921 return ret;
922}
923
Keerthy76234f72018-02-15 11:31:48 +0530924const static struct omap_dm_timer_ops dmtimer_ops = {
925 .request_by_node = omap_dm_timer_request_by_node,
926 .request_specific = omap_dm_timer_request_specific,
927 .request = omap_dm_timer_request,
928 .set_source = omap_dm_timer_set_source,
929 .get_irq = omap_dm_timer_get_irq,
930 .set_int_enable = omap_dm_timer_set_int_enable,
931 .set_int_disable = omap_dm_timer_set_int_disable,
932 .free = omap_dm_timer_free,
933 .enable = omap_dm_timer_enable,
934 .disable = omap_dm_timer_disable,
935 .get_fclk = omap_dm_timer_get_fclk,
936 .start = omap_dm_timer_start,
937 .stop = omap_dm_timer_stop,
938 .set_load = omap_dm_timer_set_load,
939 .set_match = omap_dm_timer_set_match,
940 .set_pwm = omap_dm_timer_set_pwm,
941 .set_prescaler = omap_dm_timer_set_prescaler,
942 .read_counter = omap_dm_timer_read_counter,
943 .write_counter = omap_dm_timer_write_counter,
944 .read_status = omap_dm_timer_read_status,
945 .write_status = omap_dm_timer_write_status,
946};
947
Jon Hunterd1c6ccf2013-03-19 12:38:19 -0500948static const struct dmtimer_platform_data omap3plus_pdata = {
949 .timer_errata = OMAP_TIMER_ERRATA_I103_I767,
Keerthy76234f72018-02-15 11:31:48 +0530950 .timer_ops = &dmtimer_ops,
Jon Hunterd1c6ccf2013-03-19 12:38:19 -0500951};
952
Jon Hunter9725f442012-05-14 10:41:37 -0500953static const struct of_device_id omap_timer_match[] = {
Jon Hunterd1c6ccf2013-03-19 12:38:19 -0500954 {
955 .compatible = "ti,omap2420-timer",
956 },
957 {
958 .compatible = "ti,omap3430-timer",
959 .data = &omap3plus_pdata,
960 },
961 {
962 .compatible = "ti,omap4430-timer",
963 .data = &omap3plus_pdata,
964 },
965 {
966 .compatible = "ti,omap5430-timer",
967 .data = &omap3plus_pdata,
968 },
969 {
970 .compatible = "ti,am335x-timer",
971 .data = &omap3plus_pdata,
972 },
973 {
974 .compatible = "ti,am335x-timer-1ms",
975 .data = &omap3plus_pdata,
976 },
Neil Armstrong8c0cabd2015-10-22 11:18:53 +0200977 {
978 .compatible = "ti,dm816-timer",
979 .data = &omap3plus_pdata,
980 },
Jon Hunter9725f442012-05-14 10:41:37 -0500981 {},
982};
983MODULE_DEVICE_TABLE(of, omap_timer_match);
984
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530985static struct platform_driver omap_dm_timer_driver = {
986 .probe = omap_dm_timer_probe,
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800987 .remove = omap_dm_timer_remove,
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530988 .driver = {
989 .name = "omap_timer",
Jon Hunter9725f442012-05-14 10:41:37 -0500990 .of_match_table = of_match_ptr(omap_timer_match),
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530991 },
992};
993
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530994early_platform_init("earlytimer", &omap_dm_timer_driver);
Srinivas Kandagatlae4e9f7e2012-12-16 11:30:02 -0800995module_platform_driver(omap_dm_timer_driver);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530996
997MODULE_DESCRIPTION("OMAP Dual-Mode Timer Driver");
998MODULE_LICENSE("GPL");
999MODULE_ALIAS("platform:" DRIVER_NAME);
1000MODULE_AUTHOR("Texas Instruments Inc");