Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/plat-omap/dmtimer.c |
| 3 | * |
| 4 | * OMAP Dual-Mode Timers |
| 5 | * |
Tarun Kanti DebBarma | 97933d6 | 2011-09-20 17:00:17 +0530 | [diff] [blame] | 6 | * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ |
| 7 | * Tarun Kanti DebBarma <tarun.kanti@ti.com> |
| 8 | * Thara Gopinath <thara@ti.com> |
| 9 | * |
| 10 | * dmtimer adaptation to platform_driver. |
| 11 | * |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 12 | * Copyright (C) 2005 Nokia Corporation |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 13 | * OMAP2 support by Juha Yrjola |
| 14 | * API improvements and OMAP2 clock framework support by Timo Teras |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 15 | * |
Santosh Shilimkar | 4416907 | 2009-05-28 14:16:04 -0700 | [diff] [blame] | 16 | * Copyright (C) 2009 Texas Instruments |
| 17 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> |
| 18 | * |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 19 | * This program is free software; you can redistribute it and/or modify it |
| 20 | * under the terms of the GNU General Public License as published by the |
| 21 | * Free Software Foundation; either version 2 of the License, or (at your |
| 22 | * option) any later version. |
| 23 | * |
| 24 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
| 25 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 26 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| 27 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 28 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 29 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 30 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 31 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 32 | * |
| 33 | * You should have received a copy of the GNU General Public License along |
| 34 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 35 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 36 | */ |
| 37 | |
Jon Hunter | b153883 | 2012-09-28 11:43:30 -0500 | [diff] [blame] | 38 | #include <linux/clk.h> |
Suman Anna | ea05d2e | 2015-10-05 18:28:21 -0500 | [diff] [blame] | 39 | #include <linux/clk-provider.h> |
Axel Lin | 869dec1 | 2011-11-02 09:49:46 +0800 | [diff] [blame] | 40 | #include <linux/module.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 41 | #include <linux/io.h> |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 42 | #include <linux/device.h> |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 43 | #include <linux/err.h> |
Tarun Kanti DebBarma | ffe07ce | 2011-09-20 17:00:21 +0530 | [diff] [blame] | 44 | #include <linux/pm_runtime.h> |
Jon Hunter | 9725f44 | 2012-05-14 10:41:37 -0500 | [diff] [blame] | 45 | #include <linux/of.h> |
| 46 | #include <linux/of_device.h> |
Jon Hunter | 40fc3bb | 2012-09-28 11:34:49 -0500 | [diff] [blame] | 47 | #include <linux/platform_device.h> |
| 48 | #include <linux/platform_data/dmtimer-omap.h> |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 49 | |
Keerthy | 5ca467c | 2018-02-15 11:31:44 +0530 | [diff] [blame] | 50 | #include <clocksource/timer-ti-dm.h> |
Tony Lindgren | 2c799ce | 2012-02-24 10:34:35 -0800 | [diff] [blame] | 51 | |
Jon Hunter | b7b4ff7 | 2012-06-05 12:34:51 -0500 | [diff] [blame] | 52 | static u32 omap_reserved_systimers; |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 53 | static LIST_HEAD(omap_timer_list); |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 54 | static DEFINE_SPINLOCK(dm_timer_lock); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 55 | |
Jon Hunter | 8fc7fcb | 2013-03-19 12:38:17 -0500 | [diff] [blame] | 56 | enum { |
| 57 | REQUEST_ANY = 0, |
| 58 | REQUEST_BY_ID, |
| 59 | REQUEST_BY_CAP, |
| 60 | REQUEST_BY_NODE, |
| 61 | }; |
| 62 | |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 63 | /** |
| 64 | * omap_dm_timer_read_reg - read timer registers in posted and non-posted mode |
| 65 | * @timer: timer pointer over which read operation to perform |
| 66 | * @reg: lowest byte holds the register offset |
| 67 | * |
| 68 | * The posted mode bit is encoded in reg. Note that in posted mode write |
| 69 | * pending bit must be checked. Otherwise a read of a non completed write |
| 70 | * will produce an error. |
Richard Woodruff | 0f0d080 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 71 | */ |
| 72 | static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 73 | { |
Tony Lindgren | ee17f11 | 2011-09-16 15:44:20 -0700 | [diff] [blame] | 74 | WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET); |
| 75 | return __omap_dm_timer_read(timer, reg, timer->posted); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 76 | } |
| 77 | |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 78 | /** |
| 79 | * omap_dm_timer_write_reg - write timer registers in posted and non-posted mode |
| 80 | * @timer: timer pointer over which write operation is to perform |
| 81 | * @reg: lowest byte holds the register offset |
| 82 | * @value: data to write into the register |
| 83 | * |
| 84 | * The posted mode bit is encoded in reg. Note that in posted mode the write |
| 85 | * pending bit must be checked. Otherwise a write on a register which has a |
| 86 | * pending write will be lost. |
Richard Woodruff | 0f0d080 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 87 | */ |
| 88 | static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg, |
| 89 | u32 value) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 90 | { |
Tony Lindgren | ee17f11 | 2011-09-16 15:44:20 -0700 | [diff] [blame] | 91 | WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET); |
| 92 | __omap_dm_timer_write(timer, reg, value, timer->posted); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 93 | } |
| 94 | |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 95 | static void omap_timer_restore_context(struct omap_dm_timer *timer) |
| 96 | { |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 97 | omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, |
| 98 | timer->context.twer); |
| 99 | omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, |
| 100 | timer->context.tcrr); |
| 101 | omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, |
| 102 | timer->context.tldr); |
| 103 | omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, |
| 104 | timer->context.tmar); |
| 105 | omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, |
| 106 | timer->context.tsicr); |
Victor Kamensky | 834cacf | 2014-04-15 20:37:47 +0300 | [diff] [blame] | 107 | writel_relaxed(timer->context.tier, timer->irq_ena); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 108 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, |
| 109 | timer->context.tclr); |
| 110 | } |
| 111 | |
Jon Hunter | ae6672c | 2012-07-11 13:47:38 -0500 | [diff] [blame] | 112 | static int omap_dm_timer_reset(struct omap_dm_timer *timer) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 113 | { |
Jon Hunter | ae6672c | 2012-07-11 13:47:38 -0500 | [diff] [blame] | 114 | u32 l, timeout = 100000; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 115 | |
Jon Hunter | ae6672c | 2012-07-11 13:47:38 -0500 | [diff] [blame] | 116 | if (timer->revision != 1) |
| 117 | return -EINVAL; |
Tony Lindgren | ee17f11 | 2011-09-16 15:44:20 -0700 | [diff] [blame] | 118 | |
Jon Hunter | ffc957b | 2012-07-06 16:46:35 -0500 | [diff] [blame] | 119 | omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06); |
Jon Hunter | ae6672c | 2012-07-11 13:47:38 -0500 | [diff] [blame] | 120 | |
| 121 | do { |
| 122 | l = __omap_dm_timer_read(timer, |
| 123 | OMAP_TIMER_V1_SYS_STAT_OFFSET, 0); |
| 124 | } while (!l && timeout--); |
| 125 | |
| 126 | if (!timeout) { |
| 127 | dev_err(&timer->pdev->dev, "Timer failed to reset\n"); |
| 128 | return -ETIMEDOUT; |
| 129 | } |
| 130 | |
| 131 | /* Configure timer for smart-idle mode */ |
| 132 | l = __omap_dm_timer_read(timer, OMAP_TIMER_OCP_CFG_OFFSET, 0); |
| 133 | l |= 0x2 << 0x3; |
| 134 | __omap_dm_timer_write(timer, OMAP_TIMER_OCP_CFG_OFFSET, l, 0); |
| 135 | |
| 136 | timer->posted = 0; |
| 137 | |
| 138 | return 0; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 139 | } |
| 140 | |
Neil Armstrong | 31a7448 | 2015-11-02 12:14:14 +0100 | [diff] [blame] | 141 | static int omap_dm_timer_of_set_source(struct omap_dm_timer *timer) |
| 142 | { |
| 143 | int ret; |
| 144 | struct clk *parent; |
| 145 | |
| 146 | /* |
| 147 | * FIXME: OMAP1 devices do not use the clock framework for dmtimers so |
| 148 | * do not call clk_get() for these devices. |
| 149 | */ |
| 150 | if (!timer->fclk) |
| 151 | return -ENODEV; |
| 152 | |
| 153 | parent = clk_get(&timer->pdev->dev, NULL); |
| 154 | if (IS_ERR(parent)) |
| 155 | return -ENODEV; |
| 156 | |
| 157 | ret = clk_set_parent(timer->fclk, parent); |
| 158 | if (ret < 0) |
| 159 | pr_err("%s: failed to set parent\n", __func__); |
| 160 | |
| 161 | clk_put(parent); |
| 162 | |
| 163 | return ret; |
| 164 | } |
| 165 | |
Jon Hunter | b0cadb3 | 2012-09-28 12:21:09 -0500 | [diff] [blame] | 166 | static int omap_dm_timer_prepare(struct omap_dm_timer *timer) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 167 | { |
Jon Hunter | ae6672c | 2012-07-11 13:47:38 -0500 | [diff] [blame] | 168 | int rc; |
| 169 | |
Jon Hunter | bca4580 | 2012-06-05 12:34:58 -0500 | [diff] [blame] | 170 | /* |
| 171 | * FIXME: OMAP1 devices do not use the clock framework for dmtimers so |
| 172 | * do not call clk_get() for these devices. |
| 173 | */ |
| 174 | if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) { |
| 175 | timer->fclk = clk_get(&timer->pdev->dev, "fck"); |
Russell King | 8628795 | 2013-02-24 10:46:59 +0000 | [diff] [blame] | 176 | if (WARN_ON_ONCE(IS_ERR(timer->fclk))) { |
Jon Hunter | bca4580 | 2012-06-05 12:34:58 -0500 | [diff] [blame] | 177 | dev_err(&timer->pdev->dev, ": No fclk handle.\n"); |
| 178 | return -EINVAL; |
| 179 | } |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 180 | } |
| 181 | |
Jon Hunter | 7b44cf2 | 2012-07-06 16:45:04 -0500 | [diff] [blame] | 182 | omap_dm_timer_enable(timer); |
| 183 | |
Jon Hunter | ae6672c | 2012-07-11 13:47:38 -0500 | [diff] [blame] | 184 | if (timer->capability & OMAP_TIMER_NEEDS_RESET) { |
| 185 | rc = omap_dm_timer_reset(timer); |
| 186 | if (rc) { |
| 187 | omap_dm_timer_disable(timer); |
| 188 | return rc; |
| 189 | } |
| 190 | } |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 191 | |
Jon Hunter | 7b44cf2 | 2012-07-06 16:45:04 -0500 | [diff] [blame] | 192 | __omap_dm_timer_enable_posted(timer); |
| 193 | omap_dm_timer_disable(timer); |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 194 | |
Neil Armstrong | 31a7448 | 2015-11-02 12:14:14 +0100 | [diff] [blame] | 195 | rc = omap_dm_timer_of_set_source(timer); |
| 196 | if (rc == -ENODEV) |
| 197 | return omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); |
| 198 | |
| 199 | return rc; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 200 | } |
| 201 | |
Jon Hunter | b7b4ff7 | 2012-06-05 12:34:51 -0500 | [diff] [blame] | 202 | static inline u32 omap_dm_timer_reserved_systimer(int id) |
| 203 | { |
| 204 | return (omap_reserved_systimers & (1 << (id - 1))) ? 1 : 0; |
| 205 | } |
| 206 | |
| 207 | int omap_dm_timer_reserve_systimer(int id) |
| 208 | { |
| 209 | if (omap_dm_timer_reserved_systimer(id)) |
| 210 | return -ENODEV; |
| 211 | |
| 212 | omap_reserved_systimers |= (1 << (id - 1)); |
| 213 | |
| 214 | return 0; |
| 215 | } |
| 216 | |
Jon Hunter | 8fc7fcb | 2013-03-19 12:38:17 -0500 | [diff] [blame] | 217 | static struct omap_dm_timer *_omap_dm_timer_request(int req_type, void *data) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 218 | { |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 219 | struct omap_dm_timer *timer = NULL, *t; |
Jon Hunter | 8fc7fcb | 2013-03-19 12:38:17 -0500 | [diff] [blame] | 220 | struct device_node *np = NULL; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 221 | unsigned long flags; |
Jon Hunter | 8fc7fcb | 2013-03-19 12:38:17 -0500 | [diff] [blame] | 222 | u32 cap = 0; |
| 223 | int id = 0; |
| 224 | |
| 225 | switch (req_type) { |
| 226 | case REQUEST_BY_ID: |
| 227 | id = *(int *)data; |
| 228 | break; |
| 229 | case REQUEST_BY_CAP: |
| 230 | cap = *(u32 *)data; |
| 231 | break; |
| 232 | case REQUEST_BY_NODE: |
| 233 | np = (struct device_node *)data; |
| 234 | break; |
| 235 | default: |
| 236 | /* REQUEST_ANY */ |
| 237 | break; |
| 238 | } |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 239 | |
| 240 | spin_lock_irqsave(&dm_timer_lock, flags); |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 241 | list_for_each_entry(t, &omap_timer_list, node) { |
| 242 | if (t->reserved) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 243 | continue; |
| 244 | |
Jon Hunter | 8fc7fcb | 2013-03-19 12:38:17 -0500 | [diff] [blame] | 245 | switch (req_type) { |
| 246 | case REQUEST_BY_ID: |
| 247 | if (id == t->pdev->id) { |
| 248 | timer = t; |
| 249 | timer->reserved = 1; |
| 250 | goto found; |
| 251 | } |
| 252 | break; |
| 253 | case REQUEST_BY_CAP: |
| 254 | if (cap == (t->capability & cap)) { |
| 255 | /* |
| 256 | * If timer is not NULL, we have already found |
Markus Elfring | 28fd7e9 | 2017-10-03 21:24:00 +0200 | [diff] [blame] | 257 | * one timer. But it was not an exact match |
| 258 | * because it had more capabilities than what |
Jon Hunter | 8fc7fcb | 2013-03-19 12:38:17 -0500 | [diff] [blame] | 259 | * was required. Therefore, unreserve the last |
| 260 | * timer found and see if this one is a better |
| 261 | * match. |
| 262 | */ |
| 263 | if (timer) |
| 264 | timer->reserved = 0; |
| 265 | timer = t; |
| 266 | timer->reserved = 1; |
| 267 | |
| 268 | /* Exit loop early if we find an exact match */ |
| 269 | if (t->capability == cap) |
| 270 | goto found; |
| 271 | } |
| 272 | break; |
| 273 | case REQUEST_BY_NODE: |
| 274 | if (np == t->pdev->dev.of_node) { |
| 275 | timer = t; |
| 276 | timer->reserved = 1; |
| 277 | goto found; |
| 278 | } |
| 279 | break; |
| 280 | default: |
| 281 | /* REQUEST_ANY */ |
| 282 | timer = t; |
| 283 | timer->reserved = 1; |
| 284 | goto found; |
| 285 | } |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 286 | } |
Jon Hunter | 8fc7fcb | 2013-03-19 12:38:17 -0500 | [diff] [blame] | 287 | found: |
Timo Kokkonen | c5491d1 | 2012-08-12 13:45:34 +0300 | [diff] [blame] | 288 | spin_unlock_irqrestore(&dm_timer_lock, flags); |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 289 | |
Jon Hunter | 8fc7fcb | 2013-03-19 12:38:17 -0500 | [diff] [blame] | 290 | if (timer && omap_dm_timer_prepare(timer)) { |
| 291 | timer->reserved = 0; |
| 292 | timer = NULL; |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 293 | } |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 294 | |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 295 | if (!timer) |
| 296 | pr_debug("%s: timer request failed!\n", __func__); |
Timo Teras | 83379c8 | 2006-06-26 16:16:23 -0700 | [diff] [blame] | 297 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 298 | return timer; |
| 299 | } |
Jon Hunter | 8fc7fcb | 2013-03-19 12:38:17 -0500 | [diff] [blame] | 300 | |
| 301 | struct omap_dm_timer *omap_dm_timer_request(void) |
| 302 | { |
| 303 | return _omap_dm_timer_request(REQUEST_ANY, NULL); |
| 304 | } |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 305 | |
| 306 | struct omap_dm_timer *omap_dm_timer_request_specific(int id) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 307 | { |
Jon Hunter | 9725f44 | 2012-05-14 10:41:37 -0500 | [diff] [blame] | 308 | /* Requesting timer by ID is not supported when device tree is used */ |
| 309 | if (of_have_populated_dt()) { |
Jon Hunter | 8fc7fcb | 2013-03-19 12:38:17 -0500 | [diff] [blame] | 310 | pr_warn("%s: Please use omap_dm_timer_request_by_cap/node()\n", |
Jon Hunter | 9725f44 | 2012-05-14 10:41:37 -0500 | [diff] [blame] | 311 | __func__); |
| 312 | return NULL; |
| 313 | } |
| 314 | |
Jon Hunter | 8fc7fcb | 2013-03-19 12:38:17 -0500 | [diff] [blame] | 315 | return _omap_dm_timer_request(REQUEST_BY_ID, &id); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 316 | } |
| 317 | |
Jon Hunter | 373fe0b | 2012-09-06 15:28:00 -0500 | [diff] [blame] | 318 | /** |
| 319 | * omap_dm_timer_request_by_cap - Request a timer by capability |
| 320 | * @cap: Bit mask of capabilities to match |
| 321 | * |
| 322 | * Find a timer based upon capabilities bit mask. Callers of this function |
| 323 | * should use the definitions found in the plat/dmtimer.h file under the |
| 324 | * comment "timer capabilities used in hwmod database". Returns pointer to |
| 325 | * timer handle on success and a NULL pointer on failure. |
| 326 | */ |
| 327 | struct omap_dm_timer *omap_dm_timer_request_by_cap(u32 cap) |
| 328 | { |
Jon Hunter | 8fc7fcb | 2013-03-19 12:38:17 -0500 | [diff] [blame] | 329 | return _omap_dm_timer_request(REQUEST_BY_CAP, &cap); |
Jon Hunter | 373fe0b | 2012-09-06 15:28:00 -0500 | [diff] [blame] | 330 | } |
Jon Hunter | 373fe0b | 2012-09-06 15:28:00 -0500 | [diff] [blame] | 331 | |
Jon Hunter | 8fc7fcb | 2013-03-19 12:38:17 -0500 | [diff] [blame] | 332 | /** |
| 333 | * omap_dm_timer_request_by_node - Request a timer by device-tree node |
| 334 | * @np: Pointer to device-tree timer node |
| 335 | * |
| 336 | * Request a timer based upon a device node pointer. Returns pointer to |
| 337 | * timer handle on success and a NULL pointer on failure. |
| 338 | */ |
| 339 | struct omap_dm_timer *omap_dm_timer_request_by_node(struct device_node *np) |
| 340 | { |
| 341 | if (!np) |
| 342 | return NULL; |
| 343 | |
| 344 | return _omap_dm_timer_request(REQUEST_BY_NODE, np); |
| 345 | } |
Jon Hunter | 8fc7fcb | 2013-03-19 12:38:17 -0500 | [diff] [blame] | 346 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 347 | int omap_dm_timer_free(struct omap_dm_timer *timer) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 348 | { |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 349 | if (unlikely(!timer)) |
| 350 | return -EINVAL; |
| 351 | |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 352 | clk_put(timer->fclk); |
Timo Teras | fa4bb62 | 2006-09-25 12:41:35 +0300 | [diff] [blame] | 353 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 354 | WARN_ON(!timer->reserved); |
| 355 | timer->reserved = 0; |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 356 | return 0; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 357 | } |
| 358 | |
Timo Teras | 12583a7 | 2006-09-25 12:41:42 +0300 | [diff] [blame] | 359 | void omap_dm_timer_enable(struct omap_dm_timer *timer) |
| 360 | { |
NeilBrown | 9cc268d | 2013-03-19 12:38:15 -0500 | [diff] [blame] | 361 | int c; |
| 362 | |
Tarun Kanti DebBarma | ffe07ce | 2011-09-20 17:00:21 +0530 | [diff] [blame] | 363 | pm_runtime_get_sync(&timer->pdev->dev); |
NeilBrown | 9cc268d | 2013-03-19 12:38:15 -0500 | [diff] [blame] | 364 | |
| 365 | if (!(timer->capability & OMAP_TIMER_ALWON)) { |
| 366 | if (timer->get_context_loss_count) { |
| 367 | c = timer->get_context_loss_count(&timer->pdev->dev); |
| 368 | if (c != timer->ctx_loss_count) { |
| 369 | omap_timer_restore_context(timer); |
| 370 | timer->ctx_loss_count = c; |
| 371 | } |
Jon Hunter | 385c4c7 | 2013-03-19 12:38:16 -0500 | [diff] [blame] | 372 | } else { |
| 373 | omap_timer_restore_context(timer); |
NeilBrown | 9cc268d | 2013-03-19 12:38:15 -0500 | [diff] [blame] | 374 | } |
| 375 | } |
Timo Teras | 12583a7 | 2006-09-25 12:41:42 +0300 | [diff] [blame] | 376 | } |
| 377 | |
| 378 | void omap_dm_timer_disable(struct omap_dm_timer *timer) |
| 379 | { |
Jon Hunter | 54f32a3 | 2012-07-13 15:12:03 -0500 | [diff] [blame] | 380 | pm_runtime_put_sync(&timer->pdev->dev); |
Timo Teras | 12583a7 | 2006-09-25 12:41:42 +0300 | [diff] [blame] | 381 | } |
| 382 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 383 | int omap_dm_timer_get_irq(struct omap_dm_timer *timer) |
| 384 | { |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 385 | if (timer) |
| 386 | return timer->irq; |
| 387 | return -EINVAL; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 388 | } |
| 389 | |
| 390 | #if defined(CONFIG_ARCH_OMAP1) |
Tony Lindgren | 7136f8d | 2012-10-31 12:38:43 -0700 | [diff] [blame] | 391 | #include <mach/hardware.h> |
Tony Lindgren | a569c6e | 2006-04-02 17:46:21 +0100 | [diff] [blame] | 392 | /** |
| 393 | * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR |
| 394 | * @inputmask: current value of idlect mask |
| 395 | */ |
| 396 | __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask) |
| 397 | { |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 398 | int i = 0; |
| 399 | struct omap_dm_timer *timer = NULL; |
| 400 | unsigned long flags; |
Tony Lindgren | a569c6e | 2006-04-02 17:46:21 +0100 | [diff] [blame] | 401 | |
| 402 | /* If ARMXOR cannot be idled this function call is unnecessary */ |
| 403 | if (!(inputmask & (1 << 1))) |
| 404 | return inputmask; |
| 405 | |
| 406 | /* If any active timer is using ARMXOR return modified mask */ |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 407 | spin_lock_irqsave(&dm_timer_lock, flags); |
| 408 | list_for_each_entry(timer, &omap_timer_list, node) { |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 409 | u32 l; |
| 410 | |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 411 | l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 412 | if (l & OMAP_TIMER_CTRL_ST) { |
| 413 | if (((omap_readl(MOD_CONF_CTRL_1) >> (i * 2)) & 0x03) == 0) |
Tony Lindgren | a569c6e | 2006-04-02 17:46:21 +0100 | [diff] [blame] | 414 | inputmask &= ~(1 << 1); |
| 415 | else |
| 416 | inputmask &= ~(1 << 2); |
| 417 | } |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 418 | i++; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 419 | } |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 420 | spin_unlock_irqrestore(&dm_timer_lock, flags); |
Tony Lindgren | a569c6e | 2006-04-02 17:46:21 +0100 | [diff] [blame] | 421 | |
| 422 | return inputmask; |
| 423 | } |
| 424 | |
Tony Lindgren | 140455f | 2010-02-12 12:26:48 -0800 | [diff] [blame] | 425 | #else |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 426 | |
| 427 | struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer) |
| 428 | { |
Russell King | 8628795 | 2013-02-24 10:46:59 +0000 | [diff] [blame] | 429 | if (timer && !IS_ERR(timer->fclk)) |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 430 | return timer->fclk; |
| 431 | return NULL; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 432 | } |
| 433 | |
| 434 | __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask) |
| 435 | { |
| 436 | BUG(); |
Dirk Behme | 2121880 | 2006-12-06 17:14:00 -0800 | [diff] [blame] | 437 | |
| 438 | return 0; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 439 | } |
| 440 | |
| 441 | #endif |
| 442 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 443 | int omap_dm_timer_trigger(struct omap_dm_timer *timer) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 444 | { |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 445 | if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) { |
| 446 | pr_err("%s: timer not available or enabled.\n", __func__); |
| 447 | return -EINVAL; |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 448 | } |
| 449 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 450 | omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0); |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 451 | return 0; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 452 | } |
| 453 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 454 | int omap_dm_timer_start(struct omap_dm_timer *timer) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 455 | { |
| 456 | u32 l; |
| 457 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 458 | if (unlikely(!timer)) |
| 459 | return -EINVAL; |
| 460 | |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 461 | omap_dm_timer_enable(timer); |
| 462 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 463 | l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); |
| 464 | if (!(l & OMAP_TIMER_CTRL_ST)) { |
| 465 | l |= OMAP_TIMER_CTRL_ST; |
| 466 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); |
| 467 | } |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 468 | |
| 469 | /* Save the context */ |
| 470 | timer->context.tclr = l; |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 471 | return 0; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 472 | } |
| 473 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 474 | int omap_dm_timer_stop(struct omap_dm_timer *timer) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 475 | { |
Tony Lindgren | caf64f2 | 2011-03-29 15:54:48 -0700 | [diff] [blame] | 476 | unsigned long rate = 0; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 477 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 478 | if (unlikely(!timer)) |
| 479 | return -EINVAL; |
| 480 | |
Jon Hunter | 6615975 | 2012-06-05 12:34:57 -0500 | [diff] [blame] | 481 | if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 482 | rate = clk_get_rate(timer->fclk); |
Tony Lindgren | caf64f2 | 2011-03-29 15:54:48 -0700 | [diff] [blame] | 483 | |
Tony Lindgren | ee17f11 | 2011-09-16 15:44:20 -0700 | [diff] [blame] | 484 | __omap_dm_timer_stop(timer, timer->posted, rate); |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 485 | |
Tarun Kanti DebBarma | dffc9da | 2012-03-05 16:11:00 -0800 | [diff] [blame] | 486 | /* |
| 487 | * Since the register values are computed and written within |
| 488 | * __omap_dm_timer_stop, we need to use read to retrieve the |
| 489 | * context. |
| 490 | */ |
| 491 | timer->context.tclr = |
| 492 | omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); |
Tarun Kanti DebBarma | dffc9da | 2012-03-05 16:11:00 -0800 | [diff] [blame] | 493 | omap_dm_timer_disable(timer); |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 494 | return 0; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 495 | } |
| 496 | |
Paul Walmsley | f248076 | 2009-04-23 21:11:10 -0600 | [diff] [blame] | 497 | int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 498 | { |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 499 | int ret; |
Jon Hunter | 2b2d352 | 2012-06-05 12:34:59 -0500 | [diff] [blame] | 500 | char *parent_name = NULL; |
Jon Hunter | d7aba55 | 2012-07-18 20:10:12 -0500 | [diff] [blame] | 501 | struct clk *parent; |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 502 | struct dmtimer_platform_data *pdata; |
| 503 | |
| 504 | if (unlikely(!timer)) |
| 505 | return -EINVAL; |
| 506 | |
| 507 | pdata = timer->pdev->dev.platform_data; |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 508 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 509 | if (source < 0 || source >= 3) |
Paul Walmsley | f248076 | 2009-04-23 21:11:10 -0600 | [diff] [blame] | 510 | return -EINVAL; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 511 | |
Jon Hunter | 2b2d352 | 2012-06-05 12:34:59 -0500 | [diff] [blame] | 512 | /* |
| 513 | * FIXME: Used for OMAP1 devices only because they do not currently |
| 514 | * use the clock framework to set the parent clock. To be removed |
| 515 | * once OMAP1 migrated to using clock framework for dmtimers |
| 516 | */ |
Jon Hunter | 9725f44 | 2012-05-14 10:41:37 -0500 | [diff] [blame] | 517 | if (pdata && pdata->set_timer_src) |
Jon Hunter | 2b2d352 | 2012-06-05 12:34:59 -0500 | [diff] [blame] | 518 | return pdata->set_timer_src(timer->pdev, source); |
| 519 | |
Russell King | 8628795 | 2013-02-24 10:46:59 +0000 | [diff] [blame] | 520 | if (IS_ERR(timer->fclk)) |
Jon Hunter | 2b2d352 | 2012-06-05 12:34:59 -0500 | [diff] [blame] | 521 | return -EINVAL; |
Jon Hunter | 2b2d352 | 2012-06-05 12:34:59 -0500 | [diff] [blame] | 522 | |
Suman Anna | ea05d2e | 2015-10-05 18:28:21 -0500 | [diff] [blame] | 523 | #if defined(CONFIG_COMMON_CLK) |
| 524 | /* Check if the clock has configurable parents */ |
| 525 | if (clk_hw_get_num_parents(__clk_get_hw(timer->fclk)) < 2) |
| 526 | return 0; |
| 527 | #endif |
| 528 | |
Jon Hunter | 2b2d352 | 2012-06-05 12:34:59 -0500 | [diff] [blame] | 529 | switch (source) { |
| 530 | case OMAP_TIMER_SRC_SYS_CLK: |
Jon Hunter | c59b537 | 2012-06-05 12:35:00 -0500 | [diff] [blame] | 531 | parent_name = "timer_sys_ck"; |
Jon Hunter | 2b2d352 | 2012-06-05 12:34:59 -0500 | [diff] [blame] | 532 | break; |
| 533 | |
| 534 | case OMAP_TIMER_SRC_32_KHZ: |
Jon Hunter | c59b537 | 2012-06-05 12:35:00 -0500 | [diff] [blame] | 535 | parent_name = "timer_32k_ck"; |
Jon Hunter | 2b2d352 | 2012-06-05 12:34:59 -0500 | [diff] [blame] | 536 | break; |
| 537 | |
| 538 | case OMAP_TIMER_SRC_EXT_CLK: |
Jon Hunter | c59b537 | 2012-06-05 12:35:00 -0500 | [diff] [blame] | 539 | parent_name = "timer_ext_ck"; |
Jon Hunter | 2b2d352 | 2012-06-05 12:34:59 -0500 | [diff] [blame] | 540 | break; |
| 541 | } |
| 542 | |
| 543 | parent = clk_get(&timer->pdev->dev, parent_name); |
Russell King | 8628795 | 2013-02-24 10:46:59 +0000 | [diff] [blame] | 544 | if (IS_ERR(parent)) { |
Jon Hunter | 2b2d352 | 2012-06-05 12:34:59 -0500 | [diff] [blame] | 545 | pr_err("%s: %s not found\n", __func__, parent_name); |
Jon Hunter | d7aba55 | 2012-07-18 20:10:12 -0500 | [diff] [blame] | 546 | return -EINVAL; |
Jon Hunter | 2b2d352 | 2012-06-05 12:34:59 -0500 | [diff] [blame] | 547 | } |
| 548 | |
Jon Hunter | d7aba55 | 2012-07-18 20:10:12 -0500 | [diff] [blame] | 549 | ret = clk_set_parent(timer->fclk, parent); |
Russell King | c48cd65 | 2013-03-13 20:44:21 +0000 | [diff] [blame] | 550 | if (ret < 0) |
Jon Hunter | 2b2d352 | 2012-06-05 12:34:59 -0500 | [diff] [blame] | 551 | pr_err("%s: failed to set %s as parent\n", __func__, |
| 552 | parent_name); |
| 553 | |
| 554 | clk_put(parent); |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 555 | |
| 556 | return ret; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 557 | } |
| 558 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 559 | int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 560 | unsigned int load) |
| 561 | { |
| 562 | u32 l; |
| 563 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 564 | if (unlikely(!timer)) |
| 565 | return -EINVAL; |
| 566 | |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 567 | omap_dm_timer_enable(timer); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 568 | l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); |
| 569 | if (autoreload) |
| 570 | l |= OMAP_TIMER_CTRL_AR; |
| 571 | else |
| 572 | l &= ~OMAP_TIMER_CTRL_AR; |
| 573 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); |
| 574 | omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load); |
Richard Woodruff | 0f0d080 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 575 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 576 | omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 577 | /* Save the context */ |
| 578 | timer->context.tclr = l; |
| 579 | timer->context.tldr = load; |
| 580 | omap_dm_timer_disable(timer); |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 581 | return 0; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 582 | } |
| 583 | |
Richard Woodruff | 3fddd09 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 584 | /* Optimized set_load which removes costly spin wait in timer_start */ |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 585 | int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, |
Richard Woodruff | 3fddd09 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 586 | unsigned int load) |
| 587 | { |
| 588 | u32 l; |
| 589 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 590 | if (unlikely(!timer)) |
| 591 | return -EINVAL; |
| 592 | |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 593 | omap_dm_timer_enable(timer); |
| 594 | |
Richard Woodruff | 3fddd09 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 595 | l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); |
Paul Walmsley | 64ce290 | 2008-12-10 17:36:34 -0800 | [diff] [blame] | 596 | if (autoreload) { |
Richard Woodruff | 3fddd09 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 597 | l |= OMAP_TIMER_CTRL_AR; |
Paul Walmsley | 64ce290 | 2008-12-10 17:36:34 -0800 | [diff] [blame] | 598 | omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load); |
| 599 | } else { |
Richard Woodruff | 3fddd09 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 600 | l &= ~OMAP_TIMER_CTRL_AR; |
Paul Walmsley | 64ce290 | 2008-12-10 17:36:34 -0800 | [diff] [blame] | 601 | } |
Richard Woodruff | 3fddd09 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 602 | l |= OMAP_TIMER_CTRL_ST; |
| 603 | |
Tony Lindgren | ee17f11 | 2011-09-16 15:44:20 -0700 | [diff] [blame] | 604 | __omap_dm_timer_load_start(timer, l, load, timer->posted); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 605 | |
| 606 | /* Save the context */ |
| 607 | timer->context.tclr = l; |
| 608 | timer->context.tldr = load; |
| 609 | timer->context.tcrr = load; |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 610 | return 0; |
Richard Woodruff | 3fddd09 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 611 | } |
| 612 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 613 | int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 614 | unsigned int match) |
| 615 | { |
| 616 | u32 l; |
| 617 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 618 | if (unlikely(!timer)) |
| 619 | return -EINVAL; |
| 620 | |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 621 | omap_dm_timer_enable(timer); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 622 | l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); |
Timo Teras | 83379c8 | 2006-06-26 16:16:23 -0700 | [diff] [blame] | 623 | if (enable) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 624 | l |= OMAP_TIMER_CTRL_CE; |
| 625 | else |
| 626 | l &= ~OMAP_TIMER_CTRL_CE; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 627 | omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match); |
Jon Hunter | 991ad16 | 2012-10-04 18:17:42 -0500 | [diff] [blame] | 628 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 629 | |
| 630 | /* Save the context */ |
| 631 | timer->context.tclr = l; |
| 632 | timer->context.tmar = match; |
| 633 | omap_dm_timer_disable(timer); |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 634 | return 0; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 635 | } |
| 636 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 637 | int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 638 | int toggle, int trigger) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 639 | { |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 640 | u32 l; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 641 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 642 | if (unlikely(!timer)) |
| 643 | return -EINVAL; |
| 644 | |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 645 | omap_dm_timer_enable(timer); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 646 | l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); |
| 647 | l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM | |
| 648 | OMAP_TIMER_CTRL_PT | (0x03 << 10)); |
| 649 | if (def_on) |
| 650 | l |= OMAP_TIMER_CTRL_SCPWM; |
| 651 | if (toggle) |
| 652 | l |= OMAP_TIMER_CTRL_PT; |
| 653 | l |= trigger << 10; |
| 654 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 655 | |
| 656 | /* Save the context */ |
| 657 | timer->context.tclr = l; |
| 658 | omap_dm_timer_disable(timer); |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 659 | return 0; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 660 | } |
| 661 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 662 | int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler) |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 663 | { |
| 664 | u32 l; |
| 665 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 666 | if (unlikely(!timer)) |
| 667 | return -EINVAL; |
| 668 | |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 669 | omap_dm_timer_enable(timer); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 670 | l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); |
| 671 | l &= ~(OMAP_TIMER_CTRL_PRE | (0x07 << 2)); |
| 672 | if (prescaler >= 0x00 && prescaler <= 0x07) { |
| 673 | l |= OMAP_TIMER_CTRL_PRE; |
| 674 | l |= prescaler << 2; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 675 | } |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 676 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 677 | |
| 678 | /* Save the context */ |
| 679 | timer->context.tclr = l; |
| 680 | omap_dm_timer_disable(timer); |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 681 | return 0; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 682 | } |
| 683 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 684 | int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 685 | unsigned int value) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 686 | { |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 687 | if (unlikely(!timer)) |
| 688 | return -EINVAL; |
| 689 | |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 690 | omap_dm_timer_enable(timer); |
Tony Lindgren | ee17f11 | 2011-09-16 15:44:20 -0700 | [diff] [blame] | 691 | __omap_dm_timer_int_enable(timer, value); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 692 | |
| 693 | /* Save the context */ |
| 694 | timer->context.tier = value; |
| 695 | timer->context.twer = value; |
| 696 | omap_dm_timer_disable(timer); |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 697 | return 0; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 698 | } |
| 699 | |
Jon Hunter | 4249d96 | 2012-07-13 14:03:18 -0500 | [diff] [blame] | 700 | /** |
| 701 | * omap_dm_timer_set_int_disable - disable timer interrupts |
| 702 | * @timer: pointer to timer handle |
| 703 | * @mask: bit mask of interrupts to be disabled |
| 704 | * |
| 705 | * Disables the specified timer interrupts for a timer. |
| 706 | */ |
| 707 | int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask) |
| 708 | { |
| 709 | u32 l = mask; |
| 710 | |
| 711 | if (unlikely(!timer)) |
| 712 | return -EINVAL; |
| 713 | |
| 714 | omap_dm_timer_enable(timer); |
| 715 | |
| 716 | if (timer->revision == 1) |
Victor Kamensky | 834cacf | 2014-04-15 20:37:47 +0300 | [diff] [blame] | 717 | l = readl_relaxed(timer->irq_ena) & ~mask; |
Jon Hunter | 4249d96 | 2012-07-13 14:03:18 -0500 | [diff] [blame] | 718 | |
Victor Kamensky | 834cacf | 2014-04-15 20:37:47 +0300 | [diff] [blame] | 719 | writel_relaxed(l, timer->irq_dis); |
Jon Hunter | 4249d96 | 2012-07-13 14:03:18 -0500 | [diff] [blame] | 720 | l = omap_dm_timer_read_reg(timer, OMAP_TIMER_WAKEUP_EN_REG) & ~mask; |
| 721 | omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, l); |
| 722 | |
| 723 | /* Save the context */ |
| 724 | timer->context.tier &= ~mask; |
| 725 | timer->context.twer &= ~mask; |
| 726 | omap_dm_timer_disable(timer); |
| 727 | return 0; |
| 728 | } |
Jon Hunter | 4249d96 | 2012-07-13 14:03:18 -0500 | [diff] [blame] | 729 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 730 | unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer) |
| 731 | { |
Timo Teras | fa4bb62 | 2006-09-25 12:41:35 +0300 | [diff] [blame] | 732 | unsigned int l; |
| 733 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 734 | if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) { |
| 735 | pr_err("%s: timer not available or enabled.\n", __func__); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 736 | return 0; |
| 737 | } |
| 738 | |
Victor Kamensky | 834cacf | 2014-04-15 20:37:47 +0300 | [diff] [blame] | 739 | l = readl_relaxed(timer->irq_stat); |
Timo Teras | fa4bb62 | 2006-09-25 12:41:35 +0300 | [diff] [blame] | 740 | |
| 741 | return l; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 742 | } |
| 743 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 744 | int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 745 | { |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 746 | if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) |
| 747 | return -EINVAL; |
| 748 | |
Tony Lindgren | ee17f11 | 2011-09-16 15:44:20 -0700 | [diff] [blame] | 749 | __omap_dm_timer_write_status(timer, value); |
Jon Hunter | 1eaff71 | 2012-10-04 17:01:14 -0500 | [diff] [blame] | 750 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 751 | return 0; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 752 | } |
| 753 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 754 | unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer) |
| 755 | { |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 756 | if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) { |
| 757 | pr_err("%s: timer not iavailable or enabled.\n", __func__); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 758 | return 0; |
| 759 | } |
| 760 | |
Tony Lindgren | ee17f11 | 2011-09-16 15:44:20 -0700 | [diff] [blame] | 761 | return __omap_dm_timer_read_counter(timer, timer->posted); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 762 | } |
| 763 | |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 764 | int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value) |
Timo Teras | 83379c8 | 2006-06-26 16:16:23 -0700 | [diff] [blame] | 765 | { |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 766 | if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) { |
| 767 | pr_err("%s: timer not available or enabled.\n", __func__); |
| 768 | return -EINVAL; |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 769 | } |
| 770 | |
Timo Teras | fa4bb62 | 2006-09-25 12:41:35 +0300 | [diff] [blame] | 771 | omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value); |
Tarun Kanti DebBarma | b481113 | 2011-09-20 17:00:24 +0530 | [diff] [blame] | 772 | |
| 773 | /* Save the context */ |
| 774 | timer->context.tcrr = value; |
Tarun Kanti DebBarma | ab4eb8b | 2011-09-20 17:00:26 +0530 | [diff] [blame] | 775 | return 0; |
Timo Teras | 83379c8 | 2006-06-26 16:16:23 -0700 | [diff] [blame] | 776 | } |
| 777 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 778 | int omap_dm_timers_active(void) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 779 | { |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 780 | struct omap_dm_timer *timer; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 781 | |
Tarun Kanti DebBarma | 3392cdd | 2011-09-20 17:00:20 +0530 | [diff] [blame] | 782 | list_for_each_entry(timer, &omap_timer_list, node) { |
Tarun Kanti DebBarma | ffe07ce | 2011-09-20 17:00:21 +0530 | [diff] [blame] | 783 | if (!timer->reserved) |
Timo Teras | 12583a7 | 2006-09-25 12:41:42 +0300 | [diff] [blame] | 784 | continue; |
| 785 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 786 | if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG) & |
Timo Teras | fa4bb62 | 2006-09-25 12:41:35 +0300 | [diff] [blame] | 787 | OMAP_TIMER_CTRL_ST) { |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 788 | return 1; |
Timo Teras | fa4bb62 | 2006-09-25 12:41:35 +0300 | [diff] [blame] | 789 | } |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 790 | } |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 791 | return 0; |
| 792 | } |
| 793 | |
Jon Hunter | d1c6ccf | 2013-03-19 12:38:19 -0500 | [diff] [blame] | 794 | static const struct of_device_id omap_timer_match[]; |
| 795 | |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 796 | /** |
| 797 | * omap_dm_timer_probe - probe function called for every registered device |
| 798 | * @pdev: pointer to current timer platform device |
| 799 | * |
| 800 | * Called by driver framework at the end of device registration for all |
| 801 | * timer devices. |
| 802 | */ |
Greg Kroah-Hartman | 351a102 | 2012-12-21 14:02:24 -0800 | [diff] [blame] | 803 | static int omap_dm_timer_probe(struct platform_device *pdev) |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 804 | { |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 805 | unsigned long flags; |
| 806 | struct omap_dm_timer *timer; |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 807 | struct resource *mem, *irq; |
| 808 | struct device *dev = &pdev->dev; |
Jon Hunter | d1c6ccf | 2013-03-19 12:38:19 -0500 | [diff] [blame] | 809 | const struct dmtimer_platform_data *pdata; |
Suman Anna | a76fc9d | 2015-03-16 20:14:02 -0500 | [diff] [blame] | 810 | int ret; |
Jon Hunter | d1c6ccf | 2013-03-19 12:38:19 -0500 | [diff] [blame] | 811 | |
Ladislav Michl | 1a3acad | 2018-02-15 11:31:49 +0530 | [diff] [blame^] | 812 | pdata = of_device_get_match_data(dev); |
| 813 | if (!pdata) |
| 814 | pdata = dev_get_platdata(dev); |
| 815 | else |
| 816 | dev->platform_data = (void *)pdata; |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 817 | |
Ladislav Michl | 1a3acad | 2018-02-15 11:31:49 +0530 | [diff] [blame^] | 818 | if (!pdata) { |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 819 | dev_err(dev, "%s: no platform data.\n", __func__); |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 820 | return -ENODEV; |
| 821 | } |
| 822 | |
| 823 | irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 824 | if (unlikely(!irq)) { |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 825 | dev_err(dev, "%s: no IRQ resource.\n", __func__); |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 826 | return -ENODEV; |
| 827 | } |
| 828 | |
| 829 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 830 | if (unlikely(!mem)) { |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 831 | dev_err(dev, "%s: no memory resource.\n", __func__); |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 832 | return -ENODEV; |
| 833 | } |
| 834 | |
Markus Elfring | 16e7ea5 | 2017-10-03 20:46:48 +0200 | [diff] [blame] | 835 | timer = devm_kzalloc(dev, sizeof(*timer), GFP_KERNEL); |
Markus Elfring | d679950 | 2017-10-03 13:10:26 +0200 | [diff] [blame] | 836 | if (!timer) |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 837 | return -ENOMEM; |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 838 | |
Russell King | 8628795 | 2013-02-24 10:46:59 +0000 | [diff] [blame] | 839 | timer->fclk = ERR_PTR(-ENODEV); |
Thierry Reding | 5857bd9 | 2013-01-21 11:08:55 +0100 | [diff] [blame] | 840 | timer->io_base = devm_ioremap_resource(dev, mem); |
| 841 | if (IS_ERR(timer->io_base)) |
| 842 | return PTR_ERR(timer->io_base); |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 843 | |
Jon Hunter | 9725f44 | 2012-05-14 10:41:37 -0500 | [diff] [blame] | 844 | if (dev->of_node) { |
| 845 | if (of_find_property(dev->of_node, "ti,timer-alwon", NULL)) |
| 846 | timer->capability |= OMAP_TIMER_ALWON; |
| 847 | if (of_find_property(dev->of_node, "ti,timer-dsp", NULL)) |
| 848 | timer->capability |= OMAP_TIMER_HAS_DSP_IRQ; |
| 849 | if (of_find_property(dev->of_node, "ti,timer-pwm", NULL)) |
| 850 | timer->capability |= OMAP_TIMER_HAS_PWM; |
| 851 | if (of_find_property(dev->of_node, "ti,timer-secure", NULL)) |
| 852 | timer->capability |= OMAP_TIMER_SECURE; |
| 853 | } else { |
| 854 | timer->id = pdev->id; |
| 855 | timer->capability = pdata->timer_capability; |
| 856 | timer->reserved = omap_dm_timer_reserved_systimer(timer->id); |
Tony Lindgren | f56f52e | 2012-11-09 14:54:17 -0800 | [diff] [blame] | 857 | timer->get_context_loss_count = pdata->get_context_loss_count; |
Jon Hunter | 9725f44 | 2012-05-14 10:41:37 -0500 | [diff] [blame] | 858 | } |
| 859 | |
Jon Hunter | d1c6ccf | 2013-03-19 12:38:19 -0500 | [diff] [blame] | 860 | if (pdata) |
| 861 | timer->errata = pdata->timer_errata; |
| 862 | |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 863 | timer->irq = irq->start; |
| 864 | timer->pdev = pdev; |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 865 | |
Tony Lindgren | ba68878 | 2018-02-22 10:02:49 -0800 | [diff] [blame] | 866 | pm_runtime_enable(dev); |
| 867 | pm_runtime_irq_safe(dev); |
Tarun Kanti DebBarma | ffe07ce | 2011-09-20 17:00:21 +0530 | [diff] [blame] | 868 | |
Tony Lindgren | 0dad9fa | 2011-09-21 16:38:51 -0700 | [diff] [blame] | 869 | if (!timer->reserved) { |
Suman Anna | a76fc9d | 2015-03-16 20:14:02 -0500 | [diff] [blame] | 870 | ret = pm_runtime_get_sync(dev); |
| 871 | if (ret < 0) { |
| 872 | dev_err(dev, "%s: pm_runtime_get_sync failed!\n", |
| 873 | __func__); |
| 874 | goto err_get_sync; |
| 875 | } |
Tony Lindgren | 0dad9fa | 2011-09-21 16:38:51 -0700 | [diff] [blame] | 876 | __omap_dm_timer_init_regs(timer); |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 877 | pm_runtime_put(dev); |
Tony Lindgren | 0dad9fa | 2011-09-21 16:38:51 -0700 | [diff] [blame] | 878 | } |
| 879 | |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 880 | /* add the timer element to the list */ |
| 881 | spin_lock_irqsave(&dm_timer_lock, flags); |
| 882 | list_add_tail(&timer->node, &omap_timer_list); |
| 883 | spin_unlock_irqrestore(&dm_timer_lock, flags); |
| 884 | |
Tarun Kanti DebBarma | 74dd9ec | 2012-04-20 18:09:20 +0530 | [diff] [blame] | 885 | dev_dbg(dev, "Device Probed.\n"); |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 886 | |
| 887 | return 0; |
Suman Anna | a76fc9d | 2015-03-16 20:14:02 -0500 | [diff] [blame] | 888 | |
| 889 | err_get_sync: |
| 890 | pm_runtime_put_noidle(dev); |
| 891 | pm_runtime_disable(dev); |
| 892 | return ret; |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 893 | } |
| 894 | |
| 895 | /** |
| 896 | * omap_dm_timer_remove - cleanup a registered timer device |
| 897 | * @pdev: pointer to current timer platform device |
| 898 | * |
| 899 | * Called by driver framework whenever a timer device is unregistered. |
| 900 | * In addition to freeing platform resources it also deletes the timer |
| 901 | * entry from the local list. |
| 902 | */ |
Greg Kroah-Hartman | 351a102 | 2012-12-21 14:02:24 -0800 | [diff] [blame] | 903 | static int omap_dm_timer_remove(struct platform_device *pdev) |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 904 | { |
| 905 | struct omap_dm_timer *timer; |
| 906 | unsigned long flags; |
| 907 | int ret = -EINVAL; |
| 908 | |
| 909 | spin_lock_irqsave(&dm_timer_lock, flags); |
| 910 | list_for_each_entry(timer, &omap_timer_list, node) |
Jon Hunter | 9725f44 | 2012-05-14 10:41:37 -0500 | [diff] [blame] | 911 | if (!strcmp(dev_name(&timer->pdev->dev), |
| 912 | dev_name(&pdev->dev))) { |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 913 | list_del(&timer->node); |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 914 | ret = 0; |
| 915 | break; |
| 916 | } |
| 917 | spin_unlock_irqrestore(&dm_timer_lock, flags); |
| 918 | |
Suman Anna | 51b7e57 | 2015-03-16 20:14:03 -0500 | [diff] [blame] | 919 | pm_runtime_disable(&pdev->dev); |
| 920 | |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 921 | return ret; |
| 922 | } |
| 923 | |
Keerthy | 76234f7 | 2018-02-15 11:31:48 +0530 | [diff] [blame] | 924 | const static struct omap_dm_timer_ops dmtimer_ops = { |
| 925 | .request_by_node = omap_dm_timer_request_by_node, |
| 926 | .request_specific = omap_dm_timer_request_specific, |
| 927 | .request = omap_dm_timer_request, |
| 928 | .set_source = omap_dm_timer_set_source, |
| 929 | .get_irq = omap_dm_timer_get_irq, |
| 930 | .set_int_enable = omap_dm_timer_set_int_enable, |
| 931 | .set_int_disable = omap_dm_timer_set_int_disable, |
| 932 | .free = omap_dm_timer_free, |
| 933 | .enable = omap_dm_timer_enable, |
| 934 | .disable = omap_dm_timer_disable, |
| 935 | .get_fclk = omap_dm_timer_get_fclk, |
| 936 | .start = omap_dm_timer_start, |
| 937 | .stop = omap_dm_timer_stop, |
| 938 | .set_load = omap_dm_timer_set_load, |
| 939 | .set_match = omap_dm_timer_set_match, |
| 940 | .set_pwm = omap_dm_timer_set_pwm, |
| 941 | .set_prescaler = omap_dm_timer_set_prescaler, |
| 942 | .read_counter = omap_dm_timer_read_counter, |
| 943 | .write_counter = omap_dm_timer_write_counter, |
| 944 | .read_status = omap_dm_timer_read_status, |
| 945 | .write_status = omap_dm_timer_write_status, |
| 946 | }; |
| 947 | |
Jon Hunter | d1c6ccf | 2013-03-19 12:38:19 -0500 | [diff] [blame] | 948 | static const struct dmtimer_platform_data omap3plus_pdata = { |
| 949 | .timer_errata = OMAP_TIMER_ERRATA_I103_I767, |
Keerthy | 76234f7 | 2018-02-15 11:31:48 +0530 | [diff] [blame] | 950 | .timer_ops = &dmtimer_ops, |
Jon Hunter | d1c6ccf | 2013-03-19 12:38:19 -0500 | [diff] [blame] | 951 | }; |
| 952 | |
Jon Hunter | 9725f44 | 2012-05-14 10:41:37 -0500 | [diff] [blame] | 953 | static const struct of_device_id omap_timer_match[] = { |
Jon Hunter | d1c6ccf | 2013-03-19 12:38:19 -0500 | [diff] [blame] | 954 | { |
| 955 | .compatible = "ti,omap2420-timer", |
| 956 | }, |
| 957 | { |
| 958 | .compatible = "ti,omap3430-timer", |
| 959 | .data = &omap3plus_pdata, |
| 960 | }, |
| 961 | { |
| 962 | .compatible = "ti,omap4430-timer", |
| 963 | .data = &omap3plus_pdata, |
| 964 | }, |
| 965 | { |
| 966 | .compatible = "ti,omap5430-timer", |
| 967 | .data = &omap3plus_pdata, |
| 968 | }, |
| 969 | { |
| 970 | .compatible = "ti,am335x-timer", |
| 971 | .data = &omap3plus_pdata, |
| 972 | }, |
| 973 | { |
| 974 | .compatible = "ti,am335x-timer-1ms", |
| 975 | .data = &omap3plus_pdata, |
| 976 | }, |
Neil Armstrong | 8c0cabd | 2015-10-22 11:18:53 +0200 | [diff] [blame] | 977 | { |
| 978 | .compatible = "ti,dm816-timer", |
| 979 | .data = &omap3plus_pdata, |
| 980 | }, |
Jon Hunter | 9725f44 | 2012-05-14 10:41:37 -0500 | [diff] [blame] | 981 | {}, |
| 982 | }; |
| 983 | MODULE_DEVICE_TABLE(of, omap_timer_match); |
| 984 | |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 985 | static struct platform_driver omap_dm_timer_driver = { |
| 986 | .probe = omap_dm_timer_probe, |
Greg Kroah-Hartman | 351a102 | 2012-12-21 14:02:24 -0800 | [diff] [blame] | 987 | .remove = omap_dm_timer_remove, |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 988 | .driver = { |
| 989 | .name = "omap_timer", |
Jon Hunter | 9725f44 | 2012-05-14 10:41:37 -0500 | [diff] [blame] | 990 | .of_match_table = of_match_ptr(omap_timer_match), |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 991 | }, |
| 992 | }; |
| 993 | |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 994 | early_platform_init("earlytimer", &omap_dm_timer_driver); |
Srinivas Kandagatla | e4e9f7e | 2012-12-16 11:30:02 -0800 | [diff] [blame] | 995 | module_platform_driver(omap_dm_timer_driver); |
Tarun Kanti DebBarma | df28472 | 2011-09-20 17:00:19 +0530 | [diff] [blame] | 996 | |
| 997 | MODULE_DESCRIPTION("OMAP Dual-Mode Timer Driver"); |
| 998 | MODULE_LICENSE("GPL"); |
| 999 | MODULE_ALIAS("platform:" DRIVER_NAME); |
| 1000 | MODULE_AUTHOR("Texas Instruments Inc"); |