blob: 6d57da96bf8c7e6ad655ffb78fd635727e65bb67 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Copyright 2004 James Cleverdon, IBM.
3 * Subject to the GNU Public License, v.2
4 *
Andi Kleenf8d31192005-07-28 21:15:42 -07005 * Flat APIC subarch code.
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 *
7 * Hacked for x86-64 by James Cleverdon from i386 architecture code by
8 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
9 * James Cleverdon.
10 */
11#include <linux/config.h>
12#include <linux/threads.h>
13#include <linux/cpumask.h>
14#include <linux/string.h>
15#include <linux/kernel.h>
16#include <linux/ctype.h>
17#include <linux/init.h>
18#include <asm/smp.h>
19#include <asm/ipi.h>
20
Linus Torvalds1da177e2005-04-16 15:20:36 -070021static cpumask_t flat_target_cpus(void)
22{
23 return cpu_online_map;
24}
25
26/*
27 * Set up the logical destination ID.
28 *
29 * Intel recommends to set DFR, LDR and TPR before enabling
30 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
31 * document number 292116). So here it goes...
32 */
33static void flat_init_apic_ldr(void)
34{
35 unsigned long val;
36 unsigned long num, id;
37
38 num = smp_processor_id();
39 id = 1UL << num;
40 x86_cpu_to_log_apicid[num] = id;
41 apic_write_around(APIC_DFR, APIC_DFR_FLAT);
42 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
43 val |= SET_APIC_LOGICAL_ID(id);
44 apic_write_around(APIC_LDR, val);
45}
46
Linus Torvalds1da177e2005-04-16 15:20:36 -070047static void flat_send_IPI_mask(cpumask_t cpumask, int vector)
48{
49 unsigned long mask = cpus_addr(cpumask)[0];
50 unsigned long cfg;
51 unsigned long flags;
52
53 local_save_flags(flags);
54 local_irq_disable();
55
56 /*
57 * Wait for idle.
58 */
59 apic_wait_icr_idle();
60
61 /*
62 * prepare target chip field
63 */
64 cfg = __prepare_ICR2(mask);
65 apic_write_around(APIC_ICR2, cfg);
66
67 /*
68 * program the ICR
69 */
70 cfg = __prepare_ICR(0, vector, APIC_DEST_LOGICAL);
71
72 /*
73 * Send the IPI. The write to APIC_ICR fires this off.
74 */
75 apic_write_around(APIC_ICR, cfg);
76 local_irq_restore(flags);
77}
78
Ashok Raj884d9e42005-06-25 14:55:02 -070079static void flat_send_IPI_allbutself(int vector)
80{
Ashok Rajfdf26d92005-09-09 13:01:52 -070081#ifndef CONFIG_HOTPLUG_CPU
Ashok Raja02c4cb2005-06-25 14:55:03 -070082 if (((num_online_cpus()) - 1) >= 1)
Andi Kleen37a47e62005-07-28 21:15:41 -070083 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector,APIC_DEST_LOGICAL);
Ashok Rajfdf26d92005-09-09 13:01:52 -070084#else
85 cpumask_t allbutme = cpu_online_map;
86 int me = get_cpu(); /* Ensure we are not preempted when we clear */
87 cpu_clear(me, allbutme);
88
89 if (!cpus_empty(allbutme))
90 flat_send_IPI_mask(allbutme, vector);
91 put_cpu();
92#endif
Ashok Raj884d9e42005-06-25 14:55:02 -070093}
94
95static void flat_send_IPI_all(int vector)
96{
Andi Kleen37a47e62005-07-28 21:15:41 -070097 __send_IPI_shortcut(APIC_DEST_ALLINC, vector, APIC_DEST_LOGICAL);
Ashok Raj884d9e42005-06-25 14:55:02 -070098}
99
Linus Torvalds1da177e2005-04-16 15:20:36 -0700100static int flat_apic_id_registered(void)
101{
102 return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map);
103}
104
105static unsigned int flat_cpu_mask_to_apicid(cpumask_t cpumask)
106{
107 return cpus_addr(cpumask)[0] & APIC_ALL_CPUS;
108}
109
110static unsigned int phys_pkg_id(int index_msb)
111{
112 u32 ebx;
113
114 ebx = cpuid_ebx(1);
115 return ((ebx >> 24) & 0xFF) >> index_msb;
116}
117
118struct genapic apic_flat = {
119 .name = "flat",
120 .int_delivery_mode = dest_LowestPrio,
121 .int_dest_mode = (APIC_DEST_LOGICAL != 0),
122 .int_delivery_dest = APIC_DEST_LOGICAL | APIC_DM_LOWEST,
123 .target_cpus = flat_target_cpus,
124 .apic_id_registered = flat_apic_id_registered,
125 .init_apic_ldr = flat_init_apic_ldr,
126 .send_IPI_all = flat_send_IPI_all,
127 .send_IPI_allbutself = flat_send_IPI_allbutself,
128 .send_IPI_mask = flat_send_IPI_mask,
129 .cpu_mask_to_apicid = flat_cpu_mask_to_apicid,
130 .phys_pkg_id = phys_pkg_id,
131};
Andi Kleenf8d31192005-07-28 21:15:42 -0700132
133/*
134 * Physflat mode is used when there are more than 8 CPUs on a AMD system.
135 * We cannot use logical delivery in this case because the mask
136 * overflows, so use physical mode.
137 */
138
139static cpumask_t physflat_target_cpus(void)
140{
141 return cpumask_of_cpu(0);
142}
143
144static void physflat_send_IPI_mask(cpumask_t cpumask, int vector)
145{
146 send_IPI_mask_sequence(cpumask, vector);
147}
148
149static void physflat_send_IPI_allbutself(int vector)
150{
151 cpumask_t allbutme = cpu_online_map;
152 int me = get_cpu();
153 cpu_clear(me, allbutme);
154 physflat_send_IPI_mask(allbutme, vector);
155 put_cpu();
156}
157
158static void physflat_send_IPI_all(int vector)
159{
160 physflat_send_IPI_mask(cpu_online_map, vector);
161}
162
163static unsigned int physflat_cpu_mask_to_apicid(cpumask_t cpumask)
164{
165 int cpu;
166
167 /*
168 * We're using fixed IRQ delivery, can only return one phys APIC ID.
169 * May as well be the first.
170 */
171 cpu = first_cpu(cpumask);
172 if ((unsigned)cpu < NR_CPUS)
173 return x86_cpu_to_apicid[cpu];
174 else
175 return BAD_APICID;
176}
177
178struct genapic apic_physflat = {
179 .name = "physical flat",
180 .int_delivery_mode = dest_LowestPrio,
181 .int_dest_mode = (APIC_DEST_PHYSICAL != 0),
182 .int_delivery_dest = APIC_DEST_PHYSICAL | APIC_DM_LOWEST,
183 .target_cpus = physflat_target_cpus,
184 .apic_id_registered = flat_apic_id_registered,
185 .init_apic_ldr = flat_init_apic_ldr,/*not needed, but shouldn't hurt*/
186 .send_IPI_all = physflat_send_IPI_all,
187 .send_IPI_allbutself = physflat_send_IPI_allbutself,
188 .send_IPI_mask = physflat_send_IPI_mask,
189 .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid,
190 .phys_pkg_id = phys_pkg_id,
191};