blob: 0587d9c4609d4e01696da915a7a3f582d5c3156c [file] [log] [blame]
Stephen Rothwellcabb5582005-09-30 16:16:52 +10001#include <linux/config.h>
2#ifdef CONFIG_PPC64
3#include <asm/page.h>
4#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +10005#include <asm-generic/vmlinux.lds.h>
6
Stephen Rothwellcabb5582005-09-30 16:16:52 +10007#ifdef CONFIG_PPC64
8OUTPUT_ARCH(powerpc:common64)
9jiffies = jiffies_64;
10#else
Paul Mackerras14cf11a2005-09-26 16:04:21 +100011OUTPUT_ARCH(powerpc:common)
12jiffies = jiffies_64 + 4;
Stephen Rothwellcabb5582005-09-30 16:16:52 +100013#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +100014SECTIONS
15{
Stephen Rothwellcabb5582005-09-30 16:16:52 +100016 /* Sections to be discarded. */
17 /DISCARD/ : {
18 *(.exitcall.exit)
19#ifdef CONFIG_PPC32
20 *(.exit.data)
21#endif
22 }
23
24
Paul Mackerras14cf11a2005-09-26 16:04:21 +100025 /* Read-only sections, merged into text segment: */
Stephen Rothwellcabb5582005-09-30 16:16:52 +100026#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +100027 . = + SIZEOF_HEADERS;
28 .interp : { *(.interp) }
29 .hash : { *(.hash) }
30 .dynsym : { *(.dynsym) }
31 .dynstr : { *(.dynstr) }
32 .rel.text : { *(.rel.text) }
33 .rela.text : { *(.rela.text) }
34 .rel.data : { *(.rel.data) }
35 .rela.data : { *(.rela.data) }
36 .rel.rodata : { *(.rel.rodata) }
37 .rela.rodata : { *(.rela.rodata) }
38 .rel.got : { *(.rel.got) }
39 .rela.got : { *(.rela.got) }
40 .rel.ctors : { *(.rel.ctors) }
41 .rela.ctors : { *(.rela.ctors) }
42 .rel.dtors : { *(.rel.dtors) }
43 .rela.dtors : { *(.rela.dtors) }
44 .rel.bss : { *(.rel.bss) }
45 .rela.bss : { *(.rela.bss) }
46 .rel.plt : { *(.rel.plt) }
47 .rela.plt : { *(.rela.plt) }
48/* .init : { *(.init) } =0*/
49 .plt : { *(.plt) }
Stephen Rothwellcabb5582005-09-30 16:16:52 +100050#endif
51 .text : {
52#ifdef CONFIG_PPC64
53 *(.text .text.*)
54#else
Paul Mackerras14cf11a2005-09-26 16:04:21 +100055 *(.text)
Stephen Rothwellcabb5582005-09-30 16:16:52 +100056#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +100057 SCHED_TEXT
58 LOCK_TEXT
Stephen Rothwellcabb5582005-09-30 16:16:52 +100059#ifdef CONFIG_PPC64
60 KPROBES_TEXT
61#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +100062 *(.fixup)
Stephen Rothwellcabb5582005-09-30 16:16:52 +100063#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +100064 *(.got1)
65 __got2_start = .;
66 *(.got2)
67 __got2_end = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +100068#else
69 . = ALIGN(PAGE_SIZE);
70 _etext = .;
71#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +100072 }
Stephen Rothwellcabb5582005-09-30 16:16:52 +100073#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +100074 _etext = .;
75 PROVIDE (etext = .);
76
77 RODATA
78 .fini : { *(.fini) } =0
79 .ctors : { *(.ctors) }
80 .dtors : { *(.dtors) }
81
82 .fixup : { *(.fixup) }
Stephen Rothwellcabb5582005-09-30 16:16:52 +100083#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +100084
85 __ex_table : {
86 __start___ex_table = .;
87 *(__ex_table)
88 __stop___ex_table = .;
89 }
90
91 __bug_table : {
92 __start___bug_table = .;
93 *(__bug_table)
94 __stop___bug_table = .;
95 }
96
Stephen Rothwellcabb5582005-09-30 16:16:52 +100097#ifdef CONFIG_PPC64
98 __ftr_fixup : {
99 __start___ftr_fixup = .;
100 *(__ftr_fixup)
101 __stop___ftr_fixup = .;
102 }
103
104 RODATA
105#endif
106
107#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000108 /* Read-write section, merged into data segment: */
109 . = ALIGN(4096);
110 .data :
111 {
112 *(.data)
113 *(.data1)
114 *(.sdata)
115 *(.sdata2)
116 *(.got.plt) *(.got)
117 *(.dynamic)
118 CONSTRUCTORS
119 }
120
121 . = ALIGN(4096);
122 __nosave_begin = .;
123 .data_nosave : { *(.data.nosave) }
124 . = ALIGN(4096);
125 __nosave_end = .;
126
127 . = ALIGN(32);
128 .data.cacheline_aligned : { *(.data.cacheline_aligned) }
129
130 _edata = .;
131 PROVIDE (edata = .);
132
133 . = ALIGN(8192);
134 .data.init_task : { *(.data.init_task) }
135
136 . = ALIGN(4096);
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000137#else
138 /* will be freed after init */
139 . = ALIGN(PAGE_SIZE);
140#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000141 __init_begin = .;
142 .init.text : {
143 _sinittext = .;
144 *(.init.text)
145 _einittext = .;
146 }
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000147#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000148 /* .exit.text is discarded at runtime, not link time,
149 to deal with references from __bug_table */
150 .exit.text : { *(.exit.text) }
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000151#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000152 .init.data : {
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000153#ifdef CONFIG_PPC64
154 *(.init.data)
155#else
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000156 *(.init.data);
157 __vtop_table_begin = .;
158 *(.vtop_fixup);
159 __vtop_table_end = .;
160 __ptov_table_begin = .;
161 *(.ptov_fixup);
162 __ptov_table_end = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000163#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000164 }
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000165
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000166 . = ALIGN(16);
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000167#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000168 __setup_start = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000169#endif
170 .init.setup : {
171#ifdef CONFIG_PPC64
172 __setup_start = .;
173#endif
174 *(.init.setup)
175#ifdef CONFIG_PPC64
176 __setup_end = .;
177#endif
178 }
179#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000180 __setup_end = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000181
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000182 __initcall_start = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000183#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000184 .initcall.init : {
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000185#ifdef CONFIG_PPC64
186 __initcall_start = .;
187#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000188 *(.initcall1.init)
189 *(.initcall2.init)
190 *(.initcall3.init)
191 *(.initcall4.init)
192 *(.initcall5.init)
193 *(.initcall6.init)
194 *(.initcall7.init)
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000195#ifdef CONFIG_PPC64
196 __initcall_end = .;
197#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000198 }
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000199#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000200 __initcall_end = .;
201
202 __con_initcall_start = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000203#endif
204 .con_initcall.init : {
205#ifdef CONFIG_PPC64
206 __con_initcall_start = .;
207#endif
208 *(.con_initcall.init)
209#ifdef CONFIG_PPC64
210 __con_initcall_end = .;
211#endif
212 }
213#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000214 __con_initcall_end = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000215#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000216
217 SECURITY_INIT
218
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000219#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000220 __start___ftr_fixup = .;
221 __ftr_fixup : { *(__ftr_fixup) }
222 __stop___ftr_fixup = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000223#else
224 . = ALIGN(PAGE_SIZE);
225 .init.ramfs : {
226 __initramfs_start = .;
227 *(.init.ramfs)
228 __initramfs_end = .;
229 }
230#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000231
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000232#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000233 . = ALIGN(32);
234 __per_cpu_start = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000235#endif
236 .data.percpu : {
237#ifdef CONFIG_PPC64
238 __per_cpu_start = .;
239#endif
240 *(.data.percpu)
241#ifdef CONFIG_PPC64
242 __per_cpu_end = .;
243#endif
244 }
245#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000246 __per_cpu_end = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000247#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000248
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000249#ifdef CONFIG_PPC64
250 . = ALIGN(PAGE_SIZE);
251 . = ALIGN(16384);
252 __init_end = .;
253 /* freed after init ends here */
254
255
256 /* Read/write sections */
257 . = ALIGN(PAGE_SIZE);
258 . = ALIGN(16384);
259 /* The initial task and kernel stack */
260 .data.init_task : {
261 *(.data.init_task)
262 }
263
264 . = ALIGN(PAGE_SIZE);
265 .data.page_aligned : {
266 *(.data.page_aligned)
267 }
268
269 .data.cacheline_aligned : {
270 *(.data.cacheline_aligned)
271 }
272
273 .data : {
274 *(.data .data.rel* .toc1)
275 *(.branch_lt)
276 }
277
278 .opd : {
279 *(.opd)
280 }
281
282 .got : {
283 __toc_start = .;
284 *(.got)
285 *(.toc)
286 . = ALIGN(PAGE_SIZE);
287 _edata = .;
288 }
289
290
291 . = ALIGN(PAGE_SIZE);
292#else
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000293 . = ALIGN(4096);
294 __initramfs_start = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000295 .init.ramfs : {
296 *(.init.ramfs)
297 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000298 __initramfs_end = .;
299
300 . = ALIGN(4096);
301 __init_end = .;
302
303 . = ALIGN(4096);
304 _sextratext = .;
305 _eextratext = .;
306
307 __bss_start = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000308#endif
309 .bss : {
310#ifdef CONFIG_PPC64
311 __bss_start = .;
312#else
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000313 *(.sbss) *(.scommon)
314 *(.dynbss)
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000315#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000316 *(.bss)
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000317#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000318 *(COMMON)
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000319#else
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000320 __bss_stop = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000321#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000322 }
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000323#ifdef CONFIG_PPC32
324 __bss_stop = .;
325#endif
326
327#ifdef CONFIG_PPC64
328 . = ALIGN(PAGE_SIZE);
329#endif
330 _end = . ;
331#ifdef CONFIG_PPC32
332 PROVIDE (end = .);
333#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000334}