blob: 6e95d2f54106441dec17531ae3dbd3f19e58b8a9 [file] [log] [blame]
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001/*
2 * New driver for Marvell Yukon 2 chipset.
3 * Based on earlier sk98lin, and skge driver.
4 *
5 * This driver intentionally does not support all the features
6 * of the original driver such as link fail-over and link management because
7 * those should be done at higher levels.
8 *
9 * Copyright (C) 2005 Stephen Hemminger <shemminger@osdl.org>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
Stephen Hemminger798b6b12006-10-22 20:16:57 -070013 * the Free Software Foundation; either version 2 of the License.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070014 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Stephen Hemminger793b8832005-09-14 16:06:14 -070017 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070018 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
Stephen Hemminger793b8832005-09-14 16:06:14 -070025#include <linux/crc32.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070026#include <linux/kernel.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070027#include <linux/module.h>
28#include <linux/netdevice.h>
Andrew Mortond0bbccf2005-11-10 15:29:27 -080029#include <linux/dma-mapping.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070030#include <linux/etherdevice.h>
31#include <linux/ethtool.h>
32#include <linux/pci.h>
33#include <linux/ip.h>
Arnaldo Carvalho de Meloc9bdd4b2007-03-12 20:09:15 -030034#include <net/ip.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070035#include <linux/tcp.h>
36#include <linux/in.h>
37#include <linux/delay.h>
Stephen Hemminger91c86df2005-12-09 11:34:57 -080038#include <linux/workqueue.h>
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070039#include <linux/if_vlan.h>
Stephen Hemmingerd70cd512005-12-09 11:35:09 -080040#include <linux/prefetch.h>
Stephen Hemminger3cf26752007-07-09 15:33:35 -070041#include <linux/debugfs.h>
shemminger@osdl.orgef743d32005-11-30 11:45:12 -080042#include <linux/mii.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070043
44#include <asm/irq.h>
45
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070046#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
47#define SKY2_VLAN_TAG_USED 1
48#endif
49
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070050#include "sky2.h"
51
52#define DRV_NAME "sky2"
Stephen Hemminger743d32a2008-06-17 09:04:28 -070053#define DRV_VERSION "1.22"
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070054#define PFX DRV_NAME " "
55
56/*
57 * The Yukon II chipset takes 64 bit command blocks (called list elements)
58 * that are organized into three (receive, transmit, status) different rings
Stephen Hemminger14d02632006-09-26 11:57:43 -070059 * similar to Tigon3.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070060 */
61
Stephen Hemminger14d02632006-09-26 11:57:43 -070062#define RX_LE_SIZE 1024
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070063#define RX_LE_BYTES (RX_LE_SIZE*sizeof(struct sky2_rx_le))
Stephen Hemminger14d02632006-09-26 11:57:43 -070064#define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)
shemminger@osdl.org13210ce2005-11-30 11:45:14 -080065#define RX_DEF_PENDING RX_MAX_PENDING
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070066
Stephen Hemminger793b8832005-09-14 16:06:14 -070067#define TX_RING_SIZE 512
Stephen Hemmingere9c1be82009-06-17 07:30:37 +000068#define TX_DEF_PENDING 128
Stephen Hemmingerb19666d2006-03-07 11:06:36 -080069#define MAX_SKB_TX_LE (4 + (sizeof(dma_addr_t)/sizeof(u32))*MAX_SKB_FRAGS)
Stephen Hemmingere9c1be82009-06-17 07:30:37 +000070#define TX_MIN_PENDING (MAX_SKB_TX_LE+1)
Stephen Hemminger793b8832005-09-14 16:06:14 -070071
72#define STATUS_RING_SIZE 2048 /* 2 ports * (TX + 2*RX) */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070073#define STATUS_LE_BYTES (STATUS_RING_SIZE*sizeof(struct sky2_status_le))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070074#define TX_WATCHDOG (5 * HZ)
75#define NAPI_WEIGHT 64
76#define PHY_RETRIES 1000
77
Stephen Hemmingerf4331a62007-07-09 15:33:39 -070078#define SKY2_EEPROM_MAGIC 0x9955aabb
79
80
Stephen Hemmingercb5d9542006-05-08 15:11:29 -070081#define RING_NEXT(x,s) (((x)+1) & ((s)-1))
82
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070083static const u32 default_msg =
Stephen Hemminger793b8832005-09-14 16:06:14 -070084 NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
85 | NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR
Stephen Hemminger3be92a72006-01-17 13:43:17 -080086 | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070087
Stephen Hemminger793b8832005-09-14 16:06:14 -070088static int debug = -1; /* defaults above */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070089module_param(debug, int, 0);
90MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
91
Stephen Hemminger14d02632006-09-26 11:57:43 -070092static int copybreak __read_mostly = 128;
Stephen Hemmingerbdb5c582005-12-09 11:34:55 -080093module_param(copybreak, int, 0);
94MODULE_PARM_DESC(copybreak, "Receive copy threshold");
95
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -080096static int disable_msi = 0;
97module_param(disable_msi, int, 0);
98MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");
99
Stephen Hemmingere6cac9b2008-06-17 09:04:26 -0700100static DEFINE_PCI_DEVICE_TABLE(sky2_id_table) = {
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800101 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
102 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
Stephen Hemminger2d2a3872006-05-17 14:37:04 -0700103 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */
Stephen Hemminger2f4a66a2006-09-01 14:52:04 -0700104 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */
Stephen Hemminger508f89e2006-12-01 14:29:34 -0800105 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800106 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B03) }, /* DGE-550T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800107 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) }, /* 88E8021 */
108 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) }, /* 88E8022 */
109 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) }, /* 88E8061 */
110 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4343) }, /* 88E8062 */
111 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4344) }, /* 88E8021 */
112 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4345) }, /* 88E8022 */
113 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4346) }, /* 88E8061 */
114 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) }, /* 88E8062 */
115 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, /* 88E8035 */
116 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, /* 88E8036 */
117 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) }, /* 88E8038 */
118 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4353) }, /* 88E8039 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700119 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4354) }, /* 88E8040 */
Stephen Hemmingera3b4fce2008-06-14 10:32:15 -0700120 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4355) }, /* 88E8040T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800121 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4356) }, /* 88EC033 */
Stephen Hemminger5a37a682007-11-08 08:20:17 -0800122 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4357) }, /* 88E8042 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700123 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x435A) }, /* 88E8048 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800124 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, /* 88E8052 */
125 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, /* 88E8050 */
126 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, /* 88E8053 */
127 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, /* 88E8055 */
128 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4364) }, /* 88E8056 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700129 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4365) }, /* 88E8070 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800130 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, /* 88EC036 */
131 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, /* 88EC032 */
132 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, /* 88EC034 */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800133 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4369) }, /* 88EC042 */
134 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436A) }, /* 88E8058 */
Stephen Hemminger69161612007-06-04 17:23:26 -0700135 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436B) }, /* 88E8071 */
Stephen Hemminger5a37a682007-11-08 08:20:17 -0800136 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436C) }, /* 88E8072 */
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800137 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436D) }, /* 88E8055 */
138 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4370) }, /* 88E8075 */
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700139 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4380) }, /* 88E8057 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700140 { 0 }
141};
Stephen Hemminger793b8832005-09-14 16:06:14 -0700142
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700143MODULE_DEVICE_TABLE(pci, sky2_id_table);
144
145/* Avoid conditionals by using array */
146static const unsigned txqaddr[] = { Q_XA1, Q_XA2 };
147static const unsigned rxqaddr[] = { Q_R1, Q_R2 };
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -0700148static const u32 portirq_msk[] = { Y2_IS_PORT_1, Y2_IS_PORT_2 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700149
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +0100150static void sky2_set_multicast(struct net_device *dev);
151
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800152/* Access to PHY via serial interconnect */
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800153static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700154{
155 int i;
156
157 gma_write16(hw, port, GM_SMI_DATA, val);
158 gma_write16(hw, port, GM_SMI_CTRL,
159 GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) | GM_SMI_CT_REG_AD(reg));
160
161 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800162 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL);
163 if (ctrl == 0xffff)
164 goto io_error;
165
166 if (!(ctrl & GM_SMI_CT_BUSY))
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800167 return 0;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800168
169 udelay(10);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700170 }
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800171
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800172 dev_warn(&hw->pdev->dev,"%s: phy write timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800173 return -ETIMEDOUT;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800174
175io_error:
176 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name);
177 return -EIO;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700178}
179
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800180static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700181{
182 int i;
183
Stephen Hemminger793b8832005-09-14 16:06:14 -0700184 gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700185 | GM_SMI_CT_REG_AD(reg) | GM_SMI_CT_OP_RD);
186
187 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800188 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL);
189 if (ctrl == 0xffff)
190 goto io_error;
191
192 if (ctrl & GM_SMI_CT_RD_VAL) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800193 *val = gma_read16(hw, port, GM_SMI_DATA);
194 return 0;
195 }
196
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800197 udelay(10);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700198 }
199
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800200 dev_warn(&hw->pdev->dev, "%s: phy read timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800201 return -ETIMEDOUT;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800202io_error:
203 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name);
204 return -EIO;
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800205}
206
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800207static inline u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg)
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800208{
209 u16 v;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800210 __gm_phy_read(hw, port, reg, &v);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800211 return v;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700212}
213
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800214
215static void sky2_power_on(struct sky2_hw *hw)
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700216{
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800217 /* switch power to VCC (WA for VAUX problem) */
218 sky2_write8(hw, B0_POWER_CTRL,
219 PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700220
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800221 /* disable Core Clock Division, */
222 sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700223
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800224 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
225 /* enable bits are inverted */
226 sky2_write8(hw, B2_Y2_CLK_GATE,
227 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
228 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
229 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
230 else
231 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700232
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700233 if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700234 u32 reg;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700235
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800236 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700237
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800238 reg = sky2_pci_read32(hw, PCI_DEV_REG4);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700239 /* set all bits to 0 except bits 15..12 and 8 */
240 reg &= P_ASPM_CONTROL_MSK;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800241 sky2_pci_write32(hw, PCI_DEV_REG4, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700242
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800243 reg = sky2_pci_read32(hw, PCI_DEV_REG5);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700244 /* set all bits to 0 except bits 28 & 27 */
245 reg &= P_CTL_TIM_VMAIN_AV_MSK;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800246 sky2_pci_write32(hw, PCI_DEV_REG5, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700247
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800248 sky2_pci_write32(hw, PCI_CFG_REG_1, 0);
Stephen Hemminger8f709202007-06-04 17:23:25 -0700249
250 /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */
251 reg = sky2_read32(hw, B2_GP_IO);
252 reg |= GLB_GPIO_STAT_RACE_DIS;
253 sky2_write32(hw, B2_GP_IO, reg);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700254
255 sky2_read32(hw, B2_GP_IO);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700256 }
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800257}
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700258
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800259static void sky2_power_aux(struct sky2_hw *hw)
260{
261 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
262 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
263 else
264 /* enable bits are inverted */
265 sky2_write8(hw, B2_Y2_CLK_GATE,
266 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
267 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
268 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
269
270 /* switch power to VAUX */
271 if (sky2_read16(hw, B0_CTST) & Y2_VAUX_AVAIL)
272 sky2_write8(hw, B0_POWER_CTRL,
273 (PC_VAUX_ENA | PC_VCC_ENA |
274 PC_VAUX_ON | PC_VCC_OFF));
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700275}
276
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700277static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700278{
279 u16 reg;
280
281 /* disable all GMAC IRQ's */
282 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700283
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700284 gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */
285 gma_write16(hw, port, GM_MC_ADDR_H2, 0);
286 gma_write16(hw, port, GM_MC_ADDR_H3, 0);
287 gma_write16(hw, port, GM_MC_ADDR_H4, 0);
288
289 reg = gma_read16(hw, port, GM_RX_CTRL);
290 reg |= GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA;
291 gma_write16(hw, port, GM_RX_CTRL, reg);
292}
293
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700294/* flow control to advertise bits */
295static const u16 copper_fc_adv[] = {
296 [FC_NONE] = 0,
297 [FC_TX] = PHY_M_AN_ASP,
298 [FC_RX] = PHY_M_AN_PC,
299 [FC_BOTH] = PHY_M_AN_PC | PHY_M_AN_ASP,
300};
301
302/* flow control to advertise bits when using 1000BaseX */
303static const u16 fiber_fc_adv[] = {
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700304 [FC_NONE] = PHY_M_P_NO_PAUSE_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700305 [FC_TX] = PHY_M_P_ASYM_MD_X,
306 [FC_RX] = PHY_M_P_SYM_MD_X,
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700307 [FC_BOTH] = PHY_M_P_BOTH_MD_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700308};
309
310/* flow control to GMA disable bits */
311static const u16 gm_fc_disable[] = {
312 [FC_NONE] = GM_GPCR_FC_RX_DIS | GM_GPCR_FC_TX_DIS,
313 [FC_TX] = GM_GPCR_FC_RX_DIS,
314 [FC_RX] = GM_GPCR_FC_TX_DIS,
315 [FC_BOTH] = 0,
316};
317
318
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700319static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
320{
321 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700322 u16 ctrl, ct1000, adv, pg, ledctrl, ledover, reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700323
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700324 if (sky2->autoneg == AUTONEG_ENABLE &&
325 !(hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700326 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL);
327
328 ectrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
Stephen Hemminger793b8832005-09-14 16:06:14 -0700329 PHY_M_EC_MAC_S_MSK);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700330 ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ);
331
Stephen Hemminger53419c62007-05-14 12:38:11 -0700332 /* on PHY 88E1040 Rev.D0 (and newer) downshift control changed */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700333 if (hw->chip_id == CHIP_ID_YUKON_EC)
Stephen Hemminger53419c62007-05-14 12:38:11 -0700334 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700335 ectrl |= PHY_M_EC_DSC_2(2) | PHY_M_EC_DOWN_S_ENA;
336 else
Stephen Hemminger53419c62007-05-14 12:38:11 -0700337 /* set master & slave downshift counter to 1x */
338 ectrl |= PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700339
340 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl);
341 }
342
343 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700344 if (sky2_is_copper(hw)) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700345 if (!(hw->flags & SKY2_HW_GIGABIT)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700346 /* enable automatic crossover */
347 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1;
Stephen Hemminger6d3105d2007-09-24 19:34:51 -0700348
349 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
350 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
351 u16 spec;
352
353 /* Enable Class A driver for FE+ A0 */
354 spec = gm_phy_read(hw, port, PHY_MARV_FE_SPEC_2);
355 spec |= PHY_M_FESC_SEL_CL_A;
356 gm_phy_write(hw, port, PHY_MARV_FE_SPEC_2, spec);
357 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700358 } else {
359 /* disable energy detect */
360 ctrl &= ~PHY_M_PC_EN_DET_MSK;
361
362 /* enable automatic crossover */
363 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO);
364
Stephen Hemminger53419c62007-05-14 12:38:11 -0700365 /* downshift on PHY 88E1112 and 88E1149 is changed */
Stephen Hemminger937454942007-02-06 10:45:43 -0800366 if (sky2->autoneg == AUTONEG_ENABLE
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700367 && (hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemminger53419c62007-05-14 12:38:11 -0700368 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700369 ctrl &= ~PHY_M_PC_DSC_MSK;
370 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
371 }
372 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700373 } else {
374 /* workaround for deviation #4.88 (CRC errors) */
375 /* disable Automatic Crossover */
376
377 ctrl &= ~PHY_M_PC_MDIX_MSK;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700378 }
379
380 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
381
382 /* special setup for PHY 88E1112 Fiber */
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700383 if (hw->chip_id == CHIP_ID_YUKON_XL && (hw->flags & SKY2_HW_FIBRE_PHY)) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700384 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
385
386 /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */
387 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
388 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
389 ctrl &= ~PHY_M_MAC_MD_MSK;
390 ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700391 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
392
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700393 if (hw->pmd_type == 'P') {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700394 /* select page 1 to access Fiber registers */
395 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700396
397 /* for SFP-module set SIGDET polarity to low */
398 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
399 ctrl |= PHY_M_FIB_SIGD_POL;
Stephen Hemminger34dd9622007-05-24 15:22:45 -0700400 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700401 }
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700402
403 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700404 }
405
Stephen Hemminger7800fdd2006-10-17 10:24:10 -0700406 ctrl = PHY_CT_RESET;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700407 ct1000 = 0;
408 adv = PHY_AN_CSMA;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700409 reg = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700410
411 if (sky2->autoneg == AUTONEG_ENABLE) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700412 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700413 if (sky2->advertising & ADVERTISED_1000baseT_Full)
414 ct1000 |= PHY_M_1000C_AFD;
415 if (sky2->advertising & ADVERTISED_1000baseT_Half)
416 ct1000 |= PHY_M_1000C_AHD;
417 if (sky2->advertising & ADVERTISED_100baseT_Full)
418 adv |= PHY_M_AN_100_FD;
419 if (sky2->advertising & ADVERTISED_100baseT_Half)
420 adv |= PHY_M_AN_100_HD;
421 if (sky2->advertising & ADVERTISED_10baseT_Full)
422 adv |= PHY_M_AN_10_FD;
423 if (sky2->advertising & ADVERTISED_10baseT_Half)
424 adv |= PHY_M_AN_10_HD;
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700425
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700426 adv |= copper_fc_adv[sky2->flow_mode];
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700427 } else { /* special defines for FIBER (88E1040S only) */
428 if (sky2->advertising & ADVERTISED_1000baseT_Full)
429 adv |= PHY_M_AN_1000X_AFD;
430 if (sky2->advertising & ADVERTISED_1000baseT_Half)
431 adv |= PHY_M_AN_1000X_AHD;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700432
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700433 adv |= fiber_fc_adv[sky2->flow_mode];
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700434 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700435
436 /* Restart Auto-negotiation */
437 ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG;
438 } else {
439 /* forced speed/duplex settings */
440 ct1000 = PHY_M_1000C_MSE;
441
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700442 /* Disable auto update for duplex flow control and speed */
443 reg |= GM_GPCR_AU_ALL_DIS;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700444
445 switch (sky2->speed) {
446 case SPEED_1000:
447 ctrl |= PHY_CT_SP1000;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700448 reg |= GM_GPCR_SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700449 break;
450 case SPEED_100:
451 ctrl |= PHY_CT_SP100;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700452 reg |= GM_GPCR_SPEED_100;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700453 break;
454 }
455
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700456 if (sky2->duplex == DUPLEX_FULL) {
457 reg |= GM_GPCR_DUP_FULL;
458 ctrl |= PHY_CT_DUP_MD;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700459 } else if (sky2->speed < SPEED_1000)
460 sky2->flow_mode = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700461
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700462
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700463 reg |= gm_fc_disable[sky2->flow_mode];
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700464
465 /* Forward pause packets to GMAC? */
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700466 if (sky2->flow_mode & FC_RX)
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700467 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
468 else
469 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700470 }
471
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700472 gma_write16(hw, port, GM_GP_CTRL, reg);
473
Stephen Hemminger05745c42007-09-19 15:36:45 -0700474 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700475 gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000);
476
477 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv);
478 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);
479
480 /* Setup Phy LED's */
481 ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS);
482 ledover = 0;
483
484 switch (hw->chip_id) {
485 case CHIP_ID_YUKON_FE:
486 /* on 88E3082 these bits are at 11..9 (shifted left) */
487 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) << 1;
488
489 ctrl = gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR);
490
491 /* delete ACT LED control bits */
492 ctrl &= ~PHY_M_FELP_LED1_MSK;
493 /* change ACT LED control to blink mode */
494 ctrl |= PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL);
495 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
496 break;
497
Stephen Hemminger05745c42007-09-19 15:36:45 -0700498 case CHIP_ID_YUKON_FE_P:
499 /* Enable Link Partner Next Page */
500 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
501 ctrl |= PHY_M_PC_ENA_LIP_NP;
502
503 /* disable Energy Detect and enable scrambler */
504 ctrl &= ~(PHY_M_PC_ENA_ENE_DT | PHY_M_PC_DIS_SCRAMB);
505 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
506
507 /* set LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED */
508 ctrl = PHY_M_FELP_LED2_CTRL(LED_PAR_CTRL_ACT_BL) |
509 PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_LINK) |
510 PHY_M_FELP_LED0_CTRL(LED_PAR_CTRL_SPEED);
511
512 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
513 break;
514
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700515 case CHIP_ID_YUKON_XL:
Stephen Hemminger793b8832005-09-14 16:06:14 -0700516 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700517
518 /* select page 3 to access LED control register */
519 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
520
521 /* set LED Function Control register */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700522 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
523 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
524 PHY_M_LEDC_INIT_CTRL(7) | /* 10 Mbps */
525 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
526 PHY_M_LEDC_STA0_CTRL(7))); /* 1000 Mbps */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700527
528 /* set Polarity Control register */
529 gm_phy_write(hw, port, PHY_MARV_PHY_STAT,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700530 (PHY_M_POLC_LS1_P_MIX(4) |
531 PHY_M_POLC_IS0_P_MIX(4) |
532 PHY_M_POLC_LOS_CTRL(2) |
533 PHY_M_POLC_INIT_CTRL(2) |
534 PHY_M_POLC_STA1_CTRL(2) |
535 PHY_M_POLC_STA0_CTRL(2)));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700536
537 /* restore page register */
Stephen Hemminger793b8832005-09-14 16:06:14 -0700538 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700539 break;
Stephen Hemminger937454942007-02-06 10:45:43 -0800540
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700541 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger937454942007-02-06 10:45:43 -0800542 case CHIP_ID_YUKON_EX:
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800543 case CHIP_ID_YUKON_SUPR:
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700544 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
545
546 /* select page 3 to access LED control register */
547 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
548
549 /* set LED Function Control register */
550 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
551 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
552 PHY_M_LEDC_INIT_CTRL(8) | /* 10 Mbps */
553 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
554 PHY_M_LEDC_STA0_CTRL(7)));/* 1000 Mbps */
555
556 /* set Blink Rate in LED Timer Control Register */
557 gm_phy_write(hw, port, PHY_MARV_INT_MASK,
558 ledctrl | PHY_M_LED_BLINK_RT(BLINK_84MS));
559 /* restore page register */
560 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
561 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700562
563 default:
564 /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
565 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800566
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700567 /* turn off the Rx LED (LED_RX) */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800568 ledover |= PHY_M_LED_MO_RX(MO_LED_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700569 }
570
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700571 if (hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_UL_2) {
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800572 /* apply fixes in PHY AFE */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700573 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255);
574
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800575 /* increase differential signal amplitude in 10BASE-T */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700576 gm_phy_write(hw, port, 0x18, 0xaa99);
577 gm_phy_write(hw, port, 0x17, 0x2011);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700578
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700579 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
580 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */
581 gm_phy_write(hw, port, 0x18, 0xa204);
582 gm_phy_write(hw, port, 0x17, 0x2002);
583 }
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800584
585 /* set page register to 0 */
Stephen Hemminger9467a8f2007-04-07 16:02:28 -0700586 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemminger05745c42007-09-19 15:36:45 -0700587 } else if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
588 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
589 /* apply workaround for integrated resistors calibration */
590 gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17);
591 gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60);
Stephen Hemmingere1a74b32008-06-17 09:04:24 -0700592 } else if (hw->chip_id != CHIP_ID_YUKON_EX &&
593 hw->chip_id < CHIP_ID_YUKON_SUPR) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700594 /* no effect on Yukon-XL */
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800595 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
596
597 if (sky2->autoneg == AUTONEG_DISABLE || sky2->speed == SPEED_100) {
598 /* turn on 100 Mbps LED (LED_LINK100) */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800599 ledover |= PHY_M_LED_MO_100(MO_LED_ON);
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800600 }
601
602 if (ledover)
603 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
604
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700605 }
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700606
shemminger@osdl.orgd571b692005-10-26 12:16:09 -0700607 /* Enable phy interrupt on auto-negotiation complete (or link up) */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700608 if (sky2->autoneg == AUTONEG_ENABLE)
609 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
610 else
611 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
612}
613
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700614static const u32 phy_power[] = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
615static const u32 coma_mode[] = { PCI_Y2_PHY1_COMA, PCI_Y2_PHY2_COMA };
616
617static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700618{
619 u32 reg1;
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700620
Stephen Hemminger82637e82008-01-23 19:16:04 -0800621 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800622 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700623 reg1 &= ~phy_power[port];
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700624
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700625 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
Stephen Hemmingerff351642007-10-11 19:47:44 -0700626 reg1 |= coma_mode[port];
627
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800628 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
Stephen Hemminger82637e82008-01-23 19:16:04 -0800629 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
630 sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerf71eb1a2008-08-04 13:33:37 -0700631
632 if (hw->chip_id == CHIP_ID_YUKON_FE)
633 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_ANE);
634 else if (hw->flags & SKY2_HW_ADV_POWER_CTL)
635 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700636}
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700637
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700638static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port)
639{
640 u32 reg1;
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700641 u16 ctrl;
642
643 /* release GPHY Control reset */
644 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
645
646 /* release GMAC reset */
647 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
648
649 if (hw->flags & SKY2_HW_NEWER_PHY) {
650 /* select page 2 to access MAC control register */
651 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
652
653 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
654 /* allow GMII Power Down */
655 ctrl &= ~PHY_M_MAC_GMIF_PUP;
656 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
657
658 /* set page register back to 0 */
659 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
660 }
661
662 /* setup General Purpose Control Register */
663 gma_write16(hw, port, GM_GP_CTRL,
664 GM_GPCR_FL_PASS | GM_GPCR_SPEED_100 | GM_GPCR_AU_ALL_DIS);
665
666 if (hw->chip_id != CHIP_ID_YUKON_EC) {
667 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200668 /* select page 2 to access MAC control register */
669 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700670
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200671 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700672 /* enable Power Down */
673 ctrl |= PHY_M_PC_POW_D_ENA;
674 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200675
676 /* set page register back to 0 */
677 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700678 }
679
680 /* set IEEE compatible Power Down Mode (dev. #4.99) */
681 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_PDOWN);
682 }
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700683
684 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
685 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700686 reg1 |= phy_power[port]; /* set PHY to PowerDown/COMA Mode */
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700687 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
688 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700689}
690
Stephen Hemminger1b537562005-12-20 15:08:07 -0800691/* Force a renegotiation */
692static void sky2_phy_reinit(struct sky2_port *sky2)
693{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800694 spin_lock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800695 sky2_phy_init(sky2->hw, sky2->port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800696 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800697}
698
Stephen Hemmingere3173832007-02-06 10:45:39 -0800699/* Put device in state to listen for Wake On Lan */
700static void sky2_wol_init(struct sky2_port *sky2)
701{
702 struct sky2_hw *hw = sky2->hw;
703 unsigned port = sky2->port;
704 enum flow_control save_mode;
705 u16 ctrl;
706 u32 reg1;
707
708 /* Bring hardware out of reset */
709 sky2_write16(hw, B0_CTST, CS_RST_CLR);
710 sky2_write16(hw, SK_REG(port, GMAC_LINK_CTRL), GMLC_RST_CLR);
711
712 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
713 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
714
715 /* Force to 10/100
716 * sky2_reset will re-enable on resume
717 */
718 save_mode = sky2->flow_mode;
719 ctrl = sky2->advertising;
720
721 sky2->advertising &= ~(ADVERTISED_1000baseT_Half|ADVERTISED_1000baseT_Full);
722 sky2->flow_mode = FC_NONE;
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700723
724 spin_lock_bh(&sky2->phy_lock);
725 sky2_phy_power_up(hw, port);
726 sky2_phy_init(hw, port);
727 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800728
729 sky2->flow_mode = save_mode;
730 sky2->advertising = ctrl;
731
732 /* Set GMAC to no flow control and auto update for speed/duplex */
733 gma_write16(hw, port, GM_GP_CTRL,
734 GM_GPCR_FC_TX_DIS|GM_GPCR_TX_ENA|GM_GPCR_RX_ENA|
735 GM_GPCR_DUP_FULL|GM_GPCR_FC_RX_DIS|GM_GPCR_AU_FCT_DIS);
736
737 /* Set WOL address */
738 memcpy_toio(hw->regs + WOL_REGS(port, WOL_MAC_ADDR),
739 sky2->netdev->dev_addr, ETH_ALEN);
740
741 /* Turn on appropriate WOL control bits */
742 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), WOL_CTL_CLEAR_RESULT);
743 ctrl = 0;
744 if (sky2->wol & WAKE_PHY)
745 ctrl |= WOL_CTL_ENA_PME_ON_LINK_CHG|WOL_CTL_ENA_LINK_CHG_UNIT;
746 else
747 ctrl |= WOL_CTL_DIS_PME_ON_LINK_CHG|WOL_CTL_DIS_LINK_CHG_UNIT;
748
749 if (sky2->wol & WAKE_MAGIC)
750 ctrl |= WOL_CTL_ENA_PME_ON_MAGIC_PKT|WOL_CTL_ENA_MAGIC_PKT_UNIT;
751 else
752 ctrl |= WOL_CTL_DIS_PME_ON_MAGIC_PKT|WOL_CTL_DIS_MAGIC_PKT_UNIT;;
753
754 ctrl |= WOL_CTL_DIS_PME_ON_PATTERN|WOL_CTL_DIS_PATTERN_UNIT;
755 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl);
756
757 /* Turn on legacy PCI-Express PME mode */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800758 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800759 reg1 |= PCI_Y2_PME_LEGACY;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800760 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800761
762 /* block receiver */
763 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
764
765}
766
Stephen Hemminger69161612007-06-04 17:23:26 -0700767static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port)
768{
Stephen Hemminger05745c42007-09-19 15:36:45 -0700769 struct net_device *dev = hw->dev[port];
770
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800771 if ( (hw->chip_id == CHIP_ID_YUKON_EX &&
772 hw->chip_rev != CHIP_REV_YU_EX_A0) ||
773 hw->chip_id == CHIP_ID_YUKON_FE_P ||
774 hw->chip_id == CHIP_ID_YUKON_SUPR) {
775 /* Yukon-Extreme B0 and further Extreme devices */
776 /* enable Store & Forward mode for TX */
Stephen Hemminger69161612007-06-04 17:23:26 -0700777
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800778 if (dev->mtu <= ETH_DATA_LEN)
779 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
780 TX_JUMBO_DIS | TX_STFW_ENA);
Stephen Hemminger69161612007-06-04 17:23:26 -0700781
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800782 else
783 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
784 TX_JUMBO_ENA| TX_STFW_ENA);
785 } else {
786 if (dev->mtu <= ETH_DATA_LEN)
787 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA);
788 else {
789 /* set Tx GMAC FIFO Almost Empty Threshold */
790 sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR),
791 (ECU_JUMBO_WM << 16) | ECU_AE_THR);
Stephen Hemminger05745c42007-09-19 15:36:45 -0700792
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800793 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS);
794
795 /* Can't do offload because of lack of store/forward */
796 dev->features &= ~(NETIF_F_TSO | NETIF_F_SG | NETIF_F_ALL_CSUM);
797 }
Stephen Hemminger69161612007-06-04 17:23:26 -0700798 }
799}
800
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700801static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
802{
803 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
804 u16 reg;
Al Viro25cccec2007-07-20 16:07:33 +0100805 u32 rx_reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700806 int i;
807 const u8 *addr = hw->dev[port]->dev_addr;
808
Stephen Hemmingerf3503392007-08-21 11:10:22 -0700809 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
810 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700811
812 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
813
Stephen Hemminger793b8832005-09-14 16:06:14 -0700814 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 && port == 1) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700815 /* WA DEV_472 -- looks like crossed wires on port 2 */
816 /* clear GMAC 1 Control reset */
817 sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR);
818 do {
819 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_SET);
820 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_CLR);
821 } while (gm_phy_read(hw, 1, PHY_MARV_ID0) != PHY_MARV_ID0_VAL ||
822 gm_phy_read(hw, 1, PHY_MARV_ID1) != PHY_MARV_ID1_Y2 ||
823 gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0);
824 }
825
Stephen Hemminger793b8832005-09-14 16:06:14 -0700826 sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700827
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700828 /* Enable Transmit FIFO Underrun */
829 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
830
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800831 spin_lock_bh(&sky2->phy_lock);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700832 sky2_phy_power_up(hw, port);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700833 sky2_phy_init(hw, port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800834 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700835
836 /* MIB clear */
837 reg = gma_read16(hw, port, GM_PHY_ADDR);
838 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR);
839
Stephen Hemminger43f2f102006-04-05 17:47:15 -0700840 for (i = GM_MIB_CNT_BASE; i <= GM_MIB_CNT_END; i += 4)
841 gma_read16(hw, port, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700842 gma_write16(hw, port, GM_PHY_ADDR, reg);
843
844 /* transmit control */
845 gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF));
846
847 /* receive control reg: unicast + multicast + no FCS */
848 gma_write16(hw, port, GM_RX_CTRL,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700849 GM_RXCR_UCF_ENA | GM_RXCR_CRC_DIS | GM_RXCR_MCF_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700850
851 /* transmit flow control */
852 gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff);
853
854 /* transmit parameter */
855 gma_write16(hw, port, GM_TX_PARAM,
856 TX_JAM_LEN_VAL(TX_JAM_LEN_DEF) |
857 TX_JAM_IPG_VAL(TX_JAM_IPG_DEF) |
858 TX_IPG_JAM_DATA(TX_IPG_JAM_DEF) |
859 TX_BACK_OFF_LIM(TX_BOF_LIM_DEF));
860
861 /* serial mode register */
862 reg = DATA_BLIND_VAL(DATA_BLIND_DEF) |
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700863 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700864
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700865 if (hw->dev[port]->mtu > ETH_DATA_LEN)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700866 reg |= GM_SMOD_JUMBO_ENA;
867
868 gma_write16(hw, port, GM_SERIAL_MODE, reg);
869
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700870 /* virtual address for data */
871 gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr);
872
Stephen Hemminger793b8832005-09-14 16:06:14 -0700873 /* physical address: used for pause frames */
874 gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr);
875
876 /* ignore counter overflows */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700877 gma_write16(hw, port, GM_TX_IRQ_MSK, 0);
878 gma_write16(hw, port, GM_RX_IRQ_MSK, 0);
879 gma_write16(hw, port, GM_TR_IRQ_MSK, 0);
880
881 /* Configure Rx MAC FIFO */
882 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR);
Al Viro25cccec2007-07-20 16:07:33 +0100883 rx_reg = GMF_OPER_ON | GMF_RX_F_FL_ON;
Stephen Hemminger05745c42007-09-19 15:36:45 -0700884 if (hw->chip_id == CHIP_ID_YUKON_EX ||
885 hw->chip_id == CHIP_ID_YUKON_FE_P)
Al Viro25cccec2007-07-20 16:07:33 +0100886 rx_reg |= GMF_RX_OVER_ON;
Stephen Hemminger69161612007-06-04 17:23:26 -0700887
Al Viro25cccec2007-07-20 16:07:33 +0100888 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700889
Stephen Hemminger798fdd02007-12-07 15:22:15 -0800890 if (hw->chip_id == CHIP_ID_YUKON_XL) {
891 /* Hardware errata - clear flush mask */
892 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), 0);
893 } else {
894 /* Flush Rx MAC FIFO on any flow control or error */
895 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR);
896 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700897
Stephen Hemminger8df9a872006-12-01 14:29:35 -0800898 /* Set threshold to 0xa (64 bytes) + 1 to workaround pause bug */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700899 reg = RX_GMF_FL_THR_DEF + 1;
900 /* Another magic mystery workaround from sk98lin */
901 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
902 hw->chip_rev == CHIP_REV_YU_FE2_A0)
903 reg = 0x178;
904 sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700905
906 /* Configure Tx MAC FIFO */
907 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
908 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800909
Stephen Hemmingere0c28112007-09-20 13:03:49 -0700910 /* On chips without ram buffer, pause is controled by MAC level */
Stephen Hemminger39dbd952008-02-04 19:45:13 -0800911 if (!(hw->flags & SKY2_HW_RAM_BUFFER)) {
Stephen Hemminger8df9a872006-12-01 14:29:35 -0800912 sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800913 sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8);
Stephen Hemmingerb628ed92007-04-11 14:48:01 -0700914
Stephen Hemminger69161612007-06-04 17:23:26 -0700915 sky2_set_tx_stfwd(hw, port);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800916 }
917
Stephen Hemmingere970d1f2007-11-27 11:02:07 -0800918 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
919 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
920 /* disable dynamic watermark */
921 reg = sky2_read16(hw, SK_REG(port, TX_GMF_EA));
922 reg &= ~TX_DYN_WM_ENA;
923 sky2_write16(hw, SK_REG(port, TX_GMF_EA), reg);
924 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700925}
926
Stephen Hemminger67712902006-12-04 15:53:45 -0800927/* Assign Ram Buffer allocation to queue */
928static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 space)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700929{
Stephen Hemminger67712902006-12-04 15:53:45 -0800930 u32 end;
931
932 /* convert from K bytes to qwords used for hw register */
933 start *= 1024/8;
934 space *= 1024/8;
935 end = start + space - 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700936
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700937 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
938 sky2_write32(hw, RB_ADDR(q, RB_START), start);
939 sky2_write32(hw, RB_ADDR(q, RB_END), end);
940 sky2_write32(hw, RB_ADDR(q, RB_WP), start);
941 sky2_write32(hw, RB_ADDR(q, RB_RP), start);
942
943 if (q == Q_R1 || q == Q_R2) {
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800944 u32 tp = space - space/4;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700945
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800946 /* On receive queue's set the thresholds
947 * give receiver priority when > 3/4 full
948 * send pause when down to 2K
949 */
950 sky2_write32(hw, RB_ADDR(q, RB_RX_UTHP), tp);
951 sky2_write32(hw, RB_ADDR(q, RB_RX_LTHP), space/2);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700952
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800953 tp = space - 2048/8;
954 sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp);
955 sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700956 } else {
957 /* Enable store & forward on Tx queue's because
958 * Tx FIFO is only 1K on Yukon
959 */
960 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
961 }
962
963 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700964 sky2_read8(hw, RB_ADDR(q, RB_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700965}
966
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700967/* Setup Bus Memory Interface */
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -0800968static void sky2_qset(struct sky2_hw *hw, u16 q)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700969{
970 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET);
971 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT);
972 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON);
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -0800973 sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700974}
975
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700976/* Setup prefetch unit registers. This is the interface between
977 * hardware and driver list elements
978 */
Stephen Hemminger8cc048e2005-12-09 11:35:07 -0800979static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700980 u64 addr, u32 last)
981{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700982 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
983 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_CLR);
984 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_HI), addr >> 32);
985 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_LO), (u32) addr);
986 sky2_write16(hw, Y2_QADDR(qaddr, PREF_UNIT_LAST_IDX), last);
987 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_OP_ON);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700988
989 sky2_read32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700990}
991
Stephen Hemminger793b8832005-09-14 16:06:14 -0700992static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2)
993{
994 struct sky2_tx_le *le = sky2->tx_le + sky2->tx_prod;
995
Stephen Hemmingercb5d9542006-05-08 15:11:29 -0700996 sky2->tx_prod = RING_NEXT(sky2->tx_prod, TX_RING_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -0700997 le->ctrl = 0;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700998 return le;
999}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001000
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001001static void tx_init(struct sky2_port *sky2)
1002{
1003 struct sky2_tx_le *le;
1004
1005 sky2->tx_prod = sky2->tx_cons = 0;
1006 sky2->tx_tcpsum = 0;
1007 sky2->tx_last_mss = 0;
1008
1009 le = get_tx_le(sky2);
1010 le->addr = 0;
1011 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001012}
1013
Stephen Hemminger291ea612006-09-26 11:57:41 -07001014static inline struct tx_ring_info *tx_le_re(struct sky2_port *sky2,
1015 struct sky2_tx_le *le)
1016{
1017 return sky2->tx_ring + (le - sky2->tx_le);
1018}
1019
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001020/* Update chip's next pointer */
1021static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001022{
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001023 /* Make sure write' to descriptors are complete before we tell hardware */
Stephen Hemminger762c2de2006-01-17 13:43:14 -08001024 wmb();
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001025 sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx);
1026
1027 /* Synchronize I/O on since next processor may write to tail */
1028 mmiowb();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001029}
1030
Stephen Hemminger793b8832005-09-14 16:06:14 -07001031
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001032static inline struct sky2_rx_le *sky2_next_rx(struct sky2_port *sky2)
1033{
1034 struct sky2_rx_le *le = sky2->rx_le + sky2->rx_put;
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07001035 sky2->rx_put = RING_NEXT(sky2->rx_put, RX_LE_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001036 le->ctrl = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001037 return le;
1038}
1039
Stephen Hemminger14d02632006-09-26 11:57:43 -07001040/* Build description to hardware for one receive segment */
1041static void sky2_rx_add(struct sky2_port *sky2, u8 op,
1042 dma_addr_t map, unsigned len)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001043{
1044 struct sky2_rx_le *le;
1045
Stephen Hemminger86c68872008-01-10 16:14:12 -08001046 if (sizeof(dma_addr_t) > sizeof(u32)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001047 le = sky2_next_rx(sky2);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001048 le->addr = cpu_to_le32(upper_32_bits(map));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001049 le->opcode = OP_ADDR64 | HW_OWNER;
1050 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001051
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001052 le = sky2_next_rx(sky2);
Stephen Hemminger734d1862005-12-09 11:35:00 -08001053 le->addr = cpu_to_le32((u32) map);
1054 le->length = cpu_to_le16(len);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001055 le->opcode = op | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001056}
1057
Stephen Hemminger14d02632006-09-26 11:57:43 -07001058/* Build description to hardware for one possibly fragmented skb */
1059static void sky2_rx_submit(struct sky2_port *sky2,
1060 const struct rx_ring_info *re)
1061{
1062 int i;
1063
1064 sky2_rx_add(sky2, OP_PACKET, re->data_addr, sky2->rx_data_size);
1065
1066 for (i = 0; i < skb_shinfo(re->skb)->nr_frags; i++)
1067 sky2_rx_add(sky2, OP_BUFFER, re->frag_addr[i], PAGE_SIZE);
1068}
1069
1070
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001071static int sky2_rx_map_skb(struct pci_dev *pdev, struct rx_ring_info *re,
Stephen Hemminger14d02632006-09-26 11:57:43 -07001072 unsigned size)
1073{
1074 struct sk_buff *skb = re->skb;
1075 int i;
1076
1077 re->data_addr = pci_map_single(pdev, skb->data, size, PCI_DMA_FROMDEVICE);
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001078 if (unlikely(pci_dma_mapping_error(pdev, re->data_addr)))
1079 return -EIO;
1080
Stephen Hemminger14d02632006-09-26 11:57:43 -07001081 pci_unmap_len_set(re, data_size, size);
1082
1083 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
1084 re->frag_addr[i] = pci_map_page(pdev,
1085 skb_shinfo(skb)->frags[i].page,
1086 skb_shinfo(skb)->frags[i].page_offset,
1087 skb_shinfo(skb)->frags[i].size,
1088 PCI_DMA_FROMDEVICE);
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001089 return 0;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001090}
1091
1092static void sky2_rx_unmap_skb(struct pci_dev *pdev, struct rx_ring_info *re)
1093{
1094 struct sk_buff *skb = re->skb;
1095 int i;
1096
1097 pci_unmap_single(pdev, re->data_addr, pci_unmap_len(re, data_size),
1098 PCI_DMA_FROMDEVICE);
1099
1100 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
1101 pci_unmap_page(pdev, re->frag_addr[i],
1102 skb_shinfo(skb)->frags[i].size,
1103 PCI_DMA_FROMDEVICE);
1104}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001105
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001106/* Tell chip where to start receive checksum.
1107 * Actually has two checksums, but set both same to avoid possible byte
1108 * order problems.
1109 */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001110static void rx_set_checksum(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001111{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001112 struct sky2_rx_le *le = sky2_next_rx(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001113
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001114 le->addr = cpu_to_le32((ETH_HLEN << 16) | ETH_HLEN);
1115 le->ctrl = 0;
1116 le->opcode = OP_TCPSTART | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001117
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001118 sky2_write32(sky2->hw,
1119 Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1120 sky2->rx_csum ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001121}
1122
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001123/*
1124 * The RX Stop command will not work for Yukon-2 if the BMU does not
1125 * reach the end of packet and since we can't make sure that we have
1126 * incoming data, we must reset the BMU while it is not doing a DMA
1127 * transfer. Since it is possible that the RX path is still active,
1128 * the RX RAM buffer will be stopped first, so any possible incoming
1129 * data will not trigger a DMA. After the RAM buffer is stopped, the
1130 * BMU is polled until any DMA in progress is ended and only then it
1131 * will be reset.
1132 */
1133static void sky2_rx_stop(struct sky2_port *sky2)
1134{
1135 struct sky2_hw *hw = sky2->hw;
1136 unsigned rxq = rxqaddr[sky2->port];
1137 int i;
1138
1139 /* disable the RAM Buffer receive queue */
1140 sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD);
1141
1142 for (i = 0; i < 0xffff; i++)
1143 if (sky2_read8(hw, RB_ADDR(rxq, Q_RSL))
1144 == sky2_read8(hw, RB_ADDR(rxq, Q_RL)))
1145 goto stopped;
1146
1147 printk(KERN_WARNING PFX "%s: receiver stop failed\n",
1148 sky2->netdev->name);
1149stopped:
1150 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST);
1151
1152 /* reset the Rx prefetch unit */
1153 sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
Stephen Hemmingerc0bad0f2009-06-17 07:30:33 +00001154
1155 /* Reset the RAM Buffer receive queue */
1156 sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_RST_SET);
1157
1158 /* Reset Rx MAC FIFO */
1159 sky2_write8(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), GMF_RST_SET);
1160
1161 sky2_read8(hw, B0_CTST);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001162}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001163
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001164/* Clean out receive buffer area, assumes receiver hardware stopped */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001165static void sky2_rx_clean(struct sky2_port *sky2)
1166{
1167 unsigned i;
1168
1169 memset(sky2->rx_le, 0, RX_LE_BYTES);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001170 for (i = 0; i < sky2->rx_pending; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001171 struct rx_ring_info *re = sky2->rx_ring + i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001172
1173 if (re->skb) {
Stephen Hemminger14d02632006-09-26 11:57:43 -07001174 sky2_rx_unmap_skb(sky2->hw->pdev, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001175 kfree_skb(re->skb);
1176 re->skb = NULL;
1177 }
1178 }
1179}
1180
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001181/* Basic MII support */
1182static int sky2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1183{
1184 struct mii_ioctl_data *data = if_mii(ifr);
1185 struct sky2_port *sky2 = netdev_priv(dev);
1186 struct sky2_hw *hw = sky2->hw;
1187 int err = -EOPNOTSUPP;
1188
1189 if (!netif_running(dev))
1190 return -ENODEV; /* Phy still in reset */
1191
Stephen Hemmingerd89e1342006-03-20 15:48:20 -08001192 switch (cmd) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001193 case SIOCGMIIPHY:
1194 data->phy_id = PHY_ADDR_MARV;
1195
1196 /* fallthru */
1197 case SIOCGMIIREG: {
1198 u16 val = 0;
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001199
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001200 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001201 err = __gm_phy_read(hw, sky2->port, data->reg_num & 0x1f, &val);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001202 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001203
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001204 data->val_out = val;
1205 break;
1206 }
1207
1208 case SIOCSMIIREG:
1209 if (!capable(CAP_NET_ADMIN))
1210 return -EPERM;
1211
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001212 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001213 err = gm_phy_write(hw, sky2->port, data->reg_num & 0x1f,
1214 data->val_in);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001215 spin_unlock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001216 break;
1217 }
1218 return err;
1219}
1220
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001221#ifdef SKY2_VLAN_TAG_USED
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001222static void sky2_set_vlan_mode(struct sky2_hw *hw, u16 port, bool onoff)
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001223{
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001224 if (onoff) {
Stephen Hemminger3d4e66f2007-06-01 09:43:58 -07001225 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1226 RX_VLAN_STRIP_ON);
1227 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1228 TX_VLAN_TAG_ON);
1229 } else {
1230 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1231 RX_VLAN_STRIP_OFF);
1232 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1233 TX_VLAN_TAG_OFF);
1234 }
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001235}
1236
1237static void sky2_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
1238{
1239 struct sky2_port *sky2 = netdev_priv(dev);
1240 struct sky2_hw *hw = sky2->hw;
1241 u16 port = sky2->port;
1242
1243 netif_tx_lock_bh(dev);
1244 napi_disable(&hw->napi);
1245
1246 sky2->vlgrp = grp;
1247 sky2_set_vlan_mode(hw, port, grp != NULL);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001248
David S. Millerd1d08d12008-01-07 20:53:33 -08001249 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001250 napi_enable(&hw->napi);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001251 netif_tx_unlock_bh(dev);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001252}
1253#endif
1254
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001255/*
Stephen Hemminger14d02632006-09-26 11:57:43 -07001256 * Allocate an skb for receiving. If the MTU is large enough
1257 * make the skb non-linear with a fragment list of pages.
Stephen Hemminger82788c72006-01-17 13:43:10 -08001258 */
Stephen Hemminger14d02632006-09-26 11:57:43 -07001259static struct sk_buff *sky2_rx_alloc(struct sky2_port *sky2)
Stephen Hemminger82788c72006-01-17 13:43:10 -08001260{
1261 struct sk_buff *skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001262 int i;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001263
Stephen Hemminger39dbd952008-02-04 19:45:13 -08001264 if (sky2->hw->flags & SKY2_HW_RAM_BUFFER) {
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001265 unsigned char *start;
1266 /*
1267 * Workaround for a bug in FIFO that cause hang
1268 * if the FIFO if the receive buffer is not 64 byte aligned.
1269 * The buffer returned from netdev_alloc_skb is
1270 * aligned except if slab debugging is enabled.
1271 */
1272 skb = netdev_alloc_skb(sky2->netdev, sky2->rx_data_size + 8);
1273 if (!skb)
1274 goto nomem;
1275 start = PTR_ALIGN(skb->data, 8);
1276 skb_reserve(skb, start - skb->data);
1277 } else {
1278 skb = netdev_alloc_skb(sky2->netdev,
1279 sky2->rx_data_size + NET_IP_ALIGN);
1280 if (!skb)
1281 goto nomem;
1282 skb_reserve(skb, NET_IP_ALIGN);
1283 }
Stephen Hemminger14d02632006-09-26 11:57:43 -07001284
1285 for (i = 0; i < sky2->rx_nfrags; i++) {
1286 struct page *page = alloc_page(GFP_ATOMIC);
1287
1288 if (!page)
1289 goto free_partial;
1290 skb_fill_page_desc(skb, i, page, 0, PAGE_SIZE);
Stephen Hemminger82788c72006-01-17 13:43:10 -08001291 }
1292
1293 return skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001294free_partial:
1295 kfree_skb(skb);
1296nomem:
1297 return NULL;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001298}
1299
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001300static inline void sky2_rx_update(struct sky2_port *sky2, unsigned rxq)
1301{
1302 sky2_put_idx(sky2->hw, rxq, sky2->rx_put);
1303}
1304
Stephen Hemminger82788c72006-01-17 13:43:10 -08001305/*
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001306 * Allocate and setup receiver buffer pool.
Stephen Hemminger14d02632006-09-26 11:57:43 -07001307 * Normal case this ends up creating one list element for skb
1308 * in the receive ring. Worst case if using large MTU and each
1309 * allocation falls on a different 64 bit region, that results
1310 * in 6 list elements per ring entry.
1311 * One element is used for checksum enable/disable, and one
1312 * extra to avoid wrap.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001313 */
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001314static int sky2_rx_start(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001315{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001316 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001317 struct rx_ring_info *re;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001318 unsigned rxq = rxqaddr[sky2->port];
Stephen Hemminger5f06eba2007-11-28 14:50:16 -08001319 unsigned i, size, thresh;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001320
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001321 sky2->rx_put = sky2->rx_next = 0;
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001322 sky2_qset(hw, rxq);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001323
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001324 /* On PCI express lowering the watermark gives better performance */
1325 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
1326 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX);
1327
1328 /* These chips have no ram buffer?
1329 * MAC Rx RAM Read is controlled by hardware */
Stephen Hemminger8df9a872006-12-01 14:29:35 -08001330 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001331 (hw->chip_rev == CHIP_REV_YU_EC_U_A1
1332 || hw->chip_rev == CHIP_REV_YU_EC_U_B0))
Stephen Hemmingerf449c7c2007-06-04 17:23:23 -07001333 sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001334
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001335 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);
1336
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001337 if (!(hw->flags & SKY2_HW_NEW_LE))
1338 rx_set_checksum(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001339
Stephen Hemminger14d02632006-09-26 11:57:43 -07001340 /* Space needed for frame data + headers rounded up */
Stephen Hemmingerf957da22007-07-09 15:33:41 -07001341 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001342
1343 /* Stopping point for hardware truncation */
1344 thresh = (size - 8) / sizeof(u32);
1345
Stephen Hemminger5f06eba2007-11-28 14:50:16 -08001346 sky2->rx_nfrags = size >> PAGE_SHIFT;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001347 BUG_ON(sky2->rx_nfrags > ARRAY_SIZE(re->frag_addr));
1348
Stephen Hemminger5f06eba2007-11-28 14:50:16 -08001349 /* Compute residue after pages */
1350 size -= sky2->rx_nfrags << PAGE_SHIFT;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001351
Stephen Hemminger5f06eba2007-11-28 14:50:16 -08001352 /* Optimize to handle small packets and headers */
1353 if (size < copybreak)
1354 size = copybreak;
1355 if (size < ETH_HLEN)
1356 size = ETH_HLEN;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001357
Stephen Hemminger14d02632006-09-26 11:57:43 -07001358 sky2->rx_data_size = size;
1359
1360 /* Fill Rx ring */
1361 for (i = 0; i < sky2->rx_pending; i++) {
1362 re = sky2->rx_ring + i;
1363
1364 re->skb = sky2_rx_alloc(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001365 if (!re->skb)
1366 goto nomem;
1367
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001368 if (sky2_rx_map_skb(hw->pdev, re, sky2->rx_data_size)) {
1369 dev_kfree_skb(re->skb);
1370 re->skb = NULL;
1371 goto nomem;
1372 }
1373
Stephen Hemminger14d02632006-09-26 11:57:43 -07001374 sky2_rx_submit(sky2, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001375 }
1376
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001377 /*
1378 * The receiver hangs if it receives frames larger than the
1379 * packet buffer. As a workaround, truncate oversize frames, but
1380 * the register is limited to 9 bits, so if you do frames > 2052
1381 * you better get the MTU right!
1382 */
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001383 if (thresh > 0x1ff)
1384 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_OFF);
1385 else {
1386 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), thresh);
1387 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_ON);
1388 }
1389
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001390 /* Tell chip about available buffers */
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001391 sky2_rx_update(sky2, rxq);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001392 return 0;
1393nomem:
1394 sky2_rx_clean(sky2);
1395 return -ENOMEM;
1396}
1397
1398/* Bring up network interface. */
1399static int sky2_up(struct net_device *dev)
1400{
1401 struct sky2_port *sky2 = netdev_priv(dev);
1402 struct sky2_hw *hw = sky2->hw;
1403 unsigned port = sky2->port;
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001404 u32 imask, ramsize;
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001405 int cap, err = -ENOMEM;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001406 struct net_device *otherdev = hw->dev[sky2->port^1];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001407
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001408 /*
1409 * On dual port PCI-X card, there is an problem where status
1410 * can be received out of order due to split transactions
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001411 */
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001412 if (otherdev && netif_running(otherdev) &&
1413 (cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) {
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001414 u16 cmd;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001415
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08001416 cmd = sky2_pci_read16(hw, cap + PCI_X_CMD);
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001417 cmd &= ~PCI_X_CMD_MAX_SPLIT;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08001418 sky2_pci_write16(hw, cap + PCI_X_CMD, cmd);
1419
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001420 }
1421
Stephen Hemminger55d7b4e2007-07-09 15:33:34 -07001422 netif_carrier_off(dev);
1423
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001424 /* must be power of 2 */
1425 sky2->tx_le = pci_alloc_consistent(hw->pdev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07001426 TX_RING_SIZE *
1427 sizeof(struct sky2_tx_le),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001428 &sky2->tx_le_map);
1429 if (!sky2->tx_le)
1430 goto err_out;
1431
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001432 sky2->tx_ring = kcalloc(TX_RING_SIZE, sizeof(struct tx_ring_info),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001433 GFP_KERNEL);
1434 if (!sky2->tx_ring)
1435 goto err_out;
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001436
1437 tx_init(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001438
1439 sky2->rx_le = pci_alloc_consistent(hw->pdev, RX_LE_BYTES,
1440 &sky2->rx_le_map);
1441 if (!sky2->rx_le)
1442 goto err_out;
1443 memset(sky2->rx_le, 0, RX_LE_BYTES);
1444
Stephen Hemminger291ea612006-09-26 11:57:41 -07001445 sky2->rx_ring = kcalloc(sky2->rx_pending, sizeof(struct rx_ring_info),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001446 GFP_KERNEL);
1447 if (!sky2->rx_ring)
1448 goto err_out;
1449
1450 sky2_mac_init(hw, port);
1451
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001452 /* Register is number of 4K blocks on internal RAM buffer. */
1453 ramsize = sky2_read8(hw, B2_E_0) * 4;
1454 if (ramsize > 0) {
Stephen Hemminger67712902006-12-04 15:53:45 -08001455 u32 rxspace;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001456
Stephen Hemminger39dbd952008-02-04 19:45:13 -08001457 hw->flags |= SKY2_HW_RAM_BUFFER;
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001458 pr_debug(PFX "%s: ram buffer %dK\n", dev->name, ramsize);
Stephen Hemminger67712902006-12-04 15:53:45 -08001459 if (ramsize < 16)
1460 rxspace = ramsize / 2;
1461 else
1462 rxspace = 8 + (2*(ramsize - 16))/3;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001463
Stephen Hemminger67712902006-12-04 15:53:45 -08001464 sky2_ramset(hw, rxqaddr[port], 0, rxspace);
1465 sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace);
1466
1467 /* Make sure SyncQ is disabled */
1468 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
1469 RB_RST_SET);
1470 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001471
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001472 sky2_qset(hw, txqaddr[port]);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001473
Stephen Hemminger69161612007-06-04 17:23:26 -07001474 /* This is copied from sk98lin 10.0.5.3; no one tells me about erratta's */
1475 if (hw->chip_id == CHIP_ID_YUKON_EX && hw->chip_rev == CHIP_REV_YU_EX_B0)
1476 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF);
1477
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001478 /* Set almost empty threshold */
Stephen Hemmingerc2716fb2006-09-26 11:57:39 -07001479 if (hw->chip_id == CHIP_ID_YUKON_EC_U
1480 && hw->chip_rev == CHIP_REV_YU_EC_U_A0)
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07001481 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001482
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001483 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map,
1484 TX_RING_SIZE - 1);
1485
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001486#ifdef SKY2_VLAN_TAG_USED
1487 sky2_set_vlan_mode(hw, port, sky2->vlgrp != NULL);
1488#endif
1489
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001490 err = sky2_rx_start(sky2);
Stephen Hemminger6de16232007-10-17 13:26:42 -07001491 if (err)
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001492 goto err_out;
1493
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001494 /* Enable interrupts from phy/mac for port */
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001495 imask = sky2_read32(hw, B0_IMSK);
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -07001496 imask |= portirq_msk[port];
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001497 sky2_write32(hw, B0_IMSK, imask);
Stephen Hemminger1fd82f32009-06-17 07:30:34 +00001498 sky2_read32(hw, B0_IMSK);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001499
Stephen Hemmingera7bffe72008-01-23 19:11:51 -08001500 sky2_set_multicast(dev);
Alexey Dobriyana11da892009-01-30 13:45:31 -08001501
1502 if (netif_msg_ifup(sky2))
1503 printk(KERN_INFO PFX "%s: enabling interface\n", dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001504 return 0;
1505
1506err_out:
Stephen Hemminger1b537562005-12-20 15:08:07 -08001507 if (sky2->rx_le) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001508 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1509 sky2->rx_le, sky2->rx_le_map);
Stephen Hemminger1b537562005-12-20 15:08:07 -08001510 sky2->rx_le = NULL;
1511 }
1512 if (sky2->tx_le) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001513 pci_free_consistent(hw->pdev,
1514 TX_RING_SIZE * sizeof(struct sky2_tx_le),
1515 sky2->tx_le, sky2->tx_le_map);
Stephen Hemminger1b537562005-12-20 15:08:07 -08001516 sky2->tx_le = NULL;
1517 }
1518 kfree(sky2->tx_ring);
1519 kfree(sky2->rx_ring);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001520
Stephen Hemminger1b537562005-12-20 15:08:07 -08001521 sky2->tx_ring = NULL;
1522 sky2->rx_ring = NULL;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001523 return err;
1524}
1525
Stephen Hemminger793b8832005-09-14 16:06:14 -07001526/* Modular subtraction in ring */
1527static inline int tx_dist(unsigned tail, unsigned head)
1528{
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07001529 return (head - tail) & (TX_RING_SIZE - 1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001530}
1531
1532/* Number of list elements available for next tx */
1533static inline int tx_avail(const struct sky2_port *sky2)
1534{
1535 return sky2->tx_pending - tx_dist(sky2->tx_cons, sky2->tx_prod);
1536}
1537
1538/* Estimate of number of transmit list elements required */
Stephen Hemminger28bd1812006-01-17 13:43:19 -08001539static unsigned tx_le_req(const struct sk_buff *skb)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001540{
1541 unsigned count;
1542
1543 count = sizeof(dma_addr_t) / sizeof(u32);
1544 count += skb_shinfo(skb)->nr_frags * count;
1545
Herbert Xu89114af2006-07-08 13:34:32 -07001546 if (skb_is_gso(skb))
Stephen Hemminger793b8832005-09-14 16:06:14 -07001547 ++count;
1548
Patrick McHardy84fa7932006-08-29 16:44:56 -07001549 if (skb->ip_summed == CHECKSUM_PARTIAL)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001550 ++count;
1551
1552 return count;
1553}
1554
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001555/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001556 * Put one packet in ring for transmit.
1557 * A single packet can generate multiple list elements, and
1558 * the number of ring elements will probably be less than the number
1559 * of list elements used.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001560 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001561static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev)
1562{
1563 struct sky2_port *sky2 = netdev_priv(dev);
1564 struct sky2_hw *hw = sky2->hw;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001565 struct sky2_tx_le *le = NULL;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001566 struct tx_ring_info *re;
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001567 unsigned i, len, first_slot;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001568 dma_addr_t mapping;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001569 u16 mss;
1570 u8 ctrl;
1571
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001572 if (unlikely(tx_avail(sky2) < tx_le_req(skb)))
1573 return NETDEV_TX_BUSY;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001574
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001575 len = skb_headlen(skb);
1576 mapping = pci_map_single(hw->pdev, skb->data, len, PCI_DMA_TODEVICE);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001577
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001578 if (pci_dma_mapping_error(hw->pdev, mapping))
1579 goto mapping_error;
1580
1581 first_slot = sky2->tx_prod;
1582 if (unlikely(netif_msg_tx_queued(sky2)))
1583 printk(KERN_DEBUG "%s: tx queued, slot %u, len %d\n",
1584 dev->name, first_slot, skb->len);
1585
Stephen Hemminger86c68872008-01-10 16:14:12 -08001586 /* Send high bits if needed */
1587 if (sizeof(dma_addr_t) > sizeof(u32)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07001588 le = get_tx_le(sky2);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001589 le->addr = cpu_to_le32(upper_32_bits(mapping));
Stephen Hemminger793b8832005-09-14 16:06:14 -07001590 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001591 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001592
1593 /* Check for TCP Segmentation Offload */
Herbert Xu79671682006-06-22 02:40:14 -07001594 mss = skb_shinfo(skb)->gso_size;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001595 if (mss != 0) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001596
1597 if (!(hw->flags & SKY2_HW_NEW_LE))
Stephen Hemminger69161612007-06-04 17:23:26 -07001598 mss += ETH_HLEN + ip_hdrlen(skb) + tcp_hdrlen(skb);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001599
Stephen Hemminger69161612007-06-04 17:23:26 -07001600 if (mss != sky2->tx_last_mss) {
1601 le = get_tx_le(sky2);
1602 le->addr = cpu_to_le32(mss);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001603
1604 if (hw->flags & SKY2_HW_NEW_LE)
Stephen Hemminger69161612007-06-04 17:23:26 -07001605 le->opcode = OP_MSS | HW_OWNER;
1606 else
1607 le->opcode = OP_LRGLEN | HW_OWNER;
shemminger@osdl.orge07560c2006-08-28 10:00:49 -07001608 sky2->tx_last_mss = mss;
1609 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001610 }
1611
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001612 ctrl = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001613#ifdef SKY2_VLAN_TAG_USED
1614 /* Add VLAN tag, can piggyback on LRGLEN or ADDR64 */
1615 if (sky2->vlgrp && vlan_tx_tag_present(skb)) {
1616 if (!le) {
1617 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001618 le->addr = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001619 le->opcode = OP_VLAN|HW_OWNER;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001620 } else
1621 le->opcode |= OP_VLAN;
1622 le->length = cpu_to_be16(vlan_tx_tag_get(skb));
1623 ctrl |= INS_VLAN;
1624 }
1625#endif
1626
1627 /* Handle TCP checksum offload */
Patrick McHardy84fa7932006-08-29 16:44:56 -07001628 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Stephen Hemminger69161612007-06-04 17:23:26 -07001629 /* On Yukon EX (some versions) encoding change. */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001630 if (hw->flags & SKY2_HW_AUTO_TX_SUM)
Stephen Hemminger69161612007-06-04 17:23:26 -07001631 ctrl |= CALSUM; /* auto checksum */
1632 else {
1633 const unsigned offset = skb_transport_offset(skb);
1634 u32 tcpsum;
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001635
Stephen Hemminger69161612007-06-04 17:23:26 -07001636 tcpsum = offset << 16; /* sum start */
1637 tcpsum |= offset + skb->csum_offset; /* sum write */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001638
Stephen Hemminger69161612007-06-04 17:23:26 -07001639 ctrl |= CALSUM | WR_SUM | INIT_SUM | LOCK_SUM;
1640 if (ip_hdr(skb)->protocol == IPPROTO_UDP)
1641 ctrl |= UDPTCP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001642
Stephen Hemminger69161612007-06-04 17:23:26 -07001643 if (tcpsum != sky2->tx_tcpsum) {
1644 sky2->tx_tcpsum = tcpsum;
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001645
Stephen Hemminger69161612007-06-04 17:23:26 -07001646 le = get_tx_le(sky2);
1647 le->addr = cpu_to_le32(tcpsum);
1648 le->length = 0; /* initial checksum value */
1649 le->ctrl = 1; /* one packet */
1650 le->opcode = OP_TCPLISW | HW_OWNER;
1651 }
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001652 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001653 }
1654
1655 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001656 le->addr = cpu_to_le32((u32) mapping);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001657 le->length = cpu_to_le16(len);
1658 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001659 le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001660
Stephen Hemminger291ea612006-09-26 11:57:41 -07001661 re = tx_le_re(sky2, le);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001662 re->skb = skb;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001663 pci_unmap_addr_set(re, mapaddr, mapping);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001664 pci_unmap_len_set(re, maplen, len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001665
1666 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001667 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001668
1669 mapping = pci_map_page(hw->pdev, frag->page, frag->page_offset,
1670 frag->size, PCI_DMA_TODEVICE);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001671
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001672 if (pci_dma_mapping_error(hw->pdev, mapping))
1673 goto mapping_unwind;
1674
Stephen Hemminger86c68872008-01-10 16:14:12 -08001675 if (sizeof(dma_addr_t) > sizeof(u32)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07001676 le = get_tx_le(sky2);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001677 le->addr = cpu_to_le32(upper_32_bits(mapping));
Stephen Hemminger793b8832005-09-14 16:06:14 -07001678 le->ctrl = 0;
1679 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001680 }
1681
1682 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001683 le->addr = cpu_to_le32((u32) mapping);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001684 le->length = cpu_to_le16(frag->size);
1685 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001686 le->opcode = OP_BUFFER | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001687
Stephen Hemminger291ea612006-09-26 11:57:41 -07001688 re = tx_le_re(sky2, le);
1689 re->skb = skb;
1690 pci_unmap_addr_set(re, mapaddr, mapping);
1691 pci_unmap_len_set(re, maplen, frag->size);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001692 }
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001693
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001694 le->ctrl |= EOP;
1695
shemminger@osdl.org97bda702006-08-28 10:00:47 -07001696 if (tx_avail(sky2) <= MAX_SKB_TX_LE)
1697 netif_stop_queue(dev);
Stephen Hemmingerb19666d2006-03-07 11:06:36 -08001698
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001699 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001700
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001701 return NETDEV_TX_OK;
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001702
1703mapping_unwind:
1704 for (i = first_slot; i != sky2->tx_prod; i = RING_NEXT(i, TX_RING_SIZE)) {
1705 le = sky2->tx_le + i;
1706 re = sky2->tx_ring + i;
1707
1708 switch(le->opcode & ~HW_OWNER) {
1709 case OP_LARGESEND:
1710 case OP_PACKET:
1711 pci_unmap_single(hw->pdev,
1712 pci_unmap_addr(re, mapaddr),
1713 pci_unmap_len(re, maplen),
1714 PCI_DMA_TODEVICE);
1715 break;
1716 case OP_BUFFER:
1717 pci_unmap_page(hw->pdev, pci_unmap_addr(re, mapaddr),
1718 pci_unmap_len(re, maplen),
1719 PCI_DMA_TODEVICE);
1720 break;
1721 }
1722 }
1723
1724 sky2->tx_prod = first_slot;
1725mapping_error:
1726 if (net_ratelimit())
1727 dev_warn(&hw->pdev->dev, "%s: tx mapping error\n", dev->name);
1728 dev_kfree_skb(skb);
1729 return NETDEV_TX_OK;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001730}
1731
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001732/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001733 * Free ring elements from starting at tx_cons until "done"
1734 *
1735 * NB: the hardware will tell us about partial completion of multi-part
Stephen Hemminger291ea612006-09-26 11:57:41 -07001736 * buffers so make sure not to free skb to early.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001737 */
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001738static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001739{
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001740 struct net_device *dev = sky2->netdev;
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08001741 struct pci_dev *pdev = sky2->hw->pdev;
Stephen Hemminger291ea612006-09-26 11:57:41 -07001742 unsigned idx;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001743
Stephen Hemminger0e3ff6a2005-12-09 11:35:02 -08001744 BUG_ON(done >= TX_RING_SIZE);
shemminger@osdl.org22247952005-11-30 11:45:19 -08001745
Stephen Hemminger291ea612006-09-26 11:57:41 -07001746 for (idx = sky2->tx_cons; idx != done;
1747 idx = RING_NEXT(idx, TX_RING_SIZE)) {
1748 struct sky2_tx_le *le = sky2->tx_le + idx;
1749 struct tx_ring_info *re = sky2->tx_ring + idx;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001750
Stephen Hemminger291ea612006-09-26 11:57:41 -07001751 switch(le->opcode & ~HW_OWNER) {
1752 case OP_LARGESEND:
1753 case OP_PACKET:
1754 pci_unmap_single(pdev,
1755 pci_unmap_addr(re, mapaddr),
1756 pci_unmap_len(re, maplen),
1757 PCI_DMA_TODEVICE);
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08001758 break;
Stephen Hemminger291ea612006-09-26 11:57:41 -07001759 case OP_BUFFER:
1760 pci_unmap_page(pdev, pci_unmap_addr(re, mapaddr),
1761 pci_unmap_len(re, maplen),
Stephen Hemminger734d1862005-12-09 11:35:00 -08001762 PCI_DMA_TODEVICE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001763 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001764 }
1765
Stephen Hemminger291ea612006-09-26 11:57:41 -07001766 if (le->ctrl & EOP) {
1767 if (unlikely(netif_msg_tx_done(sky2)))
1768 printk(KERN_DEBUG "%s: tx done %u\n",
1769 dev->name, idx);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07001770
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07001771 dev->stats.tx_packets++;
1772 dev->stats.tx_bytes += re->skb->len;
shemminger@linux-foundation.org2bf56fe2007-01-26 11:38:39 -08001773
Stephen Hemminger794b2bd2006-12-01 14:29:36 -08001774 dev_kfree_skb_any(re->skb);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07001775 sky2->tx_next = RING_NEXT(idx, TX_RING_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001776 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001777 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001778
Stephen Hemminger291ea612006-09-26 11:57:41 -07001779 sky2->tx_cons = idx;
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001780 smp_mb();
1781
Stephen Hemminger22e11702006-07-12 15:23:48 -07001782 if (tx_avail(sky2) > MAX_SKB_TX_LE + 4)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001783 netif_wake_queue(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001784}
1785
1786/* Cleanup all untransmitted buffers, assume transmitter not running */
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001787static void sky2_tx_clean(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001788{
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001789 struct sky2_port *sky2 = netdev_priv(dev);
1790
1791 netif_tx_lock_bh(dev);
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001792 sky2_tx_complete(sky2, sky2->tx_prod);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001793 netif_tx_unlock_bh(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001794}
1795
1796/* Network shutdown */
1797static int sky2_down(struct net_device *dev)
1798{
1799 struct sky2_port *sky2 = netdev_priv(dev);
1800 struct sky2_hw *hw = sky2->hw;
1801 unsigned port = sky2->port;
1802 u16 ctrl;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001803 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001804
Stephen Hemminger1b537562005-12-20 15:08:07 -08001805 /* Never really got started! */
1806 if (!sky2->tx_le)
1807 return 0;
1808
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001809 if (netif_msg_ifdown(sky2))
1810 printk(KERN_INFO PFX "%s: disabling interface\n", dev->name);
1811
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07001812 /* Disable port IRQ */
1813 imask = sky2_read32(hw, B0_IMSK);
1814 imask &= ~portirq_msk[port];
1815 sky2_write32(hw, B0_IMSK, imask);
Stephen Hemminger1fd82f32009-06-17 07:30:34 +00001816 sky2_read32(hw, B0_IMSK);
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07001817
Stephen Hemmingerd104aca2009-06-17 07:30:32 +00001818 /* Force flow control off */
1819 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001820
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001821 /* Stop transmitter */
1822 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP);
1823 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR));
1824
1825 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
Stephen Hemminger793b8832005-09-14 16:06:14 -07001826 RB_RST_SET | RB_DIS_OP_MD);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001827
1828 ctrl = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001829 ctrl &= ~(GM_GPCR_TX_ENA | GM_GPCR_RX_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001830 gma_write16(hw, port, GM_GP_CTRL, ctrl);
1831
1832 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
1833
1834 /* Workaround shared GMAC reset */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001835 if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0
1836 && port == 0 && hw->dev[1] && netif_running(hw->dev[1])))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001837 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);
1838
1839 /* Disable Force Sync bit and Enable Alloc bit */
1840 sky2_write8(hw, SK_REG(port, TXA_CTRL),
1841 TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
1842
1843 /* Stop Interval Timer and Limit Counter of Tx Arbiter */
1844 sky2_write32(hw, SK_REG(port, TXA_ITI_INI), 0L);
1845 sky2_write32(hw, SK_REG(port, TXA_LIM_INI), 0L);
1846
1847 /* Reset the PCI FIFO of the async Tx queue */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001848 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR),
1849 BMU_RST_SET | BMU_FIFO_RST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001850
1851 /* Reset the Tx prefetch units */
1852 sky2_write32(hw, Y2_QADDR(txqaddr[port], PREF_UNIT_CTRL),
1853 PREF_UNIT_RST_SET);
1854
1855 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
1856
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001857 sky2_rx_stop(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001858
1859 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
1860 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET);
1861
Stephen Hemminger6c835042009-06-17 07:30:35 +00001862 /* Force any delayed status interrrupt and NAPI */
1863 sky2_write32(hw, STAT_LEV_TIMER_CNT, 0);
1864 sky2_write32(hw, STAT_TX_TIMER_CNT, 0);
1865 sky2_write32(hw, STAT_ISR_TIMER_CNT, 0);
1866 sky2_read8(hw, STAT_ISR_TIMER_CTRL);
1867
1868 synchronize_irq(hw->pdev->irq);
1869 napi_synchronize(&hw->napi);
1870
Stephen Hemmingerb96936da72008-05-14 17:04:15 -07001871 sky2_phy_power_down(hw, port);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001872
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001873 /* turn off LED's */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001874 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
1875
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001876 sky2_tx_clean(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001877 sky2_rx_clean(sky2);
1878
1879 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1880 sky2->rx_le, sky2->rx_le_map);
1881 kfree(sky2->rx_ring);
1882
1883 pci_free_consistent(hw->pdev,
1884 TX_RING_SIZE * sizeof(struct sky2_tx_le),
1885 sky2->tx_le, sky2->tx_le_map);
1886 kfree(sky2->tx_ring);
1887
Stephen Hemminger1b537562005-12-20 15:08:07 -08001888 sky2->tx_le = NULL;
1889 sky2->rx_le = NULL;
1890
1891 sky2->rx_ring = NULL;
1892 sky2->tx_ring = NULL;
1893
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001894 return 0;
1895}
1896
1897static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux)
1898{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001899 if (hw->flags & SKY2_HW_FIBRE_PHY)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001900 return SPEED_1000;
1901
Stephen Hemminger05745c42007-09-19 15:36:45 -07001902 if (!(hw->flags & SKY2_HW_GIGABIT)) {
1903 if (aux & PHY_M_PS_SPEED_100)
1904 return SPEED_100;
1905 else
1906 return SPEED_10;
1907 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001908
1909 switch (aux & PHY_M_PS_SPEED_MSK) {
1910 case PHY_M_PS_SPEED_1000:
1911 return SPEED_1000;
1912 case PHY_M_PS_SPEED_100:
1913 return SPEED_100;
1914 default:
1915 return SPEED_10;
1916 }
1917}
1918
1919static void sky2_link_up(struct sky2_port *sky2)
1920{
1921 struct sky2_hw *hw = sky2->hw;
1922 unsigned port = sky2->port;
1923 u16 reg;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001924 static const char *fc_name[] = {
1925 [FC_NONE] = "none",
1926 [FC_TX] = "tx",
1927 [FC_RX] = "rx",
1928 [FC_BOTH] = "both",
1929 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001930
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001931 /* enable Rx/Tx */
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001932 reg = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001933 reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
1934 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001935
1936 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
1937
1938 netif_carrier_on(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001939
Stephen Hemminger75e80682007-09-19 15:36:46 -07001940 mod_timer(&hw->watchdog_timer, jiffies + 1);
Stephen Hemminger32c2c302007-08-21 14:34:03 -07001941
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001942 /* Turn on link LED */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001943 sky2_write8(hw, SK_REG(port, LNK_LED_REG),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001944 LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF);
1945
1946 if (netif_msg_link(sky2))
1947 printk(KERN_INFO PFX
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001948 "%s: Link is up at %d Mbps, %s duplex, flow control %s\n",
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001949 sky2->netdev->name, sky2->speed,
1950 sky2->duplex == DUPLEX_FULL ? "full" : "half",
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001951 fc_name[sky2->flow_status]);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001952}
1953
1954static void sky2_link_down(struct sky2_port *sky2)
1955{
1956 struct sky2_hw *hw = sky2->hw;
1957 unsigned port = sky2->port;
1958 u16 reg;
1959
1960 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
1961
1962 reg = gma_read16(hw, port, GM_GP_CTRL);
1963 reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
1964 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001965
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001966 netif_carrier_off(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001967
1968 /* Turn on link LED */
1969 sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF);
1970
1971 if (netif_msg_link(sky2))
1972 printk(KERN_INFO PFX "%s: Link is down.\n", sky2->netdev->name);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001973
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001974 sky2_phy_init(hw, port);
1975}
1976
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001977static enum flow_control sky2_flow(int rx, int tx)
1978{
1979 if (rx)
1980 return tx ? FC_BOTH : FC_RX;
1981 else
1982 return tx ? FC_TX : FC_NONE;
1983}
1984
Stephen Hemminger793b8832005-09-14 16:06:14 -07001985static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux)
1986{
1987 struct sky2_hw *hw = sky2->hw;
1988 unsigned port = sky2->port;
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001989 u16 advert, lpa;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001990
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001991 advert = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001992 lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001993 if (lpa & PHY_M_AN_RF) {
1994 printk(KERN_ERR PFX "%s: remote fault", sky2->netdev->name);
1995 return -1;
1996 }
1997
Stephen Hemminger793b8832005-09-14 16:06:14 -07001998 if (!(aux & PHY_M_PS_SPDUP_RES)) {
1999 printk(KERN_ERR PFX "%s: speed/duplex mismatch",
2000 sky2->netdev->name);
2001 return -1;
2002 }
2003
Stephen Hemminger793b8832005-09-14 16:06:14 -07002004 sky2->speed = sky2_phy_speed(hw, aux);
Stephen Hemminger7c74ac12006-10-17 10:24:08 -07002005 sky2->duplex = (aux & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
Stephen Hemminger793b8832005-09-14 16:06:14 -07002006
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002007 /* Since the pause result bits seem to in different positions on
2008 * different chips. look at registers.
2009 */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002010 if (hw->flags & SKY2_HW_FIBRE_PHY) {
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002011 /* Shift for bits in fiber PHY */
2012 advert &= ~(ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM);
2013 lpa &= ~(LPA_PAUSE_CAP|LPA_PAUSE_ASYM);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002014
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002015 if (advert & ADVERTISE_1000XPAUSE)
2016 advert |= ADVERTISE_PAUSE_CAP;
2017 if (advert & ADVERTISE_1000XPSE_ASYM)
2018 advert |= ADVERTISE_PAUSE_ASYM;
2019 if (lpa & LPA_1000XPAUSE)
2020 lpa |= LPA_PAUSE_CAP;
2021 if (lpa & LPA_1000XPAUSE_ASYM)
2022 lpa |= LPA_PAUSE_ASYM;
2023 }
2024
2025 sky2->flow_status = FC_NONE;
2026 if (advert & ADVERTISE_PAUSE_CAP) {
2027 if (lpa & LPA_PAUSE_CAP)
2028 sky2->flow_status = FC_BOTH;
2029 else if (advert & ADVERTISE_PAUSE_ASYM)
2030 sky2->flow_status = FC_RX;
2031 } else if (advert & ADVERTISE_PAUSE_ASYM) {
2032 if ((lpa & LPA_PAUSE_CAP) && (lpa & LPA_PAUSE_ASYM))
2033 sky2->flow_status = FC_TX;
2034 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07002035
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002036 if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000
Stephen Hemminger937454942007-02-06 10:45:43 -08002037 && !(hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX))
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002038 sky2->flow_status = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07002039
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002040 if (sky2->flow_status & FC_TX)
Stephen Hemminger793b8832005-09-14 16:06:14 -07002041 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
2042 else
2043 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
2044
2045 return 0;
2046}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002047
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002048/* Interrupt from PHY */
2049static void sky2_phy_intr(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002050{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002051 struct net_device *dev = hw->dev[port];
2052 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002053 u16 istatus, phystat;
2054
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07002055 if (!netif_running(dev))
2056 return;
2057
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002058 spin_lock(&sky2->phy_lock);
2059 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT);
2060 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT);
2061
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002062 if (netif_msg_intr(sky2))
2063 printk(KERN_INFO PFX "%s: phy interrupt status 0x%x 0x%x\n",
2064 sky2->netdev->name, istatus, phystat);
2065
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07002066 if (sky2->autoneg == AUTONEG_ENABLE && (istatus & PHY_M_IS_AN_COMPL)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002067 if (sky2_autoneg_done(sky2, phystat) == 0)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002068 sky2_link_up(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002069 goto out;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002070 }
2071
Stephen Hemminger793b8832005-09-14 16:06:14 -07002072 if (istatus & PHY_M_IS_LSP_CHANGE)
2073 sky2->speed = sky2_phy_speed(hw, phystat);
2074
2075 if (istatus & PHY_M_IS_DUP_CHANGE)
2076 sky2->duplex =
2077 (phystat & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
2078
2079 if (istatus & PHY_M_IS_LST_CHANGE) {
2080 if (phystat & PHY_M_PS_LINK_UP)
2081 sky2_link_up(sky2);
2082 else
2083 sky2_link_down(sky2);
2084 }
2085out:
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002086 spin_unlock(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002087}
2088
Stephen Hemminger62335ab2007-02-06 10:45:42 -08002089/* Transmit timeout is only called if we are running, carrier is up
Stephen Hemminger302d1252006-01-17 13:43:20 -08002090 * and tx queue is full (stopped).
2091 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002092static void sky2_tx_timeout(struct net_device *dev)
2093{
2094 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08002095 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002096
2097 if (netif_msg_timer(sky2))
2098 printk(KERN_ERR PFX "%s: tx timeout\n", dev->name);
2099
Stephen Hemminger8f246642006-03-20 15:48:21 -08002100 printk(KERN_DEBUG PFX "%s: transmit ring %u .. %u report=%u done=%u\n",
Stephen Hemminger62335ab2007-02-06 10:45:42 -08002101 dev->name, sky2->tx_cons, sky2->tx_prod,
2102 sky2_read16(hw, sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
2103 sky2_read16(hw, Q_ADDR(txqaddr[sky2->port], Q_DONE)));
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08002104
Stephen Hemminger81906792007-02-15 16:40:33 -08002105 /* can't restart safely under softirq */
2106 schedule_work(&hw->restart_work);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002107}
2108
2109static int sky2_change_mtu(struct net_device *dev, int new_mtu)
2110{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002111 struct sky2_port *sky2 = netdev_priv(dev);
2112 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002113 unsigned port = sky2->port;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002114 int err;
2115 u16 ctl, mode;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002116 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002117
2118 if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)
2119 return -EINVAL;
2120
Stephen Hemminger05745c42007-09-19 15:36:45 -07002121 if (new_mtu > ETH_DATA_LEN &&
2122 (hw->chip_id == CHIP_ID_YUKON_FE ||
2123 hw->chip_id == CHIP_ID_YUKON_FE_P))
Stephen Hemmingerd2adf4f2007-04-11 14:48:02 -07002124 return -EINVAL;
2125
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002126 if (!netif_running(dev)) {
2127 dev->mtu = new_mtu;
2128 return 0;
2129 }
2130
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002131 imask = sky2_read32(hw, B0_IMSK);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002132 sky2_write32(hw, B0_IMSK, 0);
2133
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002134 dev->trans_start = jiffies; /* prevent tx timeout */
2135 netif_stop_queue(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002136 napi_disable(&hw->napi);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002137
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002138 synchronize_irq(hw->pdev->irq);
2139
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002140 if (!(hw->flags & SKY2_HW_RAM_BUFFER))
Stephen Hemminger69161612007-06-04 17:23:26 -07002141 sky2_set_tx_stfwd(hw, port);
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002142
2143 ctl = gma_read16(hw, port, GM_GP_CTRL);
2144 gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002145 sky2_rx_stop(sky2);
2146 sky2_rx_clean(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002147
2148 dev->mtu = new_mtu;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002149
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002150 mode = DATA_BLIND_VAL(DATA_BLIND_DEF) |
2151 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002152
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002153 if (dev->mtu > ETH_DATA_LEN)
2154 mode |= GM_SMOD_JUMBO_ENA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002155
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002156 gma_write16(hw, port, GM_SERIAL_MODE, mode);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002157
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002158 sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002159
2160 err = sky2_rx_start(sky2);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002161 sky2_write32(hw, B0_IMSK, imask);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002162
David S. Millerd1d08d12008-01-07 20:53:33 -08002163 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002164 napi_enable(&hw->napi);
2165
Stephen Hemminger1b537562005-12-20 15:08:07 -08002166 if (err)
2167 dev_close(dev);
2168 else {
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002169 gma_write16(hw, port, GM_GP_CTRL, ctl);
Stephen Hemminger1b537562005-12-20 15:08:07 -08002170
Stephen Hemminger1b537562005-12-20 15:08:07 -08002171 netif_wake_queue(dev);
2172 }
2173
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002174 return err;
2175}
2176
Stephen Hemminger14d02632006-09-26 11:57:43 -07002177/* For small just reuse existing skb for next receive */
2178static struct sk_buff *receive_copy(struct sky2_port *sky2,
2179 const struct rx_ring_info *re,
2180 unsigned length)
2181{
2182 struct sk_buff *skb;
2183
2184 skb = netdev_alloc_skb(sky2->netdev, length + 2);
2185 if (likely(skb)) {
2186 skb_reserve(skb, 2);
2187 pci_dma_sync_single_for_cpu(sky2->hw->pdev, re->data_addr,
2188 length, PCI_DMA_FROMDEVICE);
Arnaldo Carvalho de Melod626f622007-03-27 18:55:52 -03002189 skb_copy_from_linear_data(re->skb, skb->data, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002190 skb->ip_summed = re->skb->ip_summed;
2191 skb->csum = re->skb->csum;
2192 pci_dma_sync_single_for_device(sky2->hw->pdev, re->data_addr,
2193 length, PCI_DMA_FROMDEVICE);
2194 re->skb->ip_summed = CHECKSUM_NONE;
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002195 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002196 }
2197 return skb;
2198}
2199
2200/* Adjust length of skb with fragments to match received data */
2201static void skb_put_frags(struct sk_buff *skb, unsigned int hdr_space,
2202 unsigned int length)
2203{
2204 int i, num_frags;
2205 unsigned int size;
2206
2207 /* put header into skb */
2208 size = min(length, hdr_space);
2209 skb->tail += size;
2210 skb->len += size;
2211 length -= size;
2212
2213 num_frags = skb_shinfo(skb)->nr_frags;
2214 for (i = 0; i < num_frags; i++) {
2215 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2216
2217 if (length == 0) {
2218 /* don't need this page */
2219 __free_page(frag->page);
2220 --skb_shinfo(skb)->nr_frags;
2221 } else {
2222 size = min(length, (unsigned) PAGE_SIZE);
2223
2224 frag->size = size;
2225 skb->data_len += size;
2226 skb->truesize += size;
2227 skb->len += size;
2228 length -= size;
2229 }
2230 }
2231}
2232
2233/* Normal packet - take skb from ring element and put in a new one */
2234static struct sk_buff *receive_new(struct sky2_port *sky2,
2235 struct rx_ring_info *re,
2236 unsigned int length)
2237{
2238 struct sk_buff *skb, *nskb;
2239 unsigned hdr_space = sky2->rx_data_size;
2240
Stephen Hemminger14d02632006-09-26 11:57:43 -07002241 /* Don't be tricky about reusing pages (yet) */
2242 nskb = sky2_rx_alloc(sky2);
2243 if (unlikely(!nskb))
2244 return NULL;
2245
2246 skb = re->skb;
2247 sky2_rx_unmap_skb(sky2->hw->pdev, re);
2248
2249 prefetch(skb->data);
2250 re->skb = nskb;
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00002251 if (sky2_rx_map_skb(sky2->hw->pdev, re, hdr_space)) {
2252 dev_kfree_skb(nskb);
2253 re->skb = skb;
2254 return NULL;
2255 }
Stephen Hemminger14d02632006-09-26 11:57:43 -07002256
2257 if (skb_shinfo(skb)->nr_frags)
2258 skb_put_frags(skb, hdr_space, length);
2259 else
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002260 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002261 return skb;
2262}
2263
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002264/*
2265 * Receive one packet.
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002266 * For larger packets, get new buffer.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002267 */
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002268static struct sk_buff *sky2_receive(struct net_device *dev,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002269 u16 length, u32 status)
2270{
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002271 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger291ea612006-09-26 11:57:41 -07002272 struct rx_ring_info *re = sky2->rx_ring + sky2->rx_next;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002273 struct sk_buff *skb = NULL;
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002274 u16 count = (status & GMR_FS_LEN) >> 16;
2275
2276#ifdef SKY2_VLAN_TAG_USED
2277 /* Account for vlan tag */
2278 if (sky2->vlgrp && (status & GMR_FS_VLAN))
2279 count -= VLAN_HLEN;
2280#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002281
2282 if (unlikely(netif_msg_rx_status(sky2)))
2283 printk(KERN_DEBUG PFX "%s: rx slot %u status 0x%x len %d\n",
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002284 dev->name, sky2->rx_next, status, length);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002285
Stephen Hemminger793b8832005-09-14 16:06:14 -07002286 sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending;
Stephen Hemmingerd70cd512005-12-09 11:35:09 -08002287 prefetch(sky2->rx_ring + sky2->rx_next);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002288
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002289 /* This chip has hardware problems that generates bogus status.
2290 * So do only marginal checking and expect higher level protocols
2291 * to handle crap frames.
2292 */
2293 if (sky2->hw->chip_id == CHIP_ID_YUKON_FE_P &&
2294 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0 &&
2295 length != count)
2296 goto okay;
2297
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002298 if (status & GMR_FS_ANY_ERR)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002299 goto error;
2300
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002301 if (!(status & GMR_FS_RX_OK))
2302 goto resubmit;
2303
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002304 /* if length reported by DMA does not match PHY, packet was truncated */
2305 if (length != count)
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002306 goto len_error;
Stephen Hemminger71749532007-07-09 15:33:40 -07002307
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002308okay:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002309 if (length < copybreak)
2310 skb = receive_copy(sky2, re, length);
2311 else
2312 skb = receive_new(sky2, re, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002313resubmit:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002314 sky2_rx_submit(sky2, re);
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002315
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002316 return skb;
2317
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002318len_error:
Stephen Hemminger71749532007-07-09 15:33:40 -07002319 /* Truncation of overlength packets
2320 causes PHY length to not match MAC length */
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002321 ++dev->stats.rx_length_errors;
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002322 if (netif_msg_rx_err(sky2) && net_ratelimit())
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002323 pr_info(PFX "%s: rx length error: status %#x length %d\n",
2324 dev->name, status, length);
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002325 goto resubmit;
Stephen Hemminger71749532007-07-09 15:33:40 -07002326
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002327error:
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002328 ++dev->stats.rx_errors;
Stephen Hemmingerb6d77732006-10-17 10:24:16 -07002329 if (status & GMR_FS_RX_FF_OV) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002330 dev->stats.rx_over_errors++;
Stephen Hemmingerb6d77732006-10-17 10:24:16 -07002331 goto resubmit;
2332 }
Stephen Hemminger6e15b712005-12-20 15:08:09 -08002333
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002334 if (netif_msg_rx_err(sky2) && net_ratelimit())
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002335 printk(KERN_INFO PFX "%s: rx error, status 0x%x length %d\n",
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002336 dev->name, status, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002337
2338 if (status & (GMR_FS_LONG_ERR | GMR_FS_UN_SIZE))
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002339 dev->stats.rx_length_errors++;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002340 if (status & GMR_FS_FRAGMENT)
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002341 dev->stats.rx_frame_errors++;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002342 if (status & GMR_FS_CRC_ERR)
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002343 dev->stats.rx_crc_errors++;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002344
Stephen Hemminger793b8832005-09-14 16:06:14 -07002345 goto resubmit;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002346}
2347
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002348/* Transmit complete */
2349static inline void sky2_tx_done(struct net_device *dev, u16 last)
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002350{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002351 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger302d1252006-01-17 13:43:20 -08002352
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002353 if (netif_running(dev)) {
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07002354 netif_tx_lock(dev);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002355 sky2_tx_complete(sky2, last);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07002356 netif_tx_unlock(dev);
shemminger@osdl.org22247952005-11-30 11:45:19 -08002357 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002358}
2359
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002360static inline void sky2_rx_done(struct sky2_hw *hw, unsigned port,
2361 unsigned packets, unsigned bytes)
2362{
2363 if (packets) {
2364 struct net_device *dev = hw->dev[port];
2365
2366 dev->stats.rx_packets += packets;
2367 dev->stats.rx_bytes += bytes;
2368 dev->last_rx = jiffies;
2369 sky2_rx_update(netdev_priv(dev), rxqaddr[port]);
2370 }
2371}
2372
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002373/* Process status response ring */
Stephen Hemminger26691832007-10-11 18:31:13 -07002374static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002375{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002376 int work_done = 0;
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002377 unsigned int total_bytes[2] = { 0 };
2378 unsigned int total_packets[2] = { 0 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002379
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08002380 rmb();
Stephen Hemminger26691832007-10-11 18:31:13 -07002381 do {
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002382 struct sky2_port *sky2;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002383 struct sky2_status_le *le = hw->st_le + hw->st_idx;
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002384 unsigned port;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002385 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002386 struct sk_buff *skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002387 u32 status;
2388 u16 length;
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002389 u8 opcode = le->opcode;
2390
2391 if (!(opcode & HW_OWNER))
2392 break;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002393
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07002394 hw->st_idx = RING_NEXT(hw->st_idx, STATUS_RING_SIZE);
shemminger@osdl.orgbea86102005-10-26 12:16:10 -07002395
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002396 port = le->css & CSS_LINK_BIT;
Stephen Hemminger69161612007-06-04 17:23:26 -07002397 dev = hw->dev[port];
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002398 sky2 = netdev_priv(dev);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07002399 length = le16_to_cpu(le->length);
2400 status = le32_to_cpu(le->status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002401
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002402 le->opcode = 0;
2403 switch (opcode & ~HW_OWNER) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002404 case OP_RXSTAT:
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002405 total_packets[port]++;
2406 total_bytes[port] += length;
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002407 skb = sky2_receive(dev, length, status);
Stephen Hemminger3225b912007-05-14 12:38:12 -07002408 if (unlikely(!skb)) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002409 dev->stats.rx_dropped++;
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002410 break;
Stephen Hemminger3225b912007-05-14 12:38:12 -07002411 }
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002412
Stephen Hemminger69161612007-06-04 17:23:26 -07002413 /* This chip reports checksum status differently */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002414 if (hw->flags & SKY2_HW_NEW_LE) {
Stephen Hemminger69161612007-06-04 17:23:26 -07002415 if (sky2->rx_csum &&
2416 (le->css & (CSS_ISIPV4 | CSS_ISIPV6)) &&
2417 (le->css & CSS_TCPUDPCSOK))
2418 skb->ip_summed = CHECKSUM_UNNECESSARY;
2419 else
2420 skb->ip_summed = CHECKSUM_NONE;
2421 }
2422
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002423 skb->protocol = eth_type_trans(skb, dev);
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002424
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002425#ifdef SKY2_VLAN_TAG_USED
2426 if (sky2->vlgrp && (status & GMR_FS_VLAN)) {
2427 vlan_hwaccel_receive_skb(skb,
2428 sky2->vlgrp,
2429 be16_to_cpu(sky2->rx_tag));
2430 } else
2431#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002432 netif_receive_skb(skb);
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002433
Stephen Hemminger22e11702006-07-12 15:23:48 -07002434 /* Stop after net poll weight */
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002435 if (++work_done >= to_do)
2436 goto exit_loop;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002437 break;
2438
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002439#ifdef SKY2_VLAN_TAG_USED
2440 case OP_RXVLAN:
2441 sky2->rx_tag = length;
2442 break;
2443
2444 case OP_RXCHKSVLAN:
2445 sky2->rx_tag = length;
2446 /* fall through */
2447#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002448 case OP_RXCHKS:
Stephen Hemminger87418302007-03-08 12:42:30 -08002449 if (!sky2->rx_csum)
2450 break;
2451
Stephen Hemminger05745c42007-09-19 15:36:45 -07002452 /* If this happens then driver assuming wrong format */
2453 if (unlikely(hw->flags & SKY2_HW_NEW_LE)) {
2454 if (net_ratelimit())
2455 printk(KERN_NOTICE "%s: unexpected"
2456 " checksum status\n",
2457 dev->name);
Stephen Hemminger69161612007-06-04 17:23:26 -07002458 break;
Stephen Hemminger05745c42007-09-19 15:36:45 -07002459 }
Stephen Hemminger69161612007-06-04 17:23:26 -07002460
Stephen Hemminger87418302007-03-08 12:42:30 -08002461 /* Both checksum counters are programmed to start at
2462 * the same offset, so unless there is a problem they
2463 * should match. This failure is an early indication that
2464 * hardware receive checksumming won't work.
2465 */
2466 if (likely(status >> 16 == (status & 0xffff))) {
2467 skb = sky2->rx_ring[sky2->rx_next].skb;
2468 skb->ip_summed = CHECKSUM_COMPLETE;
2469 skb->csum = status & 0xffff;
2470 } else {
2471 printk(KERN_NOTICE PFX "%s: hardware receive "
2472 "checksum problem (status = %#x)\n",
2473 dev->name, status);
2474 sky2->rx_csum = 0;
2475 sky2_write32(sky2->hw,
Stephen Hemminger69161612007-06-04 17:23:26 -07002476 Q_ADDR(rxqaddr[port], Q_CSR),
Stephen Hemminger87418302007-03-08 12:42:30 -08002477 BMU_DIS_RX_CHKSUM);
2478 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002479 break;
2480
2481 case OP_TXINDEXLE:
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002482 /* TX index reports status for both ports */
Stephen Hemmingerf55925d2006-05-08 15:11:28 -07002483 BUILD_BUG_ON(TX_RING_SIZE > 0x1000);
2484 sky2_tx_done(hw->dev[0], status & 0xfff);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002485 if (hw->dev[1])
2486 sky2_tx_done(hw->dev[1],
2487 ((status >> 24) & 0xff)
2488 | (u16)(length & 0xf) << 8);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002489 break;
2490
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002491 default:
2492 if (net_ratelimit())
Stephen Hemminger793b8832005-09-14 16:06:14 -07002493 printk(KERN_WARNING PFX
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002494 "unknown status opcode 0x%x\n", opcode);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002495 }
Stephen Hemminger26691832007-10-11 18:31:13 -07002496 } while (hw->st_idx != idx);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002497
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002498 /* Fully processed status ring so clear irq */
2499 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
2500
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002501exit_loop:
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002502 sky2_rx_done(hw, 0, total_packets[0], total_bytes[0]);
2503 sky2_rx_done(hw, 1, total_packets[1], total_bytes[1]);
Stephen Hemminger22e11702006-07-12 15:23:48 -07002504
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002505 return work_done;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002506}
2507
2508static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status)
2509{
2510 struct net_device *dev = hw->dev[port];
2511
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002512 if (net_ratelimit())
2513 printk(KERN_INFO PFX "%s: hw error interrupt status 0x%x\n",
2514 dev->name, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002515
2516 if (status & Y2_IS_PAR_RD1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002517 if (net_ratelimit())
2518 printk(KERN_ERR PFX "%s: ram data read parity error\n",
2519 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002520 /* Clear IRQ */
2521 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR);
2522 }
2523
2524 if (status & Y2_IS_PAR_WR1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002525 if (net_ratelimit())
2526 printk(KERN_ERR PFX "%s: ram data write parity error\n",
2527 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002528
2529 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR);
2530 }
2531
2532 if (status & Y2_IS_PAR_MAC1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002533 if (net_ratelimit())
2534 printk(KERN_ERR PFX "%s: MAC parity error\n", dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002535 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE);
2536 }
2537
2538 if (status & Y2_IS_PAR_RX1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002539 if (net_ratelimit())
2540 printk(KERN_ERR PFX "%s: RX parity error\n", dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002541 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR);
2542 }
2543
2544 if (status & Y2_IS_TCP_TXA1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002545 if (net_ratelimit())
2546 printk(KERN_ERR PFX "%s: TCP segmentation error\n",
2547 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002548 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP);
2549 }
2550}
2551
2552static void sky2_hw_intr(struct sky2_hw *hw)
2553{
Stephen Hemminger555382c2007-08-29 12:58:14 -07002554 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002555 u32 status = sky2_read32(hw, B0_HWE_ISRC);
Stephen Hemminger555382c2007-08-29 12:58:14 -07002556 u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK);
2557
2558 status &= hwmsk;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002559
Stephen Hemminger793b8832005-09-14 16:06:14 -07002560 if (status & Y2_IS_TIST_OV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002561 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002562
2563 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002564 u16 pci_err;
2565
Stephen Hemminger82637e82008-01-23 19:16:04 -08002566 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002567 pci_err = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002568 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002569 dev_err(&pdev->dev, "PCI hardware error (0x%x)\n",
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002570 pci_err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002571
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002572 sky2_pci_write16(hw, PCI_STATUS,
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002573 pci_err | PCI_STATUS_ERROR_BITS);
Stephen Hemminger82637e82008-01-23 19:16:04 -08002574 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002575 }
2576
2577 if (status & Y2_IS_PCI_EXP) {
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002578 /* PCI-Express uncorrectable Error occurred */
Stephen Hemminger555382c2007-08-29 12:58:14 -07002579 u32 err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002580
Stephen Hemminger82637e82008-01-23 19:16:04 -08002581 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002582 err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
2583 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
2584 0xfffffffful);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002585 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002586 dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err);
Stephen Hemmingercf06ffb2007-11-05 15:52:13 -08002587
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002588 sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
Stephen Hemminger82637e82008-01-23 19:16:04 -08002589 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002590 }
2591
2592 if (status & Y2_HWE_L1_MASK)
2593 sky2_hw_error(hw, 0, status);
2594 status >>= 8;
2595 if (status & Y2_HWE_L1_MASK)
2596 sky2_hw_error(hw, 1, status);
2597}
2598
2599static void sky2_mac_intr(struct sky2_hw *hw, unsigned port)
2600{
2601 struct net_device *dev = hw->dev[port];
2602 struct sky2_port *sky2 = netdev_priv(dev);
2603 u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC));
2604
2605 if (netif_msg_intr(sky2))
2606 printk(KERN_INFO PFX "%s: mac interrupt status 0x%x\n",
2607 dev->name, status);
2608
Stephen Hemmingera3caead2007-05-14 12:38:13 -07002609 if (status & GM_IS_RX_CO_OV)
2610 gma_read16(hw, port, GM_RX_IRQ_SRC);
2611
2612 if (status & GM_IS_TX_CO_OV)
2613 gma_read16(hw, port, GM_TX_IRQ_SRC);
2614
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002615 if (status & GM_IS_RX_FF_OR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002616 ++dev->stats.rx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002617 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO);
2618 }
2619
2620 if (status & GM_IS_TX_FF_UR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002621 ++dev->stats.tx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002622 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU);
2623 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002624}
2625
Stephen Hemminger40b01722007-04-11 14:47:59 -07002626/* This should never happen it is a bug. */
2627static void sky2_le_error(struct sky2_hw *hw, unsigned port,
2628 u16 q, unsigned ring_size)
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002629{
2630 struct net_device *dev = hw->dev[port];
2631 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002632 unsigned idx;
2633 const u64 *le = (q == Q_R1 || q == Q_R2)
2634 ? (u64 *) sky2->rx_le : (u64 *) sky2->tx_le;
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002635
Stephen Hemminger40b01722007-04-11 14:47:59 -07002636 idx = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX));
2637 printk(KERN_ERR PFX "%s: descriptor error q=%#x get=%u [%llx] put=%u\n",
2638 dev->name, (unsigned) q, idx, (unsigned long long) le[idx],
2639 (unsigned) sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX)));
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002640
Stephen Hemminger40b01722007-04-11 14:47:59 -07002641 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002642}
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002643
Stephen Hemminger75e80682007-09-19 15:36:46 -07002644static int sky2_rx_hung(struct net_device *dev)
2645{
2646 struct sky2_port *sky2 = netdev_priv(dev);
2647 struct sky2_hw *hw = sky2->hw;
2648 unsigned port = sky2->port;
2649 unsigned rxq = rxqaddr[port];
2650 u32 mac_rp = sky2_read32(hw, SK_REG(port, RX_GMF_RP));
2651 u8 mac_lev = sky2_read8(hw, SK_REG(port, RX_GMF_RLEV));
2652 u8 fifo_rp = sky2_read8(hw, Q_ADDR(rxq, Q_RP));
2653 u8 fifo_lev = sky2_read8(hw, Q_ADDR(rxq, Q_RL));
2654
2655 /* If idle and MAC or PCI is stuck */
2656 if (sky2->check.last == dev->last_rx &&
2657 ((mac_rp == sky2->check.mac_rp &&
2658 mac_lev != 0 && mac_lev >= sky2->check.mac_lev) ||
2659 /* Check if the PCI RX hang */
2660 (fifo_rp == sky2->check.fifo_rp &&
2661 fifo_lev != 0 && fifo_lev >= sky2->check.fifo_lev))) {
2662 printk(KERN_DEBUG PFX "%s: hung mac %d:%d fifo %d (%d:%d)\n",
2663 dev->name, mac_lev, mac_rp, fifo_lev, fifo_rp,
2664 sky2_read8(hw, Q_ADDR(rxq, Q_WP)));
2665 return 1;
2666 } else {
2667 sky2->check.last = dev->last_rx;
2668 sky2->check.mac_rp = mac_rp;
2669 sky2->check.mac_lev = mac_lev;
2670 sky2->check.fifo_rp = fifo_rp;
2671 sky2->check.fifo_lev = fifo_lev;
2672 return 0;
2673 }
2674}
2675
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002676static void sky2_watchdog(unsigned long arg)
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002677{
Stephen Hemminger01bd7562006-05-08 15:11:30 -07002678 struct sky2_hw *hw = (struct sky2_hw *) arg;
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002679
Stephen Hemminger75e80682007-09-19 15:36:46 -07002680 /* Check for lost IRQ once a second */
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002681 if (sky2_read32(hw, B0_ISRC)) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002682 napi_schedule(&hw->napi);
Stephen Hemminger75e80682007-09-19 15:36:46 -07002683 } else {
2684 int i, active = 0;
2685
2686 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002687 struct net_device *dev = hw->dev[i];
Stephen Hemminger75e80682007-09-19 15:36:46 -07002688 if (!netif_running(dev))
2689 continue;
2690 ++active;
2691
2692 /* For chips with Rx FIFO, check if stuck */
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002693 if ((hw->flags & SKY2_HW_RAM_BUFFER) &&
Stephen Hemminger75e80682007-09-19 15:36:46 -07002694 sky2_rx_hung(dev)) {
2695 pr_info(PFX "%s: receiver hang detected\n",
2696 dev->name);
2697 schedule_work(&hw->restart_work);
2698 return;
2699 }
2700 }
2701
2702 if (active == 0)
2703 return;
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002704 }
2705
Stephen Hemminger75e80682007-09-19 15:36:46 -07002706 mod_timer(&hw->watchdog_timer, round_jiffies(jiffies + HZ));
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002707}
2708
Stephen Hemminger40b01722007-04-11 14:47:59 -07002709/* Hardware/software error handling */
2710static void sky2_err_intr(struct sky2_hw *hw, u32 status)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002711{
Stephen Hemminger40b01722007-04-11 14:47:59 -07002712 if (net_ratelimit())
2713 dev_warn(&hw->pdev->dev, "error interrupt status=%#x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002714
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002715 if (status & Y2_IS_HW_ERR)
2716 sky2_hw_intr(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002717
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002718 if (status & Y2_IS_IRQ_MAC1)
2719 sky2_mac_intr(hw, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002720
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002721 if (status & Y2_IS_IRQ_MAC2)
2722 sky2_mac_intr(hw, 1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002723
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002724 if (status & Y2_IS_CHK_RX1)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002725 sky2_le_error(hw, 0, Q_R1, RX_LE_SIZE);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002726
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002727 if (status & Y2_IS_CHK_RX2)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002728 sky2_le_error(hw, 1, Q_R2, RX_LE_SIZE);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002729
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002730 if (status & Y2_IS_CHK_TXA1)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002731 sky2_le_error(hw, 0, Q_XA1, TX_RING_SIZE);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002732
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002733 if (status & Y2_IS_CHK_TXA2)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002734 sky2_le_error(hw, 1, Q_XA2, TX_RING_SIZE);
2735}
2736
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002737static int sky2_poll(struct napi_struct *napi, int work_limit)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002738{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002739 struct sky2_hw *hw = container_of(napi, struct sky2_hw, napi);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002740 u32 status = sky2_read32(hw, B0_Y2_SP_EISR);
David S. Miller6f535762007-10-11 18:08:29 -07002741 int work_done = 0;
Stephen Hemminger26691832007-10-11 18:31:13 -07002742 u16 idx;
Stephen Hemminger40b01722007-04-11 14:47:59 -07002743
2744 if (unlikely(status & Y2_IS_ERROR))
2745 sky2_err_intr(hw, status);
2746
2747 if (status & Y2_IS_IRQ_PHY1)
2748 sky2_phy_intr(hw, 0);
2749
2750 if (status & Y2_IS_IRQ_PHY2)
2751 sky2_phy_intr(hw, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002752
Stephen Hemminger26691832007-10-11 18:31:13 -07002753 while ((idx = sky2_read16(hw, STAT_PUT_IDX)) != hw->st_idx) {
2754 work_done += sky2_status_intr(hw, work_limit - work_done, idx);
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002755
David S. Miller6f535762007-10-11 18:08:29 -07002756 if (work_done >= work_limit)
Stephen Hemminger26691832007-10-11 18:31:13 -07002757 goto done;
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002758 }
David S. Miller6f535762007-10-11 18:08:29 -07002759
Stephen Hemminger26691832007-10-11 18:31:13 -07002760 napi_complete(napi);
2761 sky2_read32(hw, B0_Y2_SP_LISR);
2762done:
2763
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002764 return work_done;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002765}
2766
David Howells7d12e782006-10-05 14:55:46 +01002767static irqreturn_t sky2_intr(int irq, void *dev_id)
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002768{
2769 struct sky2_hw *hw = dev_id;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002770 u32 status;
2771
2772 /* Reading this mask interrupts as side effect */
2773 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
2774 if (status == 0 || status == ~0)
2775 return IRQ_NONE;
2776
2777 prefetch(&hw->st_le[hw->st_idx]);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002778
2779 napi_schedule(&hw->napi);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002780
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002781 return IRQ_HANDLED;
2782}
2783
2784#ifdef CONFIG_NET_POLL_CONTROLLER
2785static void sky2_netpoll(struct net_device *dev)
2786{
2787 struct sky2_port *sky2 = netdev_priv(dev);
2788
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002789 napi_schedule(&sky2->hw->napi);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002790}
2791#endif
2792
2793/* Chip internal frequency for clock calculations */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002794static u32 sky2_mhz(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002795{
Stephen Hemminger793b8832005-09-14 16:06:14 -07002796 switch (hw->chip_id) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002797 case CHIP_ID_YUKON_EC:
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08002798 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger937454942007-02-06 10:45:43 -08002799 case CHIP_ID_YUKON_EX:
Stephen Hemmingered4d4162008-01-10 16:14:14 -08002800 case CHIP_ID_YUKON_SUPR:
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07002801 case CHIP_ID_YUKON_UL_2:
Stephen Hemminger05745c42007-09-19 15:36:45 -07002802 return 125;
2803
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002804 case CHIP_ID_YUKON_FE:
Stephen Hemminger05745c42007-09-19 15:36:45 -07002805 return 100;
2806
2807 case CHIP_ID_YUKON_FE_P:
2808 return 50;
2809
2810 case CHIP_ID_YUKON_XL:
2811 return 156;
2812
2813 default:
2814 BUG();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002815 }
2816}
2817
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002818static inline u32 sky2_us2clk(const struct sky2_hw *hw, u32 us)
2819{
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002820 return sky2_mhz(hw) * us;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002821}
2822
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002823static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)
2824{
2825 return clk / sky2_mhz(hw);
2826}
2827
2828
Stephen Hemmingere3173832007-02-06 10:45:39 -08002829static int __devinit sky2_init(struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002830{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002831 u8 t8;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002832
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002833 /* Enable all clocks and check for bad PCI access */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002834 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemminger451af332007-06-04 17:23:24 -07002835
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002836 sky2_write8(hw, B0_CTST, CS_RST_CLR);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08002837
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002838 hw->chip_id = sky2_read8(hw, B2_CHIP_ID);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002839 hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4;
2840
2841 switch(hw->chip_id) {
2842 case CHIP_ID_YUKON_XL:
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002843 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_NEWER_PHY;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002844 break;
2845
2846 case CHIP_ID_YUKON_EC_U:
2847 hw->flags = SKY2_HW_GIGABIT
2848 | SKY2_HW_NEWER_PHY
2849 | SKY2_HW_ADV_POWER_CTL;
2850 break;
2851
2852 case CHIP_ID_YUKON_EX:
2853 hw->flags = SKY2_HW_GIGABIT
2854 | SKY2_HW_NEWER_PHY
2855 | SKY2_HW_NEW_LE
2856 | SKY2_HW_ADV_POWER_CTL;
2857
2858 /* New transmit checksum */
2859 if (hw->chip_rev != CHIP_REV_YU_EX_B0)
2860 hw->flags |= SKY2_HW_AUTO_TX_SUM;
2861 break;
2862
2863 case CHIP_ID_YUKON_EC:
2864 /* This rev is really old, and requires untested workarounds */
2865 if (hw->chip_rev == CHIP_REV_YU_EC_A1) {
2866 dev_err(&hw->pdev->dev, "unsupported revision Yukon-EC rev A1\n");
2867 return -EOPNOTSUPP;
2868 }
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002869 hw->flags = SKY2_HW_GIGABIT;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002870 break;
2871
2872 case CHIP_ID_YUKON_FE:
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002873 break;
2874
Stephen Hemminger05745c42007-09-19 15:36:45 -07002875 case CHIP_ID_YUKON_FE_P:
2876 hw->flags = SKY2_HW_NEWER_PHY
2877 | SKY2_HW_NEW_LE
2878 | SKY2_HW_AUTO_TX_SUM
2879 | SKY2_HW_ADV_POWER_CTL;
2880 break;
Stephen Hemmingered4d4162008-01-10 16:14:14 -08002881
2882 case CHIP_ID_YUKON_SUPR:
2883 hw->flags = SKY2_HW_GIGABIT
2884 | SKY2_HW_NEWER_PHY
2885 | SKY2_HW_NEW_LE
2886 | SKY2_HW_AUTO_TX_SUM
2887 | SKY2_HW_ADV_POWER_CTL;
2888 break;
2889
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07002890 case CHIP_ID_YUKON_UL_2:
2891 hw->flags = SKY2_HW_GIGABIT
2892 | SKY2_HW_ADV_POWER_CTL;
2893 break;
2894
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002895 default:
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002896 dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n",
2897 hw->chip_id);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002898 return -EOPNOTSUPP;
2899 }
2900
Stephen Hemmingere3173832007-02-06 10:45:39 -08002901 hw->pmd_type = sky2_read8(hw, B2_PMD_TYP);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002902 if (hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P')
2903 hw->flags |= SKY2_HW_FIBRE_PHY;
2904
Stephen Hemmingere3173832007-02-06 10:45:39 -08002905 hw->ports = 1;
2906 t8 = sky2_read8(hw, B2_Y2_HW_RES);
2907 if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) {
2908 if (!(sky2_read8(hw, B2_Y2_CLK_GATE) & Y2_STATUS_LNK2_INAC))
2909 ++hw->ports;
2910 }
2911
2912 return 0;
2913}
2914
2915static void sky2_reset(struct sky2_hw *hw)
2916{
Stephen Hemminger555382c2007-08-29 12:58:14 -07002917 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingere3173832007-02-06 10:45:39 -08002918 u16 status;
Stephen Hemminger555382c2007-08-29 12:58:14 -07002919 int i, cap;
2920 u32 hwe_mask = Y2_HWE_ALL_MASK;
Stephen Hemmingere3173832007-02-06 10:45:39 -08002921
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002922 /* disable ASF */
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07002923 if (hw->chip_id == CHIP_ID_YUKON_EX) {
2924 status = sky2_read16(hw, HCU_CCSR);
2925 status &= ~(HCU_CCSR_AHB_RST | HCU_CCSR_CPU_RST_MODE |
2926 HCU_CCSR_UC_STATE_MSK);
2927 sky2_write16(hw, HCU_CCSR, status);
2928 } else
2929 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET);
2930 sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002931
2932 /* do a SW reset */
2933 sky2_write8(hw, B0_CTST, CS_RST_SET);
2934 sky2_write8(hw, B0_CTST, CS_RST_CLR);
2935
Stephen Hemmingerac93a392007-11-05 15:52:08 -08002936 /* allow writes to PCI config */
2937 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2938
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002939 /* clear PCI errors, if any */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002940 status = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002941 status |= PCI_STATUS_ERROR_BITS;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002942 sky2_pci_write16(hw, PCI_STATUS, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002943
2944 sky2_write8(hw, B0_CTST, CS_MRST_CLR);
2945
Stephen Hemminger555382c2007-08-29 12:58:14 -07002946 cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
2947 if (cap) {
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002948 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
2949 0xfffffffful);
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07002950
Stephen Hemminger555382c2007-08-29 12:58:14 -07002951 /* If error bit is stuck on ignore it */
2952 if (sky2_read32(hw, B0_HWE_ISRC) & Y2_IS_PCI_EXP)
2953 dev_info(&pdev->dev, "ignoring stuck error report bit\n");
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002954 else
Stephen Hemminger555382c2007-08-29 12:58:14 -07002955 hwe_mask |= Y2_IS_PCI_EXP;
2956 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002957
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08002958 sky2_power_on(hw);
Stephen Hemminger82637e82008-01-23 19:16:04 -08002959 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002960
2961 for (i = 0; i < hw->ports; i++) {
2962 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
2963 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
Stephen Hemminger69161612007-06-04 17:23:26 -07002964
Stephen Hemmingered4d4162008-01-10 16:14:14 -08002965 if (hw->chip_id == CHIP_ID_YUKON_EX ||
2966 hw->chip_id == CHIP_ID_YUKON_SUPR)
Stephen Hemminger69161612007-06-04 17:23:26 -07002967 sky2_write16(hw, SK_REG(i, GMAC_CTRL),
2968 GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON
2969 | GMC_BYP_RETR_ON);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002970 }
2971
Stephen Hemminger793b8832005-09-14 16:06:14 -07002972 /* Clear I2C IRQ noise */
2973 sky2_write32(hw, B2_I2C_IRQ, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002974
2975 /* turn off hardware timer (unused) */
2976 sky2_write8(hw, B2_TI_CTRL, TIM_STOP);
2977 sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002978
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002979 sky2_write8(hw, B0_Y2LED, LED_STAT_ON);
2980
Stephen Hemminger69634ee2005-12-09 11:35:06 -08002981 /* Turn off descriptor polling */
2982 sky2_write32(hw, B28_DPT_CTRL, DPT_STOP);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002983
2984 /* Turn off receive timestamp */
2985 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002986 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002987
2988 /* enable the Tx Arbiters */
2989 for (i = 0; i < hw->ports; i++)
2990 sky2_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB);
2991
2992 /* Initialize ram interface */
2993 for (i = 0; i < hw->ports; i++) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002994 sky2_write8(hw, RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002995
2996 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53);
2997 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53);
2998 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53);
2999 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53);
3000 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53);
3001 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53);
3002 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53);
3003 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53);
3004 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53);
3005 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53);
3006 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53);
3007 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53);
3008 }
3009
Stephen Hemminger555382c2007-08-29 12:58:14 -07003010 sky2_write32(hw, B0_HWE_IMSK, hwe_mask);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003011
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003012 for (i = 0; i < hw->ports; i++)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07003013 sky2_gmac_reset(hw, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003014
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003015 memset(hw->st_le, 0, STATUS_LE_BYTES);
3016 hw->st_idx = 0;
3017
3018 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_SET);
3019 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_CLR);
3020
3021 sky2_write32(hw, STAT_LIST_ADDR_LO, hw->st_dma);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003022 sky2_write32(hw, STAT_LIST_ADDR_HI, (u64) hw->st_dma >> 32);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003023
3024 /* Set the list last index */
Stephen Hemminger793b8832005-09-14 16:06:14 -07003025 sky2_write16(hw, STAT_LAST_IDX, STATUS_RING_SIZE - 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003026
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003027 sky2_write16(hw, STAT_TX_IDX_TH, 10);
3028 sky2_write8(hw, STAT_FIFO_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003029
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003030 /* set Status-FIFO ISR watermark */
3031 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0)
3032 sky2_write8(hw, STAT_FIFO_ISR_WM, 4);
3033 else
3034 sky2_write8(hw, STAT_FIFO_ISR_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003035
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003036 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000));
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003037 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 20));
3038 sky2_write32(hw, STAT_LEV_TIMER_INI, sky2_us2clk(hw, 100));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003039
Stephen Hemminger793b8832005-09-14 16:06:14 -07003040 /* enable status unit */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003041 sky2_write32(hw, STAT_CTRL, SC_STAT_OP_ON);
3042
3043 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
3044 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
3045 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
Stephen Hemmingere3173832007-02-06 10:45:39 -08003046}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003047
Stephen Hemminger81906792007-02-15 16:40:33 -08003048static void sky2_restart(struct work_struct *work)
3049{
3050 struct sky2_hw *hw = container_of(work, struct sky2_hw, restart_work);
3051 struct net_device *dev;
3052 int i, err;
3053
Stephen Hemminger81906792007-02-15 16:40:33 -08003054 rtnl_lock();
Stephen Hemminger81906792007-02-15 16:40:33 -08003055 for (i = 0; i < hw->ports; i++) {
3056 dev = hw->dev[i];
3057 if (netif_running(dev))
3058 sky2_down(dev);
3059 }
3060
Stephen Hemminger8cfcbe92007-12-03 17:02:17 -08003061 napi_disable(&hw->napi);
3062 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger81906792007-02-15 16:40:33 -08003063 sky2_reset(hw);
3064 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
Stephen Hemminger6de16232007-10-17 13:26:42 -07003065 napi_enable(&hw->napi);
Stephen Hemminger81906792007-02-15 16:40:33 -08003066
3067 for (i = 0; i < hw->ports; i++) {
3068 dev = hw->dev[i];
3069 if (netif_running(dev)) {
3070 err = sky2_up(dev);
3071 if (err) {
3072 printk(KERN_INFO PFX "%s: could not restart %d\n",
3073 dev->name, err);
3074 dev_close(dev);
3075 }
3076 }
3077 }
3078
Stephen Hemminger81906792007-02-15 16:40:33 -08003079 rtnl_unlock();
3080}
3081
Stephen Hemmingere3173832007-02-06 10:45:39 -08003082static inline u8 sky2_wol_supported(const struct sky2_hw *hw)
3083{
3084 return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0;
3085}
3086
3087static void sky2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3088{
3089 const struct sky2_port *sky2 = netdev_priv(dev);
3090
3091 wol->supported = sky2_wol_supported(sky2->hw);
3092 wol->wolopts = sky2->wol;
3093}
3094
3095static int sky2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3096{
3097 struct sky2_port *sky2 = netdev_priv(dev);
3098 struct sky2_hw *hw = sky2->hw;
3099
Rafael J. Wysocki9d731d72008-10-12 20:59:48 -07003100 if ((wol->wolopts & ~sky2_wol_supported(sky2->hw))
3101 || !device_can_wakeup(&hw->pdev->dev))
Stephen Hemmingere3173832007-02-06 10:45:39 -08003102 return -EOPNOTSUPP;
3103
3104 sky2->wol = wol->wolopts;
3105
Stephen Hemminger05745c42007-09-19 15:36:45 -07003106 if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
3107 hw->chip_id == CHIP_ID_YUKON_EX ||
3108 hw->chip_id == CHIP_ID_YUKON_FE_P)
Stephen Hemmingere3173832007-02-06 10:45:39 -08003109 sky2_write32(hw, B0_CTST, sky2->wol
3110 ? Y2_HW_WOL_ON : Y2_HW_WOL_OFF);
3111
Rafael J. Wysocki9d731d72008-10-12 20:59:48 -07003112 device_set_wakeup_enable(&hw->pdev->dev, sky2->wol);
3113
Stephen Hemmingere3173832007-02-06 10:45:39 -08003114 if (!netif_running(dev))
3115 sky2_wol_init(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003116 return 0;
3117}
3118
Stephen Hemminger28bd1812006-01-17 13:43:19 -08003119static u32 sky2_supported_modes(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003120{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003121 if (sky2_is_copper(hw)) {
3122 u32 modes = SUPPORTED_10baseT_Half
3123 | SUPPORTED_10baseT_Full
3124 | SUPPORTED_100baseT_Half
3125 | SUPPORTED_100baseT_Full
3126 | SUPPORTED_Autoneg | SUPPORTED_TP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003127
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003128 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003129 modes |= SUPPORTED_1000baseT_Half
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003130 | SUPPORTED_1000baseT_Full;
3131 return modes;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003132 } else
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003133 return SUPPORTED_1000baseT_Half
3134 | SUPPORTED_1000baseT_Full
3135 | SUPPORTED_Autoneg
3136 | SUPPORTED_FIBRE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003137}
3138
Stephen Hemminger793b8832005-09-14 16:06:14 -07003139static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003140{
3141 struct sky2_port *sky2 = netdev_priv(dev);
3142 struct sky2_hw *hw = sky2->hw;
3143
3144 ecmd->transceiver = XCVR_INTERNAL;
3145 ecmd->supported = sky2_supported_modes(hw);
3146 ecmd->phy_address = PHY_ADDR_MARV;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003147 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003148 ecmd->port = PORT_TP;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003149 ecmd->speed = sky2->speed;
3150 } else {
3151 ecmd->speed = SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003152 ecmd->port = PORT_FIBRE;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003153 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003154
3155 ecmd->advertising = sky2->advertising;
3156 ecmd->autoneg = sky2->autoneg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003157 ecmd->duplex = sky2->duplex;
3158 return 0;
3159}
3160
3161static int sky2_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
3162{
3163 struct sky2_port *sky2 = netdev_priv(dev);
3164 const struct sky2_hw *hw = sky2->hw;
3165 u32 supported = sky2_supported_modes(hw);
3166
3167 if (ecmd->autoneg == AUTONEG_ENABLE) {
3168 ecmd->advertising = supported;
3169 sky2->duplex = -1;
3170 sky2->speed = -1;
3171 } else {
3172 u32 setting;
3173
Stephen Hemminger793b8832005-09-14 16:06:14 -07003174 switch (ecmd->speed) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003175 case SPEED_1000:
3176 if (ecmd->duplex == DUPLEX_FULL)
3177 setting = SUPPORTED_1000baseT_Full;
3178 else if (ecmd->duplex == DUPLEX_HALF)
3179 setting = SUPPORTED_1000baseT_Half;
3180 else
3181 return -EINVAL;
3182 break;
3183 case SPEED_100:
3184 if (ecmd->duplex == DUPLEX_FULL)
3185 setting = SUPPORTED_100baseT_Full;
3186 else if (ecmd->duplex == DUPLEX_HALF)
3187 setting = SUPPORTED_100baseT_Half;
3188 else
3189 return -EINVAL;
3190 break;
3191
3192 case SPEED_10:
3193 if (ecmd->duplex == DUPLEX_FULL)
3194 setting = SUPPORTED_10baseT_Full;
3195 else if (ecmd->duplex == DUPLEX_HALF)
3196 setting = SUPPORTED_10baseT_Half;
3197 else
3198 return -EINVAL;
3199 break;
3200 default:
3201 return -EINVAL;
3202 }
3203
3204 if ((setting & supported) == 0)
3205 return -EINVAL;
3206
3207 sky2->speed = ecmd->speed;
3208 sky2->duplex = ecmd->duplex;
3209 }
3210
3211 sky2->autoneg = ecmd->autoneg;
3212 sky2->advertising = ecmd->advertising;
3213
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003214 if (netif_running(dev)) {
Stephen Hemminger1b537562005-12-20 15:08:07 -08003215 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003216 sky2_set_multicast(dev);
3217 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003218
3219 return 0;
3220}
3221
3222static void sky2_get_drvinfo(struct net_device *dev,
3223 struct ethtool_drvinfo *info)
3224{
3225 struct sky2_port *sky2 = netdev_priv(dev);
3226
3227 strcpy(info->driver, DRV_NAME);
3228 strcpy(info->version, DRV_VERSION);
3229 strcpy(info->fw_version, "N/A");
3230 strcpy(info->bus_info, pci_name(sky2->hw->pdev));
3231}
3232
3233static const struct sky2_stat {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003234 char name[ETH_GSTRING_LEN];
3235 u16 offset;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003236} sky2_stats[] = {
3237 { "tx_bytes", GM_TXO_OK_HI },
3238 { "rx_bytes", GM_RXO_OK_HI },
3239 { "tx_broadcast", GM_TXF_BC_OK },
3240 { "rx_broadcast", GM_RXF_BC_OK },
3241 { "tx_multicast", GM_TXF_MC_OK },
3242 { "rx_multicast", GM_RXF_MC_OK },
3243 { "tx_unicast", GM_TXF_UC_OK },
3244 { "rx_unicast", GM_RXF_UC_OK },
3245 { "tx_mac_pause", GM_TXF_MPAUSE },
3246 { "rx_mac_pause", GM_RXF_MPAUSE },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003247 { "collisions", GM_TXF_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003248 { "late_collision",GM_TXF_LAT_COL },
3249 { "aborted", GM_TXF_ABO_COL },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003250 { "single_collisions", GM_TXF_SNG_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003251 { "multi_collisions", GM_TXF_MUL_COL },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003252
Stephen Hemmingerd2604542006-03-23 08:51:36 -08003253 { "rx_short", GM_RXF_SHT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003254 { "rx_runt", GM_RXE_FRAG },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003255 { "rx_64_byte_packets", GM_RXF_64B },
3256 { "rx_65_to_127_byte_packets", GM_RXF_127B },
3257 { "rx_128_to_255_byte_packets", GM_RXF_255B },
3258 { "rx_256_to_511_byte_packets", GM_RXF_511B },
3259 { "rx_512_to_1023_byte_packets", GM_RXF_1023B },
3260 { "rx_1024_to_1518_byte_packets", GM_RXF_1518B },
3261 { "rx_1518_to_max_byte_packets", GM_RXF_MAX_SZ },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003262 { "rx_too_long", GM_RXF_LNG_ERR },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003263 { "rx_fifo_overflow", GM_RXE_FIFO_OV },
3264 { "rx_jabber", GM_RXF_JAB_PKT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003265 { "rx_fcs_error", GM_RXF_FCS_ERR },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003266
3267 { "tx_64_byte_packets", GM_TXF_64B },
3268 { "tx_65_to_127_byte_packets", GM_TXF_127B },
3269 { "tx_128_to_255_byte_packets", GM_TXF_255B },
3270 { "tx_256_to_511_byte_packets", GM_TXF_511B },
3271 { "tx_512_to_1023_byte_packets", GM_TXF_1023B },
3272 { "tx_1024_to_1518_byte_packets", GM_TXF_1518B },
3273 { "tx_1519_to_max_byte_packets", GM_TXF_MAX_SZ },
3274 { "tx_fifo_underrun", GM_TXE_FIFO_UR },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003275};
3276
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003277static u32 sky2_get_rx_csum(struct net_device *dev)
3278{
3279 struct sky2_port *sky2 = netdev_priv(dev);
3280
3281 return sky2->rx_csum;
3282}
3283
3284static int sky2_set_rx_csum(struct net_device *dev, u32 data)
3285{
3286 struct sky2_port *sky2 = netdev_priv(dev);
3287
3288 sky2->rx_csum = data;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003289
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003290 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
3291 data ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
3292
3293 return 0;
3294}
3295
3296static u32 sky2_get_msglevel(struct net_device *netdev)
3297{
3298 struct sky2_port *sky2 = netdev_priv(netdev);
3299 return sky2->msg_enable;
3300}
3301
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003302static int sky2_nway_reset(struct net_device *dev)
3303{
3304 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003305
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003306 if (!netif_running(dev) || sky2->autoneg != AUTONEG_ENABLE)
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003307 return -EINVAL;
3308
Stephen Hemminger1b537562005-12-20 15:08:07 -08003309 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003310 sky2_set_multicast(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003311
3312 return 0;
3313}
3314
Stephen Hemminger793b8832005-09-14 16:06:14 -07003315static void sky2_phy_stats(struct sky2_port *sky2, u64 * data, unsigned count)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003316{
3317 struct sky2_hw *hw = sky2->hw;
3318 unsigned port = sky2->port;
3319 int i;
3320
3321 data[0] = (u64) gma_read32(hw, port, GM_TXO_OK_HI) << 32
Stephen Hemminger793b8832005-09-14 16:06:14 -07003322 | (u64) gma_read32(hw, port, GM_TXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003323 data[1] = (u64) gma_read32(hw, port, GM_RXO_OK_HI) << 32
Stephen Hemminger793b8832005-09-14 16:06:14 -07003324 | (u64) gma_read32(hw, port, GM_RXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003325
Stephen Hemminger793b8832005-09-14 16:06:14 -07003326 for (i = 2; i < count; i++)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003327 data[i] = (u64) gma_read32(hw, port, sky2_stats[i].offset);
3328}
3329
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003330static void sky2_set_msglevel(struct net_device *netdev, u32 value)
3331{
3332 struct sky2_port *sky2 = netdev_priv(netdev);
3333 sky2->msg_enable = value;
3334}
3335
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003336static int sky2_get_sset_count(struct net_device *dev, int sset)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003337{
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003338 switch (sset) {
3339 case ETH_SS_STATS:
3340 return ARRAY_SIZE(sky2_stats);
3341 default:
3342 return -EOPNOTSUPP;
3343 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003344}
3345
3346static void sky2_get_ethtool_stats(struct net_device *dev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003347 struct ethtool_stats *stats, u64 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003348{
3349 struct sky2_port *sky2 = netdev_priv(dev);
3350
Stephen Hemminger793b8832005-09-14 16:06:14 -07003351 sky2_phy_stats(sky2, data, ARRAY_SIZE(sky2_stats));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003352}
3353
Stephen Hemminger793b8832005-09-14 16:06:14 -07003354static void sky2_get_strings(struct net_device *dev, u32 stringset, u8 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003355{
3356 int i;
3357
3358 switch (stringset) {
3359 case ETH_SS_STATS:
3360 for (i = 0; i < ARRAY_SIZE(sky2_stats); i++)
3361 memcpy(data + i * ETH_GSTRING_LEN,
3362 sky2_stats[i].name, ETH_GSTRING_LEN);
3363 break;
3364 }
3365}
3366
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003367static int sky2_set_mac_address(struct net_device *dev, void *p)
3368{
3369 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003370 struct sky2_hw *hw = sky2->hw;
3371 unsigned port = sky2->port;
3372 const struct sockaddr *addr = p;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003373
3374 if (!is_valid_ether_addr(addr->sa_data))
3375 return -EADDRNOTAVAIL;
3376
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003377 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003378 memcpy_toio(hw->regs + B2_MAC_1 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003379 dev->dev_addr, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003380 memcpy_toio(hw->regs + B2_MAC_2 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003381 dev->dev_addr, ETH_ALEN);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003382
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003383 /* virtual address for data */
3384 gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr);
3385
3386 /* physical address: used for pause frames */
3387 gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003388
3389 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003390}
3391
Stephen Hemmingera052b522006-10-17 10:24:23 -07003392static void inline sky2_add_filter(u8 filter[8], const u8 *addr)
3393{
3394 u32 bit;
3395
3396 bit = ether_crc(ETH_ALEN, addr) & 63;
3397 filter[bit >> 3] |= 1 << (bit & 7);
3398}
3399
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003400static void sky2_set_multicast(struct net_device *dev)
3401{
3402 struct sky2_port *sky2 = netdev_priv(dev);
3403 struct sky2_hw *hw = sky2->hw;
3404 unsigned port = sky2->port;
3405 struct dev_mc_list *list = dev->mc_list;
3406 u16 reg;
3407 u8 filter[8];
Stephen Hemmingera052b522006-10-17 10:24:23 -07003408 int rx_pause;
3409 static const u8 pause_mc_addr[ETH_ALEN] = { 0x1, 0x80, 0xc2, 0x0, 0x0, 0x1 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003410
Stephen Hemmingera052b522006-10-17 10:24:23 -07003411 rx_pause = (sky2->flow_status == FC_RX || sky2->flow_status == FC_BOTH);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003412 memset(filter, 0, sizeof(filter));
3413
3414 reg = gma_read16(hw, port, GM_RX_CTRL);
3415 reg |= GM_RXCR_UCF_ENA;
3416
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07003417 if (dev->flags & IFF_PROMISC) /* promiscuous */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003418 reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
Stephen Hemmingera052b522006-10-17 10:24:23 -07003419 else if (dev->flags & IFF_ALLMULTI)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003420 memset(filter, 0xff, sizeof(filter));
Stephen Hemmingera052b522006-10-17 10:24:23 -07003421 else if (dev->mc_count == 0 && !rx_pause)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003422 reg &= ~GM_RXCR_MCF_ENA;
3423 else {
3424 int i;
3425 reg |= GM_RXCR_MCF_ENA;
3426
Stephen Hemmingera052b522006-10-17 10:24:23 -07003427 if (rx_pause)
3428 sky2_add_filter(filter, pause_mc_addr);
3429
3430 for (i = 0; list && i < dev->mc_count; i++, list = list->next)
3431 sky2_add_filter(filter, list->dmi_addr);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003432 }
3433
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003434 gma_write16(hw, port, GM_MC_ADDR_H1,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003435 (u16) filter[0] | ((u16) filter[1] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003436 gma_write16(hw, port, GM_MC_ADDR_H2,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003437 (u16) filter[2] | ((u16) filter[3] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003438 gma_write16(hw, port, GM_MC_ADDR_H3,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003439 (u16) filter[4] | ((u16) filter[5] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003440 gma_write16(hw, port, GM_MC_ADDR_H4,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003441 (u16) filter[6] | ((u16) filter[7] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003442
3443 gma_write16(hw, port, GM_RX_CTRL, reg);
3444}
3445
3446/* Can have one global because blinking is controlled by
3447 * ethtool and that is always under RTNL mutex
3448 */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003449static void sky2_led(struct sky2_port *sky2, enum led_mode mode)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003450{
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003451 struct sky2_hw *hw = sky2->hw;
3452 unsigned port = sky2->port;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003453
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003454 spin_lock_bh(&sky2->phy_lock);
3455 if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
3456 hw->chip_id == CHIP_ID_YUKON_EX ||
3457 hw->chip_id == CHIP_ID_YUKON_SUPR) {
3458 u16 pg;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003459 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
3460 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003461
3462 switch (mode) {
3463 case MO_LED_OFF:
3464 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3465 PHY_M_LEDC_LOS_CTRL(8) |
3466 PHY_M_LEDC_INIT_CTRL(8) |
3467 PHY_M_LEDC_STA1_CTRL(8) |
3468 PHY_M_LEDC_STA0_CTRL(8));
3469 break;
3470 case MO_LED_ON:
3471 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3472 PHY_M_LEDC_LOS_CTRL(9) |
3473 PHY_M_LEDC_INIT_CTRL(9) |
3474 PHY_M_LEDC_STA1_CTRL(9) |
3475 PHY_M_LEDC_STA0_CTRL(9));
3476 break;
3477 case MO_LED_BLINK:
3478 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3479 PHY_M_LEDC_LOS_CTRL(0xa) |
3480 PHY_M_LEDC_INIT_CTRL(0xa) |
3481 PHY_M_LEDC_STA1_CTRL(0xa) |
3482 PHY_M_LEDC_STA0_CTRL(0xa));
3483 break;
3484 case MO_LED_NORM:
3485 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3486 PHY_M_LEDC_LOS_CTRL(1) |
3487 PHY_M_LEDC_INIT_CTRL(8) |
3488 PHY_M_LEDC_STA1_CTRL(7) |
3489 PHY_M_LEDC_STA0_CTRL(7));
3490 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003491
3492 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003493 } else
Jeff Garzik7d2e3cb2008-05-13 01:41:58 -04003494 gm_phy_write(hw, port, PHY_MARV_LED_OVER,
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003495 PHY_M_LED_MO_DUP(mode) |
3496 PHY_M_LED_MO_10(mode) |
3497 PHY_M_LED_MO_100(mode) |
3498 PHY_M_LED_MO_1000(mode) |
3499 PHY_M_LED_MO_RX(mode) |
3500 PHY_M_LED_MO_TX(mode));
3501
3502 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003503}
3504
3505/* blink LED's for finding board */
3506static int sky2_phys_id(struct net_device *dev, u32 data)
3507{
3508 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003509 unsigned int i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003510
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003511 if (data == 0)
3512 data = UINT_MAX;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003513
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003514 for (i = 0; i < data; i++) {
3515 sky2_led(sky2, MO_LED_ON);
3516 if (msleep_interruptible(500))
3517 break;
3518 sky2_led(sky2, MO_LED_OFF);
3519 if (msleep_interruptible(500))
3520 break;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003521 }
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003522 sky2_led(sky2, MO_LED_NORM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003523
3524 return 0;
3525}
3526
3527static void sky2_get_pauseparam(struct net_device *dev,
3528 struct ethtool_pauseparam *ecmd)
3529{
3530 struct sky2_port *sky2 = netdev_priv(dev);
3531
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003532 switch (sky2->flow_mode) {
3533 case FC_NONE:
3534 ecmd->tx_pause = ecmd->rx_pause = 0;
3535 break;
3536 case FC_TX:
3537 ecmd->tx_pause = 1, ecmd->rx_pause = 0;
3538 break;
3539 case FC_RX:
3540 ecmd->tx_pause = 0, ecmd->rx_pause = 1;
3541 break;
3542 case FC_BOTH:
3543 ecmd->tx_pause = ecmd->rx_pause = 1;
3544 }
3545
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003546 ecmd->autoneg = sky2->autoneg;
3547}
3548
3549static int sky2_set_pauseparam(struct net_device *dev,
3550 struct ethtool_pauseparam *ecmd)
3551{
3552 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003553
3554 sky2->autoneg = ecmd->autoneg;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003555 sky2->flow_mode = sky2_flow(ecmd->rx_pause, ecmd->tx_pause);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003556
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003557 if (netif_running(dev))
3558 sky2_phy_reinit(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003559
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07003560 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003561}
3562
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003563static int sky2_get_coalesce(struct net_device *dev,
3564 struct ethtool_coalesce *ecmd)
3565{
3566 struct sky2_port *sky2 = netdev_priv(dev);
3567 struct sky2_hw *hw = sky2->hw;
3568
3569 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_STOP)
3570 ecmd->tx_coalesce_usecs = 0;
3571 else {
3572 u32 clks = sky2_read32(hw, STAT_TX_TIMER_INI);
3573 ecmd->tx_coalesce_usecs = sky2_clk2us(hw, clks);
3574 }
3575 ecmd->tx_max_coalesced_frames = sky2_read16(hw, STAT_TX_IDX_TH);
3576
3577 if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_STOP)
3578 ecmd->rx_coalesce_usecs = 0;
3579 else {
3580 u32 clks = sky2_read32(hw, STAT_LEV_TIMER_INI);
3581 ecmd->rx_coalesce_usecs = sky2_clk2us(hw, clks);
3582 }
3583 ecmd->rx_max_coalesced_frames = sky2_read8(hw, STAT_FIFO_WM);
3584
3585 if (sky2_read8(hw, STAT_ISR_TIMER_CTRL) == TIM_STOP)
3586 ecmd->rx_coalesce_usecs_irq = 0;
3587 else {
3588 u32 clks = sky2_read32(hw, STAT_ISR_TIMER_INI);
3589 ecmd->rx_coalesce_usecs_irq = sky2_clk2us(hw, clks);
3590 }
3591
3592 ecmd->rx_max_coalesced_frames_irq = sky2_read8(hw, STAT_FIFO_ISR_WM);
3593
3594 return 0;
3595}
3596
3597/* Note: this affect both ports */
3598static int sky2_set_coalesce(struct net_device *dev,
3599 struct ethtool_coalesce *ecmd)
3600{
3601 struct sky2_port *sky2 = netdev_priv(dev);
3602 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003603 const u32 tmax = sky2_clk2us(hw, 0x0ffffff);
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003604
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003605 if (ecmd->tx_coalesce_usecs > tmax ||
3606 ecmd->rx_coalesce_usecs > tmax ||
3607 ecmd->rx_coalesce_usecs_irq > tmax)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003608 return -EINVAL;
3609
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003610 if (ecmd->tx_max_coalesced_frames >= TX_RING_SIZE-1)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003611 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003612 if (ecmd->rx_max_coalesced_frames > RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003613 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003614 if (ecmd->rx_max_coalesced_frames_irq >RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003615 return -EINVAL;
3616
3617 if (ecmd->tx_coalesce_usecs == 0)
3618 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
3619 else {
3620 sky2_write32(hw, STAT_TX_TIMER_INI,
3621 sky2_us2clk(hw, ecmd->tx_coalesce_usecs));
3622 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
3623 }
3624 sky2_write16(hw, STAT_TX_IDX_TH, ecmd->tx_max_coalesced_frames);
3625
3626 if (ecmd->rx_coalesce_usecs == 0)
3627 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP);
3628 else {
3629 sky2_write32(hw, STAT_LEV_TIMER_INI,
3630 sky2_us2clk(hw, ecmd->rx_coalesce_usecs));
3631 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
3632 }
3633 sky2_write8(hw, STAT_FIFO_WM, ecmd->rx_max_coalesced_frames);
3634
3635 if (ecmd->rx_coalesce_usecs_irq == 0)
3636 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_STOP);
3637 else {
Stephen Hemmingerd28d4872006-01-30 11:37:56 -08003638 sky2_write32(hw, STAT_ISR_TIMER_INI,
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003639 sky2_us2clk(hw, ecmd->rx_coalesce_usecs_irq));
3640 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
3641 }
3642 sky2_write8(hw, STAT_FIFO_ISR_WM, ecmd->rx_max_coalesced_frames_irq);
3643 return 0;
3644}
3645
Stephen Hemminger793b8832005-09-14 16:06:14 -07003646static void sky2_get_ringparam(struct net_device *dev,
3647 struct ethtool_ringparam *ering)
3648{
3649 struct sky2_port *sky2 = netdev_priv(dev);
3650
3651 ering->rx_max_pending = RX_MAX_PENDING;
3652 ering->rx_mini_max_pending = 0;
3653 ering->rx_jumbo_max_pending = 0;
3654 ering->tx_max_pending = TX_RING_SIZE - 1;
3655
3656 ering->rx_pending = sky2->rx_pending;
3657 ering->rx_mini_pending = 0;
3658 ering->rx_jumbo_pending = 0;
3659 ering->tx_pending = sky2->tx_pending;
3660}
3661
3662static int sky2_set_ringparam(struct net_device *dev,
3663 struct ethtool_ringparam *ering)
3664{
3665 struct sky2_port *sky2 = netdev_priv(dev);
3666 int err = 0;
3667
3668 if (ering->rx_pending > RX_MAX_PENDING ||
3669 ering->rx_pending < 8 ||
3670 ering->tx_pending < MAX_SKB_TX_LE ||
3671 ering->tx_pending > TX_RING_SIZE - 1)
3672 return -EINVAL;
3673
3674 if (netif_running(dev))
3675 sky2_down(dev);
3676
3677 sky2->rx_pending = ering->rx_pending;
3678 sky2->tx_pending = ering->tx_pending;
3679
Stephen Hemminger1b537562005-12-20 15:08:07 -08003680 if (netif_running(dev)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003681 err = sky2_up(dev);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003682 if (err)
3683 dev_close(dev);
3684 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003685
3686 return err;
3687}
3688
Stephen Hemminger793b8832005-09-14 16:06:14 -07003689static int sky2_get_regs_len(struct net_device *dev)
3690{
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003691 return 0x4000;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003692}
3693
3694/*
3695 * Returns copy of control register region
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07003696 * Note: ethtool_get_regs always provides full size (16k) buffer
Stephen Hemminger793b8832005-09-14 16:06:14 -07003697 */
3698static void sky2_get_regs(struct net_device *dev, struct ethtool_regs *regs,
3699 void *p)
3700{
3701 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003702 const void __iomem *io = sky2->hw->regs;
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003703 unsigned int b;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003704
3705 regs->version = 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003706
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003707 for (b = 0; b < 128; b++) {
3708 /* This complicated switch statement is to make sure and
3709 * only access regions that are unreserved.
3710 * Some blocks are only valid on dual port cards.
3711 * and block 3 has some special diagnostic registers that
3712 * are poison.
3713 */
3714 switch (b) {
3715 case 3:
3716 /* skip diagnostic ram region */
3717 memcpy_fromio(p + 0x10, io + 0x10, 128 - 0x10);
3718 break;
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003719
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003720 /* dual port cards only */
3721 case 5: /* Tx Arbiter 2 */
3722 case 9: /* RX2 */
3723 case 14 ... 15: /* TX2 */
3724 case 17: case 19: /* Ram Buffer 2 */
3725 case 22 ... 23: /* Tx Ram Buffer 2 */
3726 case 25: /* Rx MAC Fifo 1 */
3727 case 27: /* Tx MAC Fifo 2 */
3728 case 31: /* GPHY 2 */
3729 case 40 ... 47: /* Pattern Ram 2 */
3730 case 52: case 54: /* TCP Segmentation 2 */
3731 case 112 ... 116: /* GMAC 2 */
3732 if (sky2->hw->ports == 1)
3733 goto reserved;
3734 /* fall through */
3735 case 0: /* Control */
3736 case 2: /* Mac address */
3737 case 4: /* Tx Arbiter 1 */
3738 case 7: /* PCI express reg */
3739 case 8: /* RX1 */
3740 case 12 ... 13: /* TX1 */
3741 case 16: case 18:/* Rx Ram Buffer 1 */
3742 case 20 ... 21: /* Tx Ram Buffer 1 */
3743 case 24: /* Rx MAC Fifo 1 */
3744 case 26: /* Tx MAC Fifo 1 */
3745 case 28 ... 29: /* Descriptor and status unit */
3746 case 30: /* GPHY 1*/
3747 case 32 ... 39: /* Pattern Ram 1 */
3748 case 48: case 50: /* TCP Segmentation 1 */
3749 case 56 ... 60: /* PCI space */
3750 case 80 ... 84: /* GMAC 1 */
3751 memcpy_fromio(p, io, 128);
3752 break;
3753 default:
3754reserved:
3755 memset(p, 0, 128);
3756 }
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07003757
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003758 p += 128;
3759 io += 128;
3760 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003761}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003762
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07003763/* In order to do Jumbo packets on these chips, need to turn off the
3764 * transmit store/forward. Therefore checksum offload won't work.
3765 */
3766static int no_tx_offload(struct net_device *dev)
3767{
3768 const struct sky2_port *sky2 = netdev_priv(dev);
3769 const struct sky2_hw *hw = sky2->hw;
3770
Stephen Hemminger69161612007-06-04 17:23:26 -07003771 return dev->mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U;
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07003772}
3773
3774static int sky2_set_tx_csum(struct net_device *dev, u32 data)
3775{
3776 if (data && no_tx_offload(dev))
3777 return -EINVAL;
3778
3779 return ethtool_op_set_tx_csum(dev, data);
3780}
3781
3782
3783static int sky2_set_tso(struct net_device *dev, u32 data)
3784{
3785 if (data && no_tx_offload(dev))
3786 return -EINVAL;
3787
3788 return ethtool_op_set_tso(dev, data);
3789}
3790
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003791static int sky2_get_eeprom_len(struct net_device *dev)
3792{
3793 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003794 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003795 u16 reg2;
3796
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003797 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003798 return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
3799}
3800
Stephen Hemminger14132352008-08-27 20:46:26 -07003801static int sky2_vpd_wait(const struct sky2_hw *hw, int cap, u16 busy)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003802{
Stephen Hemminger14132352008-08-27 20:46:26 -07003803 unsigned long start = jiffies;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003804
Stephen Hemminger14132352008-08-27 20:46:26 -07003805 while ( (sky2_pci_read16(hw, cap + PCI_VPD_ADDR) & PCI_VPD_ADDR_F) == busy) {
3806 /* Can take up to 10.6 ms for write */
3807 if (time_after(jiffies, start + HZ/4)) {
3808 dev_err(&hw->pdev->dev, PFX "VPD cycle timed out");
3809 return -ETIMEDOUT;
3810 }
3811 mdelay(1);
3812 }
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003813
Stephen Hemminger14132352008-08-27 20:46:26 -07003814 return 0;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003815}
3816
Stephen Hemminger14132352008-08-27 20:46:26 -07003817static int sky2_vpd_read(struct sky2_hw *hw, int cap, void *data,
3818 u16 offset, size_t length)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003819{
Stephen Hemminger14132352008-08-27 20:46:26 -07003820 int rc = 0;
3821
3822 while (length > 0) {
3823 u32 val;
3824
3825 sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset);
3826 rc = sky2_vpd_wait(hw, cap, 0);
3827 if (rc)
3828 break;
3829
3830 val = sky2_pci_read32(hw, cap + PCI_VPD_DATA);
3831
3832 memcpy(data, &val, min(sizeof(val), length));
3833 offset += sizeof(u32);
3834 data += sizeof(u32);
3835 length -= sizeof(u32);
3836 }
3837
3838 return rc;
3839}
3840
3841static int sky2_vpd_write(struct sky2_hw *hw, int cap, const void *data,
3842 u16 offset, unsigned int length)
3843{
3844 unsigned int i;
3845 int rc = 0;
3846
3847 for (i = 0; i < length; i += sizeof(u32)) {
3848 u32 val = *(u32 *)(data + i);
3849
3850 sky2_pci_write32(hw, cap + PCI_VPD_DATA, val);
3851 sky2_pci_write32(hw, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F);
3852
3853 rc = sky2_vpd_wait(hw, cap, PCI_VPD_ADDR_F);
3854 if (rc)
3855 break;
3856 }
3857 return rc;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003858}
3859
3860static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
3861 u8 *data)
3862{
3863 struct sky2_port *sky2 = netdev_priv(dev);
3864 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003865
3866 if (!cap)
3867 return -EINVAL;
3868
3869 eeprom->magic = SKY2_EEPROM_MAGIC;
3870
Stephen Hemminger14132352008-08-27 20:46:26 -07003871 return sky2_vpd_read(sky2->hw, cap, data, eeprom->offset, eeprom->len);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003872}
3873
3874static int sky2_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
3875 u8 *data)
3876{
3877 struct sky2_port *sky2 = netdev_priv(dev);
3878 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003879
3880 if (!cap)
3881 return -EINVAL;
3882
3883 if (eeprom->magic != SKY2_EEPROM_MAGIC)
3884 return -EINVAL;
3885
Stephen Hemminger14132352008-08-27 20:46:26 -07003886 /* Partial writes not supported */
3887 if ((eeprom->offset & 3) || (eeprom->len & 3))
3888 return -EINVAL;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003889
Stephen Hemminger14132352008-08-27 20:46:26 -07003890 return sky2_vpd_write(sky2->hw, cap, data, eeprom->offset, eeprom->len);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003891}
3892
3893
Jeff Garzik7282d492006-09-13 14:30:00 -04003894static const struct ethtool_ops sky2_ethtool_ops = {
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003895 .get_settings = sky2_get_settings,
3896 .set_settings = sky2_set_settings,
3897 .get_drvinfo = sky2_get_drvinfo,
3898 .get_wol = sky2_get_wol,
3899 .set_wol = sky2_set_wol,
3900 .get_msglevel = sky2_get_msglevel,
3901 .set_msglevel = sky2_set_msglevel,
3902 .nway_reset = sky2_nway_reset,
3903 .get_regs_len = sky2_get_regs_len,
3904 .get_regs = sky2_get_regs,
3905 .get_link = ethtool_op_get_link,
3906 .get_eeprom_len = sky2_get_eeprom_len,
3907 .get_eeprom = sky2_get_eeprom,
3908 .set_eeprom = sky2_set_eeprom,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003909 .set_sg = ethtool_op_set_sg,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003910 .set_tx_csum = sky2_set_tx_csum,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003911 .set_tso = sky2_set_tso,
3912 .get_rx_csum = sky2_get_rx_csum,
3913 .set_rx_csum = sky2_set_rx_csum,
3914 .get_strings = sky2_get_strings,
3915 .get_coalesce = sky2_get_coalesce,
3916 .set_coalesce = sky2_set_coalesce,
3917 .get_ringparam = sky2_get_ringparam,
3918 .set_ringparam = sky2_set_ringparam,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003919 .get_pauseparam = sky2_get_pauseparam,
3920 .set_pauseparam = sky2_set_pauseparam,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003921 .phys_id = sky2_phys_id,
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003922 .get_sset_count = sky2_get_sset_count,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003923 .get_ethtool_stats = sky2_get_ethtool_stats,
3924};
3925
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003926#ifdef CONFIG_SKY2_DEBUG
3927
3928static struct dentry *sky2_debug;
3929
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00003930
3931/*
3932 * Read and parse the first part of Vital Product Data
3933 */
3934#define VPD_SIZE 128
3935#define VPD_MAGIC 0x82
3936
3937static const struct vpd_tag {
3938 char tag[2];
3939 char *label;
3940} vpd_tags[] = {
3941 { "PN", "Part Number" },
3942 { "EC", "Engineering Level" },
3943 { "MN", "Manufacturer" },
3944 { "SN", "Serial Number" },
3945 { "YA", "Asset Tag" },
3946 { "VL", "First Error Log Message" },
3947 { "VF", "Second Error Log Message" },
3948 { "VB", "Boot Agent ROM Configuration" },
3949 { "VE", "EFI UNDI Configuration" },
3950};
3951
3952static void sky2_show_vpd(struct seq_file *seq, struct sky2_hw *hw)
3953{
3954 size_t vpd_size;
3955 loff_t offs;
3956 u8 len;
3957 unsigned char *buf;
3958 u16 reg2;
3959
3960 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
3961 vpd_size = 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
3962
3963 seq_printf(seq, "%s Product Data\n", pci_name(hw->pdev));
3964 buf = kmalloc(vpd_size, GFP_KERNEL);
3965 if (!buf) {
3966 seq_puts(seq, "no memory!\n");
3967 return;
3968 }
3969
3970 if (pci_read_vpd(hw->pdev, 0, vpd_size, buf) < 0) {
3971 seq_puts(seq, "VPD read failed\n");
3972 goto out;
3973 }
3974
3975 if (buf[0] != VPD_MAGIC) {
3976 seq_printf(seq, "VPD tag mismatch: %#x\n", buf[0]);
3977 goto out;
3978 }
3979 len = buf[1];
3980 if (len == 0 || len > vpd_size - 4) {
3981 seq_printf(seq, "Invalid id length: %d\n", len);
3982 goto out;
3983 }
3984
3985 seq_printf(seq, "%.*s\n", len, buf + 3);
3986 offs = len + 3;
3987
3988 while (offs < vpd_size - 4) {
3989 int i;
3990
3991 if (!memcmp("RW", buf + offs, 2)) /* end marker */
3992 break;
3993 len = buf[offs + 2];
3994 if (offs + len + 3 >= vpd_size)
3995 break;
3996
3997 for (i = 0; i < ARRAY_SIZE(vpd_tags); i++) {
3998 if (!memcmp(vpd_tags[i].tag, buf + offs, 2)) {
3999 seq_printf(seq, " %s: %.*s\n",
4000 vpd_tags[i].label, len, buf + offs + 3);
4001 break;
4002 }
4003 }
4004 offs += len + 3;
4005 }
4006out:
4007 kfree(buf);
4008}
4009
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004010static int sky2_debug_show(struct seq_file *seq, void *v)
4011{
4012 struct net_device *dev = seq->private;
4013 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004014 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004015 unsigned port = sky2->port;
4016 unsigned idx, last;
4017 int sop;
4018
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004019 sky2_show_vpd(seq, hw);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004020
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004021 seq_printf(seq, "\nIRQ src=%x mask=%x control=%x\n",
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004022 sky2_read32(hw, B0_ISRC),
4023 sky2_read32(hw, B0_IMSK),
4024 sky2_read32(hw, B0_Y2_SP_ICR));
4025
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004026 if (!netif_running(dev)) {
4027 seq_printf(seq, "network not running\n");
4028 return 0;
4029 }
4030
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004031 napi_disable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004032 last = sky2_read16(hw, STAT_PUT_IDX);
4033
4034 if (hw->st_idx == last)
4035 seq_puts(seq, "Status ring (empty)\n");
4036 else {
4037 seq_puts(seq, "Status ring\n");
4038 for (idx = hw->st_idx; idx != last && idx < STATUS_RING_SIZE;
4039 idx = RING_NEXT(idx, STATUS_RING_SIZE)) {
4040 const struct sky2_status_le *le = hw->st_le + idx;
4041 seq_printf(seq, "[%d] %#x %d %#x\n",
4042 idx, le->opcode, le->length, le->status);
4043 }
4044 seq_puts(seq, "\n");
4045 }
4046
4047 seq_printf(seq, "Tx ring pending=%u...%u report=%d done=%d\n",
4048 sky2->tx_cons, sky2->tx_prod,
4049 sky2_read16(hw, port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
4050 sky2_read16(hw, Q_ADDR(txqaddr[port], Q_DONE)));
4051
4052 /* Dump contents of tx ring */
4053 sop = 1;
4054 for (idx = sky2->tx_next; idx != sky2->tx_prod && idx < TX_RING_SIZE;
4055 idx = RING_NEXT(idx, TX_RING_SIZE)) {
4056 const struct sky2_tx_le *le = sky2->tx_le + idx;
4057 u32 a = le32_to_cpu(le->addr);
4058
4059 if (sop)
4060 seq_printf(seq, "%u:", idx);
4061 sop = 0;
4062
4063 switch(le->opcode & ~HW_OWNER) {
4064 case OP_ADDR64:
4065 seq_printf(seq, " %#x:", a);
4066 break;
4067 case OP_LRGLEN:
4068 seq_printf(seq, " mtu=%d", a);
4069 break;
4070 case OP_VLAN:
4071 seq_printf(seq, " vlan=%d", be16_to_cpu(le->length));
4072 break;
4073 case OP_TCPLISW:
4074 seq_printf(seq, " csum=%#x", a);
4075 break;
4076 case OP_LARGESEND:
4077 seq_printf(seq, " tso=%#x(%d)", a, le16_to_cpu(le->length));
4078 break;
4079 case OP_PACKET:
4080 seq_printf(seq, " %#x(%d)", a, le16_to_cpu(le->length));
4081 break;
4082 case OP_BUFFER:
4083 seq_printf(seq, " frag=%#x(%d)", a, le16_to_cpu(le->length));
4084 break;
4085 default:
4086 seq_printf(seq, " op=%#x,%#x(%d)", le->opcode,
4087 a, le16_to_cpu(le->length));
4088 }
4089
4090 if (le->ctrl & EOP) {
4091 seq_putc(seq, '\n');
4092 sop = 1;
4093 }
4094 }
4095
4096 seq_printf(seq, "\nRx ring hw get=%d put=%d last=%d\n",
4097 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_GET_IDX)),
4098 last = sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_PUT_IDX)),
4099 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_LAST_IDX)));
4100
David S. Millerd1d08d12008-01-07 20:53:33 -08004101 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004102 napi_enable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004103 return 0;
4104}
4105
4106static int sky2_debug_open(struct inode *inode, struct file *file)
4107{
4108 return single_open(file, sky2_debug_show, inode->i_private);
4109}
4110
4111static const struct file_operations sky2_debug_fops = {
4112 .owner = THIS_MODULE,
4113 .open = sky2_debug_open,
4114 .read = seq_read,
4115 .llseek = seq_lseek,
4116 .release = single_release,
4117};
4118
4119/*
4120 * Use network device events to create/remove/rename
4121 * debugfs file entries
4122 */
4123static int sky2_device_event(struct notifier_block *unused,
4124 unsigned long event, void *ptr)
4125{
4126 struct net_device *dev = ptr;
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004127 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004128
Stephen Hemminger1436b302008-11-19 21:59:54 -08004129 if (dev->netdev_ops->ndo_open != sky2_up || !sky2_debug)
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004130 return NOTIFY_DONE;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004131
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004132 switch(event) {
4133 case NETDEV_CHANGENAME:
4134 if (sky2->debugfs) {
4135 sky2->debugfs = debugfs_rename(sky2_debug, sky2->debugfs,
4136 sky2_debug, dev->name);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004137 }
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004138 break;
4139
4140 case NETDEV_GOING_DOWN:
4141 if (sky2->debugfs) {
4142 printk(KERN_DEBUG PFX "%s: remove debugfs\n",
4143 dev->name);
4144 debugfs_remove(sky2->debugfs);
4145 sky2->debugfs = NULL;
4146 }
4147 break;
4148
4149 case NETDEV_UP:
4150 sky2->debugfs = debugfs_create_file(dev->name, S_IRUGO,
4151 sky2_debug, dev,
4152 &sky2_debug_fops);
4153 if (IS_ERR(sky2->debugfs))
4154 sky2->debugfs = NULL;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004155 }
4156
4157 return NOTIFY_DONE;
4158}
4159
4160static struct notifier_block sky2_notifier = {
4161 .notifier_call = sky2_device_event,
4162};
4163
4164
4165static __init void sky2_debug_init(void)
4166{
4167 struct dentry *ent;
4168
4169 ent = debugfs_create_dir("sky2", NULL);
4170 if (!ent || IS_ERR(ent))
4171 return;
4172
4173 sky2_debug = ent;
4174 register_netdevice_notifier(&sky2_notifier);
4175}
4176
4177static __exit void sky2_debug_cleanup(void)
4178{
4179 if (sky2_debug) {
4180 unregister_netdevice_notifier(&sky2_notifier);
4181 debugfs_remove(sky2_debug);
4182 sky2_debug = NULL;
4183 }
4184}
4185
4186#else
4187#define sky2_debug_init()
4188#define sky2_debug_cleanup()
4189#endif
4190
Stephen Hemminger1436b302008-11-19 21:59:54 -08004191/* Two copies of network device operations to handle special case of
4192 not allowing netpoll on second port */
4193static const struct net_device_ops sky2_netdev_ops[2] = {
4194 {
4195 .ndo_open = sky2_up,
4196 .ndo_stop = sky2_down,
Stephen Hemminger00829822008-11-20 20:14:53 -08004197 .ndo_start_xmit = sky2_xmit_frame,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004198 .ndo_do_ioctl = sky2_ioctl,
4199 .ndo_validate_addr = eth_validate_addr,
4200 .ndo_set_mac_address = sky2_set_mac_address,
4201 .ndo_set_multicast_list = sky2_set_multicast,
4202 .ndo_change_mtu = sky2_change_mtu,
4203 .ndo_tx_timeout = sky2_tx_timeout,
4204#ifdef SKY2_VLAN_TAG_USED
4205 .ndo_vlan_rx_register = sky2_vlan_rx_register,
4206#endif
4207#ifdef CONFIG_NET_POLL_CONTROLLER
4208 .ndo_poll_controller = sky2_netpoll,
4209#endif
4210 },
4211 {
4212 .ndo_open = sky2_up,
4213 .ndo_stop = sky2_down,
Stephen Hemminger00829822008-11-20 20:14:53 -08004214 .ndo_start_xmit = sky2_xmit_frame,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004215 .ndo_do_ioctl = sky2_ioctl,
4216 .ndo_validate_addr = eth_validate_addr,
4217 .ndo_set_mac_address = sky2_set_mac_address,
4218 .ndo_set_multicast_list = sky2_set_multicast,
4219 .ndo_change_mtu = sky2_change_mtu,
4220 .ndo_tx_timeout = sky2_tx_timeout,
4221#ifdef SKY2_VLAN_TAG_USED
4222 .ndo_vlan_rx_register = sky2_vlan_rx_register,
4223#endif
4224 },
4225};
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004226
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004227/* Initialize network device */
4228static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw,
Stephen Hemmingere3173832007-02-06 10:45:39 -08004229 unsigned port,
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004230 int highmem, int wol)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004231{
4232 struct sky2_port *sky2;
4233 struct net_device *dev = alloc_etherdev(sizeof(*sky2));
4234
4235 if (!dev) {
Joe Perches898eb712007-10-18 03:06:30 -07004236 dev_err(&hw->pdev->dev, "etherdev alloc failed\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004237 return NULL;
4238 }
4239
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004240 SET_NETDEV_DEV(dev, &hw->pdev->dev);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08004241 dev->irq = hw->pdev->irq;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004242 SET_ETHTOOL_OPS(dev, &sky2_ethtool_ops);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004243 dev->watchdog_timeo = TX_WATCHDOG;
Stephen Hemminger1436b302008-11-19 21:59:54 -08004244 dev->netdev_ops = &sky2_netdev_ops[port];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004245
4246 sky2 = netdev_priv(dev);
4247 sky2->netdev = dev;
4248 sky2->hw = hw;
4249 sky2->msg_enable = netif_msg_init(debug, default_msg);
4250
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004251 /* Auto speed and flow control */
4252 sky2->autoneg = AUTONEG_ENABLE;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07004253 sky2->flow_mode = FC_BOTH;
4254
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004255 sky2->duplex = -1;
4256 sky2->speed = -1;
4257 sky2->advertising = sky2_supported_modes(hw);
Stephen Hemminger8b31cfb2007-11-21 14:55:26 -08004258 sky2->rx_csum = (hw->chip_id != CHIP_ID_YUKON_XL);
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004259 sky2->wol = wol;
Stephen Hemminger75d070c2005-12-09 11:35:11 -08004260
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08004261 spin_lock_init(&sky2->phy_lock);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004262 sky2->tx_pending = TX_DEF_PENDING;
Stephen Hemminger290d4de2006-03-20 15:48:15 -08004263 sky2->rx_pending = RX_DEF_PENDING;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004264
4265 hw->dev[port] = dev;
4266
4267 sky2->port = port;
4268
Stephen Hemminger4a50a872007-02-06 10:45:41 -08004269 dev->features |= NETIF_F_TSO | NETIF_F_IP_CSUM | NETIF_F_SG;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004270 if (highmem)
4271 dev->features |= NETIF_F_HIGHDMA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004272
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07004273#ifdef SKY2_VLAN_TAG_USED
Stephen Hemmingerd6c9bc12007-09-27 12:32:44 -07004274 /* The workaround for FE+ status conflicts with VLAN tag detection. */
4275 if (!(sky2->hw->chip_id == CHIP_ID_YUKON_FE_P &&
4276 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0)) {
4277 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
Stephen Hemmingerd6c9bc12007-09-27 12:32:44 -07004278 }
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07004279#endif
4280
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004281 /* read the mac address */
Stephen Hemminger793b8832005-09-14 16:06:14 -07004282 memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN);
Stephen Hemminger2995bfb2005-09-28 10:01:03 -07004283 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004284
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004285 return dev;
4286}
4287
Stephen Hemminger28bd1812006-01-17 13:43:19 -08004288static void __devinit sky2_show_addr(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004289{
4290 const struct sky2_port *sky2 = netdev_priv(dev);
4291
4292 if (netif_msg_probe(sky2))
Johannes Berge1749612008-10-27 15:59:26 -07004293 printk(KERN_INFO PFX "%s: addr %pM\n",
4294 dev->name, dev->dev_addr);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004295}
4296
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004297/* Handle software interrupt used during MSI test */
David Howells7d12e782006-10-05 14:55:46 +01004298static irqreturn_t __devinit sky2_test_intr(int irq, void *dev_id)
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004299{
4300 struct sky2_hw *hw = dev_id;
4301 u32 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
4302
4303 if (status == 0)
4304 return IRQ_NONE;
4305
4306 if (status & Y2_IS_IRQ_SW) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004307 hw->flags |= SKY2_HW_USE_MSI;
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004308 wake_up(&hw->msi_wait);
4309 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4310 }
4311 sky2_write32(hw, B0_Y2_SP_ICR, 2);
4312
4313 return IRQ_HANDLED;
4314}
4315
4316/* Test interrupt path by forcing a a software IRQ */
4317static int __devinit sky2_test_msi(struct sky2_hw *hw)
4318{
4319 struct pci_dev *pdev = hw->pdev;
4320 int err;
4321
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004322 init_waitqueue_head (&hw->msi_wait);
4323
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004324 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);
4325
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004326 err = request_irq(pdev->irq, sky2_test_intr, 0, DRV_NAME, hw);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004327 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004328 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004329 return err;
4330 }
4331
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004332 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ);
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004333 sky2_read8(hw, B0_CTST);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004334
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004335 wait_event_timeout(hw->msi_wait, (hw->flags & SKY2_HW_USE_MSI), HZ/10);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004336
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004337 if (!(hw->flags & SKY2_HW_USE_MSI)) {
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004338 /* MSI test failed, go back to INTx mode */
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004339 dev_info(&pdev->dev, "No interrupt generated using MSI, "
4340 "switching to INTx mode.\n");
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004341
4342 err = -EOPNOTSUPP;
4343 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4344 }
4345
4346 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger2bffc232006-10-17 10:17:18 -07004347 sky2_read32(hw, B0_IMSK);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004348
4349 free_irq(pdev->irq, hw);
4350
4351 return err;
4352}
4353
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004354/* This driver supports yukon2 chipset only */
4355static const char *sky2_name(u8 chipid, char *buf, int sz)
4356{
4357 const char *name[] = {
4358 "XL", /* 0xb3 */
4359 "EC Ultra", /* 0xb4 */
4360 "Extreme", /* 0xb5 */
4361 "EC", /* 0xb6 */
4362 "FE", /* 0xb7 */
4363 "FE+", /* 0xb8 */
4364 "Supreme", /* 0xb9 */
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07004365 "UL 2", /* 0xba */
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004366 };
4367
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07004368 if (chipid >= CHIP_ID_YUKON_XL && chipid < CHIP_ID_YUKON_UL_2)
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004369 strncpy(buf, name[chipid - CHIP_ID_YUKON_XL], sz);
4370 else
4371 snprintf(buf, sz, "(chip %#x)", chipid);
4372 return buf;
4373}
4374
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004375static int __devinit sky2_probe(struct pci_dev *pdev,
4376 const struct pci_device_id *ent)
4377{
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004378 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004379 struct sky2_hw *hw;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004380 int err, using_dac = 0, wol_default;
Stephen Hemminger38345072009-02-03 11:27:30 +00004381 u32 reg;
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004382 char buf1[16];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004383
Stephen Hemminger793b8832005-09-14 16:06:14 -07004384 err = pci_enable_device(pdev);
4385 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004386 dev_err(&pdev->dev, "cannot enable PCI device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004387 goto err_out;
4388 }
4389
Stephen Hemminger6cc90a52009-06-11 07:03:47 +00004390 /* Get configuration information
4391 * Note: only regular PCI config access once to test for HW issues
4392 * other PCI access through shared memory for speed and to
4393 * avoid MMCONFIG problems.
4394 */
4395 err = pci_read_config_dword(pdev, PCI_DEV_REG2, &reg);
4396 if (err) {
4397 dev_err(&pdev->dev, "PCI read config failed\n");
4398 goto err_out;
4399 }
4400
4401 if (~reg == 0) {
4402 dev_err(&pdev->dev, "PCI configuration read error\n");
4403 goto err_out;
4404 }
4405
Stephen Hemminger793b8832005-09-14 16:06:14 -07004406 err = pci_request_regions(pdev, DRV_NAME);
4407 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004408 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004409 goto err_out_disable;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004410 }
4411
4412 pci_set_master(pdev);
4413
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004414 if (sizeof(dma_addr_t) > sizeof(u32) &&
Yang Hongyang6a355282009-04-06 19:01:13 -07004415 !(err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))) {
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004416 using_dac = 1;
Yang Hongyang6a355282009-04-06 19:01:13 -07004417 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004418 if (err < 0) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004419 dev_err(&pdev->dev, "unable to obtain 64 bit DMA "
4420 "for consistent allocations\n");
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004421 goto err_out_free_regions;
4422 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004423 } else {
Yang Hongyang284901a2009-04-06 19:01:15 -07004424 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004425 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004426 dev_err(&pdev->dev, "no usable DMA configuration\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004427 goto err_out_free_regions;
4428 }
4429 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004430
Stephen Hemminger38345072009-02-03 11:27:30 +00004431
4432#ifdef __BIG_ENDIAN
4433 /* The sk98lin vendor driver uses hardware byte swapping but
4434 * this driver uses software swapping.
4435 */
4436 reg &= ~PCI_REV_DESC;
4437 err = pci_write_config_dword(pdev,PCI_DEV_REG2, reg);
4438 if (err) {
4439 dev_err(&pdev->dev, "PCI write config failed\n");
4440 goto err_out_free_regions;
4441 }
4442#endif
4443
Rafael J. Wysocki9d731d72008-10-12 20:59:48 -07004444 wol_default = device_may_wakeup(&pdev->dev) ? WAKE_MAGIC : 0;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004445
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004446 err = -ENOMEM;
Stephen Hemminger6aad85d2006-01-17 13:43:18 -08004447 hw = kzalloc(sizeof(*hw), GFP_KERNEL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004448 if (!hw) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004449 dev_err(&pdev->dev, "cannot allocate hardware struct\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004450 goto err_out_free_regions;
4451 }
4452
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004453 hw->pdev = pdev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004454
4455 hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000);
4456 if (!hw->regs) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004457 dev_err(&pdev->dev, "cannot map device registers\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004458 goto err_out_free_hw;
4459 }
4460
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004461 /* ring for status responses */
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004462 hw->st_le = pci_alloc_consistent(pdev, STATUS_LE_BYTES, &hw->st_dma);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004463 if (!hw->st_le)
4464 goto err_out_iounmap;
4465
Stephen Hemmingere3173832007-02-06 10:45:39 -08004466 err = sky2_init(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004467 if (err)
Stephen Hemminger793b8832005-09-14 16:06:14 -07004468 goto err_out_iounmap;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004469
Stephen Hemmingerc844d482008-08-27 20:48:23 -07004470 dev_info(&pdev->dev, "Yukon-2 %s chip revision %d\n",
4471 sky2_name(hw->chip_id, buf1, sizeof(buf1)), hw->chip_rev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004472
Stephen Hemmingere3173832007-02-06 10:45:39 -08004473 sky2_reset(hw);
4474
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004475 dev = sky2_init_netdev(hw, 0, using_dac, wol_default);
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004476 if (!dev) {
4477 err = -ENOMEM;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004478 goto err_out_free_pci;
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004479 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004480
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004481 if (!disable_msi && pci_enable_msi(pdev) == 0) {
4482 err = sky2_test_msi(hw);
4483 if (err == -EOPNOTSUPP)
4484 pci_disable_msi(pdev);
4485 else if (err)
4486 goto err_out_free_netdev;
4487 }
4488
Stephen Hemminger793b8832005-09-14 16:06:14 -07004489 err = register_netdev(dev);
4490 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004491 dev_err(&pdev->dev, "cannot register net device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004492 goto err_out_free_netdev;
4493 }
4494
Stephen Hemminger6de16232007-10-17 13:26:42 -07004495 netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT);
4496
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004497 err = request_irq(pdev->irq, sky2_intr,
4498 (hw->flags & SKY2_HW_USE_MSI) ? 0 : IRQF_SHARED,
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004499 dev->name, hw);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004500 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004501 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004502 goto err_out_unregister;
4503 }
4504 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004505 napi_enable(&hw->napi);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004506
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004507 sky2_show_addr(dev);
4508
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004509 if (hw->ports > 1) {
4510 struct net_device *dev1;
4511
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004512 dev1 = sky2_init_netdev(hw, 1, using_dac, wol_default);
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004513 if (!dev1)
4514 dev_warn(&pdev->dev, "allocation for second device failed\n");
4515 else if ((err = register_netdev(dev1))) {
4516 dev_warn(&pdev->dev,
4517 "register of second port failed (%d)\n", err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004518 hw->dev[1] = NULL;
4519 free_netdev(dev1);
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004520 } else
4521 sky2_show_addr(dev1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004522 }
4523
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004524 setup_timer(&hw->watchdog_timer, sky2_watchdog, (unsigned long) hw);
Stephen Hemminger81906792007-02-15 16:40:33 -08004525 INIT_WORK(&hw->restart_work, sky2_restart);
4526
Stephen Hemminger793b8832005-09-14 16:06:14 -07004527 pci_set_drvdata(pdev, hw);
4528
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004529 return 0;
4530
Stephen Hemminger793b8832005-09-14 16:06:14 -07004531err_out_unregister:
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004532 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004533 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004534 unregister_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004535err_out_free_netdev:
4536 free_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004537err_out_free_pci:
Stephen Hemminger793b8832005-09-14 16:06:14 -07004538 sky2_write8(hw, B0_CTST, CS_RST_SET);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004539 pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004540err_out_iounmap:
4541 iounmap(hw->regs);
4542err_out_free_hw:
4543 kfree(hw);
4544err_out_free_regions:
4545 pci_release_regions(pdev);
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004546err_out_disable:
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004547 pci_disable_device(pdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004548err_out:
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004549 pci_set_drvdata(pdev, NULL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004550 return err;
4551}
4552
4553static void __devexit sky2_remove(struct pci_dev *pdev)
4554{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004555 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004556 int i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004557
Stephen Hemminger793b8832005-09-14 16:06:14 -07004558 if (!hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004559 return;
4560
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004561 del_timer_sync(&hw->watchdog_timer);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004562 cancel_work_sync(&hw->restart_work);
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004563
Stephen Hemmingerb877fe22007-10-22 13:39:09 -07004564 for (i = hw->ports-1; i >= 0; --i)
Stephen Hemminger6de16232007-10-17 13:26:42 -07004565 unregister_netdev(hw->dev[i]);
Stephen Hemminger81906792007-02-15 16:40:33 -08004566
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004567 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004568
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004569 sky2_power_aux(hw);
4570
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004571 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004572 sky2_write8(hw, B0_CTST, CS_RST_SET);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004573 sky2_read8(hw, B0_CTST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004574
4575 free_irq(pdev->irq, hw);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004576 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004577 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004578 pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004579 pci_release_regions(pdev);
4580 pci_disable_device(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004581
Stephen Hemmingerb877fe22007-10-22 13:39:09 -07004582 for (i = hw->ports-1; i >= 0; --i)
Stephen Hemminger6de16232007-10-17 13:26:42 -07004583 free_netdev(hw->dev[i]);
4584
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004585 iounmap(hw->regs);
4586 kfree(hw);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004587
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004588 pci_set_drvdata(pdev, NULL);
4589}
4590
4591#ifdef CONFIG_PM
4592static int sky2_suspend(struct pci_dev *pdev, pm_message_t state)
4593{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004594 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004595 int i, wol = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004596
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004597 if (!hw)
4598 return 0;
4599
Stephen Hemminger063a0b32008-04-02 09:03:23 -07004600 del_timer_sync(&hw->watchdog_timer);
4601 cancel_work_sync(&hw->restart_work);
4602
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09004603 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004604 struct net_device *dev = hw->dev[i];
Stephen Hemmingere3173832007-02-06 10:45:39 -08004605 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004606
Stephen Hemminger063a0b32008-04-02 09:03:23 -07004607 netif_device_detach(dev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004608 if (netif_running(dev))
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004609 sky2_down(dev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004610
4611 if (sky2->wol)
4612 sky2_wol_init(sky2);
4613
4614 wol |= sky2->wol;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004615 }
4616
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004617 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004618 napi_disable(&hw->napi);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004619 sky2_power_aux(hw);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004620
Linus Torvaldsd374c1c2006-06-12 12:53:27 -07004621 pci_save_state(pdev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004622 pci_enable_wake(pdev, pci_choose_state(pdev, state), wol);
Stephen Hemmingerf71eb1a2008-08-04 13:33:37 -07004623 pci_set_power_state(pdev, pci_choose_state(pdev, state));
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004624
Stephen Hemminger2ccc99b2006-06-13 17:17:27 +09004625 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004626}
4627
4628static int sky2_resume(struct pci_dev *pdev)
4629{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004630 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004631 int i, err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004632
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004633 if (!hw)
4634 return 0;
4635
Stephen Hemmingerf71eb1a2008-08-04 13:33:37 -07004636 err = pci_set_power_state(pdev, PCI_D0);
4637 if (err)
4638 goto out;
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004639
4640 err = pci_restore_state(pdev);
4641 if (err)
4642 goto out;
4643
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004644 pci_enable_wake(pdev, PCI_D0, 0);
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07004645
4646 /* Re-enable all clocks */
Stephen Hemminger05745c42007-09-19 15:36:45 -07004647 if (hw->chip_id == CHIP_ID_YUKON_EX ||
4648 hw->chip_id == CHIP_ID_YUKON_EC_U ||
4649 hw->chip_id == CHIP_ID_YUKON_FE_P)
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004650 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07004651
Stephen Hemmingere3173832007-02-06 10:45:39 -08004652 sky2_reset(hw);
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004653 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004654 napi_enable(&hw->napi);
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004655
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09004656 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004657 struct net_device *dev = hw->dev[i];
Stephen Hemminger063a0b32008-04-02 09:03:23 -07004658
4659 netif_device_attach(dev);
Stephen Hemminger6a5706b2006-07-12 15:23:46 -07004660 if (netif_running(dev)) {
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004661 err = sky2_up(dev);
4662 if (err) {
4663 printk(KERN_ERR PFX "%s: could not up: %d\n",
4664 dev->name, err);
Ben Hutchings68c28892008-05-31 16:52:52 +01004665 rtnl_lock();
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004666 dev_close(dev);
Ben Hutchings68c28892008-05-31 16:52:52 +01004667 rtnl_unlock();
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09004668 goto out;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004669 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004670 }
4671 }
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09004672
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004673 return 0;
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004674out:
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004675 dev_err(&pdev->dev, "resume failed (%d)\n", err);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004676 pci_disable_device(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004677 return err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004678}
4679#endif
4680
Stephen Hemmingere3173832007-02-06 10:45:39 -08004681static void sky2_shutdown(struct pci_dev *pdev)
4682{
4683 struct sky2_hw *hw = pci_get_drvdata(pdev);
4684 int i, wol = 0;
4685
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004686 if (!hw)
4687 return;
4688
Stephen Hemminger5c0d6b32007-10-14 13:25:22 -07004689 del_timer_sync(&hw->watchdog_timer);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004690
4691 for (i = 0; i < hw->ports; i++) {
4692 struct net_device *dev = hw->dev[i];
4693 struct sky2_port *sky2 = netdev_priv(dev);
4694
4695 if (sky2->wol) {
4696 wol = 1;
4697 sky2_wol_init(sky2);
4698 }
4699 }
4700
4701 if (wol)
4702 sky2_power_aux(hw);
4703
4704 pci_enable_wake(pdev, PCI_D3hot, wol);
4705 pci_enable_wake(pdev, PCI_D3cold, wol);
4706
4707 pci_disable_device(pdev);
Stephen Hemmingerf71eb1a2008-08-04 13:33:37 -07004708 pci_set_power_state(pdev, PCI_D3hot);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004709}
4710
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004711static struct pci_driver sky2_driver = {
Stephen Hemminger793b8832005-09-14 16:06:14 -07004712 .name = DRV_NAME,
4713 .id_table = sky2_id_table,
4714 .probe = sky2_probe,
4715 .remove = __devexit_p(sky2_remove),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004716#ifdef CONFIG_PM
Stephen Hemminger793b8832005-09-14 16:06:14 -07004717 .suspend = sky2_suspend,
4718 .resume = sky2_resume,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004719#endif
Stephen Hemmingere3173832007-02-06 10:45:39 -08004720 .shutdown = sky2_shutdown,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004721};
4722
4723static int __init sky2_init_module(void)
4724{
Stephen Hemmingerc844d482008-08-27 20:48:23 -07004725 pr_info(PFX "driver version " DRV_VERSION "\n");
4726
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004727 sky2_debug_init();
shemminger@osdl.org50241c42005-11-30 11:45:22 -08004728 return pci_register_driver(&sky2_driver);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004729}
4730
4731static void __exit sky2_cleanup_module(void)
4732{
4733 pci_unregister_driver(&sky2_driver);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004734 sky2_debug_cleanup();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004735}
4736
4737module_init(sky2_init_module);
4738module_exit(sky2_cleanup_module);
4739
4740MODULE_DESCRIPTION("Marvell Yukon 2 Gigabit Ethernet driver");
Stephen Hemminger65ebe632007-01-23 11:38:57 -08004741MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004742MODULE_LICENSE("GPL");
shemminger@osdl.org5f4f9dc2005-11-30 11:45:23 -08004743MODULE_VERSION(DRV_VERSION);