Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms of the GNU General Public License as published by the Free |
| 6 | * Software Foundation; either version 2 of the License, or (at your option) |
| 7 | * any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program; if not, write to the Free Software Foundation, Inc., 59 |
| 16 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 17 | * |
| 18 | * The full GNU General Public License is included in this distribution in the |
| 19 | * file called COPYING. |
| 20 | */ |
| 21 | |
| 22 | /* |
| 23 | * This code implements the DMA subsystem. It provides a HW-neutral interface |
| 24 | * for other kernel code to use asynchronous memory copy capabilities, |
| 25 | * if present, and allows different HW DMA drivers to register as providing |
| 26 | * this capability. |
| 27 | * |
| 28 | * Due to the fact we are accelerating what is already a relatively fast |
| 29 | * operation, the code goes to great lengths to avoid additional overhead, |
| 30 | * such as locking. |
| 31 | * |
| 32 | * LOCKING: |
| 33 | * |
Dan Williams | aa1e6f1 | 2009-01-06 11:38:17 -0700 | [diff] [blame^] | 34 | * The subsystem keeps a global list of dma_device structs it is protected by a |
| 35 | * mutex, dma_list_mutex. |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 36 | * |
| 37 | * Each device has a channels list, which runs unlocked but is never modified |
| 38 | * once the device is registered, it's just setup by the driver. |
| 39 | * |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 40 | * Each device has a kref, which is initialized to 1 when the device is |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 41 | * registered. A kref_get is done for each device registered. When the |
Sebastian Siewior | 8a5703f | 2008-04-21 22:38:45 +0000 | [diff] [blame] | 42 | * device is released, the corresponding kref_put is done in the release |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 43 | * method. Every time one of the device's channels is allocated to a client, |
Sebastian Siewior | 8a5703f | 2008-04-21 22:38:45 +0000 | [diff] [blame] | 44 | * a kref_get occurs. When the channel is freed, the corresponding kref_put |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 45 | * happens. The device's release function does a completion, so |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 46 | * unregister_device does a remove event, device_unregister, a kref_put |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 47 | * for the first reference, then waits on the completion for all other |
| 48 | * references to finish. |
| 49 | * |
| 50 | * Each channel has an open-coded implementation of Rusty Russell's "bigref," |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 51 | * with a kref and a per_cpu local_t. A dma_chan_get is called when a client |
| 52 | * signals that it wants to use a channel, and dma_chan_put is called when |
Sebastian Siewior | 8a5703f | 2008-04-21 22:38:45 +0000 | [diff] [blame] | 53 | * a channel is removed or a client using it is unregistered. A client can |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 54 | * take extra references per outstanding transaction, as is the case with |
| 55 | * the NET DMA client. The release function does a kref_put on the device. |
| 56 | * -ChrisL, DanW |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 57 | */ |
| 58 | |
| 59 | #include <linux/init.h> |
| 60 | #include <linux/module.h> |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 61 | #include <linux/mm.h> |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 62 | #include <linux/device.h> |
| 63 | #include <linux/dmaengine.h> |
| 64 | #include <linux/hardirq.h> |
| 65 | #include <linux/spinlock.h> |
| 66 | #include <linux/percpu.h> |
| 67 | #include <linux/rcupdate.h> |
| 68 | #include <linux/mutex.h> |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 69 | #include <linux/jiffies.h> |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 70 | #include <linux/rculist.h> |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 71 | |
| 72 | static DEFINE_MUTEX(dma_list_mutex); |
| 73 | static LIST_HEAD(dma_device_list); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 74 | static long dmaengine_ref_count; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 75 | |
| 76 | /* --- sysfs implementation --- */ |
| 77 | |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 78 | static ssize_t show_memcpy_count(struct device *dev, struct device_attribute *attr, char *buf) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 79 | { |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 80 | struct dma_chan *chan = to_dma_chan(dev); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 81 | unsigned long count = 0; |
| 82 | int i; |
| 83 | |
Andrew Morton | 17f3ae0 | 2006-05-25 13:26:53 -0700 | [diff] [blame] | 84 | for_each_possible_cpu(i) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 85 | count += per_cpu_ptr(chan->local, i)->memcpy_count; |
| 86 | |
| 87 | return sprintf(buf, "%lu\n", count); |
| 88 | } |
| 89 | |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 90 | static ssize_t show_bytes_transferred(struct device *dev, struct device_attribute *attr, |
| 91 | char *buf) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 92 | { |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 93 | struct dma_chan *chan = to_dma_chan(dev); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 94 | unsigned long count = 0; |
| 95 | int i; |
| 96 | |
Andrew Morton | 17f3ae0 | 2006-05-25 13:26:53 -0700 | [diff] [blame] | 97 | for_each_possible_cpu(i) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 98 | count += per_cpu_ptr(chan->local, i)->bytes_transferred; |
| 99 | |
| 100 | return sprintf(buf, "%lu\n", count); |
| 101 | } |
| 102 | |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 103 | static ssize_t show_in_use(struct device *dev, struct device_attribute *attr, char *buf) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 104 | { |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 105 | struct dma_chan *chan = to_dma_chan(dev); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 106 | |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 107 | return sprintf(buf, "%d\n", chan->client_count); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 108 | } |
| 109 | |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 110 | static struct device_attribute dma_attrs[] = { |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 111 | __ATTR(memcpy_count, S_IRUGO, show_memcpy_count, NULL), |
| 112 | __ATTR(bytes_transferred, S_IRUGO, show_bytes_transferred, NULL), |
| 113 | __ATTR(in_use, S_IRUGO, show_in_use, NULL), |
| 114 | __ATTR_NULL |
| 115 | }; |
| 116 | |
| 117 | static void dma_async_device_cleanup(struct kref *kref); |
| 118 | |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 119 | static void dma_dev_release(struct device *dev) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 120 | { |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 121 | struct dma_chan *chan = to_dma_chan(dev); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 122 | kref_put(&chan->device->refcount, dma_async_device_cleanup); |
| 123 | } |
| 124 | |
| 125 | static struct class dma_devclass = { |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 126 | .name = "dma", |
| 127 | .dev_attrs = dma_attrs, |
| 128 | .dev_release = dma_dev_release, |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 129 | }; |
| 130 | |
| 131 | /* --- client and device registration --- */ |
| 132 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 133 | #define dma_device_satisfies_mask(device, mask) \ |
| 134 | __dma_device_satisfies_mask((device), &(mask)) |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 135 | static int |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 136 | __dma_device_satisfies_mask(struct dma_device *device, dma_cap_mask_t *want) |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 137 | { |
| 138 | dma_cap_mask_t has; |
| 139 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 140 | bitmap_and(has.bits, want->bits, device->cap_mask.bits, |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 141 | DMA_TX_TYPE_END); |
| 142 | return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END); |
| 143 | } |
| 144 | |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 145 | static struct module *dma_chan_to_owner(struct dma_chan *chan) |
| 146 | { |
| 147 | return chan->device->dev->driver->owner; |
| 148 | } |
| 149 | |
| 150 | /** |
| 151 | * balance_ref_count - catch up the channel reference count |
| 152 | * @chan - channel to balance ->client_count versus dmaengine_ref_count |
| 153 | * |
| 154 | * balance_ref_count must be called under dma_list_mutex |
| 155 | */ |
| 156 | static void balance_ref_count(struct dma_chan *chan) |
| 157 | { |
| 158 | struct module *owner = dma_chan_to_owner(chan); |
| 159 | |
| 160 | while (chan->client_count < dmaengine_ref_count) { |
| 161 | __module_get(owner); |
| 162 | chan->client_count++; |
| 163 | } |
| 164 | } |
| 165 | |
| 166 | /** |
| 167 | * dma_chan_get - try to grab a dma channel's parent driver module |
| 168 | * @chan - channel to grab |
| 169 | * |
| 170 | * Must be called under dma_list_mutex |
| 171 | */ |
| 172 | static int dma_chan_get(struct dma_chan *chan) |
| 173 | { |
| 174 | int err = -ENODEV; |
| 175 | struct module *owner = dma_chan_to_owner(chan); |
| 176 | |
| 177 | if (chan->client_count) { |
| 178 | __module_get(owner); |
| 179 | err = 0; |
| 180 | } else if (try_module_get(owner)) |
| 181 | err = 0; |
| 182 | |
| 183 | if (err == 0) |
| 184 | chan->client_count++; |
| 185 | |
| 186 | /* allocate upon first client reference */ |
| 187 | if (chan->client_count == 1 && err == 0) { |
Dan Williams | aa1e6f1 | 2009-01-06 11:38:17 -0700 | [diff] [blame^] | 188 | int desc_cnt = chan->device->device_alloc_chan_resources(chan); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 189 | |
| 190 | if (desc_cnt < 0) { |
| 191 | err = desc_cnt; |
| 192 | chan->client_count = 0; |
| 193 | module_put(owner); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 194 | } else if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask)) |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 195 | balance_ref_count(chan); |
| 196 | } |
| 197 | |
| 198 | return err; |
| 199 | } |
| 200 | |
| 201 | /** |
| 202 | * dma_chan_put - drop a reference to a dma channel's parent driver module |
| 203 | * @chan - channel to release |
| 204 | * |
| 205 | * Must be called under dma_list_mutex |
| 206 | */ |
| 207 | static void dma_chan_put(struct dma_chan *chan) |
| 208 | { |
| 209 | if (!chan->client_count) |
| 210 | return; /* this channel failed alloc_chan_resources */ |
| 211 | chan->client_count--; |
| 212 | module_put(dma_chan_to_owner(chan)); |
| 213 | if (chan->client_count == 0) |
| 214 | chan->device->device_free_chan_resources(chan); |
| 215 | } |
| 216 | |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 217 | enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie) |
| 218 | { |
| 219 | enum dma_status status; |
| 220 | unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); |
| 221 | |
| 222 | dma_async_issue_pending(chan); |
| 223 | do { |
| 224 | status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); |
| 225 | if (time_after_eq(jiffies, dma_sync_wait_timeout)) { |
| 226 | printk(KERN_ERR "dma_sync_wait_timeout!\n"); |
| 227 | return DMA_ERROR; |
| 228 | } |
| 229 | } while (status == DMA_IN_PROGRESS); |
| 230 | |
| 231 | return status; |
| 232 | } |
| 233 | EXPORT_SYMBOL(dma_sync_wait); |
| 234 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 235 | /** |
Randy Dunlap | 6508871 | 2006-07-03 19:45:31 -0700 | [diff] [blame] | 236 | * dma_chan_cleanup - release a DMA channel's resources |
| 237 | * @kref: kernel reference structure that contains the DMA channel device |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 238 | */ |
| 239 | void dma_chan_cleanup(struct kref *kref) |
| 240 | { |
| 241 | struct dma_chan *chan = container_of(kref, struct dma_chan, refcount); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 242 | kref_put(&chan->device->refcount, dma_async_device_cleanup); |
| 243 | } |
David Brownell | 765e3d8 | 2007-03-16 13:38:05 -0800 | [diff] [blame] | 244 | EXPORT_SYMBOL(dma_chan_cleanup); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 245 | |
| 246 | static void dma_chan_free_rcu(struct rcu_head *rcu) |
| 247 | { |
| 248 | struct dma_chan *chan = container_of(rcu, struct dma_chan, rcu); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 249 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 250 | kref_put(&chan->refcount, dma_chan_cleanup); |
| 251 | } |
| 252 | |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 253 | static void dma_chan_release(struct dma_chan *chan) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 254 | { |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 255 | call_rcu(&chan->rcu, dma_chan_free_rcu); |
| 256 | } |
| 257 | |
| 258 | /** |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 259 | * dma_cap_mask_all - enable iteration over all operation types |
| 260 | */ |
| 261 | static dma_cap_mask_t dma_cap_mask_all; |
| 262 | |
| 263 | /** |
| 264 | * dma_chan_tbl_ent - tracks channel allocations per core/operation |
| 265 | * @chan - associated channel for this entry |
| 266 | */ |
| 267 | struct dma_chan_tbl_ent { |
| 268 | struct dma_chan *chan; |
| 269 | }; |
| 270 | |
| 271 | /** |
| 272 | * channel_table - percpu lookup table for memory-to-memory offload providers |
| 273 | */ |
| 274 | static struct dma_chan_tbl_ent *channel_table[DMA_TX_TYPE_END]; |
| 275 | |
| 276 | static int __init dma_channel_table_init(void) |
| 277 | { |
| 278 | enum dma_transaction_type cap; |
| 279 | int err = 0; |
| 280 | |
| 281 | bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END); |
| 282 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 283 | /* 'interrupt', 'private', and 'slave' are channel capabilities, |
| 284 | * but are not associated with an operation so they do not need |
| 285 | * an entry in the channel_table |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 286 | */ |
| 287 | clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 288 | clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 289 | clear_bit(DMA_SLAVE, dma_cap_mask_all.bits); |
| 290 | |
| 291 | for_each_dma_cap_mask(cap, dma_cap_mask_all) { |
| 292 | channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent); |
| 293 | if (!channel_table[cap]) { |
| 294 | err = -ENOMEM; |
| 295 | break; |
| 296 | } |
| 297 | } |
| 298 | |
| 299 | if (err) { |
| 300 | pr_err("dmaengine: initialization failure\n"); |
| 301 | for_each_dma_cap_mask(cap, dma_cap_mask_all) |
| 302 | if (channel_table[cap]) |
| 303 | free_percpu(channel_table[cap]); |
| 304 | } |
| 305 | |
| 306 | return err; |
| 307 | } |
| 308 | subsys_initcall(dma_channel_table_init); |
| 309 | |
| 310 | /** |
| 311 | * dma_find_channel - find a channel to carry out the operation |
| 312 | * @tx_type: transaction type |
| 313 | */ |
| 314 | struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type) |
| 315 | { |
| 316 | struct dma_chan *chan; |
| 317 | int cpu; |
| 318 | |
| 319 | WARN_ONCE(dmaengine_ref_count == 0, |
| 320 | "client called %s without a reference", __func__); |
| 321 | |
| 322 | cpu = get_cpu(); |
| 323 | chan = per_cpu_ptr(channel_table[tx_type], cpu)->chan; |
| 324 | put_cpu(); |
| 325 | |
| 326 | return chan; |
| 327 | } |
| 328 | EXPORT_SYMBOL(dma_find_channel); |
| 329 | |
| 330 | /** |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 331 | * dma_issue_pending_all - flush all pending operations across all channels |
| 332 | */ |
| 333 | void dma_issue_pending_all(void) |
| 334 | { |
| 335 | struct dma_device *device; |
| 336 | struct dma_chan *chan; |
| 337 | |
| 338 | WARN_ONCE(dmaengine_ref_count == 0, |
| 339 | "client called %s without a reference", __func__); |
| 340 | |
| 341 | rcu_read_lock(); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 342 | list_for_each_entry_rcu(device, &dma_device_list, global_node) { |
| 343 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 344 | continue; |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 345 | list_for_each_entry(chan, &device->channels, device_node) |
| 346 | if (chan->client_count) |
| 347 | device->device_issue_pending(chan); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 348 | } |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 349 | rcu_read_unlock(); |
| 350 | } |
| 351 | EXPORT_SYMBOL(dma_issue_pending_all); |
| 352 | |
| 353 | /** |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 354 | * nth_chan - returns the nth channel of the given capability |
| 355 | * @cap: capability to match |
| 356 | * @n: nth channel desired |
| 357 | * |
| 358 | * Defaults to returning the channel with the desired capability and the |
| 359 | * lowest reference count when 'n' cannot be satisfied. Must be called |
| 360 | * under dma_list_mutex. |
| 361 | */ |
| 362 | static struct dma_chan *nth_chan(enum dma_transaction_type cap, int n) |
| 363 | { |
| 364 | struct dma_device *device; |
| 365 | struct dma_chan *chan; |
| 366 | struct dma_chan *ret = NULL; |
| 367 | struct dma_chan *min = NULL; |
| 368 | |
| 369 | list_for_each_entry(device, &dma_device_list, global_node) { |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 370 | if (!dma_has_cap(cap, device->cap_mask) || |
| 371 | dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 372 | continue; |
| 373 | list_for_each_entry(chan, &device->channels, device_node) { |
| 374 | if (!chan->client_count) |
| 375 | continue; |
| 376 | if (!min) |
| 377 | min = chan; |
| 378 | else if (chan->table_count < min->table_count) |
| 379 | min = chan; |
| 380 | |
| 381 | if (n-- == 0) { |
| 382 | ret = chan; |
| 383 | break; /* done */ |
| 384 | } |
| 385 | } |
| 386 | if (ret) |
| 387 | break; /* done */ |
| 388 | } |
| 389 | |
| 390 | if (!ret) |
| 391 | ret = min; |
| 392 | |
| 393 | if (ret) |
| 394 | ret->table_count++; |
| 395 | |
| 396 | return ret; |
| 397 | } |
| 398 | |
| 399 | /** |
| 400 | * dma_channel_rebalance - redistribute the available channels |
| 401 | * |
| 402 | * Optimize for cpu isolation (each cpu gets a dedicated channel for an |
| 403 | * operation type) in the SMP case, and operation isolation (avoid |
| 404 | * multi-tasking channels) in the non-SMP case. Must be called under |
| 405 | * dma_list_mutex. |
| 406 | */ |
| 407 | static void dma_channel_rebalance(void) |
| 408 | { |
| 409 | struct dma_chan *chan; |
| 410 | struct dma_device *device; |
| 411 | int cpu; |
| 412 | int cap; |
| 413 | int n; |
| 414 | |
| 415 | /* undo the last distribution */ |
| 416 | for_each_dma_cap_mask(cap, dma_cap_mask_all) |
| 417 | for_each_possible_cpu(cpu) |
| 418 | per_cpu_ptr(channel_table[cap], cpu)->chan = NULL; |
| 419 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 420 | list_for_each_entry(device, &dma_device_list, global_node) { |
| 421 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 422 | continue; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 423 | list_for_each_entry(chan, &device->channels, device_node) |
| 424 | chan->table_count = 0; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 425 | } |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 426 | |
| 427 | /* don't populate the channel_table if no clients are available */ |
| 428 | if (!dmaengine_ref_count) |
| 429 | return; |
| 430 | |
| 431 | /* redistribute available channels */ |
| 432 | n = 0; |
| 433 | for_each_dma_cap_mask(cap, dma_cap_mask_all) |
| 434 | for_each_online_cpu(cpu) { |
| 435 | if (num_possible_cpus() > 1) |
| 436 | chan = nth_chan(cap, n++); |
| 437 | else |
| 438 | chan = nth_chan(cap, -1); |
| 439 | |
| 440 | per_cpu_ptr(channel_table[cap], cpu)->chan = chan; |
| 441 | } |
| 442 | } |
| 443 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 444 | static struct dma_chan *private_candidate(dma_cap_mask_t *mask, struct dma_device *dev) |
| 445 | { |
| 446 | struct dma_chan *chan; |
| 447 | struct dma_chan *ret = NULL; |
| 448 | |
| 449 | if (!__dma_device_satisfies_mask(dev, mask)) { |
| 450 | pr_debug("%s: wrong capabilities\n", __func__); |
| 451 | return NULL; |
| 452 | } |
| 453 | /* devices with multiple channels need special handling as we need to |
| 454 | * ensure that all channels are either private or public. |
| 455 | */ |
| 456 | if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask)) |
| 457 | list_for_each_entry(chan, &dev->channels, device_node) { |
| 458 | /* some channels are already publicly allocated */ |
| 459 | if (chan->client_count) |
| 460 | return NULL; |
| 461 | } |
| 462 | |
| 463 | list_for_each_entry(chan, &dev->channels, device_node) { |
| 464 | if (chan->client_count) { |
| 465 | pr_debug("%s: %s busy\n", |
| 466 | __func__, dev_name(&chan->dev)); |
| 467 | continue; |
| 468 | } |
| 469 | ret = chan; |
| 470 | break; |
| 471 | } |
| 472 | |
| 473 | return ret; |
| 474 | } |
| 475 | |
| 476 | /** |
| 477 | * dma_request_channel - try to allocate an exclusive channel |
| 478 | * @mask: capabilities that the channel must satisfy |
| 479 | * @fn: optional callback to disposition available channels |
| 480 | * @fn_param: opaque parameter to pass to dma_filter_fn |
| 481 | */ |
| 482 | struct dma_chan *__dma_request_channel(dma_cap_mask_t *mask, dma_filter_fn fn, void *fn_param) |
| 483 | { |
| 484 | struct dma_device *device, *_d; |
| 485 | struct dma_chan *chan = NULL; |
| 486 | enum dma_state_client ack; |
| 487 | int err; |
| 488 | |
| 489 | /* Find a channel */ |
| 490 | mutex_lock(&dma_list_mutex); |
| 491 | list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { |
| 492 | chan = private_candidate(mask, device); |
| 493 | if (!chan) |
| 494 | continue; |
| 495 | |
| 496 | if (fn) |
| 497 | ack = fn(chan, fn_param); |
| 498 | else |
| 499 | ack = DMA_ACK; |
| 500 | |
| 501 | if (ack == DMA_ACK) { |
| 502 | /* Found a suitable channel, try to grab, prep, and |
| 503 | * return it. We first set DMA_PRIVATE to disable |
| 504 | * balance_ref_count as this channel will not be |
| 505 | * published in the general-purpose allocator |
| 506 | */ |
| 507 | dma_cap_set(DMA_PRIVATE, device->cap_mask); |
| 508 | err = dma_chan_get(chan); |
| 509 | |
| 510 | if (err == -ENODEV) { |
| 511 | pr_debug("%s: %s module removed\n", __func__, |
| 512 | dev_name(&chan->dev)); |
| 513 | list_del_rcu(&device->global_node); |
| 514 | } else if (err) |
| 515 | pr_err("dmaengine: failed to get %s: (%d)\n", |
| 516 | dev_name(&chan->dev), err); |
| 517 | else |
| 518 | break; |
| 519 | } else if (ack == DMA_DUP) { |
| 520 | pr_debug("%s: %s filter said DMA_DUP\n", |
| 521 | __func__, dev_name(&chan->dev)); |
| 522 | } else if (ack == DMA_NAK) { |
| 523 | pr_debug("%s: %s filter said DMA_NAK\n", |
| 524 | __func__, dev_name(&chan->dev)); |
| 525 | break; |
| 526 | } else |
| 527 | WARN_ONCE(1, "filter_fn: unknown response?\n"); |
| 528 | chan = NULL; |
| 529 | } |
| 530 | mutex_unlock(&dma_list_mutex); |
| 531 | |
| 532 | pr_debug("%s: %s (%s)\n", __func__, chan ? "success" : "fail", |
| 533 | chan ? dev_name(&chan->dev) : NULL); |
| 534 | |
| 535 | return chan; |
| 536 | } |
| 537 | EXPORT_SYMBOL_GPL(__dma_request_channel); |
| 538 | |
| 539 | void dma_release_channel(struct dma_chan *chan) |
| 540 | { |
| 541 | mutex_lock(&dma_list_mutex); |
| 542 | WARN_ONCE(chan->client_count != 1, |
| 543 | "chan reference count %d != 1\n", chan->client_count); |
| 544 | dma_chan_put(chan); |
| 545 | mutex_unlock(&dma_list_mutex); |
| 546 | } |
| 547 | EXPORT_SYMBOL_GPL(dma_release_channel); |
| 548 | |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 549 | /** |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 550 | * dmaengine_get - register interest in dma_channels |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 551 | */ |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 552 | void dmaengine_get(void) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 553 | { |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 554 | struct dma_device *device, *_d; |
| 555 | struct dma_chan *chan; |
| 556 | int err; |
| 557 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 558 | mutex_lock(&dma_list_mutex); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 559 | dmaengine_ref_count++; |
| 560 | |
| 561 | /* try to grab channels */ |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 562 | list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { |
| 563 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 564 | continue; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 565 | list_for_each_entry(chan, &device->channels, device_node) { |
| 566 | err = dma_chan_get(chan); |
| 567 | if (err == -ENODEV) { |
| 568 | /* module removed before we could use it */ |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 569 | list_del_rcu(&device->global_node); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 570 | break; |
| 571 | } else if (err) |
| 572 | pr_err("dmaengine: failed to get %s: (%d)\n", |
| 573 | dev_name(&chan->dev), err); |
| 574 | } |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 575 | } |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 576 | |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 577 | /* if this is the first reference and there were channels |
| 578 | * waiting we need to rebalance to get those channels |
| 579 | * incorporated into the channel table |
| 580 | */ |
| 581 | if (dmaengine_ref_count == 1) |
| 582 | dma_channel_rebalance(); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 583 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 584 | } |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 585 | EXPORT_SYMBOL(dmaengine_get); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 586 | |
| 587 | /** |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 588 | * dmaengine_put - let dma drivers be removed when ref_count == 0 |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 589 | */ |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 590 | void dmaengine_put(void) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 591 | { |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 592 | struct dma_device *device; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 593 | struct dma_chan *chan; |
| 594 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 595 | mutex_lock(&dma_list_mutex); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 596 | dmaengine_ref_count--; |
| 597 | BUG_ON(dmaengine_ref_count < 0); |
| 598 | /* drop channel references */ |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 599 | list_for_each_entry(device, &dma_device_list, global_node) { |
| 600 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 601 | continue; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 602 | list_for_each_entry(chan, &device->channels, device_node) |
| 603 | dma_chan_put(chan); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 604 | } |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 605 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 606 | } |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 607 | EXPORT_SYMBOL(dmaengine_put); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 608 | |
| 609 | /** |
Randy Dunlap | 6508871 | 2006-07-03 19:45:31 -0700 | [diff] [blame] | 610 | * dma_async_device_register - registers DMA devices found |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 611 | * @device: &dma_device |
| 612 | */ |
| 613 | int dma_async_device_register(struct dma_device *device) |
| 614 | { |
| 615 | static int id; |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 616 | int chancnt = 0, rc; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 617 | struct dma_chan* chan; |
| 618 | |
| 619 | if (!device) |
| 620 | return -ENODEV; |
| 621 | |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 622 | /* validate device routines */ |
| 623 | BUG_ON(dma_has_cap(DMA_MEMCPY, device->cap_mask) && |
| 624 | !device->device_prep_dma_memcpy); |
| 625 | BUG_ON(dma_has_cap(DMA_XOR, device->cap_mask) && |
| 626 | !device->device_prep_dma_xor); |
| 627 | BUG_ON(dma_has_cap(DMA_ZERO_SUM, device->cap_mask) && |
| 628 | !device->device_prep_dma_zero_sum); |
| 629 | BUG_ON(dma_has_cap(DMA_MEMSET, device->cap_mask) && |
| 630 | !device->device_prep_dma_memset); |
Zhang Wei | 9b941c6 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 631 | BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) && |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 632 | !device->device_prep_dma_interrupt); |
Haavard Skinnemoen | dc0ee643 | 2008-07-08 11:59:35 -0700 | [diff] [blame] | 633 | BUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) && |
| 634 | !device->device_prep_slave_sg); |
| 635 | BUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) && |
| 636 | !device->device_terminate_all); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 637 | |
| 638 | BUG_ON(!device->device_alloc_chan_resources); |
| 639 | BUG_ON(!device->device_free_chan_resources); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 640 | BUG_ON(!device->device_is_tx_complete); |
| 641 | BUG_ON(!device->device_issue_pending); |
| 642 | BUG_ON(!device->dev); |
| 643 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 644 | init_completion(&device->done); |
| 645 | kref_init(&device->refcount); |
Dan Williams | b0b42b1 | 2008-12-03 17:17:07 -0700 | [diff] [blame] | 646 | |
| 647 | mutex_lock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 648 | device->dev_id = id++; |
Dan Williams | b0b42b1 | 2008-12-03 17:17:07 -0700 | [diff] [blame] | 649 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 650 | |
| 651 | /* represent channels in sysfs. Probably want devs too */ |
| 652 | list_for_each_entry(chan, &device->channels, device_node) { |
| 653 | chan->local = alloc_percpu(typeof(*chan->local)); |
| 654 | if (chan->local == NULL) |
| 655 | continue; |
| 656 | |
| 657 | chan->chan_id = chancnt++; |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 658 | chan->dev.class = &dma_devclass; |
Haavard Skinnemoen | 1099dc7 | 2008-07-08 11:58:05 -0700 | [diff] [blame] | 659 | chan->dev.parent = device->dev; |
Kay Sievers | 06190d8 | 2008-11-11 13:12:33 -0700 | [diff] [blame] | 660 | dev_set_name(&chan->dev, "dma%dchan%d", |
| 661 | device->dev_id, chan->chan_id); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 662 | |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 663 | rc = device_register(&chan->dev); |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 664 | if (rc) { |
| 665 | chancnt--; |
| 666 | free_percpu(chan->local); |
| 667 | chan->local = NULL; |
| 668 | goto err_out; |
| 669 | } |
| 670 | |
Haavard Skinnemoen | 348badf | 2007-11-14 16:59:27 -0800 | [diff] [blame] | 671 | /* One for the channel, one of the class device */ |
| 672 | kref_get(&device->refcount); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 673 | kref_get(&device->refcount); |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 674 | kref_init(&chan->refcount); |
Dan Williams | 7cc5bf9 | 2008-07-08 11:58:21 -0700 | [diff] [blame] | 675 | chan->client_count = 0; |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 676 | chan->slow_ref = 0; |
| 677 | INIT_RCU_HEAD(&chan->rcu); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 678 | } |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 679 | device->chancnt = chancnt; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 680 | |
| 681 | mutex_lock(&dma_list_mutex); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 682 | /* take references on public channels */ |
| 683 | if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 684 | list_for_each_entry(chan, &device->channels, device_node) { |
| 685 | /* if clients are already waiting for channels we need |
| 686 | * to take references on their behalf |
| 687 | */ |
| 688 | if (dma_chan_get(chan) == -ENODEV) { |
| 689 | /* note we can only get here for the first |
| 690 | * channel as the remaining channels are |
| 691 | * guaranteed to get a reference |
| 692 | */ |
| 693 | rc = -ENODEV; |
| 694 | mutex_unlock(&dma_list_mutex); |
| 695 | goto err_out; |
| 696 | } |
| 697 | } |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 698 | list_add_tail_rcu(&device->global_node, &dma_device_list); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 699 | dma_channel_rebalance(); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 700 | mutex_unlock(&dma_list_mutex); |
| 701 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 702 | return 0; |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 703 | |
| 704 | err_out: |
| 705 | list_for_each_entry(chan, &device->channels, device_node) { |
| 706 | if (chan->local == NULL) |
| 707 | continue; |
| 708 | kref_put(&device->refcount, dma_async_device_cleanup); |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 709 | device_unregister(&chan->dev); |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 710 | chancnt--; |
| 711 | free_percpu(chan->local); |
| 712 | } |
| 713 | return rc; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 714 | } |
David Brownell | 765e3d8 | 2007-03-16 13:38:05 -0800 | [diff] [blame] | 715 | EXPORT_SYMBOL(dma_async_device_register); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 716 | |
| 717 | /** |
Randy Dunlap | 6508871 | 2006-07-03 19:45:31 -0700 | [diff] [blame] | 718 | * dma_async_device_cleanup - function called when all references are released |
| 719 | * @kref: kernel reference object |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 720 | */ |
| 721 | static void dma_async_device_cleanup(struct kref *kref) |
| 722 | { |
| 723 | struct dma_device *device; |
| 724 | |
| 725 | device = container_of(kref, struct dma_device, refcount); |
| 726 | complete(&device->done); |
| 727 | } |
| 728 | |
Randy Dunlap | 6508871 | 2006-07-03 19:45:31 -0700 | [diff] [blame] | 729 | /** |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 730 | * dma_async_device_unregister - unregister a DMA device |
Randy Dunlap | 6508871 | 2006-07-03 19:45:31 -0700 | [diff] [blame] | 731 | * @device: &dma_device |
| 732 | */ |
| 733 | void dma_async_device_unregister(struct dma_device *device) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 734 | { |
| 735 | struct dma_chan *chan; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 736 | |
| 737 | mutex_lock(&dma_list_mutex); |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 738 | list_del_rcu(&device->global_node); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 739 | dma_channel_rebalance(); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 740 | mutex_unlock(&dma_list_mutex); |
| 741 | |
| 742 | list_for_each_entry(chan, &device->channels, device_node) { |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 743 | WARN_ONCE(chan->client_count, |
| 744 | "%s called while %d clients hold a reference\n", |
| 745 | __func__, chan->client_count); |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 746 | device_unregister(&chan->dev); |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 747 | dma_chan_release(chan); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 748 | } |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 749 | |
| 750 | kref_put(&device->refcount, dma_async_device_cleanup); |
| 751 | wait_for_completion(&device->done); |
| 752 | } |
David Brownell | 765e3d8 | 2007-03-16 13:38:05 -0800 | [diff] [blame] | 753 | EXPORT_SYMBOL(dma_async_device_unregister); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 754 | |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 755 | /** |
| 756 | * dma_async_memcpy_buf_to_buf - offloaded copy between virtual addresses |
| 757 | * @chan: DMA channel to offload copy to |
| 758 | * @dest: destination address (virtual) |
| 759 | * @src: source address (virtual) |
| 760 | * @len: length |
| 761 | * |
| 762 | * Both @dest and @src must be mappable to a bus address according to the |
| 763 | * DMA mapping API rules for streaming mappings. |
| 764 | * Both @dest and @src must stay memory resident (kernel memory or locked |
| 765 | * user space pages). |
| 766 | */ |
| 767 | dma_cookie_t |
| 768 | dma_async_memcpy_buf_to_buf(struct dma_chan *chan, void *dest, |
| 769 | void *src, size_t len) |
| 770 | { |
| 771 | struct dma_device *dev = chan->device; |
| 772 | struct dma_async_tx_descriptor *tx; |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 773 | dma_addr_t dma_dest, dma_src; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 774 | dma_cookie_t cookie; |
| 775 | int cpu; |
| 776 | |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 777 | dma_src = dma_map_single(dev->dev, src, len, DMA_TO_DEVICE); |
| 778 | dma_dest = dma_map_single(dev->dev, dest, len, DMA_FROM_DEVICE); |
Dan Williams | 636bdea | 2008-04-17 20:17:26 -0700 | [diff] [blame] | 779 | tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len, |
| 780 | DMA_CTRL_ACK); |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 781 | |
| 782 | if (!tx) { |
| 783 | dma_unmap_single(dev->dev, dma_src, len, DMA_TO_DEVICE); |
| 784 | dma_unmap_single(dev->dev, dma_dest, len, DMA_FROM_DEVICE); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 785 | return -ENOMEM; |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 786 | } |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 787 | |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 788 | tx->callback = NULL; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 789 | cookie = tx->tx_submit(tx); |
| 790 | |
| 791 | cpu = get_cpu(); |
| 792 | per_cpu_ptr(chan->local, cpu)->bytes_transferred += len; |
| 793 | per_cpu_ptr(chan->local, cpu)->memcpy_count++; |
| 794 | put_cpu(); |
| 795 | |
| 796 | return cookie; |
| 797 | } |
| 798 | EXPORT_SYMBOL(dma_async_memcpy_buf_to_buf); |
| 799 | |
| 800 | /** |
| 801 | * dma_async_memcpy_buf_to_pg - offloaded copy from address to page |
| 802 | * @chan: DMA channel to offload copy to |
| 803 | * @page: destination page |
| 804 | * @offset: offset in page to copy to |
| 805 | * @kdata: source address (virtual) |
| 806 | * @len: length |
| 807 | * |
| 808 | * Both @page/@offset and @kdata must be mappable to a bus address according |
| 809 | * to the DMA mapping API rules for streaming mappings. |
| 810 | * Both @page/@offset and @kdata must stay memory resident (kernel memory or |
| 811 | * locked user space pages) |
| 812 | */ |
| 813 | dma_cookie_t |
| 814 | dma_async_memcpy_buf_to_pg(struct dma_chan *chan, struct page *page, |
| 815 | unsigned int offset, void *kdata, size_t len) |
| 816 | { |
| 817 | struct dma_device *dev = chan->device; |
| 818 | struct dma_async_tx_descriptor *tx; |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 819 | dma_addr_t dma_dest, dma_src; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 820 | dma_cookie_t cookie; |
| 821 | int cpu; |
| 822 | |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 823 | dma_src = dma_map_single(dev->dev, kdata, len, DMA_TO_DEVICE); |
| 824 | dma_dest = dma_map_page(dev->dev, page, offset, len, DMA_FROM_DEVICE); |
Dan Williams | 636bdea | 2008-04-17 20:17:26 -0700 | [diff] [blame] | 825 | tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len, |
| 826 | DMA_CTRL_ACK); |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 827 | |
| 828 | if (!tx) { |
| 829 | dma_unmap_single(dev->dev, dma_src, len, DMA_TO_DEVICE); |
| 830 | dma_unmap_page(dev->dev, dma_dest, len, DMA_FROM_DEVICE); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 831 | return -ENOMEM; |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 832 | } |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 833 | |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 834 | tx->callback = NULL; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 835 | cookie = tx->tx_submit(tx); |
| 836 | |
| 837 | cpu = get_cpu(); |
| 838 | per_cpu_ptr(chan->local, cpu)->bytes_transferred += len; |
| 839 | per_cpu_ptr(chan->local, cpu)->memcpy_count++; |
| 840 | put_cpu(); |
| 841 | |
| 842 | return cookie; |
| 843 | } |
| 844 | EXPORT_SYMBOL(dma_async_memcpy_buf_to_pg); |
| 845 | |
| 846 | /** |
| 847 | * dma_async_memcpy_pg_to_pg - offloaded copy from page to page |
| 848 | * @chan: DMA channel to offload copy to |
| 849 | * @dest_pg: destination page |
| 850 | * @dest_off: offset in page to copy to |
| 851 | * @src_pg: source page |
| 852 | * @src_off: offset in page to copy from |
| 853 | * @len: length |
| 854 | * |
| 855 | * Both @dest_page/@dest_off and @src_page/@src_off must be mappable to a bus |
| 856 | * address according to the DMA mapping API rules for streaming mappings. |
| 857 | * Both @dest_page/@dest_off and @src_page/@src_off must stay memory resident |
| 858 | * (kernel memory or locked user space pages). |
| 859 | */ |
| 860 | dma_cookie_t |
| 861 | dma_async_memcpy_pg_to_pg(struct dma_chan *chan, struct page *dest_pg, |
| 862 | unsigned int dest_off, struct page *src_pg, unsigned int src_off, |
| 863 | size_t len) |
| 864 | { |
| 865 | struct dma_device *dev = chan->device; |
| 866 | struct dma_async_tx_descriptor *tx; |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 867 | dma_addr_t dma_dest, dma_src; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 868 | dma_cookie_t cookie; |
| 869 | int cpu; |
| 870 | |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 871 | dma_src = dma_map_page(dev->dev, src_pg, src_off, len, DMA_TO_DEVICE); |
| 872 | dma_dest = dma_map_page(dev->dev, dest_pg, dest_off, len, |
| 873 | DMA_FROM_DEVICE); |
Dan Williams | 636bdea | 2008-04-17 20:17:26 -0700 | [diff] [blame] | 874 | tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len, |
| 875 | DMA_CTRL_ACK); |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 876 | |
| 877 | if (!tx) { |
| 878 | dma_unmap_page(dev->dev, dma_src, len, DMA_TO_DEVICE); |
| 879 | dma_unmap_page(dev->dev, dma_dest, len, DMA_FROM_DEVICE); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 880 | return -ENOMEM; |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 881 | } |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 882 | |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 883 | tx->callback = NULL; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 884 | cookie = tx->tx_submit(tx); |
| 885 | |
| 886 | cpu = get_cpu(); |
| 887 | per_cpu_ptr(chan->local, cpu)->bytes_transferred += len; |
| 888 | per_cpu_ptr(chan->local, cpu)->memcpy_count++; |
| 889 | put_cpu(); |
| 890 | |
| 891 | return cookie; |
| 892 | } |
| 893 | EXPORT_SYMBOL(dma_async_memcpy_pg_to_pg); |
| 894 | |
| 895 | void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx, |
| 896 | struct dma_chan *chan) |
| 897 | { |
| 898 | tx->chan = chan; |
| 899 | spin_lock_init(&tx->lock); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 900 | } |
| 901 | EXPORT_SYMBOL(dma_async_tx_descriptor_init); |
| 902 | |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 903 | /* dma_wait_for_async_tx - spin wait for a transaction to complete |
| 904 | * @tx: in-flight transaction to wait on |
| 905 | * |
| 906 | * This routine assumes that tx was obtained from a call to async_memcpy, |
| 907 | * async_xor, async_memset, etc which ensures that tx is "in-flight" (prepped |
| 908 | * and submitted). Walking the parent chain is only meant to cover for DMA |
| 909 | * drivers that do not implement the DMA_INTERRUPT capability and may race with |
| 910 | * the driver's descriptor cleanup routine. |
| 911 | */ |
| 912 | enum dma_status |
| 913 | dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx) |
| 914 | { |
| 915 | enum dma_status status; |
| 916 | struct dma_async_tx_descriptor *iter; |
| 917 | struct dma_async_tx_descriptor *parent; |
| 918 | |
| 919 | if (!tx) |
| 920 | return DMA_SUCCESS; |
| 921 | |
| 922 | WARN_ONCE(tx->parent, "%s: speculatively walking dependency chain for" |
| 923 | " %s\n", __func__, dev_name(&tx->chan->dev)); |
| 924 | |
| 925 | /* poll through the dependency chain, return when tx is complete */ |
| 926 | do { |
| 927 | iter = tx; |
| 928 | |
| 929 | /* find the root of the unsubmitted dependency chain */ |
| 930 | do { |
| 931 | parent = iter->parent; |
| 932 | if (!parent) |
| 933 | break; |
| 934 | else |
| 935 | iter = parent; |
| 936 | } while (parent); |
| 937 | |
| 938 | /* there is a small window for ->parent == NULL and |
| 939 | * ->cookie == -EBUSY |
| 940 | */ |
| 941 | while (iter->cookie == -EBUSY) |
| 942 | cpu_relax(); |
| 943 | |
| 944 | status = dma_sync_wait(iter->chan, iter->cookie); |
| 945 | } while (status == DMA_IN_PROGRESS || (iter != tx)); |
| 946 | |
| 947 | return status; |
| 948 | } |
| 949 | EXPORT_SYMBOL_GPL(dma_wait_for_async_tx); |
| 950 | |
| 951 | /* dma_run_dependencies - helper routine for dma drivers to process |
| 952 | * (start) dependent operations on their target channel |
| 953 | * @tx: transaction with dependencies |
| 954 | */ |
| 955 | void dma_run_dependencies(struct dma_async_tx_descriptor *tx) |
| 956 | { |
| 957 | struct dma_async_tx_descriptor *dep = tx->next; |
| 958 | struct dma_async_tx_descriptor *dep_next; |
| 959 | struct dma_chan *chan; |
| 960 | |
| 961 | if (!dep) |
| 962 | return; |
| 963 | |
| 964 | chan = dep->chan; |
| 965 | |
| 966 | /* keep submitting up until a channel switch is detected |
| 967 | * in that case we will be called again as a result of |
| 968 | * processing the interrupt from async_tx_channel_switch |
| 969 | */ |
| 970 | for (; dep; dep = dep_next) { |
| 971 | spin_lock_bh(&dep->lock); |
| 972 | dep->parent = NULL; |
| 973 | dep_next = dep->next; |
| 974 | if (dep_next && dep_next->chan == chan) |
| 975 | dep->next = NULL; /* ->next will be submitted */ |
| 976 | else |
| 977 | dep_next = NULL; /* submit current dep and terminate */ |
| 978 | spin_unlock_bh(&dep->lock); |
| 979 | |
| 980 | dep->tx_submit(dep); |
| 981 | } |
| 982 | |
| 983 | chan->device->device_issue_pending(chan); |
| 984 | } |
| 985 | EXPORT_SYMBOL_GPL(dma_run_dependencies); |
| 986 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 987 | static int __init dma_bus_init(void) |
| 988 | { |
| 989 | mutex_init(&dma_list_mutex); |
| 990 | return class_register(&dma_devclass); |
| 991 | } |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 992 | subsys_initcall(dma_bus_init); |
| 993 | |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 994 | |