blob: 3272608ced83d0321e29a05dca9c003d2029aba9 [file] [log] [blame]
Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
Zhu Yib481de92007-09-25 17:54:57 -070030#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
Zhu Yib481de92007-09-25 17:54:57 -070041#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
44#include <net/ieee80211_radiotap.h>
45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
Zhu Yib481de92007-09-25 17:54:57 -070049#include "iwl-3945.h"
50#include "iwl-helpers.h"
51
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080052#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080053u32 iwl3945_debug_level;
Zhu Yib481de92007-09-25 17:54:57 -070054#endif
55
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080056static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
57 struct iwl3945_tx_queue *txq);
Christoph Hellwig416e1432007-10-25 17:15:49 +080058
Zhu Yib481de92007-09-25 17:54:57 -070059/******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
65/* module parameters */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080066static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
67static int iwl3945_param_debug; /* def: 0 = minimal debug log messages */
68static int iwl3945_param_disable; /* def: 0 = enable radio */
Ben Cahill9fbab512007-11-29 11:09:47 +080069static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080070int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
71static int iwl3945_param_qos_enable = 1; /* def: 1 = use quality of service */
72int iwl3945_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 8 Tx queues */
Zhu Yib481de92007-09-25 17:54:57 -070073
74/*
75 * module name, copyright, version, etc.
76 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
77 */
78
79#define DRV_DESCRIPTION \
80"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
81
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080082#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -070083#define VD "d"
84#else
85#define VD
86#endif
87
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080088#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -070089#define VS "s"
90#else
91#define VS
92#endif
93
Zhu Yi80f3e022007-10-25 17:15:48 +080094#define IWLWIFI_VERSION "1.1.19k" VD VS
Zhu Yib481de92007-09-25 17:54:57 -070095#define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
96#define DRV_VERSION IWLWIFI_VERSION
97
98/* Change firmware file name, using "-" and incrementing number,
99 * *only* when uCode interface or architecture changes so that it
100 * is not compatible with earlier drivers.
101 * This number will also appear in << 8 position of 1st dword of uCode file */
102#define IWL3945_UCODE_API "-1"
103
104MODULE_DESCRIPTION(DRV_DESCRIPTION);
105MODULE_VERSION(DRV_VERSION);
106MODULE_AUTHOR(DRV_COPYRIGHT);
107MODULE_LICENSE("GPL");
108
Christoph Hellwig416e1432007-10-25 17:15:49 +0800109static __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
Zhu Yib481de92007-09-25 17:54:57 -0700110{
111 u16 fc = le16_to_cpu(hdr->frame_control);
112 int hdr_len = ieee80211_get_hdrlen(fc);
113
114 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
115 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
116 return NULL;
117}
118
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800119static const struct ieee80211_hw_mode *iwl3945_get_hw_mode(
120 struct iwl3945_priv *priv, int mode)
Zhu Yib481de92007-09-25 17:54:57 -0700121{
122 int i;
123
124 for (i = 0; i < 3; i++)
125 if (priv->modes[i].mode == mode)
126 return &priv->modes[i];
127
128 return NULL;
129}
130
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800131static int iwl3945_is_empty_essid(const char *essid, int essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700132{
133 /* Single white space is for Linksys APs */
134 if (essid_len == 1 && essid[0] == ' ')
135 return 1;
136
137 /* Otherwise, if the entire essid is 0, we assume it is hidden */
138 while (essid_len) {
139 essid_len--;
140 if (essid[essid_len] != '\0')
141 return 0;
142 }
143
144 return 1;
145}
146
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800147static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700148{
149 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
150 const char *s = essid;
151 char *d = escaped;
152
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800153 if (iwl3945_is_empty_essid(essid, essid_len)) {
Zhu Yib481de92007-09-25 17:54:57 -0700154 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
155 return escaped;
156 }
157
158 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
159 while (essid_len--) {
160 if (*s == '\0') {
161 *d++ = '\\';
162 *d++ = '0';
163 s++;
164 } else
165 *d++ = *s++;
166 }
167 *d = '\0';
168 return escaped;
169}
170
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800171static void iwl3945_print_hex_dump(int level, void *p, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -0700172{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +0800173#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800174 if (!(iwl3945_debug_level & level))
Zhu Yib481de92007-09-25 17:54:57 -0700175 return;
176
177 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
178 p, len, 1);
179#endif
180}
181
182/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
183 * DMA services
184 *
185 * Theory of operation
186 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800187 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
188 * of buffer descriptors, each of which points to one or more data buffers for
189 * the device to read from or fill. Driver and device exchange status of each
190 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
191 * entries in each circular buffer, to protect against confusing empty and full
192 * queue states.
193 *
194 * The device reads or writes the data in the queues via the device's several
195 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
Zhu Yib481de92007-09-25 17:54:57 -0700196 *
197 * For Tx queue, there are low mark and high mark limits. If, after queuing
198 * the packet for Tx, free space become < low mark, Tx queue stopped. When
199 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
200 * Tx queue resumed.
201 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800202 * The 3945 operates with six queues: One receive queue, one transmit queue
203 * (#4) for sending commands to the device firmware, and four transmit queues
204 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
Zhu Yib481de92007-09-25 17:54:57 -0700205 ***************************************************/
206
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800207static int iwl3945_queue_space(const struct iwl3945_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -0700208{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800209 int s = q->read_ptr - q->write_ptr;
Zhu Yib481de92007-09-25 17:54:57 -0700210
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800211 if (q->read_ptr > q->write_ptr)
Zhu Yib481de92007-09-25 17:54:57 -0700212 s -= q->n_bd;
213
214 if (s <= 0)
215 s += q->n_window;
216 /* keep some reserve to not confuse empty and full situations */
217 s -= 2;
218 if (s < 0)
219 s = 0;
220 return s;
221}
222
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800223/**
224 * iwl3945_queue_inc_wrap - increment queue index, wrap back to beginning
225 * @index -- current index
226 * @n_bd -- total number of entries in queue (must be power of 2)
227 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800228static inline int iwl3945_queue_inc_wrap(int index, int n_bd)
Zhu Yib481de92007-09-25 17:54:57 -0700229{
230 return ++index & (n_bd - 1);
231}
232
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800233/**
234 * iwl3945_queue_dec_wrap - increment queue index, wrap back to end
235 * @index -- current index
236 * @n_bd -- total number of entries in queue (must be power of 2)
237 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800238static inline int iwl3945_queue_dec_wrap(int index, int n_bd)
Zhu Yib481de92007-09-25 17:54:57 -0700239{
240 return --index & (n_bd - 1);
241}
242
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800243static inline int x2_queue_used(const struct iwl3945_queue *q, int i)
Zhu Yib481de92007-09-25 17:54:57 -0700244{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800245 return q->write_ptr > q->read_ptr ?
246 (i >= q->read_ptr && i < q->write_ptr) :
247 !(i < q->read_ptr && i >= q->write_ptr);
Zhu Yib481de92007-09-25 17:54:57 -0700248}
249
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800250static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
Zhu Yib481de92007-09-25 17:54:57 -0700251{
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800252 /* This is for scan command, the big buffer at end of command array */
Zhu Yib481de92007-09-25 17:54:57 -0700253 if (is_huge)
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800254 return q->n_window; /* must be power of 2 */
Zhu Yib481de92007-09-25 17:54:57 -0700255
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800256 /* Otherwise, use normal size buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700257 return index & (q->n_window - 1);
258}
259
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800260/**
261 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
262 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800263static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
Zhu Yib481de92007-09-25 17:54:57 -0700264 int count, int slots_num, u32 id)
265{
266 q->n_bd = count;
267 q->n_window = slots_num;
268 q->id = id;
269
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800270 /* count must be power-of-two size, otherwise iwl3945_queue_inc_wrap
271 * and iwl3945_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700272 BUG_ON(!is_power_of_2(count));
273
274 /* slots_num must be power-of-two size, otherwise
275 * get_cmd_index is broken. */
276 BUG_ON(!is_power_of_2(slots_num));
277
278 q->low_mark = q->n_window / 4;
279 if (q->low_mark < 4)
280 q->low_mark = 4;
281
282 q->high_mark = q->n_window / 8;
283 if (q->high_mark < 2)
284 q->high_mark = 2;
285
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800286 q->write_ptr = q->read_ptr = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700287
288 return 0;
289}
290
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800291/**
292 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
293 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800294static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
295 struct iwl3945_tx_queue *txq, u32 id)
Zhu Yib481de92007-09-25 17:54:57 -0700296{
297 struct pci_dev *dev = priv->pci_dev;
298
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800299 /* Driver private data, only for Tx (not command) queues,
300 * not shared with device. */
Zhu Yib481de92007-09-25 17:54:57 -0700301 if (id != IWL_CMD_QUEUE_NUM) {
302 txq->txb = kmalloc(sizeof(txq->txb[0]) *
303 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
304 if (!txq->txb) {
Ian Schram01ebd062007-10-25 17:15:22 +0800305 IWL_ERROR("kmalloc for auxiliary BD "
Zhu Yib481de92007-09-25 17:54:57 -0700306 "structures failed\n");
307 goto error;
308 }
309 } else
310 txq->txb = NULL;
311
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800312 /* Circular buffer of transmit frame descriptors (TFDs),
313 * shared with device */
Zhu Yib481de92007-09-25 17:54:57 -0700314 txq->bd = pci_alloc_consistent(dev,
315 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
316 &txq->q.dma_addr);
317
318 if (!txq->bd) {
319 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
320 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
321 goto error;
322 }
323 txq->q.id = id;
324
325 return 0;
326
327 error:
328 if (txq->txb) {
329 kfree(txq->txb);
330 txq->txb = NULL;
331 }
332
333 return -ENOMEM;
334}
335
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800336/**
337 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
338 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800339int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
340 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
Zhu Yib481de92007-09-25 17:54:57 -0700341{
342 struct pci_dev *dev = priv->pci_dev;
343 int len;
344 int rc = 0;
345
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800346 /*
347 * Alloc buffer array for commands (Tx or other types of commands).
348 * For the command queue (#4), allocate command space + one big
349 * command for scan, since scan command is very huge; the system will
350 * not have two scans at the same time, so only one is needed.
351 * For data Tx queues (all other queues), no super-size command
352 * space is needed.
353 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800354 len = sizeof(struct iwl3945_cmd) * slots_num;
Zhu Yib481de92007-09-25 17:54:57 -0700355 if (txq_id == IWL_CMD_QUEUE_NUM)
356 len += IWL_MAX_SCAN_SIZE;
357 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
358 if (!txq->cmd)
359 return -ENOMEM;
360
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800361 /* Alloc driver data array and TFD circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800362 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700363 if (rc) {
364 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
365
366 return -ENOMEM;
367 }
368 txq->need_update = 0;
369
370 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800371 * iwl3945_queue_inc_wrap and iwl3945_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700372 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800373
374 /* Initialize queue high/low-water, head/tail indexes */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800375 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700376
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800377 /* Tell device where to find queue, enable DMA channel. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800378 iwl3945_hw_tx_queue_init(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700379
380 return 0;
381}
382
383/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800384 * iwl3945_tx_queue_free - Deallocate DMA queue.
Zhu Yib481de92007-09-25 17:54:57 -0700385 * @txq: Transmit queue to deallocate.
386 *
387 * Empty queue by removing and destroying all BD's.
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800388 * Free all buffers.
389 * 0-fill, but do not free "txq" descriptor structure.
Zhu Yib481de92007-09-25 17:54:57 -0700390 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800391void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -0700392{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800393 struct iwl3945_queue *q = &txq->q;
Zhu Yib481de92007-09-25 17:54:57 -0700394 struct pci_dev *dev = priv->pci_dev;
395 int len;
396
397 if (q->n_bd == 0)
398 return;
399
400 /* first, empty all BD's */
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800401 for (; q->write_ptr != q->read_ptr;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800402 q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd))
403 iwl3945_hw_txq_free_tfd(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700404
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800405 len = sizeof(struct iwl3945_cmd) * q->n_window;
Zhu Yib481de92007-09-25 17:54:57 -0700406 if (q->id == IWL_CMD_QUEUE_NUM)
407 len += IWL_MAX_SCAN_SIZE;
408
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800409 /* De-alloc array of command/tx buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700410 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
411
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800412 /* De-alloc circular buffer of TFDs */
Zhu Yib481de92007-09-25 17:54:57 -0700413 if (txq->q.n_bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800414 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
Zhu Yib481de92007-09-25 17:54:57 -0700415 txq->q.n_bd, txq->bd, txq->q.dma_addr);
416
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800417 /* De-alloc array of per-TFD driver data */
Zhu Yib481de92007-09-25 17:54:57 -0700418 if (txq->txb) {
419 kfree(txq->txb);
420 txq->txb = NULL;
421 }
422
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800423 /* 0-fill queue descriptor structure */
Zhu Yib481de92007-09-25 17:54:57 -0700424 memset(txq, 0, sizeof(*txq));
425}
426
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800427const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
Zhu Yib481de92007-09-25 17:54:57 -0700428
429/*************** STATION TABLE MANAGEMENT ****
Ben Cahill9fbab512007-11-29 11:09:47 +0800430 * mac80211 should be examined to determine if sta_info is duplicating
Zhu Yib481de92007-09-25 17:54:57 -0700431 * the functionality provided here
432 */
433
434/**************************************************************/
Ian Schram01ebd062007-10-25 17:15:22 +0800435#if 0 /* temporary disable till we add real remove station */
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800436/**
437 * iwl3945_remove_station - Remove driver's knowledge of station.
438 *
439 * NOTE: This does not remove station from device's station table.
440 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800441static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
Zhu Yib481de92007-09-25 17:54:57 -0700442{
443 int index = IWL_INVALID_STATION;
444 int i;
445 unsigned long flags;
446
447 spin_lock_irqsave(&priv->sta_lock, flags);
448
449 if (is_ap)
450 index = IWL_AP_ID;
451 else if (is_broadcast_ether_addr(addr))
452 index = priv->hw_setting.bcast_sta_id;
453 else
454 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
455 if (priv->stations[i].used &&
456 !compare_ether_addr(priv->stations[i].sta.sta.addr,
457 addr)) {
458 index = i;
459 break;
460 }
461
462 if (unlikely(index == IWL_INVALID_STATION))
463 goto out;
464
465 if (priv->stations[index].used) {
466 priv->stations[index].used = 0;
467 priv->num_stations--;
468 }
469
470 BUG_ON(priv->num_stations < 0);
471
472out:
473 spin_unlock_irqrestore(&priv->sta_lock, flags);
474 return 0;
475}
Zhu Yi556f8db2007-09-27 11:27:33 +0800476#endif
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800477
478/**
479 * iwl3945_clear_stations_table - Clear the driver's station table
480 *
481 * NOTE: This does not clear or otherwise alter the device's station table.
482 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800483static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700484{
485 unsigned long flags;
486
487 spin_lock_irqsave(&priv->sta_lock, flags);
488
489 priv->num_stations = 0;
490 memset(priv->stations, 0, sizeof(priv->stations));
491
492 spin_unlock_irqrestore(&priv->sta_lock, flags);
493}
494
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800495/**
496 * iwl3945_add_station - Add station to station tables in driver and device
497 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800498u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -0700499{
500 int i;
501 int index = IWL_INVALID_STATION;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800502 struct iwl3945_station_entry *station;
Zhu Yib481de92007-09-25 17:54:57 -0700503 unsigned long flags_spin;
Joe Perches0795af52007-10-03 17:59:30 -0700504 DECLARE_MAC_BUF(mac);
Zhu Yic14c5212007-09-27 11:27:35 +0800505 u8 rate;
Zhu Yib481de92007-09-25 17:54:57 -0700506
507 spin_lock_irqsave(&priv->sta_lock, flags_spin);
508 if (is_ap)
509 index = IWL_AP_ID;
510 else if (is_broadcast_ether_addr(addr))
511 index = priv->hw_setting.bcast_sta_id;
512 else
513 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
514 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
515 addr)) {
516 index = i;
517 break;
518 }
519
520 if (!priv->stations[i].used &&
521 index == IWL_INVALID_STATION)
522 index = i;
523 }
524
Ian Schram01ebd062007-10-25 17:15:22 +0800525 /* These two conditions has the same outcome but keep them separate
Zhu Yib481de92007-09-25 17:54:57 -0700526 since they have different meaning */
527 if (unlikely(index == IWL_INVALID_STATION)) {
528 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
529 return index;
530 }
531
532 if (priv->stations[index].used &&
533 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
534 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
535 return index;
536 }
537
Joe Perches0795af52007-10-03 17:59:30 -0700538 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -0700539 station = &priv->stations[index];
540 station->used = 1;
541 priv->num_stations++;
542
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800543 /* Set up the REPLY_ADD_STA command to send to device */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800544 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
Zhu Yib481de92007-09-25 17:54:57 -0700545 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
546 station->sta.mode = 0;
547 station->sta.sta.sta_id = index;
548 station->sta.station_flags = 0;
549
Tomas Winkler69946332007-10-25 17:15:27 +0800550 if (priv->phymode == MODE_IEEE80211A)
551 rate = IWL_RATE_6M_PLCP;
552 else
553 rate = IWL_RATE_1M_PLCP;
Zhu Yic14c5212007-09-27 11:27:35 +0800554
555 /* Turn on both antennas for the station... */
556 station->sta.rate_n_flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800557 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
Zhu Yic14c5212007-09-27 11:27:35 +0800558 station->current_rate.rate_n_flags =
559 le16_to_cpu(station->sta.rate_n_flags);
560
Zhu Yib481de92007-09-25 17:54:57 -0700561 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800562
563 /* Add station to device's station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800564 iwl3945_send_add_station(priv, &station->sta, flags);
Zhu Yib481de92007-09-25 17:54:57 -0700565 return index;
566
567}
568
569/*************** DRIVER STATUS FUNCTIONS *****/
570
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800571static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700572{
573 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
574 * set but EXIT_PENDING is not */
575 return test_bit(STATUS_READY, &priv->status) &&
576 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
577 !test_bit(STATUS_EXIT_PENDING, &priv->status);
578}
579
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800580static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700581{
582 return test_bit(STATUS_ALIVE, &priv->status);
583}
584
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800585static inline int iwl3945_is_init(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700586{
587 return test_bit(STATUS_INIT, &priv->status);
588}
589
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800590static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700591{
592 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
593 test_bit(STATUS_RF_KILL_SW, &priv->status);
594}
595
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800596static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700597{
598
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800599 if (iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -0700600 return 0;
601
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800602 return iwl3945_is_ready(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700603}
604
605/*************** HOST COMMAND QUEUE FUNCTIONS *****/
606
607#define IWL_CMD(x) case x : return #x
608
609static const char *get_cmd_string(u8 cmd)
610{
611 switch (cmd) {
612 IWL_CMD(REPLY_ALIVE);
613 IWL_CMD(REPLY_ERROR);
614 IWL_CMD(REPLY_RXON);
615 IWL_CMD(REPLY_RXON_ASSOC);
616 IWL_CMD(REPLY_QOS_PARAM);
617 IWL_CMD(REPLY_RXON_TIMING);
618 IWL_CMD(REPLY_ADD_STA);
619 IWL_CMD(REPLY_REMOVE_STA);
620 IWL_CMD(REPLY_REMOVE_ALL_STA);
621 IWL_CMD(REPLY_3945_RX);
622 IWL_CMD(REPLY_TX);
623 IWL_CMD(REPLY_RATE_SCALE);
624 IWL_CMD(REPLY_LEDS_CMD);
625 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
626 IWL_CMD(RADAR_NOTIFICATION);
627 IWL_CMD(REPLY_QUIET_CMD);
628 IWL_CMD(REPLY_CHANNEL_SWITCH);
629 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
630 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
631 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
632 IWL_CMD(POWER_TABLE_CMD);
633 IWL_CMD(PM_SLEEP_NOTIFICATION);
634 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
635 IWL_CMD(REPLY_SCAN_CMD);
636 IWL_CMD(REPLY_SCAN_ABORT_CMD);
637 IWL_CMD(SCAN_START_NOTIFICATION);
638 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
639 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
640 IWL_CMD(BEACON_NOTIFICATION);
641 IWL_CMD(REPLY_TX_BEACON);
642 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
643 IWL_CMD(QUIET_NOTIFICATION);
644 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
645 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
646 IWL_CMD(REPLY_BT_CONFIG);
647 IWL_CMD(REPLY_STATISTICS_CMD);
648 IWL_CMD(STATISTICS_NOTIFICATION);
649 IWL_CMD(REPLY_CARD_STATE_CMD);
650 IWL_CMD(CARD_STATE_NOTIFICATION);
651 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
652 default:
653 return "UNKNOWN";
654
655 }
656}
657
658#define HOST_COMPLETE_TIMEOUT (HZ / 2)
659
660/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800661 * iwl3945_enqueue_hcmd - enqueue a uCode command
Zhu Yib481de92007-09-25 17:54:57 -0700662 * @priv: device private data point
663 * @cmd: a point to the ucode command structure
664 *
665 * The function returns < 0 values to indicate the operation is
666 * failed. On success, it turns the index (> 0) of command in the
667 * command queue.
668 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800669static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700670{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800671 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
672 struct iwl3945_queue *q = &txq->q;
673 struct iwl3945_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -0700674 u32 *control_flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800675 struct iwl3945_cmd *out_cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700676 u32 idx;
677 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
678 dma_addr_t phys_addr;
679 int pad;
680 u16 count;
681 int ret;
682 unsigned long flags;
683
684 /* If any of the command structures end up being larger than
685 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
686 * we will need to increase the size of the TFD entries */
687 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
688 !(cmd->meta.flags & CMD_SIZE_HUGE));
689
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800690 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
Zhu Yib481de92007-09-25 17:54:57 -0700691 IWL_ERROR("No space for Tx\n");
692 return -ENOSPC;
693 }
694
695 spin_lock_irqsave(&priv->hcmd_lock, flags);
696
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800697 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -0700698 memset(tfd, 0, sizeof(*tfd));
699
700 control_flags = (u32 *) tfd;
701
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800702 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
Zhu Yib481de92007-09-25 17:54:57 -0700703 out_cmd = &txq->cmd[idx];
704
705 out_cmd->hdr.cmd = cmd->id;
706 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
707 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
708
709 /* At this point, the out_cmd now has all of the incoming cmd
710 * information */
711
712 out_cmd->hdr.flags = 0;
713 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800714 INDEX_TO_SEQ(q->write_ptr));
Zhu Yib481de92007-09-25 17:54:57 -0700715 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
716 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
717
718 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800719 offsetof(struct iwl3945_cmd, hdr);
720 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
Zhu Yib481de92007-09-25 17:54:57 -0700721
722 pad = U32_PAD(cmd->len);
723 count = TFD_CTL_COUNT_GET(*control_flags);
724 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
725
726 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
727 "%d bytes at %d[%d]:%d\n",
728 get_cmd_string(out_cmd->hdr.cmd),
729 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800730 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
Zhu Yib481de92007-09-25 17:54:57 -0700731
732 txq->need_update = 1;
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800733
734 /* Increment and update queue's write index */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800735 q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
736 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700737
738 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
739 return ret ? ret : idx;
740}
741
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800742static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700743{
744 int ret;
745
746 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
747
748 /* An asynchronous command can not expect an SKB to be set. */
749 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
750
751 /* An asynchronous command MUST have a callback. */
752 BUG_ON(!cmd->meta.u.callback);
753
754 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
755 return -EBUSY;
756
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800757 ret = iwl3945_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700758 if (ret < 0) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800759 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700760 get_cmd_string(cmd->id), ret);
761 return ret;
762 }
763 return 0;
764}
765
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800766static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700767{
768 int cmd_idx;
769 int ret;
770 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
771
772 BUG_ON(cmd->meta.flags & CMD_ASYNC);
773
774 /* A synchronous command can not have a callback set. */
775 BUG_ON(cmd->meta.u.callback != NULL);
776
777 if (atomic_xchg(&entry, 1)) {
778 IWL_ERROR("Error sending %s: Already sending a host command\n",
779 get_cmd_string(cmd->id));
780 return -EBUSY;
781 }
782
783 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
784
785 if (cmd->meta.flags & CMD_WANT_SKB)
786 cmd->meta.source = &cmd->meta;
787
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800788 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700789 if (cmd_idx < 0) {
790 ret = cmd_idx;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800791 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700792 get_cmd_string(cmd->id), ret);
793 goto out;
794 }
795
796 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
797 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
798 HOST_COMPLETE_TIMEOUT);
799 if (!ret) {
800 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
801 IWL_ERROR("Error sending %s: time out after %dms.\n",
802 get_cmd_string(cmd->id),
803 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
804
805 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
806 ret = -ETIMEDOUT;
807 goto cancel;
808 }
809 }
810
811 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
812 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
813 get_cmd_string(cmd->id));
814 ret = -ECANCELED;
815 goto fail;
816 }
817 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
818 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
819 get_cmd_string(cmd->id));
820 ret = -EIO;
821 goto fail;
822 }
823 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
824 IWL_ERROR("Error: Response NULL in '%s'\n",
825 get_cmd_string(cmd->id));
826 ret = -EIO;
827 goto out;
828 }
829
830 ret = 0;
831 goto out;
832
833cancel:
834 if (cmd->meta.flags & CMD_WANT_SKB) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800835 struct iwl3945_cmd *qcmd;
Zhu Yib481de92007-09-25 17:54:57 -0700836
837 /* Cancel the CMD_WANT_SKB flag for the cmd in the
838 * TX cmd queue. Otherwise in case the cmd comes
839 * in later, it will possibly set an invalid
840 * address (cmd->meta.source). */
841 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
842 qcmd->meta.flags &= ~CMD_WANT_SKB;
843 }
844fail:
845 if (cmd->meta.u.skb) {
846 dev_kfree_skb_any(cmd->meta.u.skb);
847 cmd->meta.u.skb = NULL;
848 }
849out:
850 atomic_set(&entry, 0);
851 return ret;
852}
853
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800854int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700855{
Zhu Yib481de92007-09-25 17:54:57 -0700856 if (cmd->meta.flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800857 return iwl3945_send_cmd_async(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700858
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800859 return iwl3945_send_cmd_sync(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700860}
861
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800862int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
Zhu Yib481de92007-09-25 17:54:57 -0700863{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800864 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700865 .id = id,
866 .len = len,
867 .data = data,
868 };
869
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800870 return iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700871}
872
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800873static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
Zhu Yib481de92007-09-25 17:54:57 -0700874{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800875 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700876 .id = id,
877 .len = sizeof(val),
878 .data = &val,
879 };
880
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800881 return iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700882}
883
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800884int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700885{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800886 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700887}
888
889/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800890 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
Zhu Yib481de92007-09-25 17:54:57 -0700891 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
892 * @channel: Any channel valid for the requested phymode
893
894 * In addition to setting the staging RXON, priv->phymode is also set.
895 *
896 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
897 * in the staging RXON flag structure based on the phymode
898 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800899static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv, u8 phymode, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -0700900{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800901 if (!iwl3945_get_channel_info(priv, phymode, channel)) {
Zhu Yib481de92007-09-25 17:54:57 -0700902 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
903 channel, phymode);
904 return -EINVAL;
905 }
906
907 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
908 (priv->phymode == phymode))
909 return 0;
910
911 priv->staging_rxon.channel = cpu_to_le16(channel);
912 if (phymode == MODE_IEEE80211A)
913 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
914 else
915 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
916
917 priv->phymode = phymode;
918
919 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
920
921 return 0;
922}
923
924/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800925 * iwl3945_check_rxon_cmd - validate RXON structure is valid
Zhu Yib481de92007-09-25 17:54:57 -0700926 *
927 * NOTE: This is really only useful during development and can eventually
928 * be #ifdef'd out once the driver is stable and folks aren't actively
929 * making changes
930 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800931static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -0700932{
933 int error = 0;
934 int counter = 1;
935
936 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
937 error |= le32_to_cpu(rxon->flags &
938 (RXON_FLG_TGJ_NARROW_BAND_MSK |
939 RXON_FLG_RADAR_DETECT_MSK));
940 if (error)
941 IWL_WARNING("check 24G fields %d | %d\n",
942 counter++, error);
943 } else {
944 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
945 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
946 if (error)
947 IWL_WARNING("check 52 fields %d | %d\n",
948 counter++, error);
949 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
950 if (error)
951 IWL_WARNING("check 52 CCK %d | %d\n",
952 counter++, error);
953 }
954 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
955 if (error)
956 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
957
958 /* make sure basic rates 6Mbps and 1Mbps are supported */
959 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
960 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
961 if (error)
962 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
963
964 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
965 if (error)
966 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
967
968 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
969 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
970 if (error)
971 IWL_WARNING("check CCK and short slot %d | %d\n",
972 counter++, error);
973
974 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
975 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
976 if (error)
977 IWL_WARNING("check CCK & auto detect %d | %d\n",
978 counter++, error);
979
980 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
981 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
982 if (error)
983 IWL_WARNING("check TGG and auto detect %d | %d\n",
984 counter++, error);
985
986 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
987 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
988 RXON_FLG_ANT_A_MSK)) == 0);
989 if (error)
990 IWL_WARNING("check antenna %d %d\n", counter++, error);
991
992 if (error)
993 IWL_WARNING("Tuning to channel %d\n",
994 le16_to_cpu(rxon->channel));
995
996 if (error) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800997 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
Zhu Yib481de92007-09-25 17:54:57 -0700998 return -1;
999 }
1000 return 0;
1001}
1002
1003/**
Ben Cahill9fbab512007-11-29 11:09:47 +08001004 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
Ian Schram01ebd062007-10-25 17:15:22 +08001005 * @priv: staging_rxon is compared to active_rxon
Zhu Yib481de92007-09-25 17:54:57 -07001006 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001007 * If the RXON structure is changing enough to require a new tune,
1008 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1009 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
Zhu Yib481de92007-09-25 17:54:57 -07001010 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001011static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001012{
1013
1014 /* These items are only settable from the full RXON command */
1015 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1016 compare_ether_addr(priv->staging_rxon.bssid_addr,
1017 priv->active_rxon.bssid_addr) ||
1018 compare_ether_addr(priv->staging_rxon.node_addr,
1019 priv->active_rxon.node_addr) ||
1020 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1021 priv->active_rxon.wlap_bssid_addr) ||
1022 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1023 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1024 (priv->staging_rxon.air_propagation !=
1025 priv->active_rxon.air_propagation) ||
1026 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1027 return 1;
1028
1029 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1030 * be updated with the RXON_ASSOC command -- however only some
1031 * flag transitions are allowed using RXON_ASSOC */
1032
1033 /* Check if we are not switching bands */
1034 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1035 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1036 return 1;
1037
1038 /* Check if we are switching association toggle */
1039 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1040 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1041 return 1;
1042
1043 return 0;
1044}
1045
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001046static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001047{
1048 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001049 struct iwl3945_rx_packet *res = NULL;
1050 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1051 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001052 .id = REPLY_RXON_ASSOC,
1053 .len = sizeof(rxon_assoc),
1054 .meta.flags = CMD_WANT_SKB,
1055 .data = &rxon_assoc,
1056 };
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001057 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
1058 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001059
1060 if ((rxon1->flags == rxon2->flags) &&
1061 (rxon1->filter_flags == rxon2->filter_flags) &&
1062 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1063 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1064 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1065 return 0;
1066 }
1067
1068 rxon_assoc.flags = priv->staging_rxon.flags;
1069 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1070 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1071 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1072 rxon_assoc.reserved = 0;
1073
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001074 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001075 if (rc)
1076 return rc;
1077
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001078 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001079 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1080 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1081 rc = -EIO;
1082 }
1083
1084 priv->alloc_rxb_skb--;
1085 dev_kfree_skb_any(cmd.meta.u.skb);
1086
1087 return rc;
1088}
1089
1090/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001091 * iwl3945_commit_rxon - commit staging_rxon to hardware
Zhu Yib481de92007-09-25 17:54:57 -07001092 *
Ian Schram01ebd062007-10-25 17:15:22 +08001093 * The RXON command in staging_rxon is committed to the hardware and
Zhu Yib481de92007-09-25 17:54:57 -07001094 * the active_rxon structure is updated with the new data. This
1095 * function correctly transitions out of the RXON_ASSOC_MSK state if
1096 * a HW tune is required based on the RXON structure changes.
1097 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001098static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001099{
1100 /* cast away the const for active_rxon in this function */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001101 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001102 int rc = 0;
Joe Perches0795af52007-10-03 17:59:30 -07001103 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07001104
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001105 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07001106 return -1;
1107
1108 /* always get timestamp with Rx frame */
1109 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1110
1111 /* select antenna */
1112 priv->staging_rxon.flags &=
1113 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1114 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1115
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001116 rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001117 if (rc) {
1118 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1119 return -EINVAL;
1120 }
1121
1122 /* If we don't need to send a full RXON, we can use
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001123 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
Zhu Yib481de92007-09-25 17:54:57 -07001124 * and other flags for the current radio configuration. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001125 if (!iwl3945_full_rxon_required(priv)) {
1126 rc = iwl3945_send_rxon_assoc(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001127 if (rc) {
1128 IWL_ERROR("Error setting RXON_ASSOC "
1129 "configuration (%d).\n", rc);
1130 return rc;
1131 }
1132
1133 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1134
1135 return 0;
1136 }
1137
1138 /* If we are currently associated and the new config requires
1139 * an RXON_ASSOC and the new config wants the associated mask enabled,
1140 * we must clear the associated from the active configuration
1141 * before we apply the new config */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001142 if (iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001143 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1144 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1145 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1146
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001147 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1148 sizeof(struct iwl3945_rxon_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001149 &priv->active_rxon);
1150
1151 /* If the mask clearing failed then we set
1152 * active_rxon back to what it was previously */
1153 if (rc) {
1154 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1155 IWL_ERROR("Error clearing ASSOC_MSK on current "
1156 "configuration (%d).\n", rc);
1157 return rc;
1158 }
Zhu Yib481de92007-09-25 17:54:57 -07001159 }
1160
1161 IWL_DEBUG_INFO("Sending RXON\n"
1162 "* with%s RXON_FILTER_ASSOC_MSK\n"
1163 "* channel = %d\n"
Joe Perches0795af52007-10-03 17:59:30 -07001164 "* bssid = %s\n",
Zhu Yib481de92007-09-25 17:54:57 -07001165 ((priv->staging_rxon.filter_flags &
1166 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1167 le16_to_cpu(priv->staging_rxon.channel),
Joe Perches0795af52007-10-03 17:59:30 -07001168 print_mac(mac, priv->staging_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07001169
1170 /* Apply the new configuration */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001171 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1172 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001173 if (rc) {
1174 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1175 return rc;
1176 }
1177
1178 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1179
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001180 iwl3945_clear_stations_table(priv);
Zhu Yi556f8db2007-09-27 11:27:33 +08001181
Zhu Yib481de92007-09-25 17:54:57 -07001182 /* If we issue a new RXON command which required a tune then we must
1183 * send a new TXPOWER command or we won't be able to Tx any frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001184 rc = iwl3945_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001185 if (rc) {
1186 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1187 return rc;
1188 }
1189
1190 /* Add the broadcast address so we can send broadcast frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001191 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
Zhu Yib481de92007-09-25 17:54:57 -07001192 IWL_INVALID_STATION) {
1193 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1194 return -EIO;
1195 }
1196
1197 /* If we have set the ASSOC_MSK and we are in BSS mode then
1198 * add the IWL_AP_ID to the station rate table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001199 if (iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001200 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001201 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
Zhu Yib481de92007-09-25 17:54:57 -07001202 == IWL_INVALID_STATION) {
1203 IWL_ERROR("Error adding AP address for transmit.\n");
1204 return -EIO;
1205 }
1206
1207 /* Init the hardware's rate fallback order based on the
1208 * phymode */
1209 rc = iwl3945_init_hw_rate_table(priv);
1210 if (rc) {
1211 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1212 return -EIO;
1213 }
1214
1215 return 0;
1216}
1217
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001218static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001219{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001220 struct iwl3945_bt_cmd bt_cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001221 .flags = 3,
1222 .lead_time = 0xAA,
1223 .max_kill = 1,
1224 .kill_ack_mask = 0,
1225 .kill_cts_mask = 0,
1226 };
1227
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001228 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1229 sizeof(struct iwl3945_bt_cmd), &bt_cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001230}
1231
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001232static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001233{
1234 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001235 struct iwl3945_rx_packet *res;
1236 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001237 .id = REPLY_SCAN_ABORT_CMD,
1238 .meta.flags = CMD_WANT_SKB,
1239 };
1240
1241 /* If there isn't a scan actively going on in the hardware
1242 * then we are in between scan bands and not actually
1243 * actively scanning, so don't send the abort command */
1244 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1245 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1246 return 0;
1247 }
1248
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001249 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001250 if (rc) {
1251 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1252 return rc;
1253 }
1254
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001255 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001256 if (res->u.status != CAN_ABORT_STATUS) {
1257 /* The scan abort will return 1 for success or
1258 * 2 for "failure". A failure condition can be
1259 * due to simply not being in an active scan which
1260 * can occur if we send the scan abort before we
1261 * the microcode has notified us that a scan is
1262 * completed. */
1263 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1264 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1265 clear_bit(STATUS_SCAN_HW, &priv->status);
1266 }
1267
1268 dev_kfree_skb_any(cmd.meta.u.skb);
1269
1270 return rc;
1271}
1272
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001273static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1274 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07001275 struct sk_buff *skb)
1276{
1277 return 1;
1278}
1279
1280/*
1281 * CARD_STATE_CMD
1282 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001283 * Use: Sets the device's internal card state to enable, disable, or halt
Zhu Yib481de92007-09-25 17:54:57 -07001284 *
1285 * When in the 'enable' state the card operates as normal.
1286 * When in the 'disable' state, the card enters into a low power mode.
1287 * When in the 'halt' state, the card is shut down and must be fully
1288 * restarted to come back on.
1289 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001290static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
Zhu Yib481de92007-09-25 17:54:57 -07001291{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001292 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001293 .id = REPLY_CARD_STATE_CMD,
1294 .len = sizeof(u32),
1295 .data = &flags,
1296 .meta.flags = meta_flag,
1297 };
1298
1299 if (meta_flag & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001300 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001301
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001302 return iwl3945_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001303}
1304
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001305static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1306 struct iwl3945_cmd *cmd, struct sk_buff *skb)
Zhu Yib481de92007-09-25 17:54:57 -07001307{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001308 struct iwl3945_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001309
1310 if (!skb) {
1311 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1312 return 1;
1313 }
1314
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001315 res = (struct iwl3945_rx_packet *)skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001316 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1317 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1318 res->hdr.flags);
1319 return 1;
1320 }
1321
1322 switch (res->u.add_sta.status) {
1323 case ADD_STA_SUCCESS_MSK:
1324 break;
1325 default:
1326 break;
1327 }
1328
1329 /* We didn't cache the SKB; let the caller free it */
1330 return 1;
1331}
1332
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001333int iwl3945_send_add_station(struct iwl3945_priv *priv,
1334 struct iwl3945_addsta_cmd *sta, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -07001335{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001336 struct iwl3945_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001337 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001338 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001339 .id = REPLY_ADD_STA,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001340 .len = sizeof(struct iwl3945_addsta_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001341 .meta.flags = flags,
1342 .data = sta,
1343 };
1344
1345 if (flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001346 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001347 else
1348 cmd.meta.flags |= CMD_WANT_SKB;
1349
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001350 rc = iwl3945_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001351
1352 if (rc || (flags & CMD_ASYNC))
1353 return rc;
1354
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001355 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001356 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1357 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1358 res->hdr.flags);
1359 rc = -EIO;
1360 }
1361
1362 if (rc == 0) {
1363 switch (res->u.add_sta.status) {
1364 case ADD_STA_SUCCESS_MSK:
1365 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1366 break;
1367 default:
1368 rc = -EIO;
1369 IWL_WARNING("REPLY_ADD_STA failed\n");
1370 break;
1371 }
1372 }
1373
1374 priv->alloc_rxb_skb--;
1375 dev_kfree_skb_any(cmd.meta.u.skb);
1376
1377 return rc;
1378}
1379
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001380static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001381 struct ieee80211_key_conf *keyconf,
1382 u8 sta_id)
1383{
1384 unsigned long flags;
1385 __le16 key_flags = 0;
1386
1387 switch (keyconf->alg) {
1388 case ALG_CCMP:
1389 key_flags |= STA_KEY_FLG_CCMP;
1390 key_flags |= cpu_to_le16(
1391 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1392 key_flags &= ~STA_KEY_FLG_INVALID;
1393 break;
1394 case ALG_TKIP:
1395 case ALG_WEP:
Zhu Yib481de92007-09-25 17:54:57 -07001396 default:
1397 return -EINVAL;
1398 }
1399 spin_lock_irqsave(&priv->sta_lock, flags);
1400 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1401 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1402 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1403 keyconf->keylen);
1404
1405 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1406 keyconf->keylen);
1407 priv->stations[sta_id].sta.key.key_flags = key_flags;
1408 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1409 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1410
1411 spin_unlock_irqrestore(&priv->sta_lock, flags);
1412
1413 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001414 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001415 return 0;
1416}
1417
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001418static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
Zhu Yib481de92007-09-25 17:54:57 -07001419{
1420 unsigned long flags;
1421
1422 spin_lock_irqsave(&priv->sta_lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001423 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1424 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
Zhu Yib481de92007-09-25 17:54:57 -07001425 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1426 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1427 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1428 spin_unlock_irqrestore(&priv->sta_lock, flags);
1429
1430 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001431 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001432 return 0;
1433}
1434
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001435static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001436{
1437 struct list_head *element;
1438
1439 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1440 priv->frames_count);
1441
1442 while (!list_empty(&priv->free_frames)) {
1443 element = priv->free_frames.next;
1444 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001445 kfree(list_entry(element, struct iwl3945_frame, list));
Zhu Yib481de92007-09-25 17:54:57 -07001446 priv->frames_count--;
1447 }
1448
1449 if (priv->frames_count) {
1450 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1451 priv->frames_count);
1452 priv->frames_count = 0;
1453 }
1454}
1455
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001456static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001457{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001458 struct iwl3945_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001459 struct list_head *element;
1460 if (list_empty(&priv->free_frames)) {
1461 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1462 if (!frame) {
1463 IWL_ERROR("Could not allocate frame!\n");
1464 return NULL;
1465 }
1466
1467 priv->frames_count++;
1468 return frame;
1469 }
1470
1471 element = priv->free_frames.next;
1472 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001473 return list_entry(element, struct iwl3945_frame, list);
Zhu Yib481de92007-09-25 17:54:57 -07001474}
1475
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001476static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
Zhu Yib481de92007-09-25 17:54:57 -07001477{
1478 memset(frame, 0, sizeof(*frame));
1479 list_add(&frame->list, &priv->free_frames);
1480}
1481
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001482unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001483 struct ieee80211_hdr *hdr,
1484 const u8 *dest, int left)
1485{
1486
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001487 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
Zhu Yib481de92007-09-25 17:54:57 -07001488 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1489 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1490 return 0;
1491
1492 if (priv->ibss_beacon->len > left)
1493 return 0;
1494
1495 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1496
1497 return priv->ibss_beacon->len;
1498}
1499
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001500static int iwl3945_rate_index_from_plcp(int plcp)
Zhu Yib481de92007-09-25 17:54:57 -07001501{
1502 int i = 0;
1503
1504 for (i = 0; i < IWL_RATE_COUNT; i++)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001505 if (iwl3945_rates[i].plcp == plcp)
Zhu Yib481de92007-09-25 17:54:57 -07001506 return i;
1507 return -1;
1508}
1509
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001510static u8 iwl3945_rate_get_lowest_plcp(int rate_mask)
Zhu Yib481de92007-09-25 17:54:57 -07001511{
1512 u8 i;
1513
1514 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001515 i = iwl3945_rates[i].next_ieee) {
Zhu Yib481de92007-09-25 17:54:57 -07001516 if (rate_mask & (1 << i))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001517 return iwl3945_rates[i].plcp;
Zhu Yib481de92007-09-25 17:54:57 -07001518 }
1519
1520 return IWL_RATE_INVALID;
1521}
1522
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001523static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001524{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001525 struct iwl3945_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001526 unsigned int frame_size;
1527 int rc;
1528 u8 rate;
1529
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001530 frame = iwl3945_get_free_frame(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001531
1532 if (!frame) {
1533 IWL_ERROR("Could not obtain free frame buffer for beacon "
1534 "command.\n");
1535 return -ENOMEM;
1536 }
1537
1538 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001539 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic &
Zhu Yib481de92007-09-25 17:54:57 -07001540 0xFF0);
1541 if (rate == IWL_INVALID_RATE)
1542 rate = IWL_RATE_6M_PLCP;
1543 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001544 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
Zhu Yib481de92007-09-25 17:54:57 -07001545 if (rate == IWL_INVALID_RATE)
1546 rate = IWL_RATE_1M_PLCP;
1547 }
1548
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001549 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
Zhu Yib481de92007-09-25 17:54:57 -07001550
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001551 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
Zhu Yib481de92007-09-25 17:54:57 -07001552 &frame->u.cmd[0]);
1553
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001554 iwl3945_free_frame(priv, frame);
Zhu Yib481de92007-09-25 17:54:57 -07001555
1556 return rc;
1557}
1558
1559/******************************************************************************
1560 *
1561 * EEPROM related functions
1562 *
1563 ******************************************************************************/
1564
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001565static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
Zhu Yib481de92007-09-25 17:54:57 -07001566{
1567 memcpy(mac, priv->eeprom.mac_address, 6);
1568}
1569
1570/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001571 * iwl3945_eeprom_init - read EEPROM contents
Zhu Yib481de92007-09-25 17:54:57 -07001572 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001573 * Load the EEPROM contents from adapter into priv->eeprom
Zhu Yib481de92007-09-25 17:54:57 -07001574 *
1575 * NOTE: This routine uses the non-debug IO access functions.
1576 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001577int iwl3945_eeprom_init(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001578{
1579 u16 *e = (u16 *)&priv->eeprom;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001580 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
Zhu Yib481de92007-09-25 17:54:57 -07001581 u32 r;
1582 int sz = sizeof(priv->eeprom);
1583 int rc;
1584 int i;
1585 u16 addr;
1586
1587 /* The EEPROM structure has several padding buffers within it
1588 * and when adding new EEPROM maps is subject to programmer errors
1589 * which may be very difficult to identify without explicitly
1590 * checking the resulting size of the eeprom map. */
1591 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1592
1593 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1594 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1595 return -ENOENT;
1596 }
1597
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001598 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001599 rc = iwl3945_eeprom_acquire_semaphore(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001600 if (rc < 0) {
Ian Schram91e17472007-10-25 17:15:23 +08001601 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
Zhu Yib481de92007-09-25 17:54:57 -07001602 return -ENOENT;
1603 }
1604
1605 /* eeprom is an array of 16bit values */
1606 for (addr = 0; addr < sz; addr += sizeof(u16)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001607 _iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
1608 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
Zhu Yib481de92007-09-25 17:54:57 -07001609
1610 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1611 i += IWL_EEPROM_ACCESS_DELAY) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001612 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
Zhu Yib481de92007-09-25 17:54:57 -07001613 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1614 break;
1615 udelay(IWL_EEPROM_ACCESS_DELAY);
1616 }
1617
1618 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1619 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1620 return -ETIMEDOUT;
1621 }
1622 e[addr / 2] = le16_to_cpu(r >> 16);
1623 }
1624
1625 return 0;
1626}
1627
1628/******************************************************************************
1629 *
1630 * Misc. internal state and helper functions
1631 *
1632 ******************************************************************************/
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08001633#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07001634
1635/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001636 * iwl3945_report_frame - dump frame to syslog during debug sessions
Zhu Yib481de92007-09-25 17:54:57 -07001637 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001638 * You may hack this function to show different aspects of received frames,
Zhu Yib481de92007-09-25 17:54:57 -07001639 * including selective frame dumps.
1640 * group100 parameter selects whether to show 1 out of 100 good frames.
Zhu Yib481de92007-09-25 17:54:57 -07001641 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001642void iwl3945_report_frame(struct iwl3945_priv *priv,
1643 struct iwl3945_rx_packet *pkt,
Zhu Yib481de92007-09-25 17:54:57 -07001644 struct ieee80211_hdr *header, int group100)
1645{
1646 u32 to_us;
1647 u32 print_summary = 0;
1648 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
1649 u32 hundred = 0;
1650 u32 dataframe = 0;
1651 u16 fc;
1652 u16 seq_ctl;
1653 u16 channel;
1654 u16 phy_flags;
1655 int rate_sym;
1656 u16 length;
1657 u16 status;
1658 u16 bcn_tmr;
1659 u32 tsf_low;
1660 u64 tsf;
1661 u8 rssi;
1662 u8 agc;
1663 u16 sig_avg;
1664 u16 noise_diff;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001665 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
1666 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
1667 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
Zhu Yib481de92007-09-25 17:54:57 -07001668 u8 *data = IWL_RX_DATA(pkt);
1669
1670 /* MAC header */
1671 fc = le16_to_cpu(header->frame_control);
1672 seq_ctl = le16_to_cpu(header->seq_ctrl);
1673
1674 /* metadata */
1675 channel = le16_to_cpu(rx_hdr->channel);
1676 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
1677 rate_sym = rx_hdr->rate;
1678 length = le16_to_cpu(rx_hdr->len);
1679
1680 /* end-of-frame status and timestamp */
1681 status = le32_to_cpu(rx_end->status);
1682 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
1683 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
1684 tsf = le64_to_cpu(rx_end->timestamp);
1685
1686 /* signal statistics */
1687 rssi = rx_stats->rssi;
1688 agc = rx_stats->agc;
1689 sig_avg = le16_to_cpu(rx_stats->sig_avg);
1690 noise_diff = le16_to_cpu(rx_stats->noise_diff);
1691
1692 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
1693
1694 /* if data frame is to us and all is good,
1695 * (optionally) print summary for only 1 out of every 100 */
1696 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
1697 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
1698 dataframe = 1;
1699 if (!group100)
1700 print_summary = 1; /* print each frame */
1701 else if (priv->framecnt_to_us < 100) {
1702 priv->framecnt_to_us++;
1703 print_summary = 0;
1704 } else {
1705 priv->framecnt_to_us = 0;
1706 print_summary = 1;
1707 hundred = 1;
1708 }
1709 } else {
1710 /* print summary for all other frames */
1711 print_summary = 1;
1712 }
1713
1714 if (print_summary) {
1715 char *title;
1716 u32 rate;
1717
1718 if (hundred)
1719 title = "100Frames";
1720 else if (fc & IEEE80211_FCTL_RETRY)
1721 title = "Retry";
1722 else if (ieee80211_is_assoc_response(fc))
1723 title = "AscRsp";
1724 else if (ieee80211_is_reassoc_response(fc))
1725 title = "RasRsp";
1726 else if (ieee80211_is_probe_response(fc)) {
1727 title = "PrbRsp";
1728 print_dump = 1; /* dump frame contents */
1729 } else if (ieee80211_is_beacon(fc)) {
1730 title = "Beacon";
1731 print_dump = 1; /* dump frame contents */
1732 } else if (ieee80211_is_atim(fc))
1733 title = "ATIM";
1734 else if (ieee80211_is_auth(fc))
1735 title = "Auth";
1736 else if (ieee80211_is_deauth(fc))
1737 title = "DeAuth";
1738 else if (ieee80211_is_disassoc(fc))
1739 title = "DisAssoc";
1740 else
1741 title = "Frame";
1742
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001743 rate = iwl3945_rate_index_from_plcp(rate_sym);
Zhu Yib481de92007-09-25 17:54:57 -07001744 if (rate == -1)
1745 rate = 0;
1746 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001747 rate = iwl3945_rates[rate].ieee / 2;
Zhu Yib481de92007-09-25 17:54:57 -07001748
1749 /* print frame summary.
1750 * MAC addresses show just the last byte (for brevity),
1751 * but you can hack it to show more, if you'd like to. */
1752 if (dataframe)
1753 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
1754 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
1755 title, fc, header->addr1[5],
1756 length, rssi, channel, rate);
1757 else {
1758 /* src/dst addresses assume managed mode */
1759 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
1760 "src=0x%02x, rssi=%u, tim=%lu usec, "
1761 "phy=0x%02x, chnl=%d\n",
1762 title, fc, header->addr1[5],
1763 header->addr3[5], rssi,
1764 tsf_low - priv->scan_start_tsf,
1765 phy_flags, channel);
1766 }
1767 }
1768 if (print_dump)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001769 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
Zhu Yib481de92007-09-25 17:54:57 -07001770}
1771#endif
1772
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001773static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001774{
1775 if (priv->hw_setting.shared_virt)
1776 pci_free_consistent(priv->pci_dev,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001777 sizeof(struct iwl3945_shared),
Zhu Yib481de92007-09-25 17:54:57 -07001778 priv->hw_setting.shared_virt,
1779 priv->hw_setting.shared_phys);
1780}
1781
1782/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001783 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
Zhu Yib481de92007-09-25 17:54:57 -07001784 *
1785 * return : set the bit for each supported rate insert in ie
1786 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001787static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001788 u16 basic_rate, int *left)
Zhu Yib481de92007-09-25 17:54:57 -07001789{
1790 u16 ret_rates = 0, bit;
1791 int i;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001792 u8 *cnt = ie;
1793 u8 *rates = ie + 1;
Zhu Yib481de92007-09-25 17:54:57 -07001794
1795 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1796 if (bit & supported_rate) {
1797 ret_rates |= bit;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001798 rates[*cnt] = iwl3945_rates[i].ieee |
Tomas Winklerc7c46672007-10-18 02:04:15 +02001799 ((bit & basic_rate) ? 0x80 : 0x00);
1800 (*cnt)++;
1801 (*left)--;
1802 if ((*left <= 0) ||
1803 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
Zhu Yib481de92007-09-25 17:54:57 -07001804 break;
1805 }
1806 }
1807
1808 return ret_rates;
1809}
1810
1811/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001812 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
Zhu Yib481de92007-09-25 17:54:57 -07001813 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001814static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001815 struct ieee80211_mgmt *frame,
1816 int left, int is_direct)
1817{
1818 int len = 0;
1819 u8 *pos = NULL;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001820 u16 active_rates, ret_rates, cck_rates;
Zhu Yib481de92007-09-25 17:54:57 -07001821
1822 /* Make sure there is enough space for the probe request,
1823 * two mandatory IEs and the data */
1824 left -= 24;
1825 if (left < 0)
1826 return 0;
1827 len += 24;
1828
1829 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001830 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001831 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001832 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001833 frame->seq_ctrl = 0;
1834
1835 /* fill in our indirect SSID IE */
1836 /* ...next IE... */
1837
1838 left -= 2;
1839 if (left < 0)
1840 return 0;
1841 len += 2;
1842 pos = &(frame->u.probe_req.variable[0]);
1843 *pos++ = WLAN_EID_SSID;
1844 *pos++ = 0;
1845
1846 /* fill in our direct SSID IE... */
1847 if (is_direct) {
1848 /* ...next IE... */
1849 left -= 2 + priv->essid_len;
1850 if (left < 0)
1851 return 0;
1852 /* ... fill it in... */
1853 *pos++ = WLAN_EID_SSID;
1854 *pos++ = priv->essid_len;
1855 memcpy(pos, priv->essid, priv->essid_len);
1856 pos += priv->essid_len;
1857 len += 2 + priv->essid_len;
1858 }
1859
1860 /* fill in supported rate */
1861 /* ...next IE... */
1862 left -= 2;
1863 if (left < 0)
1864 return 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001865
Zhu Yib481de92007-09-25 17:54:57 -07001866 /* ... fill it in... */
1867 *pos++ = WLAN_EID_SUPP_RATES;
1868 *pos = 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001869
1870 priv->active_rate = priv->rates_mask;
1871 active_rates = priv->active_rate;
Zhu Yib481de92007-09-25 17:54:57 -07001872 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1873
Tomas Winklerc7c46672007-10-18 02:04:15 +02001874 cck_rates = IWL_CCK_RATES_MASK & active_rates;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001875 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001876 priv->active_rate_basic, &left);
1877 active_rates &= ~ret_rates;
1878
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001879 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001880 priv->active_rate_basic, &left);
1881 active_rates &= ~ret_rates;
1882
Zhu Yib481de92007-09-25 17:54:57 -07001883 len += 2 + *pos;
1884 pos += (*pos) + 1;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001885 if (active_rates == 0)
Zhu Yib481de92007-09-25 17:54:57 -07001886 goto fill_end;
1887
1888 /* fill in supported extended rate */
1889 /* ...next IE... */
1890 left -= 2;
1891 if (left < 0)
1892 return 0;
1893 /* ... fill it in... */
1894 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1895 *pos = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001896 iwl3945_supported_rate_to_ie(pos, active_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001897 priv->active_rate_basic, &left);
Zhu Yib481de92007-09-25 17:54:57 -07001898 if (*pos > 0)
1899 len += 2 + *pos;
1900
1901 fill_end:
1902 return (u16)len;
1903}
1904
1905/*
1906 * QoS support
1907*/
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08001908#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001909static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1910 struct iwl3945_qosparam_cmd *qos)
Zhu Yib481de92007-09-25 17:54:57 -07001911{
1912
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001913 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1914 sizeof(struct iwl3945_qosparam_cmd), qos);
Zhu Yib481de92007-09-25 17:54:57 -07001915}
1916
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001917static void iwl3945_reset_qos(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001918{
1919 u16 cw_min = 15;
1920 u16 cw_max = 1023;
1921 u8 aifs = 2;
1922 u8 is_legacy = 0;
1923 unsigned long flags;
1924 int i;
1925
1926 spin_lock_irqsave(&priv->lock, flags);
1927 priv->qos_data.qos_active = 0;
1928
1929 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1930 if (priv->qos_data.qos_enable)
1931 priv->qos_data.qos_active = 1;
1932 if (!(priv->active_rate & 0xfff0)) {
1933 cw_min = 31;
1934 is_legacy = 1;
1935 }
1936 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1937 if (priv->qos_data.qos_enable)
1938 priv->qos_data.qos_active = 1;
1939 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1940 cw_min = 31;
1941 is_legacy = 1;
1942 }
1943
1944 if (priv->qos_data.qos_active)
1945 aifs = 3;
1946
1947 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1948 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1949 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1950 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1951 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1952
1953 if (priv->qos_data.qos_active) {
1954 i = 1;
1955 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1956 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1957 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1958 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1959 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1960
1961 i = 2;
1962 priv->qos_data.def_qos_parm.ac[i].cw_min =
1963 cpu_to_le16((cw_min + 1) / 2 - 1);
1964 priv->qos_data.def_qos_parm.ac[i].cw_max =
1965 cpu_to_le16(cw_max);
1966 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1967 if (is_legacy)
1968 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1969 cpu_to_le16(6016);
1970 else
1971 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1972 cpu_to_le16(3008);
1973 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1974
1975 i = 3;
1976 priv->qos_data.def_qos_parm.ac[i].cw_min =
1977 cpu_to_le16((cw_min + 1) / 4 - 1);
1978 priv->qos_data.def_qos_parm.ac[i].cw_max =
1979 cpu_to_le16((cw_max + 1) / 2 - 1);
1980 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1981 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1982 if (is_legacy)
1983 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1984 cpu_to_le16(3264);
1985 else
1986 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1987 cpu_to_le16(1504);
1988 } else {
1989 for (i = 1; i < 4; i++) {
1990 priv->qos_data.def_qos_parm.ac[i].cw_min =
1991 cpu_to_le16(cw_min);
1992 priv->qos_data.def_qos_parm.ac[i].cw_max =
1993 cpu_to_le16(cw_max);
1994 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1995 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1996 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1997 }
1998 }
1999 IWL_DEBUG_QOS("set QoS to default \n");
2000
2001 spin_unlock_irqrestore(&priv->lock, flags);
2002}
2003
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002004static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
Zhu Yib481de92007-09-25 17:54:57 -07002005{
2006 unsigned long flags;
2007
Zhu Yib481de92007-09-25 17:54:57 -07002008 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2009 return;
2010
2011 if (!priv->qos_data.qos_enable)
2012 return;
2013
2014 spin_lock_irqsave(&priv->lock, flags);
2015 priv->qos_data.def_qos_parm.qos_flags = 0;
2016
2017 if (priv->qos_data.qos_cap.q_AP.queue_request &&
2018 !priv->qos_data.qos_cap.q_AP.txop_request)
2019 priv->qos_data.def_qos_parm.qos_flags |=
2020 QOS_PARAM_FLG_TXOP_TYPE_MSK;
2021
2022 if (priv->qos_data.qos_active)
2023 priv->qos_data.def_qos_parm.qos_flags |=
2024 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
2025
2026 spin_unlock_irqrestore(&priv->lock, flags);
2027
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002028 if (force || iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002029 IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
2030 priv->qos_data.qos_active);
2031
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002032 iwl3945_send_qos_params_command(priv,
Zhu Yib481de92007-09-25 17:54:57 -07002033 &(priv->qos_data.def_qos_parm));
2034 }
2035}
2036
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002037#endif /* CONFIG_IWL3945_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07002038/*
2039 * Power management (not Tx power!) functions
2040 */
2041#define MSEC_TO_USEC 1024
2042
2043#define NOSLP __constant_cpu_to_le32(0)
2044#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
2045#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
2046#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
2047 __constant_cpu_to_le32(X1), \
2048 __constant_cpu_to_le32(X2), \
2049 __constant_cpu_to_le32(X3), \
2050 __constant_cpu_to_le32(X4)}
2051
2052
2053/* default power management (not Tx power) table values */
2054/* for tim 0-10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002055static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07002056 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2057 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
2058 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
2059 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
2060 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
2061 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
2062};
2063
2064/* for tim > 10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002065static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07002066 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2067 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
2068 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
2069 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
2070 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
2071 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
2072 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
2073 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
2074 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
2075 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
2076};
2077
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002078int iwl3945_power_init_handle(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002079{
2080 int rc = 0, i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002081 struct iwl3945_power_mgr *pow_data;
2082 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
Zhu Yib481de92007-09-25 17:54:57 -07002083 u16 pci_pm;
2084
2085 IWL_DEBUG_POWER("Initialize power \n");
2086
2087 pow_data = &(priv->power_data);
2088
2089 memset(pow_data, 0, sizeof(*pow_data));
2090
2091 pow_data->active_index = IWL_POWER_RANGE_0;
2092 pow_data->dtim_val = 0xffff;
2093
2094 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
2095 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
2096
2097 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
2098 if (rc != 0)
2099 return 0;
2100 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002101 struct iwl3945_powertable_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07002102
2103 IWL_DEBUG_POWER("adjust power command flags\n");
2104
2105 for (i = 0; i < IWL_POWER_AC; i++) {
2106 cmd = &pow_data->pwr_range_0[i].cmd;
2107
2108 if (pci_pm & 0x1)
2109 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
2110 else
2111 cmd->flags |= IWL_POWER_PCI_PM_MSK;
2112 }
2113 }
2114 return rc;
2115}
2116
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002117static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
2118 struct iwl3945_powertable_cmd *cmd, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07002119{
2120 int rc = 0, i;
2121 u8 skip;
2122 u32 max_sleep = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002123 struct iwl3945_power_vec_entry *range;
Zhu Yib481de92007-09-25 17:54:57 -07002124 u8 period = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002125 struct iwl3945_power_mgr *pow_data;
Zhu Yib481de92007-09-25 17:54:57 -07002126
2127 if (mode > IWL_POWER_INDEX_5) {
2128 IWL_DEBUG_POWER("Error invalid power mode \n");
2129 return -1;
2130 }
2131 pow_data = &(priv->power_data);
2132
2133 if (pow_data->active_index == IWL_POWER_RANGE_0)
2134 range = &pow_data->pwr_range_0[0];
2135 else
2136 range = &pow_data->pwr_range_1[1];
2137
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002138 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
Zhu Yib481de92007-09-25 17:54:57 -07002139
2140#ifdef IWL_MAC80211_DISABLE
2141 if (priv->assoc_network != NULL) {
2142 unsigned long flags;
2143
2144 period = priv->assoc_network->tim.tim_period;
2145 }
2146#endif /*IWL_MAC80211_DISABLE */
2147 skip = range[mode].no_dtim;
2148
2149 if (period == 0) {
2150 period = 1;
2151 skip = 0;
2152 }
2153
2154 if (skip == 0) {
2155 max_sleep = period;
2156 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
2157 } else {
2158 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
2159 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
2160 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
2161 }
2162
2163 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
2164 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
2165 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
2166 }
2167
2168 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
2169 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
2170 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
2171 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
2172 le32_to_cpu(cmd->sleep_interval[0]),
2173 le32_to_cpu(cmd->sleep_interval[1]),
2174 le32_to_cpu(cmd->sleep_interval[2]),
2175 le32_to_cpu(cmd->sleep_interval[3]),
2176 le32_to_cpu(cmd->sleep_interval[4]));
2177
2178 return rc;
2179}
2180
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002181static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07002182{
John W. Linville9a62f732007-11-15 16:27:36 -05002183 u32 uninitialized_var(final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002184 int rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002185 struct iwl3945_powertable_cmd cmd;
Zhu Yib481de92007-09-25 17:54:57 -07002186
2187 /* If on battery, set to 3,
Ian Schram01ebd062007-10-25 17:15:22 +08002188 * if plugged into AC power, set to CAM ("continuously aware mode"),
Zhu Yib481de92007-09-25 17:54:57 -07002189 * else user level */
2190 switch (mode) {
2191 case IWL_POWER_BATTERY:
2192 final_mode = IWL_POWER_INDEX_3;
2193 break;
2194 case IWL_POWER_AC:
2195 final_mode = IWL_POWER_MODE_CAM;
2196 break;
2197 default:
2198 final_mode = mode;
2199 break;
2200 }
2201
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002202 iwl3945_update_power_cmd(priv, &cmd, final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002203
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002204 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07002205
2206 if (final_mode == IWL_POWER_MODE_CAM)
2207 clear_bit(STATUS_POWER_PMI, &priv->status);
2208 else
2209 set_bit(STATUS_POWER_PMI, &priv->status);
2210
2211 return rc;
2212}
2213
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002214int iwl3945_is_network_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07002215{
2216 /* Filter incoming packets to determine if they are targeted toward
2217 * this network, discarding packets coming from ourselves */
2218 switch (priv->iw_mode) {
2219 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2220 /* packets from our adapter are dropped (echo) */
2221 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2222 return 0;
2223 /* {broad,multi}cast packets to our IBSS go through */
2224 if (is_multicast_ether_addr(header->addr1))
2225 return !compare_ether_addr(header->addr3, priv->bssid);
2226 /* packets to our adapter go through */
2227 return !compare_ether_addr(header->addr1, priv->mac_addr);
2228 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2229 /* packets from our adapter are dropped (echo) */
2230 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2231 return 0;
2232 /* {broad,multi}cast packets to our BSS go through */
2233 if (is_multicast_ether_addr(header->addr1))
2234 return !compare_ether_addr(header->addr2, priv->bssid);
2235 /* packets to our adapter go through */
2236 return !compare_ether_addr(header->addr1, priv->mac_addr);
2237 }
2238
2239 return 1;
2240}
2241
2242#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2243
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002244static const char *iwl3945_get_tx_fail_reason(u32 status)
Zhu Yib481de92007-09-25 17:54:57 -07002245{
2246 switch (status & TX_STATUS_MSK) {
2247 case TX_STATUS_SUCCESS:
2248 return "SUCCESS";
2249 TX_STATUS_ENTRY(SHORT_LIMIT);
2250 TX_STATUS_ENTRY(LONG_LIMIT);
2251 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2252 TX_STATUS_ENTRY(MGMNT_ABORT);
2253 TX_STATUS_ENTRY(NEXT_FRAG);
2254 TX_STATUS_ENTRY(LIFE_EXPIRE);
2255 TX_STATUS_ENTRY(DEST_PS);
2256 TX_STATUS_ENTRY(ABORTED);
2257 TX_STATUS_ENTRY(BT_RETRY);
2258 TX_STATUS_ENTRY(STA_INVALID);
2259 TX_STATUS_ENTRY(FRAG_DROPPED);
2260 TX_STATUS_ENTRY(TID_DISABLE);
2261 TX_STATUS_ENTRY(FRAME_FLUSHED);
2262 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2263 TX_STATUS_ENTRY(TX_LOCKED);
2264 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2265 }
2266
2267 return "UNKNOWN";
2268}
2269
2270/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002271 * iwl3945_scan_cancel - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002272 *
2273 * NOTE: priv->mutex is not required before calling this function
2274 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002275static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002276{
2277 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2278 clear_bit(STATUS_SCANNING, &priv->status);
2279 return 0;
2280 }
2281
2282 if (test_bit(STATUS_SCANNING, &priv->status)) {
2283 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2284 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2285 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2286 queue_work(priv->workqueue, &priv->abort_scan);
2287
2288 } else
2289 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2290
2291 return test_bit(STATUS_SCANNING, &priv->status);
2292 }
2293
2294 return 0;
2295}
2296
2297/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002298 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002299 * @ms: amount of time to wait (in milliseconds) for scan to abort
2300 *
2301 * NOTE: priv->mutex must be held before calling this function
2302 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002303static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
Zhu Yib481de92007-09-25 17:54:57 -07002304{
2305 unsigned long now = jiffies;
2306 int ret;
2307
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002308 ret = iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002309 if (ret && ms) {
2310 mutex_unlock(&priv->mutex);
2311 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2312 test_bit(STATUS_SCANNING, &priv->status))
2313 msleep(1);
2314 mutex_lock(&priv->mutex);
2315
2316 return test_bit(STATUS_SCANNING, &priv->status);
2317 }
2318
2319 return ret;
2320}
2321
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002322static void iwl3945_sequence_reset(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002323{
2324 /* Reset ieee stats */
2325
2326 /* We don't reset the net_device_stats (ieee->stats) on
2327 * re-association */
2328
2329 priv->last_seq_num = -1;
2330 priv->last_frag_num = -1;
2331 priv->last_packet_time = 0;
2332
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002333 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002334}
2335
2336#define MAX_UCODE_BEACON_INTERVAL 1024
2337#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2338
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002339static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
Zhu Yib481de92007-09-25 17:54:57 -07002340{
2341 u16 new_val = 0;
2342 u16 beacon_factor = 0;
2343
2344 beacon_factor =
2345 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2346 / MAX_UCODE_BEACON_INTERVAL;
2347 new_val = beacon_val / beacon_factor;
2348
2349 return cpu_to_le16(new_val);
2350}
2351
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002352static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002353{
2354 u64 interval_tm_unit;
2355 u64 tsf, result;
2356 unsigned long flags;
2357 struct ieee80211_conf *conf = NULL;
2358 u16 beacon_int = 0;
2359
2360 conf = ieee80211_get_hw_conf(priv->hw);
2361
2362 spin_lock_irqsave(&priv->lock, flags);
2363 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2364 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2365
2366 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2367
2368 tsf = priv->timestamp1;
2369 tsf = ((tsf << 32) | priv->timestamp0);
2370
2371 beacon_int = priv->beacon_int;
2372 spin_unlock_irqrestore(&priv->lock, flags);
2373
2374 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2375 if (beacon_int == 0) {
2376 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2377 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2378 } else {
2379 priv->rxon_timing.beacon_interval =
2380 cpu_to_le16(beacon_int);
2381 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002382 iwl3945_adjust_beacon_interval(
Zhu Yib481de92007-09-25 17:54:57 -07002383 le16_to_cpu(priv->rxon_timing.beacon_interval));
2384 }
2385
2386 priv->rxon_timing.atim_window = 0;
2387 } else {
2388 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002389 iwl3945_adjust_beacon_interval(conf->beacon_int);
Zhu Yib481de92007-09-25 17:54:57 -07002390 /* TODO: we need to get atim_window from upper stack
2391 * for now we set to 0 */
2392 priv->rxon_timing.atim_window = 0;
2393 }
2394
2395 interval_tm_unit =
2396 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2397 result = do_div(tsf, interval_tm_unit);
2398 priv->rxon_timing.beacon_init_val =
2399 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2400
2401 IWL_DEBUG_ASSOC
2402 ("beacon interval %d beacon timer %d beacon tim %d\n",
2403 le16_to_cpu(priv->rxon_timing.beacon_interval),
2404 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2405 le16_to_cpu(priv->rxon_timing.atim_window));
2406}
2407
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002408static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002409{
2410 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2411 IWL_ERROR("APs don't scan.\n");
2412 return 0;
2413 }
2414
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002415 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002416 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2417 return -EIO;
2418 }
2419
2420 if (test_bit(STATUS_SCANNING, &priv->status)) {
2421 IWL_DEBUG_SCAN("Scan already in progress.\n");
2422 return -EAGAIN;
2423 }
2424
2425 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2426 IWL_DEBUG_SCAN("Scan request while abort pending. "
2427 "Queuing.\n");
2428 return -EAGAIN;
2429 }
2430
2431 IWL_DEBUG_INFO("Starting scan...\n");
2432 priv->scan_bands = 2;
2433 set_bit(STATUS_SCANNING, &priv->status);
2434 priv->scan_start = jiffies;
2435 priv->scan_pass_start = priv->scan_start;
2436
2437 queue_work(priv->workqueue, &priv->request_scan);
2438
2439 return 0;
2440}
2441
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002442static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
Zhu Yib481de92007-09-25 17:54:57 -07002443{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002444 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07002445
2446 if (hw_decrypt)
2447 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2448 else
2449 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2450
2451 return 0;
2452}
2453
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002454static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv, u8 phymode)
Zhu Yib481de92007-09-25 17:54:57 -07002455{
2456 if (phymode == MODE_IEEE80211A) {
2457 priv->staging_rxon.flags &=
2458 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2459 | RXON_FLG_CCK_MSK);
2460 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2461 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002462 /* Copied from iwl3945_bg_post_associate() */
Zhu Yib481de92007-09-25 17:54:57 -07002463 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2464 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2465 else
2466 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2467
2468 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2469 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2470
2471 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2472 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2473 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2474 }
2475}
2476
2477/*
Ian Schram01ebd062007-10-25 17:15:22 +08002478 * initialize rxon structure with default values from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07002479 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002480static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002481{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002482 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002483
2484 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2485
2486 switch (priv->iw_mode) {
2487 case IEEE80211_IF_TYPE_AP:
2488 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2489 break;
2490
2491 case IEEE80211_IF_TYPE_STA:
2492 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2493 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2494 break;
2495
2496 case IEEE80211_IF_TYPE_IBSS:
2497 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2498 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2499 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2500 RXON_FILTER_ACCEPT_GRP_MSK;
2501 break;
2502
2503 case IEEE80211_IF_TYPE_MNTR:
2504 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2505 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2506 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2507 break;
2508 }
2509
2510#if 0
2511 /* TODO: Figure out when short_preamble would be set and cache from
2512 * that */
2513 if (!hw_to_local(priv->hw)->short_preamble)
2514 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2515 else
2516 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2517#endif
2518
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002519 ch_info = iwl3945_get_channel_info(priv, priv->phymode,
Zhu Yib481de92007-09-25 17:54:57 -07002520 le16_to_cpu(priv->staging_rxon.channel));
2521
2522 if (!ch_info)
2523 ch_info = &priv->channel_info[0];
2524
2525 /*
2526 * in some case A channels are all non IBSS
2527 * in this case force B/G channel
2528 */
2529 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2530 !(is_channel_ibss(ch_info)))
2531 ch_info = &priv->channel_info[0];
2532
2533 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2534 if (is_channel_a_band(ch_info))
2535 priv->phymode = MODE_IEEE80211A;
2536 else
2537 priv->phymode = MODE_IEEE80211G;
2538
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002539 iwl3945_set_flags_for_phymode(priv, priv->phymode);
Zhu Yib481de92007-09-25 17:54:57 -07002540
2541 priv->staging_rxon.ofdm_basic_rates =
2542 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2543 priv->staging_rxon.cck_basic_rates =
2544 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2545}
2546
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002547static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
Zhu Yib481de92007-09-25 17:54:57 -07002548{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002549 if (!iwl3945_is_ready_rf(priv))
Zhu Yib481de92007-09-25 17:54:57 -07002550 return -EAGAIN;
2551
2552 if (mode == IEEE80211_IF_TYPE_IBSS) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002553 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002554
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002555 ch_info = iwl3945_get_channel_info(priv,
Zhu Yib481de92007-09-25 17:54:57 -07002556 priv->phymode,
2557 le16_to_cpu(priv->staging_rxon.channel));
2558
2559 if (!ch_info || !is_channel_ibss(ch_info)) {
2560 IWL_ERROR("channel %d not IBSS channel\n",
2561 le16_to_cpu(priv->staging_rxon.channel));
2562 return -EINVAL;
2563 }
2564 }
2565
2566 cancel_delayed_work(&priv->scan_check);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002567 if (iwl3945_scan_cancel_timeout(priv, 100)) {
Zhu Yib481de92007-09-25 17:54:57 -07002568 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2569 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2570 return -EAGAIN;
2571 }
2572
2573 priv->iw_mode = mode;
2574
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002575 iwl3945_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002576 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2577
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002578 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002579
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002580 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002581
2582 return 0;
2583}
2584
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002585static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07002586 struct ieee80211_tx_control *ctl,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002587 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07002588 struct sk_buff *skb_frag,
2589 int last_frag)
2590{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002591 struct iwl3945_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
Zhu Yib481de92007-09-25 17:54:57 -07002592
2593 switch (keyinfo->alg) {
2594 case ALG_CCMP:
2595 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2596 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2597 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2598 break;
2599
2600 case ALG_TKIP:
2601#if 0
2602 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2603
2604 if (last_frag)
2605 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2606 8);
2607 else
2608 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2609#endif
2610 break;
2611
2612 case ALG_WEP:
2613 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2614 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2615
2616 if (keyinfo->keylen == 13)
2617 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2618
2619 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2620
2621 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2622 "with key %d\n", ctl->key_idx);
2623 break;
2624
Zhu Yib481de92007-09-25 17:54:57 -07002625 default:
2626 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2627 break;
2628 }
2629}
2630
2631/*
2632 * handle build REPLY_TX command notification.
2633 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002634static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2635 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07002636 struct ieee80211_tx_control *ctrl,
2637 struct ieee80211_hdr *hdr,
2638 int is_unicast, u8 std_id)
2639{
2640 __le16 *qc;
2641 u16 fc = le16_to_cpu(hdr->frame_control);
2642 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2643
2644 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2645 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2646 tx_flags |= TX_CMD_FLG_ACK_MSK;
2647 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2648 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2649 if (ieee80211_is_probe_response(fc) &&
2650 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2651 tx_flags |= TX_CMD_FLG_TSF_MSK;
2652 } else {
2653 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2654 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2655 }
2656
2657 cmd->cmd.tx.sta_id = std_id;
2658 if (ieee80211_get_morefrag(hdr))
2659 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2660
2661 qc = ieee80211_get_qos_ctrl(hdr);
2662 if (qc) {
2663 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2664 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2665 } else
2666 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2667
2668 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2669 tx_flags |= TX_CMD_FLG_RTS_MSK;
2670 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2671 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2672 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2673 tx_flags |= TX_CMD_FLG_CTS_MSK;
2674 }
2675
2676 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2677 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2678
2679 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2680 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2681 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2682 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
Ian Schrambc434dd2007-10-25 17:15:29 +08002683 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
Zhu Yib481de92007-09-25 17:54:57 -07002684 else
Ian Schrambc434dd2007-10-25 17:15:29 +08002685 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
Zhu Yib481de92007-09-25 17:54:57 -07002686 } else
2687 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2688
2689 cmd->cmd.tx.driver_txop = 0;
2690 cmd->cmd.tx.tx_flags = tx_flags;
2691 cmd->cmd.tx.next_frame_len = 0;
2692}
2693
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002694/**
2695 * iwl3945_get_sta_id - Find station's index within station table
2696 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002697static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
Zhu Yib481de92007-09-25 17:54:57 -07002698{
2699 int sta_id;
2700 u16 fc = le16_to_cpu(hdr->frame_control);
2701
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002702 /* If this frame is broadcast or management, use broadcast station id */
Zhu Yib481de92007-09-25 17:54:57 -07002703 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2704 is_multicast_ether_addr(hdr->addr1))
2705 return priv->hw_setting.bcast_sta_id;
2706
2707 switch (priv->iw_mode) {
2708
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002709 /* If we are a client station in a BSS network, use the special
2710 * AP station entry (that's the only station we communicate with) */
Zhu Yib481de92007-09-25 17:54:57 -07002711 case IEEE80211_IF_TYPE_STA:
2712 return IWL_AP_ID;
2713
2714 /* If we are an AP, then find the station, or use BCAST */
2715 case IEEE80211_IF_TYPE_AP:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002716 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002717 if (sta_id != IWL_INVALID_STATION)
2718 return sta_id;
2719 return priv->hw_setting.bcast_sta_id;
2720
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002721 /* If this frame is going out to an IBSS network, find the station,
2722 * or create a new station table entry */
Joe Perches0795af52007-10-03 17:59:30 -07002723 case IEEE80211_IF_TYPE_IBSS: {
2724 DECLARE_MAC_BUF(mac);
2725
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002726 /* Create new station table entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002727 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002728 if (sta_id != IWL_INVALID_STATION)
2729 return sta_id;
2730
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002731 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07002732
2733 if (sta_id != IWL_INVALID_STATION)
2734 return sta_id;
2735
Joe Perches0795af52007-10-03 17:59:30 -07002736 IWL_DEBUG_DROP("Station %s not in station map. "
Zhu Yib481de92007-09-25 17:54:57 -07002737 "Defaulting to broadcast...\n",
Joe Perches0795af52007-10-03 17:59:30 -07002738 print_mac(mac, hdr->addr1));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002739 iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
Zhu Yib481de92007-09-25 17:54:57 -07002740 return priv->hw_setting.bcast_sta_id;
Joe Perches0795af52007-10-03 17:59:30 -07002741 }
Zhu Yib481de92007-09-25 17:54:57 -07002742 default:
Ian Schram01ebd062007-10-25 17:15:22 +08002743 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002744 return priv->hw_setting.bcast_sta_id;
2745 }
2746}
2747
2748/*
2749 * start REPLY_TX command process
2750 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002751static int iwl3945_tx_skb(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07002752 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2753{
2754 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002755 struct iwl3945_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -07002756 u32 *control_flags;
2757 int txq_id = ctl->queue;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002758 struct iwl3945_tx_queue *txq = NULL;
2759 struct iwl3945_queue *q = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002760 dma_addr_t phys_addr;
2761 dma_addr_t txcmd_phys;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002762 struct iwl3945_cmd *out_cmd = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002763 u16 len, idx, len_org;
2764 u8 id, hdr_len, unicast;
2765 u8 sta_id;
2766 u16 seq_number = 0;
2767 u16 fc;
2768 __le16 *qc;
2769 u8 wait_write_ptr = 0;
2770 unsigned long flags;
2771 int rc;
2772
2773 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002774 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002775 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2776 goto drop_unlock;
2777 }
2778
2779 if (!priv->interface_id) {
2780 IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
2781 goto drop_unlock;
2782 }
2783
2784 if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
2785 IWL_ERROR("ERROR: No TX rate available.\n");
2786 goto drop_unlock;
2787 }
2788
2789 unicast = !is_multicast_ether_addr(hdr->addr1);
2790 id = 0;
2791
2792 fc = le16_to_cpu(hdr->frame_control);
2793
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002794#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07002795 if (ieee80211_is_auth(fc))
2796 IWL_DEBUG_TX("Sending AUTH frame\n");
2797 else if (ieee80211_is_assoc_request(fc))
2798 IWL_DEBUG_TX("Sending ASSOC frame\n");
2799 else if (ieee80211_is_reassoc_request(fc))
2800 IWL_DEBUG_TX("Sending REASSOC frame\n");
2801#endif
2802
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08002803 /* drop all data frame if we are not associated */
2804 if (!iwl3945_is_associated(priv) && !priv->assoc_id &&
Zhu Yib481de92007-09-25 17:54:57 -07002805 ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002806 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
Zhu Yib481de92007-09-25 17:54:57 -07002807 goto drop_unlock;
2808 }
2809
2810 spin_unlock_irqrestore(&priv->lock, flags);
2811
2812 hdr_len = ieee80211_get_hdrlen(fc);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002813
2814 /* Find (or create) index into station table for destination station */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002815 sta_id = iwl3945_get_sta_id(priv, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002816 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07002817 DECLARE_MAC_BUF(mac);
2818
2819 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2820 print_mac(mac, hdr->addr1));
Zhu Yib481de92007-09-25 17:54:57 -07002821 goto drop;
2822 }
2823
2824 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2825
2826 qc = ieee80211_get_qos_ctrl(hdr);
2827 if (qc) {
2828 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2829 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2830 IEEE80211_SCTL_SEQ;
2831 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2832 (hdr->seq_ctrl &
2833 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2834 seq_number += 0x10;
2835 }
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002836
2837 /* Descriptor for chosen Tx queue */
Zhu Yib481de92007-09-25 17:54:57 -07002838 txq = &priv->txq[txq_id];
2839 q = &txq->q;
2840
2841 spin_lock_irqsave(&priv->lock, flags);
2842
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002843 /* Set up first empty TFD within this queue's circular TFD buffer */
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002844 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -07002845 memset(tfd, 0, sizeof(*tfd));
2846 control_flags = (u32 *) tfd;
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002847 idx = get_cmd_index(q, q->write_ptr, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002848
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002849 /* Set up driver data for this TFD */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002850 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002851 txq->txb[q->write_ptr].skb[0] = skb;
2852 memcpy(&(txq->txb[q->write_ptr].status.control),
Zhu Yib481de92007-09-25 17:54:57 -07002853 ctl, sizeof(struct ieee80211_tx_control));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002854
2855 /* Init first empty entry in queue's array of Tx/cmd buffers */
Zhu Yib481de92007-09-25 17:54:57 -07002856 out_cmd = &txq->cmd[idx];
2857 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2858 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002859
2860 /*
2861 * Set up the Tx-command (not MAC!) header.
2862 * Store the chosen Tx queue and TFD index within the sequence field;
2863 * after Tx, uCode's Tx response will return this value so driver can
2864 * locate the frame within the tx queue and do post-tx processing.
2865 */
Zhu Yib481de92007-09-25 17:54:57 -07002866 out_cmd->hdr.cmd = REPLY_TX;
2867 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002868 INDEX_TO_SEQ(q->write_ptr)));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002869
2870 /* Copy MAC header from skb into command buffer */
Zhu Yib481de92007-09-25 17:54:57 -07002871 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2872
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002873 /*
2874 * Use the first empty entry in this queue's command buffer array
2875 * to contain the Tx command and MAC header concatenated together
2876 * (payload data will be in another buffer).
2877 * Size of this varies, due to varying MAC header length.
2878 * If end is not dword aligned, we'll have 2 extra bytes at the end
2879 * of the MAC header (device reads on dword boundaries).
2880 * We'll tell device about this padding later.
2881 */
Zhu Yib481de92007-09-25 17:54:57 -07002882 len = priv->hw_setting.tx_cmd_len +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002883 sizeof(struct iwl3945_cmd_header) + hdr_len;
Zhu Yib481de92007-09-25 17:54:57 -07002884
2885 len_org = len;
2886 len = (len + 3) & ~3;
2887
2888 if (len_org != len)
2889 len_org = 1;
2890 else
2891 len_org = 0;
2892
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002893 /* Physical address of this Tx command's header (not MAC header!),
2894 * within command buffer array. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002895 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2896 offsetof(struct iwl3945_cmd, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002897
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002898 /* Add buffer containing Tx command and MAC(!) header to TFD's
2899 * first entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002900 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
Zhu Yib481de92007-09-25 17:54:57 -07002901
2902 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002903 iwl3945_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002904
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002905 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2906 * if any (802.11 null frames have no payload). */
Zhu Yib481de92007-09-25 17:54:57 -07002907 len = skb->len - hdr_len;
2908 if (len) {
2909 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2910 len, PCI_DMA_TODEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002911 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
Zhu Yib481de92007-09-25 17:54:57 -07002912 }
2913
Zhu Yib481de92007-09-25 17:54:57 -07002914 if (!len)
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002915 /* If there is no payload, then we use only one Tx buffer */
Zhu Yib481de92007-09-25 17:54:57 -07002916 *control_flags = TFD_CTL_COUNT_SET(1);
2917 else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002918 /* Else use 2 buffers.
2919 * Tell 3945 about any padding after MAC header */
Zhu Yib481de92007-09-25 17:54:57 -07002920 *control_flags = TFD_CTL_COUNT_SET(2) |
2921 TFD_CTL_PAD_SET(U32_PAD(len));
2922
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002923 /* Total # bytes to be transmitted */
Zhu Yib481de92007-09-25 17:54:57 -07002924 len = (u16)skb->len;
2925 out_cmd->cmd.tx.len = cpu_to_le16(len);
2926
2927 /* TODO need this for burst mode later on */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002928 iwl3945_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07002929
2930 /* set is_hcca to 0; it probably will never be implemented */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002931 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002932
2933 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2934 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2935
2936 if (!ieee80211_get_morefrag(hdr)) {
2937 txq->need_update = 1;
2938 if (qc) {
2939 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2940 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2941 }
2942 } else {
2943 wait_write_ptr = 1;
2944 txq->need_update = 0;
2945 }
2946
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002947 iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
Zhu Yib481de92007-09-25 17:54:57 -07002948 sizeof(out_cmd->cmd.tx));
2949
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002950 iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
Zhu Yib481de92007-09-25 17:54:57 -07002951 ieee80211_get_hdrlen(fc));
2952
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002953 /* Tell device the write index *just past* this latest filled TFD */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002954 q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
2955 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07002956 spin_unlock_irqrestore(&priv->lock, flags);
2957
2958 if (rc)
2959 return rc;
2960
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002961 if ((iwl3945_queue_space(q) < q->high_mark)
Zhu Yib481de92007-09-25 17:54:57 -07002962 && priv->mac80211_registered) {
2963 if (wait_write_ptr) {
2964 spin_lock_irqsave(&priv->lock, flags);
2965 txq->need_update = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002966 iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07002967 spin_unlock_irqrestore(&priv->lock, flags);
2968 }
2969
2970 ieee80211_stop_queue(priv->hw, ctl->queue);
2971 }
2972
2973 return 0;
2974
2975drop_unlock:
2976 spin_unlock_irqrestore(&priv->lock, flags);
2977drop:
2978 return -1;
2979}
2980
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002981static void iwl3945_set_rate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002982{
2983 const struct ieee80211_hw_mode *hw = NULL;
2984 struct ieee80211_rate *rate;
2985 int i;
2986
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002987 hw = iwl3945_get_hw_mode(priv, priv->phymode);
Saleem Abdulrasoolc4ba9622007-11-18 23:59:08 -08002988 if (!hw) {
2989 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2990 return;
2991 }
Zhu Yib481de92007-09-25 17:54:57 -07002992
2993 priv->active_rate = 0;
2994 priv->active_rate_basic = 0;
2995
2996 IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
2997 hw->mode == MODE_IEEE80211A ?
2998 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
2999
3000 for (i = 0; i < hw->num_rates; i++) {
3001 rate = &(hw->rates[i]);
3002 if ((rate->val < IWL_RATE_COUNT) &&
3003 (rate->flags & IEEE80211_RATE_SUPPORTED)) {
3004 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003005 rate->val, iwl3945_rates[rate->val].plcp,
Zhu Yib481de92007-09-25 17:54:57 -07003006 (rate->flags & IEEE80211_RATE_BASIC) ?
3007 "*" : "");
3008 priv->active_rate |= (1 << rate->val);
3009 if (rate->flags & IEEE80211_RATE_BASIC)
3010 priv->active_rate_basic |= (1 << rate->val);
3011 } else
3012 IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003013 rate->val, iwl3945_rates[rate->val].plcp);
Zhu Yib481de92007-09-25 17:54:57 -07003014 }
3015
3016 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
3017 priv->active_rate, priv->active_rate_basic);
3018
3019 /*
3020 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
3021 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
3022 * OFDM
3023 */
3024 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
3025 priv->staging_rxon.cck_basic_rates =
3026 ((priv->active_rate_basic &
3027 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
3028 else
3029 priv->staging_rxon.cck_basic_rates =
3030 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
3031
3032 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
3033 priv->staging_rxon.ofdm_basic_rates =
3034 ((priv->active_rate_basic &
3035 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
3036 IWL_FIRST_OFDM_RATE) & 0xFF;
3037 else
3038 priv->staging_rxon.ofdm_basic_rates =
3039 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
3040}
3041
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003042static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
Zhu Yib481de92007-09-25 17:54:57 -07003043{
3044 unsigned long flags;
3045
3046 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
3047 return;
3048
3049 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
3050 disable_radio ? "OFF" : "ON");
3051
3052 if (disable_radio) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003053 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003054 /* FIXME: This is a workaround for AP */
3055 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3056 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003057 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07003058 CSR_UCODE_SW_BIT_RFKILL);
3059 spin_unlock_irqrestore(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003060 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
Zhu Yib481de92007-09-25 17:54:57 -07003061 set_bit(STATUS_RF_KILL_SW, &priv->status);
3062 }
3063 return;
3064 }
3065
3066 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003067 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07003068
3069 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3070 spin_unlock_irqrestore(&priv->lock, flags);
3071
3072 /* wake up ucode */
3073 msleep(10);
3074
3075 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003076 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3077 if (!iwl3945_grab_nic_access(priv))
3078 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003079 spin_unlock_irqrestore(&priv->lock, flags);
3080
3081 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
3082 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
3083 "disabled by HW switch\n");
3084 return;
3085 }
3086
3087 queue_work(priv->workqueue, &priv->restart);
3088 return;
3089}
3090
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003091void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07003092 u32 decrypt_res, struct ieee80211_rx_status *stats)
3093{
3094 u16 fc =
3095 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
3096
3097 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
3098 return;
3099
3100 if (!(fc & IEEE80211_FCTL_PROTECTED))
3101 return;
3102
3103 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
3104 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
3105 case RX_RES_STATUS_SEC_TYPE_TKIP:
3106 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3107 RX_RES_STATUS_BAD_ICV_MIC)
3108 stats->flag |= RX_FLAG_MMIC_ERROR;
3109 case RX_RES_STATUS_SEC_TYPE_WEP:
3110 case RX_RES_STATUS_SEC_TYPE_CCMP:
3111 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3112 RX_RES_STATUS_DECRYPT_OK) {
3113 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
3114 stats->flag |= RX_FLAG_DECRYPTED;
3115 }
3116 break;
3117
3118 default:
3119 break;
3120 }
3121}
3122
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003123void iwl3945_handle_data_packet_monitor(struct iwl3945_priv *priv,
3124 struct iwl3945_rx_mem_buffer *rxb,
Zhu Yib481de92007-09-25 17:54:57 -07003125 void *data, short len,
3126 struct ieee80211_rx_status *stats,
3127 u16 phy_flags)
3128{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003129 struct iwl3945_rt_rx_hdr *iwl3945_rt;
Zhu Yib481de92007-09-25 17:54:57 -07003130
3131 /* First cache any information we need before we overwrite
3132 * the information provided in the skb from the hardware */
3133 s8 signal = stats->ssi;
3134 s8 noise = 0;
3135 int rate = stats->rate;
3136 u64 tsf = stats->mactime;
3137 __le16 phy_flags_hw = cpu_to_le16(phy_flags);
3138
3139 /* We received data from the HW, so stop the watchdog */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003140 if (len > IWL_RX_BUF_SIZE - sizeof(*iwl3945_rt)) {
Zhu Yib481de92007-09-25 17:54:57 -07003141 IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
3142 return;
3143 }
3144
3145 /* copy the frame data to write after where the radiotap header goes */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003146 iwl3945_rt = (void *)rxb->skb->data;
3147 memmove(iwl3945_rt->payload, data, len);
Zhu Yib481de92007-09-25 17:54:57 -07003148
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003149 iwl3945_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
3150 iwl3945_rt->rt_hdr.it_pad = 0; /* always good to zero */
Zhu Yib481de92007-09-25 17:54:57 -07003151
3152 /* total header + data */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003153 iwl3945_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl3945_rt));
Zhu Yib481de92007-09-25 17:54:57 -07003154
3155 /* Set the size of the skb to the size of the frame */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003156 skb_put(rxb->skb, sizeof(*iwl3945_rt) + len);
Zhu Yib481de92007-09-25 17:54:57 -07003157
3158 /* Big bitfield of all the fields we provide in radiotap */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003159 iwl3945_rt->rt_hdr.it_present =
Zhu Yib481de92007-09-25 17:54:57 -07003160 cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
3161 (1 << IEEE80211_RADIOTAP_FLAGS) |
3162 (1 << IEEE80211_RADIOTAP_RATE) |
3163 (1 << IEEE80211_RADIOTAP_CHANNEL) |
3164 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
3165 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
3166 (1 << IEEE80211_RADIOTAP_ANTENNA));
3167
3168 /* Zero the flags, we'll add to them as we go */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003169 iwl3945_rt->rt_flags = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003170
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003171 iwl3945_rt->rt_tsf = cpu_to_le64(tsf);
Zhu Yib481de92007-09-25 17:54:57 -07003172
3173 /* Convert to dBm */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003174 iwl3945_rt->rt_dbmsignal = signal;
3175 iwl3945_rt->rt_dbmnoise = noise;
Zhu Yib481de92007-09-25 17:54:57 -07003176
3177 /* Convert the channel frequency and set the flags */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003178 iwl3945_rt->rt_channelMHz = cpu_to_le16(stats->freq);
Zhu Yib481de92007-09-25 17:54:57 -07003179 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003180 iwl3945_rt->rt_chbitmask =
Zhu Yib481de92007-09-25 17:54:57 -07003181 cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
3182 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003183 iwl3945_rt->rt_chbitmask =
Zhu Yib481de92007-09-25 17:54:57 -07003184 cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
3185 else /* 802.11g */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003186 iwl3945_rt->rt_chbitmask =
Zhu Yib481de92007-09-25 17:54:57 -07003187 cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));
3188
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003189 rate = iwl3945_rate_index_from_plcp(rate);
Zhu Yib481de92007-09-25 17:54:57 -07003190 if (rate == -1)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003191 iwl3945_rt->rt_rate = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003192 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003193 iwl3945_rt->rt_rate = iwl3945_rates[rate].ieee;
Zhu Yib481de92007-09-25 17:54:57 -07003194
3195 /* antenna number */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003196 iwl3945_rt->rt_antenna =
Zhu Yib481de92007-09-25 17:54:57 -07003197 le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
3198
3199 /* set the preamble flag if we have it */
3200 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003201 iwl3945_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
Zhu Yib481de92007-09-25 17:54:57 -07003202
3203 IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
3204
3205 stats->flag |= RX_FLAG_RADIOTAP;
3206 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
3207 rxb->skb = NULL;
3208}
3209
3210
3211#define IWL_PACKET_RETRY_TIME HZ
3212
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003213int iwl3945_is_duplicate_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07003214{
3215 u16 sc = le16_to_cpu(header->seq_ctrl);
3216 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
3217 u16 frag = sc & IEEE80211_SCTL_FRAG;
3218 u16 *last_seq, *last_frag;
3219 unsigned long *last_time;
3220
3221 switch (priv->iw_mode) {
3222 case IEEE80211_IF_TYPE_IBSS:{
3223 struct list_head *p;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003224 struct iwl3945_ibss_seq *entry = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07003225 u8 *mac = header->addr2;
3226 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
3227
3228 __list_for_each(p, &priv->ibss_mac_hash[index]) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003229 entry = list_entry(p, struct iwl3945_ibss_seq, list);
Zhu Yib481de92007-09-25 17:54:57 -07003230 if (!compare_ether_addr(entry->mac, mac))
3231 break;
3232 }
3233 if (p == &priv->ibss_mac_hash[index]) {
3234 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
3235 if (!entry) {
Ian Schrambc434dd2007-10-25 17:15:29 +08003236 IWL_ERROR("Cannot malloc new mac entry\n");
Zhu Yib481de92007-09-25 17:54:57 -07003237 return 0;
3238 }
3239 memcpy(entry->mac, mac, ETH_ALEN);
3240 entry->seq_num = seq;
3241 entry->frag_num = frag;
3242 entry->packet_time = jiffies;
Ian Schrambc434dd2007-10-25 17:15:29 +08003243 list_add(&entry->list, &priv->ibss_mac_hash[index]);
Zhu Yib481de92007-09-25 17:54:57 -07003244 return 0;
3245 }
3246 last_seq = &entry->seq_num;
3247 last_frag = &entry->frag_num;
3248 last_time = &entry->packet_time;
3249 break;
3250 }
3251 case IEEE80211_IF_TYPE_STA:
3252 last_seq = &priv->last_seq_num;
3253 last_frag = &priv->last_frag_num;
3254 last_time = &priv->last_packet_time;
3255 break;
3256 default:
3257 return 0;
3258 }
3259 if ((*last_seq == seq) &&
3260 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3261 if (*last_frag == frag)
3262 goto drop;
3263 if (*last_frag + 1 != frag)
3264 /* out-of-order fragment */
3265 goto drop;
3266 } else
3267 *last_seq = seq;
3268
3269 *last_frag = frag;
3270 *last_time = jiffies;
3271 return 0;
3272
3273 drop:
3274 return 1;
3275}
3276
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003277#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07003278
3279#include "iwl-spectrum.h"
3280
3281#define BEACON_TIME_MASK_LOW 0x00FFFFFF
3282#define BEACON_TIME_MASK_HIGH 0xFF000000
3283#define TIME_UNIT 1024
3284
3285/*
3286 * extended beacon time format
3287 * time in usec will be changed into a 32-bit value in 8:24 format
3288 * the high 1 byte is the beacon counts
3289 * the lower 3 bytes is the time in usec within one beacon interval
3290 */
3291
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003292static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07003293{
3294 u32 quot;
3295 u32 rem;
3296 u32 interval = beacon_interval * 1024;
3297
3298 if (!interval || !usec)
3299 return 0;
3300
3301 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3302 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3303
3304 return (quot << 24) + rem;
3305}
3306
3307/* base is usually what we get from ucode with each received frame,
3308 * the same as HW timer counter counting down
3309 */
3310
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003311static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07003312{
3313 u32 base_low = base & BEACON_TIME_MASK_LOW;
3314 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3315 u32 interval = beacon_interval * TIME_UNIT;
3316 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3317 (addon & BEACON_TIME_MASK_HIGH);
3318
3319 if (base_low > addon_low)
3320 res += base_low - addon_low;
3321 else if (base_low < addon_low) {
3322 res += interval + base_low - addon_low;
3323 res += (1 << 24);
3324 } else
3325 res += (1 << 24);
3326
3327 return cpu_to_le32(res);
3328}
3329
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003330static int iwl3945_get_measurement(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07003331 struct ieee80211_measurement_params *params,
3332 u8 type)
3333{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003334 struct iwl3945_spectrum_cmd spectrum;
3335 struct iwl3945_rx_packet *res;
3336 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07003337 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3338 .data = (void *)&spectrum,
3339 .meta.flags = CMD_WANT_SKB,
3340 };
3341 u32 add_time = le64_to_cpu(params->start_time);
3342 int rc;
3343 int spectrum_resp_status;
3344 int duration = le16_to_cpu(params->duration);
3345
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003346 if (iwl3945_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003347 add_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003348 iwl3945_usecs_to_beacons(
Zhu Yib481de92007-09-25 17:54:57 -07003349 le64_to_cpu(params->start_time) - priv->last_tsf,
3350 le16_to_cpu(priv->rxon_timing.beacon_interval));
3351
3352 memset(&spectrum, 0, sizeof(spectrum));
3353
3354 spectrum.channel_count = cpu_to_le16(1);
3355 spectrum.flags =
3356 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3357 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3358 cmd.len = sizeof(spectrum);
3359 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3360
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003361 if (iwl3945_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003362 spectrum.start_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003363 iwl3945_add_beacon_time(priv->last_beacon_time,
Zhu Yib481de92007-09-25 17:54:57 -07003364 add_time,
3365 le16_to_cpu(priv->rxon_timing.beacon_interval));
3366 else
3367 spectrum.start_time = 0;
3368
3369 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3370 spectrum.channels[0].channel = params->channel;
3371 spectrum.channels[0].type = type;
3372 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3373 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3374 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3375
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003376 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07003377 if (rc)
3378 return rc;
3379
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003380 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003381 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3382 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3383 rc = -EIO;
3384 }
3385
3386 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3387 switch (spectrum_resp_status) {
3388 case 0: /* Command will be handled */
3389 if (res->u.spectrum.id != 0xff) {
Ian Schrambc434dd2007-10-25 17:15:29 +08003390 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
3391 res->u.spectrum.id);
Zhu Yib481de92007-09-25 17:54:57 -07003392 priv->measurement_status &= ~MEASUREMENT_READY;
3393 }
3394 priv->measurement_status |= MEASUREMENT_ACTIVE;
3395 rc = 0;
3396 break;
3397
3398 case 1: /* Command will not be handled */
3399 rc = -EAGAIN;
3400 break;
3401 }
3402
3403 dev_kfree_skb_any(cmd.meta.u.skb);
3404
3405 return rc;
3406}
3407#endif
3408
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003409static void iwl3945_txstatus_to_ieee(struct iwl3945_priv *priv,
3410 struct iwl3945_tx_info *tx_sta)
Zhu Yib481de92007-09-25 17:54:57 -07003411{
3412
3413 tx_sta->status.ack_signal = 0;
3414 tx_sta->status.excessive_retries = 0;
3415 tx_sta->status.queue_length = 0;
3416 tx_sta->status.queue_number = 0;
3417
3418 if (in_interrupt())
3419 ieee80211_tx_status_irqsafe(priv->hw,
3420 tx_sta->skb[0], &(tx_sta->status));
3421 else
3422 ieee80211_tx_status(priv->hw,
3423 tx_sta->skb[0], &(tx_sta->status));
3424
3425 tx_sta->skb[0] = NULL;
3426}
3427
3428/**
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003429 * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
Zhu Yib481de92007-09-25 17:54:57 -07003430 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003431 * When FW advances 'R' index, all entries between old and new 'R' index
3432 * need to be reclaimed. As result, some free space forms. If there is
3433 * enough free space (> low mark), wake the stack that feeds us.
Zhu Yib481de92007-09-25 17:54:57 -07003434 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003435static int iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv, int txq_id, int index)
Zhu Yib481de92007-09-25 17:54:57 -07003436{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003437 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3438 struct iwl3945_queue *q = &txq->q;
Zhu Yib481de92007-09-25 17:54:57 -07003439 int nfreed = 0;
3440
3441 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3442 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3443 "is out of range [0-%d] %d %d.\n", txq_id,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003444 index, q->n_bd, q->write_ptr, q->read_ptr);
Zhu Yib481de92007-09-25 17:54:57 -07003445 return 0;
3446 }
3447
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003448 for (index = iwl3945_queue_inc_wrap(index, q->n_bd);
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003449 q->read_ptr != index;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003450 q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd)) {
Zhu Yib481de92007-09-25 17:54:57 -07003451 if (txq_id != IWL_CMD_QUEUE_NUM) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003452 iwl3945_txstatus_to_ieee(priv,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003453 &(txq->txb[txq->q.read_ptr]));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003454 iwl3945_hw_txq_free_tfd(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07003455 } else if (nfreed > 1) {
3456 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003457 q->write_ptr, q->read_ptr);
Zhu Yib481de92007-09-25 17:54:57 -07003458 queue_work(priv->workqueue, &priv->restart);
3459 }
3460 nfreed++;
3461 }
3462
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003463 if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
Zhu Yib481de92007-09-25 17:54:57 -07003464 (txq_id != IWL_CMD_QUEUE_NUM) &&
3465 priv->mac80211_registered)
3466 ieee80211_wake_queue(priv->hw, txq_id);
3467
3468
3469 return nfreed;
3470}
3471
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003472static int iwl3945_is_tx_success(u32 status)
Zhu Yib481de92007-09-25 17:54:57 -07003473{
3474 return (status & 0xFF) == 0x1;
3475}
3476
3477/******************************************************************************
3478 *
3479 * Generic RX handler implementations
3480 *
3481 ******************************************************************************/
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003482/**
3483 * iwl3945_rx_reply_tx - Handle Tx response
3484 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003485static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
3486 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003487{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003488 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003489 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3490 int txq_id = SEQ_TO_QUEUE(sequence);
3491 int index = SEQ_TO_INDEX(sequence);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003492 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
Zhu Yib481de92007-09-25 17:54:57 -07003493 struct ieee80211_tx_status *tx_status;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003494 struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
Zhu Yib481de92007-09-25 17:54:57 -07003495 u32 status = le32_to_cpu(tx_resp->status);
3496
3497 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3498 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3499 "is out of range [0-%d] %d %d\n", txq_id,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003500 index, txq->q.n_bd, txq->q.write_ptr,
3501 txq->q.read_ptr);
Zhu Yib481de92007-09-25 17:54:57 -07003502 return;
3503 }
3504
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003505 tx_status = &(txq->txb[txq->q.read_ptr].status);
Zhu Yib481de92007-09-25 17:54:57 -07003506
3507 tx_status->retry_count = tx_resp->failure_frame;
3508 tx_status->queue_number = status;
3509 tx_status->queue_length = tx_resp->bt_kill_count;
3510 tx_status->queue_length |= tx_resp->failure_rts;
3511
3512 tx_status->flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003513 iwl3945_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
Zhu Yib481de92007-09-25 17:54:57 -07003514
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003515 tx_status->control.tx_rate = iwl3945_rate_index_from_plcp(tx_resp->rate);
Zhu Yib481de92007-09-25 17:54:57 -07003516
3517 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003518 txq_id, iwl3945_get_tx_fail_reason(status), status,
Zhu Yib481de92007-09-25 17:54:57 -07003519 tx_resp->rate, tx_resp->failure_frame);
3520
3521 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3522 if (index != -1)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003523 iwl3945_tx_queue_reclaim(priv, txq_id, index);
Zhu Yib481de92007-09-25 17:54:57 -07003524
3525 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3526 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3527}
3528
3529
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003530static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
3531 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003532{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003533 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3534 struct iwl3945_alive_resp *palive;
Zhu Yib481de92007-09-25 17:54:57 -07003535 struct delayed_work *pwork;
3536
3537 palive = &pkt->u.alive_frame;
3538
3539 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3540 "0x%01X 0x%01X\n",
3541 palive->is_valid, palive->ver_type,
3542 palive->ver_subtype);
3543
3544 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3545 IWL_DEBUG_INFO("Initialization Alive received.\n");
3546 memcpy(&priv->card_alive_init,
3547 &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003548 sizeof(struct iwl3945_init_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003549 pwork = &priv->init_alive_start;
3550 } else {
3551 IWL_DEBUG_INFO("Runtime Alive received.\n");
3552 memcpy(&priv->card_alive, &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003553 sizeof(struct iwl3945_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003554 pwork = &priv->alive_start;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003555 iwl3945_disable_events(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003556 }
3557
3558 /* We delay the ALIVE response by 5ms to
3559 * give the HW RF Kill time to activate... */
3560 if (palive->is_valid == UCODE_VALID_OK)
3561 queue_delayed_work(priv->workqueue, pwork,
3562 msecs_to_jiffies(5));
3563 else
3564 IWL_WARNING("uCode did not respond OK.\n");
3565}
3566
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003567static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
3568 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003569{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003570 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003571
3572 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3573 return;
3574}
3575
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003576static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
3577 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003578{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003579 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003580
3581 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3582 "seq 0x%04X ser 0x%08X\n",
3583 le32_to_cpu(pkt->u.err_resp.error_type),
3584 get_cmd_string(pkt->u.err_resp.cmd_id),
3585 pkt->u.err_resp.cmd_id,
3586 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3587 le32_to_cpu(pkt->u.err_resp.error_info));
3588}
3589
3590#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3591
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003592static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003593{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003594 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3595 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3596 struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003597 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3598 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3599 rxon->channel = csa->channel;
3600 priv->staging_rxon.channel = csa->channel;
3601}
3602
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003603static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3604 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003605{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003606#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003607 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3608 struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003609
3610 if (!report->state) {
3611 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3612 "Spectrum Measure Notification: Start\n");
3613 return;
3614 }
3615
3616 memcpy(&priv->measure_report, report, sizeof(*report));
3617 priv->measurement_status |= MEASUREMENT_READY;
3618#endif
3619}
3620
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003621static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3622 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003623{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003624#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003625 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3626 struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003627 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3628 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3629#endif
3630}
3631
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003632static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3633 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003634{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003635 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003636 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3637 "notification for %s:\n",
3638 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003639 iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
Zhu Yib481de92007-09-25 17:54:57 -07003640}
3641
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003642static void iwl3945_bg_beacon_update(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07003643{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003644 struct iwl3945_priv *priv =
3645 container_of(work, struct iwl3945_priv, beacon_update);
Zhu Yib481de92007-09-25 17:54:57 -07003646 struct sk_buff *beacon;
3647
3648 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3649 beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);
3650
3651 if (!beacon) {
3652 IWL_ERROR("update beacon failed\n");
3653 return;
3654 }
3655
3656 mutex_lock(&priv->mutex);
3657 /* new beacon skb is allocated every time; dispose previous.*/
3658 if (priv->ibss_beacon)
3659 dev_kfree_skb(priv->ibss_beacon);
3660
3661 priv->ibss_beacon = beacon;
3662 mutex_unlock(&priv->mutex);
3663
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003664 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003665}
3666
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003667static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3668 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003669{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003670#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003671 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3672 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
Zhu Yib481de92007-09-25 17:54:57 -07003673 u8 rate = beacon->beacon_notify_hdr.rate;
3674
3675 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3676 "tsf %d %d rate %d\n",
3677 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3678 beacon->beacon_notify_hdr.failure_frame,
3679 le32_to_cpu(beacon->ibss_mgr_status),
3680 le32_to_cpu(beacon->high_tsf),
3681 le32_to_cpu(beacon->low_tsf), rate);
3682#endif
3683
3684 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3685 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3686 queue_work(priv->workqueue, &priv->beacon_update);
3687}
3688
3689/* Service response to REPLY_SCAN_CMD (0x80) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003690static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3691 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003692{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003693#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003694 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3695 struct iwl3945_scanreq_notification *notif =
3696 (struct iwl3945_scanreq_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003697
3698 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3699#endif
3700}
3701
3702/* Service SCAN_START_NOTIFICATION (0x82) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003703static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3704 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003705{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003706 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3707 struct iwl3945_scanstart_notification *notif =
3708 (struct iwl3945_scanstart_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003709 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3710 IWL_DEBUG_SCAN("Scan start: "
3711 "%d [802.11%s] "
3712 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3713 notif->channel,
3714 notif->band ? "bg" : "a",
3715 notif->tsf_high,
3716 notif->tsf_low, notif->status, notif->beacon_timer);
3717}
3718
3719/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003720static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3721 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003722{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003723 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3724 struct iwl3945_scanresults_notification *notif =
3725 (struct iwl3945_scanresults_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003726
3727 IWL_DEBUG_SCAN("Scan ch.res: "
3728 "%d [802.11%s] "
3729 "(TSF: 0x%08X:%08X) - %d "
3730 "elapsed=%lu usec (%dms since last)\n",
3731 notif->channel,
3732 notif->band ? "bg" : "a",
3733 le32_to_cpu(notif->tsf_high),
3734 le32_to_cpu(notif->tsf_low),
3735 le32_to_cpu(notif->statistics[0]),
3736 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3737 jiffies_to_msecs(elapsed_jiffies
3738 (priv->last_scan_jiffies, jiffies)));
3739
3740 priv->last_scan_jiffies = jiffies;
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08003741 priv->next_scan_jiffies = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003742}
3743
3744/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003745static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3746 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003747{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003748 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3749 struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003750
3751 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3752 scan_notif->scanned_channels,
3753 scan_notif->tsf_low,
3754 scan_notif->tsf_high, scan_notif->status);
3755
3756 /* The HW is no longer scanning */
3757 clear_bit(STATUS_SCAN_HW, &priv->status);
3758
3759 /* The scan completion notification came in, so kill that timer... */
3760 cancel_delayed_work(&priv->scan_check);
3761
3762 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3763 (priv->scan_bands == 2) ? "2.4" : "5.2",
3764 jiffies_to_msecs(elapsed_jiffies
3765 (priv->scan_pass_start, jiffies)));
3766
3767 /* Remove this scanned band from the list
3768 * of pending bands to scan */
3769 priv->scan_bands--;
3770
3771 /* If a request to abort was given, or the scan did not succeed
3772 * then we reset the scan state machine and terminate,
3773 * re-queuing another scan if one has been requested */
3774 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3775 IWL_DEBUG_INFO("Aborted scan completed.\n");
3776 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3777 } else {
3778 /* If there are more bands on this scan pass reschedule */
3779 if (priv->scan_bands > 0)
3780 goto reschedule;
3781 }
3782
3783 priv->last_scan_jiffies = jiffies;
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08003784 priv->next_scan_jiffies = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003785 IWL_DEBUG_INFO("Setting scan to off\n");
3786
3787 clear_bit(STATUS_SCANNING, &priv->status);
3788
3789 IWL_DEBUG_INFO("Scan took %dms\n",
3790 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3791
3792 queue_work(priv->workqueue, &priv->scan_completed);
3793
3794 return;
3795
3796reschedule:
3797 priv->scan_pass_start = jiffies;
3798 queue_work(priv->workqueue, &priv->request_scan);
3799}
3800
3801/* Handle notification from uCode that card's power state is changing
3802 * due to software, hardware, or critical temperature RFKILL */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003803static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3804 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003805{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003806 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003807 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3808 unsigned long status = priv->status;
3809
3810 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3811 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3812 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3813
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003814 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07003815 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3816
3817 if (flags & HW_CARD_DISABLED)
3818 set_bit(STATUS_RF_KILL_HW, &priv->status);
3819 else
3820 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3821
3822
3823 if (flags & SW_CARD_DISABLED)
3824 set_bit(STATUS_RF_KILL_SW, &priv->status);
3825 else
3826 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3827
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003828 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003829
3830 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3831 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3832 (test_bit(STATUS_RF_KILL_SW, &status) !=
3833 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3834 queue_work(priv->workqueue, &priv->rf_kill);
3835 else
3836 wake_up_interruptible(&priv->wait_command_queue);
3837}
3838
3839/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003840 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
Zhu Yib481de92007-09-25 17:54:57 -07003841 *
3842 * Setup the RX handlers for each of the reply types sent from the uCode
3843 * to the host.
3844 *
3845 * This function chains into the hardware specific files for them to setup
3846 * any hardware specific handlers as well.
3847 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003848static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003849{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003850 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3851 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3852 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3853 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
Zhu Yib481de92007-09-25 17:54:57 -07003854 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003855 iwl3945_rx_spectrum_measure_notif;
3856 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003857 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003858 iwl3945_rx_pm_debug_statistics_notif;
3859 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003860
Ben Cahill9fbab512007-11-29 11:09:47 +08003861 /*
3862 * The same handler is used for both the REPLY to a discrete
3863 * statistics request from the host as well as for the periodic
3864 * statistics notifications (after received beacons) from the uCode.
Zhu Yib481de92007-09-25 17:54:57 -07003865 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003866 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3867 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
Zhu Yib481de92007-09-25 17:54:57 -07003868
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003869 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3870 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003871 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003872 iwl3945_rx_scan_results_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003873 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003874 iwl3945_rx_scan_complete_notif;
3875 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3876 priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
Zhu Yib481de92007-09-25 17:54:57 -07003877
Ben Cahill9fbab512007-11-29 11:09:47 +08003878 /* Set up hardware specific Rx handlers */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003879 iwl3945_hw_rx_handler_setup(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003880}
3881
3882/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003883 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
Zhu Yib481de92007-09-25 17:54:57 -07003884 * @rxb: Rx buffer to reclaim
3885 *
3886 * If an Rx buffer has an async callback associated with it the callback
3887 * will be executed. The attached skb (if present) will only be freed
3888 * if the callback returns 1
3889 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003890static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3891 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003892{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003893 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003894 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3895 int txq_id = SEQ_TO_QUEUE(sequence);
3896 int index = SEQ_TO_INDEX(sequence);
3897 int huge = sequence & SEQ_HUGE_FRAME;
3898 int cmd_index;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003899 struct iwl3945_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07003900
3901 /* If a Tx command is being handled and it isn't in the actual
3902 * command queue then there a command routing bug has been introduced
3903 * in the queue management code. */
3904 if (txq_id != IWL_CMD_QUEUE_NUM)
3905 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3906 txq_id, pkt->hdr.cmd);
3907 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3908
3909 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3910 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3911
3912 /* Input error checking is done when commands are added to queue. */
3913 if (cmd->meta.flags & CMD_WANT_SKB) {
3914 cmd->meta.source->u.skb = rxb->skb;
3915 rxb->skb = NULL;
3916 } else if (cmd->meta.u.callback &&
3917 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3918 rxb->skb = NULL;
3919
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003920 iwl3945_tx_queue_reclaim(priv, txq_id, index);
Zhu Yib481de92007-09-25 17:54:57 -07003921
3922 if (!(cmd->meta.flags & CMD_ASYNC)) {
3923 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3924 wake_up_interruptible(&priv->wait_command_queue);
3925 }
3926}
3927
3928/************************** RX-FUNCTIONS ****************************/
3929/*
3930 * Rx theory of operation
3931 *
3932 * The host allocates 32 DMA target addresses and passes the host address
3933 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3934 * 0 to 31
3935 *
3936 * Rx Queue Indexes
3937 * The host/firmware share two index registers for managing the Rx buffers.
3938 *
3939 * The READ index maps to the first position that the firmware may be writing
3940 * to -- the driver can read up to (but not including) this position and get
3941 * good data.
3942 * The READ index is managed by the firmware once the card is enabled.
3943 *
3944 * The WRITE index maps to the last position the driver has read from -- the
3945 * position preceding WRITE is the last slot the firmware can place a packet.
3946 *
3947 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3948 * WRITE = READ.
3949 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003950 * During initialization, the host sets up the READ queue position to the first
Zhu Yib481de92007-09-25 17:54:57 -07003951 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3952 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003953 * When the firmware places a packet in a buffer, it will advance the READ index
Zhu Yib481de92007-09-25 17:54:57 -07003954 * and fire the RX interrupt. The driver can then query the READ index and
3955 * process as many packets as possible, moving the WRITE index forward as it
3956 * resets the Rx queue buffers with new memory.
3957 *
3958 * The management in the driver is as follows:
3959 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3960 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
Ian Schram01ebd062007-10-25 17:15:22 +08003961 * to replenish the iwl->rxq->rx_free.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003962 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
Zhu Yib481de92007-09-25 17:54:57 -07003963 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3964 * 'processed' and 'read' driver indexes as well)
3965 * + A received packet is processed and handed to the kernel network stack,
3966 * detached from the iwl->rxq. The driver 'processed' index is updated.
3967 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3968 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3969 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3970 * were enough free buffers and RX_STALLED is set it is cleared.
3971 *
3972 *
3973 * Driver sequence:
3974 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003975 * iwl3945_rx_queue_alloc() Allocates rx_free
3976 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003977 * iwl3945_rx_queue_restock
Ben Cahill9fbab512007-11-29 11:09:47 +08003978 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
Zhu Yib481de92007-09-25 17:54:57 -07003979 * queue, updates firmware pointers, and updates
3980 * the WRITE index. If insufficient rx_free buffers
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003981 * are available, schedules iwl3945_rx_replenish
Zhu Yib481de92007-09-25 17:54:57 -07003982 *
3983 * -- enable interrupts --
Ben Cahill9fbab512007-11-29 11:09:47 +08003984 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
Zhu Yib481de92007-09-25 17:54:57 -07003985 * READ INDEX, detaching the SKB from the pool.
3986 * Moves the packet buffer from queue to rx_used.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003987 * Calls iwl3945_rx_queue_restock to refill any empty
Zhu Yib481de92007-09-25 17:54:57 -07003988 * slots.
3989 * ...
3990 *
3991 */
3992
3993/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003994 * iwl3945_rx_queue_space - Return number of free slots available in queue.
Zhu Yib481de92007-09-25 17:54:57 -07003995 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003996static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07003997{
3998 int s = q->read - q->write;
3999 if (s <= 0)
4000 s += RX_QUEUE_SIZE;
4001 /* keep some buffer to not confuse full and empty queue */
4002 s -= 2;
4003 if (s < 0)
4004 s = 0;
4005 return s;
4006}
4007
4008/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004009 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
Zhu Yib481de92007-09-25 17:54:57 -07004010 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004011int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07004012{
4013 u32 reg = 0;
4014 int rc = 0;
4015 unsigned long flags;
4016
4017 spin_lock_irqsave(&q->lock, flags);
4018
4019 if (q->need_update == 0)
4020 goto exit_unlock;
4021
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004022 /* If power-saving is in use, make sure device is awake */
Zhu Yib481de92007-09-25 17:54:57 -07004023 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004024 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07004025
4026 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004027 iwl3945_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07004028 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4029 goto exit_unlock;
4030 }
4031
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004032 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004033 if (rc)
4034 goto exit_unlock;
4035
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004036 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004037 iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
Zhu Yib481de92007-09-25 17:54:57 -07004038 q->write & ~0x7);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004039 iwl3945_release_nic_access(priv);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004040
4041 /* Else device is assumed to be awake */
Zhu Yib481de92007-09-25 17:54:57 -07004042 } else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004043 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004044 iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
Zhu Yib481de92007-09-25 17:54:57 -07004045
4046
4047 q->need_update = 0;
4048
4049 exit_unlock:
4050 spin_unlock_irqrestore(&q->lock, flags);
4051 return rc;
4052}
4053
4054/**
Ben Cahill9fbab512007-11-29 11:09:47 +08004055 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
Zhu Yib481de92007-09-25 17:54:57 -07004056 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004057static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07004058 dma_addr_t dma_addr)
4059{
4060 return cpu_to_le32((u32)dma_addr);
4061}
4062
4063/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004064 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
Zhu Yib481de92007-09-25 17:54:57 -07004065 *
Ben Cahill9fbab512007-11-29 11:09:47 +08004066 * If there are slots in the RX queue that need to be restocked,
Zhu Yib481de92007-09-25 17:54:57 -07004067 * and we have free pre-allocated buffers, fill the ranks as much
Ben Cahill9fbab512007-11-29 11:09:47 +08004068 * as we can, pulling from rx_free.
Zhu Yib481de92007-09-25 17:54:57 -07004069 *
4070 * This moves the 'write' index forward to catch up with 'processed', and
4071 * also updates the memory address in the firmware to reference the new
4072 * target buffer.
4073 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004074static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004075{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004076 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004077 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004078 struct iwl3945_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07004079 unsigned long flags;
4080 int write, rc;
4081
4082 spin_lock_irqsave(&rxq->lock, flags);
4083 write = rxq->write & ~0x7;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004084 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004085 /* Get next free Rx buffer, remove from free list */
Zhu Yib481de92007-09-25 17:54:57 -07004086 element = rxq->rx_free.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004087 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
Zhu Yib481de92007-09-25 17:54:57 -07004088 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004089
4090 /* Point to Rx buffer via next RBD in circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004091 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
Zhu Yib481de92007-09-25 17:54:57 -07004092 rxq->queue[rxq->write] = rxb;
4093 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
4094 rxq->free_count--;
4095 }
4096 spin_unlock_irqrestore(&rxq->lock, flags);
4097 /* If the pre-allocated buffer pool is dropping low, schedule to
4098 * refill it */
4099 if (rxq->free_count <= RX_LOW_WATERMARK)
4100 queue_work(priv->workqueue, &priv->rx_replenish);
4101
4102
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004103 /* If we've added more space for the firmware to place data, tell it.
4104 * Increment device's write pointer in multiples of 8. */
Zhu Yib481de92007-09-25 17:54:57 -07004105 if ((write != (rxq->write & ~0x7))
4106 || (abs(rxq->write - rxq->read) > 7)) {
4107 spin_lock_irqsave(&rxq->lock, flags);
4108 rxq->need_update = 1;
4109 spin_unlock_irqrestore(&rxq->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004110 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
Zhu Yib481de92007-09-25 17:54:57 -07004111 if (rc)
4112 return rc;
4113 }
4114
4115 return 0;
4116}
4117
4118/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004119 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
Zhu Yib481de92007-09-25 17:54:57 -07004120 *
4121 * When moving to rx_free an SKB is allocated for the slot.
4122 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004123 * Also restock the Rx queue via iwl3945_rx_queue_restock.
Ian Schram01ebd062007-10-25 17:15:22 +08004124 * This is called as a scheduled work item (except for during initialization)
Zhu Yib481de92007-09-25 17:54:57 -07004125 */
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004126static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004127{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004128 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004129 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004130 struct iwl3945_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07004131 unsigned long flags;
4132 spin_lock_irqsave(&rxq->lock, flags);
4133 while (!list_empty(&rxq->rx_used)) {
4134 element = rxq->rx_used.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004135 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004136
4137 /* Alloc a new receive buffer */
Zhu Yib481de92007-09-25 17:54:57 -07004138 rxb->skb =
4139 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
4140 if (!rxb->skb) {
4141 if (net_ratelimit())
4142 printk(KERN_CRIT DRV_NAME
4143 ": Can not allocate SKB buffers\n");
4144 /* We don't reschedule replenish work here -- we will
4145 * call the restock method and if it still needs
4146 * more buffers it will schedule replenish */
4147 break;
4148 }
4149 priv->alloc_rxb_skb++;
4150 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004151
4152 /* Get physical address of RB/SKB */
Zhu Yib481de92007-09-25 17:54:57 -07004153 rxb->dma_addr =
4154 pci_map_single(priv->pci_dev, rxb->skb->data,
4155 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4156 list_add_tail(&rxb->list, &rxq->rx_free);
4157 rxq->free_count++;
4158 }
4159 spin_unlock_irqrestore(&rxq->lock, flags);
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004160}
4161
4162/*
4163 * this should be called while priv->lock is locked
4164 */
4165void __iwl3945_rx_replenish(void *data)
4166{
4167 struct iwl3945_priv *priv = data;
4168
4169 iwl3945_rx_allocate(priv);
4170 iwl3945_rx_queue_restock(priv);
4171}
4172
4173
4174void iwl3945_rx_replenish(void *data)
4175{
4176 struct iwl3945_priv *priv = data;
4177 unsigned long flags;
4178
4179 iwl3945_rx_allocate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004180
4181 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004182 iwl3945_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004183 spin_unlock_irqrestore(&priv->lock, flags);
4184}
4185
4186/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
Ben Cahill9fbab512007-11-29 11:09:47 +08004187 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
Zhu Yib481de92007-09-25 17:54:57 -07004188 * This free routine walks the list of POOL entries and if SKB is set to
4189 * non NULL it is unmapped and freed
4190 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004191static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07004192{
4193 int i;
4194 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4195 if (rxq->pool[i].skb != NULL) {
4196 pci_unmap_single(priv->pci_dev,
4197 rxq->pool[i].dma_addr,
4198 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4199 dev_kfree_skb(rxq->pool[i].skb);
4200 }
4201 }
4202
4203 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4204 rxq->dma_addr);
4205 rxq->bd = NULL;
4206}
4207
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004208int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004209{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004210 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004211 struct pci_dev *dev = priv->pci_dev;
4212 int i;
4213
4214 spin_lock_init(&rxq->lock);
4215 INIT_LIST_HEAD(&rxq->rx_free);
4216 INIT_LIST_HEAD(&rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004217
4218 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
Zhu Yib481de92007-09-25 17:54:57 -07004219 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4220 if (!rxq->bd)
4221 return -ENOMEM;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004222
Zhu Yib481de92007-09-25 17:54:57 -07004223 /* Fill the rx_used queue with _all_ of the Rx buffers */
4224 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4225 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004226
Zhu Yib481de92007-09-25 17:54:57 -07004227 /* Set us so that we have processed and used all buffers, but have
4228 * not restocked the Rx queue with fresh buffers */
4229 rxq->read = rxq->write = 0;
4230 rxq->free_count = 0;
4231 rxq->need_update = 0;
4232 return 0;
4233}
4234
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004235void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07004236{
4237 unsigned long flags;
4238 int i;
4239 spin_lock_irqsave(&rxq->lock, flags);
4240 INIT_LIST_HEAD(&rxq->rx_free);
4241 INIT_LIST_HEAD(&rxq->rx_used);
4242 /* Fill the rx_used queue with _all_ of the Rx buffers */
4243 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4244 /* In the reset function, these buffers may have been allocated
4245 * to an SKB, so we need to unmap and free potential storage */
4246 if (rxq->pool[i].skb != NULL) {
4247 pci_unmap_single(priv->pci_dev,
4248 rxq->pool[i].dma_addr,
4249 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4250 priv->alloc_rxb_skb--;
4251 dev_kfree_skb(rxq->pool[i].skb);
4252 rxq->pool[i].skb = NULL;
4253 }
4254 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4255 }
4256
4257 /* Set us so that we have processed and used all buffers, but have
4258 * not restocked the Rx queue with fresh buffers */
4259 rxq->read = rxq->write = 0;
4260 rxq->free_count = 0;
4261 spin_unlock_irqrestore(&rxq->lock, flags);
4262}
4263
4264/* Convert linear signal-to-noise ratio into dB */
4265static u8 ratio2dB[100] = {
4266/* 0 1 2 3 4 5 6 7 8 9 */
4267 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4268 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4269 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4270 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4271 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4272 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4273 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4274 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4275 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4276 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4277};
4278
4279/* Calculates a relative dB value from a ratio of linear
4280 * (i.e. not dB) signal levels.
4281 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004282int iwl3945_calc_db_from_ratio(int sig_ratio)
Zhu Yib481de92007-09-25 17:54:57 -07004283{
4284 /* Anything above 1000:1 just report as 60 dB */
4285 if (sig_ratio > 1000)
4286 return 60;
4287
4288 /* Above 100:1, divide by 10 and use table,
4289 * add 20 dB to make up for divide by 10 */
4290 if (sig_ratio > 100)
4291 return (20 + (int)ratio2dB[sig_ratio/10]);
4292
4293 /* We shouldn't see this */
4294 if (sig_ratio < 1)
4295 return 0;
4296
4297 /* Use table for ratios 1:1 - 99:1 */
4298 return (int)ratio2dB[sig_ratio];
4299}
4300
4301#define PERFECT_RSSI (-20) /* dBm */
4302#define WORST_RSSI (-95) /* dBm */
4303#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4304
4305/* Calculate an indication of rx signal quality (a percentage, not dBm!).
4306 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4307 * about formulas used below. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004308int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
Zhu Yib481de92007-09-25 17:54:57 -07004309{
4310 int sig_qual;
4311 int degradation = PERFECT_RSSI - rssi_dbm;
4312
4313 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4314 * as indicator; formula is (signal dbm - noise dbm).
4315 * SNR at or above 40 is a great signal (100%).
4316 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4317 * Weakest usable signal is usually 10 - 15 dB SNR. */
4318 if (noise_dbm) {
4319 if (rssi_dbm - noise_dbm >= 40)
4320 return 100;
4321 else if (rssi_dbm < noise_dbm)
4322 return 0;
4323 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4324
4325 /* Else use just the signal level.
4326 * This formula is a least squares fit of data points collected and
4327 * compared with a reference system that had a percentage (%) display
4328 * for signal quality. */
4329 } else
4330 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4331 (15 * RSSI_RANGE + 62 * degradation)) /
4332 (RSSI_RANGE * RSSI_RANGE);
4333
4334 if (sig_qual > 100)
4335 sig_qual = 100;
4336 else if (sig_qual < 1)
4337 sig_qual = 0;
4338
4339 return sig_qual;
4340}
4341
4342/**
Ben Cahill9fbab512007-11-29 11:09:47 +08004343 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
Zhu Yib481de92007-09-25 17:54:57 -07004344 *
4345 * Uses the priv->rx_handlers callback function array to invoke
4346 * the appropriate handlers, including command responses,
4347 * frame-received notifications, and other notifications.
4348 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004349static void iwl3945_rx_handle(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004350{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004351 struct iwl3945_rx_mem_buffer *rxb;
4352 struct iwl3945_rx_packet *pkt;
4353 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004354 u32 r, i;
4355 int reclaim;
4356 unsigned long flags;
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004357 u8 fill_rx = 0;
4358 u32 count = 0;
Zhu Yib481de92007-09-25 17:54:57 -07004359
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004360 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4361 * buffer that the driver may process (last buffer filled by ucode). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004362 r = iwl3945_hw_get_rx_read(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004363 i = rxq->read;
4364
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004365 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4366 fill_rx = 1;
Zhu Yib481de92007-09-25 17:54:57 -07004367 /* Rx interrupt, but nothing sent from uCode */
4368 if (i == r)
4369 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4370
4371 while (i != r) {
4372 rxb = rxq->queue[i];
4373
Ben Cahill9fbab512007-11-29 11:09:47 +08004374 /* If an RXB doesn't have a Rx queue slot associated with it,
Zhu Yib481de92007-09-25 17:54:57 -07004375 * then a bug has been introduced in the queue refilling
4376 * routines -- catch it here */
4377 BUG_ON(rxb == NULL);
4378
4379 rxq->queue[i] = NULL;
4380
4381 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4382 IWL_RX_BUF_SIZE,
4383 PCI_DMA_FROMDEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004384 pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07004385
4386 /* Reclaim a command buffer only if this packet is a response
4387 * to a (driver-originated) command.
4388 * If the packet (e.g. Rx frame) originated from uCode,
4389 * there is no command buffer to reclaim.
4390 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4391 * but apparently a few don't get set; catch them here. */
4392 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4393 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4394 (pkt->hdr.cmd != REPLY_TX);
4395
4396 /* Based on type of command response or notification,
4397 * handle those that need handling via function in
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004398 * rx_handlers table. See iwl3945_setup_rx_handlers() */
Zhu Yib481de92007-09-25 17:54:57 -07004399 if (priv->rx_handlers[pkt->hdr.cmd]) {
4400 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4401 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4402 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4403 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4404 } else {
4405 /* No handling needed */
4406 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4407 "r %d i %d No handler needed for %s, 0x%02x\n",
4408 r, i, get_cmd_string(pkt->hdr.cmd),
4409 pkt->hdr.cmd);
4410 }
4411
4412 if (reclaim) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004413 /* Invoke any callbacks, transfer the skb to caller, and
4414 * fire off the (possibly) blocking iwl3945_send_cmd()
Zhu Yib481de92007-09-25 17:54:57 -07004415 * as we reclaim the driver command queue */
4416 if (rxb && rxb->skb)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004417 iwl3945_tx_cmd_complete(priv, rxb);
Zhu Yib481de92007-09-25 17:54:57 -07004418 else
4419 IWL_WARNING("Claim null rxb?\n");
4420 }
4421
4422 /* For now we just don't re-use anything. We can tweak this
4423 * later to try and re-use notification packets and SKBs that
4424 * fail to Rx correctly */
4425 if (rxb->skb != NULL) {
4426 priv->alloc_rxb_skb--;
4427 dev_kfree_skb_any(rxb->skb);
4428 rxb->skb = NULL;
4429 }
4430
4431 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4432 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4433 spin_lock_irqsave(&rxq->lock, flags);
4434 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4435 spin_unlock_irqrestore(&rxq->lock, flags);
4436 i = (i + 1) & RX_QUEUE_MASK;
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004437 /* If there are a lot of unused frames,
4438 * restock the Rx queue so ucode won't assert. */
4439 if (fill_rx) {
4440 count++;
4441 if (count >= 8) {
4442 priv->rxq.read = i;
4443 __iwl3945_rx_replenish(priv);
4444 count = 0;
4445 }
4446 }
Zhu Yib481de92007-09-25 17:54:57 -07004447 }
4448
4449 /* Backtrack one entry */
4450 priv->rxq.read = i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004451 iwl3945_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004452}
4453
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004454/**
4455 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
4456 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004457static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
4458 struct iwl3945_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -07004459{
4460 u32 reg = 0;
4461 int rc = 0;
4462 int txq_id = txq->q.id;
4463
4464 if (txq->need_update == 0)
4465 return rc;
4466
4467 /* if we're trying to save power */
4468 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4469 /* wake up nic if it's powered down ...
4470 * uCode will wake up, and interrupt us again, so next
4471 * time we'll skip this part. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004472 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07004473
4474 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4475 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004476 iwl3945_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07004477 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4478 return rc;
4479 }
4480
4481 /* restore this queue's parameters in nic hardware. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004482 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004483 if (rc)
4484 return rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004485 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004486 txq->q.write_ptr | (txq_id << 8));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004487 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004488
4489 /* else not in power-save mode, uCode will never sleep when we're
4490 * trying to tx (during RFKILL, we're not trying to tx). */
4491 } else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004492 iwl3945_write32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004493 txq->q.write_ptr | (txq_id << 8));
Zhu Yib481de92007-09-25 17:54:57 -07004494
4495 txq->need_update = 0;
4496
4497 return rc;
4498}
4499
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004500#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004501static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -07004502{
Joe Perches0795af52007-10-03 17:59:30 -07004503 DECLARE_MAC_BUF(mac);
4504
Zhu Yib481de92007-09-25 17:54:57 -07004505 IWL_DEBUG_RADIO("RX CONFIG:\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004506 iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
Zhu Yib481de92007-09-25 17:54:57 -07004507 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4508 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4509 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4510 le32_to_cpu(rxon->filter_flags));
4511 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4512 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4513 rxon->ofdm_basic_rates);
4514 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
Joe Perches0795af52007-10-03 17:59:30 -07004515 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4516 print_mac(mac, rxon->node_addr));
4517 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4518 print_mac(mac, rxon->bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07004519 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4520}
4521#endif
4522
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004523static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004524{
4525 IWL_DEBUG_ISR("Enabling interrupts\n");
4526 set_bit(STATUS_INT_ENABLED, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004527 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004528}
4529
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004530static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004531{
4532 clear_bit(STATUS_INT_ENABLED, &priv->status);
4533
4534 /* disable interrupts from uCode/NIC to host */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004535 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004536
4537 /* acknowledge/clear/reset any interrupts still pending
4538 * from uCode or flow handler (Rx/Tx DMA) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004539 iwl3945_write32(priv, CSR_INT, 0xffffffff);
4540 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
Zhu Yib481de92007-09-25 17:54:57 -07004541 IWL_DEBUG_ISR("Disabled interrupts\n");
4542}
4543
4544static const char *desc_lookup(int i)
4545{
4546 switch (i) {
4547 case 1:
4548 return "FAIL";
4549 case 2:
4550 return "BAD_PARAM";
4551 case 3:
4552 return "BAD_CHECKSUM";
4553 case 4:
4554 return "NMI_INTERRUPT";
4555 case 5:
4556 return "SYSASSERT";
4557 case 6:
4558 return "FATAL_ERROR";
4559 }
4560
4561 return "UNKNOWN";
4562}
4563
4564#define ERROR_START_OFFSET (1 * sizeof(u32))
4565#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4566
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004567static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004568{
4569 u32 i;
4570 u32 desc, time, count, base, data1;
4571 u32 blink1, blink2, ilink1, ilink2;
4572 int rc;
4573
4574 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4575
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004576 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004577 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4578 return;
4579 }
4580
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004581 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004582 if (rc) {
4583 IWL_WARNING("Can not read from adapter at this time.\n");
4584 return;
4585 }
4586
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004587 count = iwl3945_read_targ_mem(priv, base);
Zhu Yib481de92007-09-25 17:54:57 -07004588
4589 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4590 IWL_ERROR("Start IWL Error Log Dump:\n");
4591 IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
4592 priv->status, priv->config, count);
4593 }
4594
4595 IWL_ERROR("Desc Time asrtPC blink2 "
4596 "ilink1 nmiPC Line\n");
4597 for (i = ERROR_START_OFFSET;
4598 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4599 i += ERROR_ELEM_SIZE) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004600 desc = iwl3945_read_targ_mem(priv, base + i);
Zhu Yib481de92007-09-25 17:54:57 -07004601 time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004602 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004603 blink1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004604 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004605 blink2 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004606 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004607 ilink1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004608 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004609 ilink2 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004610 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004611 data1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004612 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004613
4614 IWL_ERROR
4615 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4616 desc_lookup(desc), desc, time, blink1, blink2,
4617 ilink1, ilink2, data1);
4618 }
4619
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004620 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004621
4622}
4623
Ben Cahillf58177b2007-11-29 11:09:43 +08004624#define EVENT_START_OFFSET (6 * sizeof(u32))
Zhu Yib481de92007-09-25 17:54:57 -07004625
4626/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004627 * iwl3945_print_event_log - Dump error event log to syslog
Zhu Yib481de92007-09-25 17:54:57 -07004628 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004629 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
Zhu Yib481de92007-09-25 17:54:57 -07004630 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004631static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
Zhu Yib481de92007-09-25 17:54:57 -07004632 u32 num_events, u32 mode)
4633{
4634 u32 i;
4635 u32 base; /* SRAM byte address of event log header */
4636 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4637 u32 ptr; /* SRAM byte address of log data */
4638 u32 ev, time, data; /* event log data */
4639
4640 if (num_events == 0)
4641 return;
4642
4643 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4644
4645 if (mode == 0)
4646 event_size = 2 * sizeof(u32);
4647 else
4648 event_size = 3 * sizeof(u32);
4649
4650 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4651
4652 /* "time" is actually "data" for mode 0 (no timestamp).
4653 * place event id # at far right for easier visual parsing. */
4654 for (i = 0; i < num_events; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004655 ev = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004656 ptr += sizeof(u32);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004657 time = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004658 ptr += sizeof(u32);
4659 if (mode == 0)
4660 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4661 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004662 data = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004663 ptr += sizeof(u32);
4664 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4665 }
4666 }
4667}
4668
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004669static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004670{
4671 int rc;
4672 u32 base; /* SRAM byte address of event log header */
4673 u32 capacity; /* event log capacity in # entries */
4674 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4675 u32 num_wraps; /* # times uCode wrapped to top of log */
4676 u32 next_entry; /* index of next entry to be written by uCode */
4677 u32 size; /* # entries that we'll print */
4678
4679 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004680 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004681 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4682 return;
4683 }
4684
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004685 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004686 if (rc) {
4687 IWL_WARNING("Can not read from adapter at this time.\n");
4688 return;
4689 }
4690
4691 /* event log header */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004692 capacity = iwl3945_read_targ_mem(priv, base);
4693 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4694 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4695 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
Zhu Yib481de92007-09-25 17:54:57 -07004696
4697 size = num_wraps ? capacity : next_entry;
4698
4699 /* bail out if nothing in log */
4700 if (size == 0) {
Zhu Yi583fab32007-09-27 11:27:30 +08004701 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004702 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004703 return;
4704 }
4705
Zhu Yi583fab32007-09-27 11:27:30 +08004706 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07004707 size, num_wraps);
4708
4709 /* if uCode has wrapped back to top of log, start at the oldest entry,
4710 * i.e the next one that uCode would fill. */
4711 if (num_wraps)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004712 iwl3945_print_event_log(priv, next_entry,
Zhu Yib481de92007-09-25 17:54:57 -07004713 capacity - next_entry, mode);
4714
4715 /* (then/else) start at top of log */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004716 iwl3945_print_event_log(priv, 0, next_entry, mode);
Zhu Yib481de92007-09-25 17:54:57 -07004717
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004718 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004719}
4720
4721/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004722 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
Zhu Yib481de92007-09-25 17:54:57 -07004723 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004724static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004725{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004726 /* Set the FW error flag -- cleared on iwl3945_down */
Zhu Yib481de92007-09-25 17:54:57 -07004727 set_bit(STATUS_FW_ERROR, &priv->status);
4728
4729 /* Cancel currently queued command. */
4730 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4731
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004732#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004733 if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4734 iwl3945_dump_nic_error_log(priv);
4735 iwl3945_dump_nic_event_log(priv);
4736 iwl3945_print_rx_config_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07004737 }
4738#endif
4739
4740 wake_up_interruptible(&priv->wait_command_queue);
4741
4742 /* Keep the restart process from trying to send host
4743 * commands by clearing the INIT status bit */
4744 clear_bit(STATUS_READY, &priv->status);
4745
4746 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4747 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4748 "Restarting adapter due to uCode error.\n");
4749
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004750 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07004751 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4752 sizeof(priv->recovery_rxon));
4753 priv->error_recovering = 1;
4754 }
4755 queue_work(priv->workqueue, &priv->restart);
4756 }
4757}
4758
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004759static void iwl3945_error_recovery(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004760{
4761 unsigned long flags;
4762
4763 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4764 sizeof(priv->staging_rxon));
4765 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004766 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004767
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004768 iwl3945_add_station(priv, priv->bssid, 1, 0);
Zhu Yib481de92007-09-25 17:54:57 -07004769
4770 spin_lock_irqsave(&priv->lock, flags);
4771 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4772 priv->error_recovering = 0;
4773 spin_unlock_irqrestore(&priv->lock, flags);
4774}
4775
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004776static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004777{
4778 u32 inta, handled = 0;
4779 u32 inta_fh;
4780 unsigned long flags;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004781#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07004782 u32 inta_mask;
4783#endif
4784
4785 spin_lock_irqsave(&priv->lock, flags);
4786
4787 /* Ack/clear/reset pending uCode interrupts.
4788 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4789 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004790 inta = iwl3945_read32(priv, CSR_INT);
4791 iwl3945_write32(priv, CSR_INT, inta);
Zhu Yib481de92007-09-25 17:54:57 -07004792
4793 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4794 * Any new interrupts that happen after this, either while we're
4795 * in this tasklet, or later, will show up in next ISR/tasklet. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004796 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4797 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
Zhu Yib481de92007-09-25 17:54:57 -07004798
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004799#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004800 if (iwl3945_debug_level & IWL_DL_ISR) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004801 /* just for debug */
4802 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004803 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4804 inta, inta_mask, inta_fh);
4805 }
4806#endif
4807
4808 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4809 * atomic, make sure that inta covers all the interrupts that
4810 * we've discovered, even if FH interrupt came in just after
4811 * reading CSR_INT. */
4812 if (inta_fh & CSR_FH_INT_RX_MASK)
4813 inta |= CSR_INT_BIT_FH_RX;
4814 if (inta_fh & CSR_FH_INT_TX_MASK)
4815 inta |= CSR_INT_BIT_FH_TX;
4816
4817 /* Now service all interrupt bits discovered above. */
4818 if (inta & CSR_INT_BIT_HW_ERR) {
4819 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4820
4821 /* Tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004822 iwl3945_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004823
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004824 iwl3945_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004825
4826 handled |= CSR_INT_BIT_HW_ERR;
4827
4828 spin_unlock_irqrestore(&priv->lock, flags);
4829
4830 return;
4831 }
4832
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004833#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004834 if (iwl3945_debug_level & (IWL_DL_ISR)) {
Zhu Yib481de92007-09-25 17:54:57 -07004835 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4836 if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
4837 IWL_DEBUG_ISR("Microcode started or stopped.\n");
4838
4839 /* Alive notification via Rx interrupt will do the real work */
4840 if (inta & CSR_INT_BIT_ALIVE)
4841 IWL_DEBUG_ISR("Alive interrupt\n");
4842 }
4843#endif
4844 /* Safely ignore these bits for debug checks below */
4845 inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
4846
4847 /* HW RF KILL switch toggled (4965 only) */
4848 if (inta & CSR_INT_BIT_RF_KILL) {
4849 int hw_rf_kill = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004850 if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
Zhu Yib481de92007-09-25 17:54:57 -07004851 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4852 hw_rf_kill = 1;
4853
4854 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4855 "RF_KILL bit toggled to %s.\n",
4856 hw_rf_kill ? "disable radio":"enable radio");
4857
4858 /* Queue restart only if RF_KILL switch was set to "kill"
4859 * when we loaded driver, and is now set to "enable".
4860 * After we're Alive, RF_KILL gets handled by
4861 * iwl_rx_card_state_notif() */
Zhu Yi53e49092007-12-06 16:08:44 +08004862 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4863 clear_bit(STATUS_RF_KILL_HW, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07004864 queue_work(priv->workqueue, &priv->restart);
Zhu Yi53e49092007-12-06 16:08:44 +08004865 }
Zhu Yib481de92007-09-25 17:54:57 -07004866
4867 handled |= CSR_INT_BIT_RF_KILL;
4868 }
4869
4870 /* Chip got too hot and stopped itself (4965 only) */
4871 if (inta & CSR_INT_BIT_CT_KILL) {
4872 IWL_ERROR("Microcode CT kill error detected.\n");
4873 handled |= CSR_INT_BIT_CT_KILL;
4874 }
4875
4876 /* Error detected by uCode */
4877 if (inta & CSR_INT_BIT_SW_ERR) {
4878 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4879 inta);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004880 iwl3945_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004881 handled |= CSR_INT_BIT_SW_ERR;
4882 }
4883
4884 /* uCode wakes up after power-down sleep */
4885 if (inta & CSR_INT_BIT_WAKEUP) {
4886 IWL_DEBUG_ISR("Wakeup interrupt\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004887 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4888 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4889 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4890 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4891 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4892 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4893 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
Zhu Yib481de92007-09-25 17:54:57 -07004894
4895 handled |= CSR_INT_BIT_WAKEUP;
4896 }
4897
4898 /* All uCode command responses, including Tx command responses,
4899 * Rx "responses" (frame-received notification), and other
4900 * notifications from uCode come through here*/
4901 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004902 iwl3945_rx_handle(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004903 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4904 }
4905
4906 if (inta & CSR_INT_BIT_FH_TX) {
4907 IWL_DEBUG_ISR("Tx interrupt\n");
4908
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004909 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4910 if (!iwl3945_grab_nic_access(priv)) {
4911 iwl3945_write_direct32(priv,
Zhu Yib481de92007-09-25 17:54:57 -07004912 FH_TCSR_CREDIT
4913 (ALM_FH_SRVC_CHNL), 0x0);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004914 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004915 }
4916 handled |= CSR_INT_BIT_FH_TX;
4917 }
4918
4919 if (inta & ~handled)
4920 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4921
4922 if (inta & ~CSR_INI_SET_MASK) {
4923 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4924 inta & ~CSR_INI_SET_MASK);
4925 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4926 }
4927
4928 /* Re-enable all interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004929 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004930
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004931#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004932 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4933 inta = iwl3945_read32(priv, CSR_INT);
4934 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4935 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07004936 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4937 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4938 }
4939#endif
4940 spin_unlock_irqrestore(&priv->lock, flags);
4941}
4942
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004943static irqreturn_t iwl3945_isr(int irq, void *data)
Zhu Yib481de92007-09-25 17:54:57 -07004944{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004945 struct iwl3945_priv *priv = data;
Zhu Yib481de92007-09-25 17:54:57 -07004946 u32 inta, inta_mask;
4947 u32 inta_fh;
4948 if (!priv)
4949 return IRQ_NONE;
4950
4951 spin_lock(&priv->lock);
4952
4953 /* Disable (but don't clear!) interrupts here to avoid
4954 * back-to-back ISRs and sporadic interrupts from our NIC.
4955 * If we have something to service, the tasklet will re-enable ints.
4956 * If we *don't* have something, we'll re-enable before leaving here. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004957 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4958 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004959
4960 /* Discover which interrupts are active/pending */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004961 inta = iwl3945_read32(priv, CSR_INT);
4962 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07004963
4964 /* Ignore interrupt if there's nothing in NIC to service.
4965 * This may be due to IRQ shared with another device,
4966 * or due to sporadic interrupts thrown from our NIC. */
4967 if (!inta && !inta_fh) {
4968 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4969 goto none;
4970 }
4971
4972 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4973 /* Hardware disappeared */
4974 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
Oliver Neukumcb4da1a2007-11-13 21:10:32 -08004975 goto unplugged;
Zhu Yib481de92007-09-25 17:54:57 -07004976 }
4977
4978 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4979 inta, inta_mask, inta_fh);
4980
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004981 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
Zhu Yib481de92007-09-25 17:54:57 -07004982 tasklet_schedule(&priv->irq_tasklet);
Oliver Neukumcb4da1a2007-11-13 21:10:32 -08004983unplugged:
Zhu Yib481de92007-09-25 17:54:57 -07004984 spin_unlock(&priv->lock);
4985
4986 return IRQ_HANDLED;
4987
4988 none:
4989 /* re-enable interrupts here since we don't have anything to service. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004990 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004991 spin_unlock(&priv->lock);
4992 return IRQ_NONE;
4993}
4994
4995/************************** EEPROM BANDS ****************************
4996 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004997 * The iwl3945_eeprom_band definitions below provide the mapping from the
Zhu Yib481de92007-09-25 17:54:57 -07004998 * EEPROM contents to the specific channel number supported for each
4999 * band.
5000 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005001 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
Zhu Yib481de92007-09-25 17:54:57 -07005002 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
5003 * The specific geography and calibration information for that channel
5004 * is contained in the eeprom map itself.
5005 *
5006 * During init, we copy the eeprom information and channel map
5007 * information into priv->channel_info_24/52 and priv->channel_map_24/52
5008 *
5009 * channel_map_24/52 provides the index in the channel_info array for a
5010 * given channel. We have to have two separate maps as there is channel
5011 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
5012 * band_2
5013 *
5014 * A value of 0xff stored in the channel_map indicates that the channel
5015 * is not supported by the hardware at all.
5016 *
5017 * A value of 0xfe in the channel_map indicates that the channel is not
5018 * valid for Tx with the current hardware. This means that
5019 * while the system can tune and receive on a given channel, it may not
5020 * be able to associate or transmit any frames on that
5021 * channel. There is no corresponding channel information for that
5022 * entry.
5023 *
5024 *********************************************************************/
5025
5026/* 2.4 GHz */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005027static const u8 iwl3945_eeprom_band_1[14] = {
Zhu Yib481de92007-09-25 17:54:57 -07005028 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
5029};
5030
5031/* 5.2 GHz bands */
Ben Cahill9fbab512007-11-29 11:09:47 +08005032static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
Zhu Yib481de92007-09-25 17:54:57 -07005033 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
5034};
5035
Ben Cahill9fbab512007-11-29 11:09:47 +08005036static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
Zhu Yib481de92007-09-25 17:54:57 -07005037 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
5038};
5039
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005040static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
Zhu Yib481de92007-09-25 17:54:57 -07005041 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
5042};
5043
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005044static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
Zhu Yib481de92007-09-25 17:54:57 -07005045 145, 149, 153, 157, 161, 165
5046};
5047
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005048static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
Zhu Yib481de92007-09-25 17:54:57 -07005049 int *eeprom_ch_count,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005050 const struct iwl3945_eeprom_channel
Zhu Yib481de92007-09-25 17:54:57 -07005051 **eeprom_ch_info,
5052 const u8 **eeprom_ch_index)
5053{
5054 switch (band) {
5055 case 1: /* 2.4GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005056 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
Zhu Yib481de92007-09-25 17:54:57 -07005057 *eeprom_ch_info = priv->eeprom.band_1_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005058 *eeprom_ch_index = iwl3945_eeprom_band_1;
Zhu Yib481de92007-09-25 17:54:57 -07005059 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08005060 case 2: /* 4.9GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005061 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
Zhu Yib481de92007-09-25 17:54:57 -07005062 *eeprom_ch_info = priv->eeprom.band_2_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005063 *eeprom_ch_index = iwl3945_eeprom_band_2;
Zhu Yib481de92007-09-25 17:54:57 -07005064 break;
5065 case 3: /* 5.2GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005066 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
Zhu Yib481de92007-09-25 17:54:57 -07005067 *eeprom_ch_info = priv->eeprom.band_3_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005068 *eeprom_ch_index = iwl3945_eeprom_band_3;
Zhu Yib481de92007-09-25 17:54:57 -07005069 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08005070 case 4: /* 5.5GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005071 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
Zhu Yib481de92007-09-25 17:54:57 -07005072 *eeprom_ch_info = priv->eeprom.band_4_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005073 *eeprom_ch_index = iwl3945_eeprom_band_4;
Zhu Yib481de92007-09-25 17:54:57 -07005074 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08005075 case 5: /* 5.7GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005076 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07005077 *eeprom_ch_info = priv->eeprom.band_5_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005078 *eeprom_ch_index = iwl3945_eeprom_band_5;
Zhu Yib481de92007-09-25 17:54:57 -07005079 break;
5080 default:
5081 BUG();
5082 return;
5083 }
5084}
5085
Cahill, Ben M6440adb2007-11-29 11:09:55 +08005086/**
5087 * iwl3945_get_channel_info - Find driver's private channel info
5088 *
5089 * Based on band and channel number.
5090 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005091const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07005092 int phymode, u16 channel)
5093{
5094 int i;
5095
5096 switch (phymode) {
5097 case MODE_IEEE80211A:
5098 for (i = 14; i < priv->channel_count; i++) {
5099 if (priv->channel_info[i].channel == channel)
5100 return &priv->channel_info[i];
5101 }
5102 break;
5103
5104 case MODE_IEEE80211B:
5105 case MODE_IEEE80211G:
5106 if (channel >= 1 && channel <= 14)
5107 return &priv->channel_info[channel - 1];
5108 break;
5109
5110 }
5111
5112 return NULL;
5113}
5114
5115#define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5116 ? # x " " : "")
5117
Cahill, Ben M6440adb2007-11-29 11:09:55 +08005118/**
5119 * iwl3945_init_channel_map - Set up driver's info for all possible channels
5120 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005121static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005122{
5123 int eeprom_ch_count = 0;
5124 const u8 *eeprom_ch_index = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005125 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07005126 int band, ch;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005127 struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07005128
5129 if (priv->channel_count) {
5130 IWL_DEBUG_INFO("Channel map already initialized.\n");
5131 return 0;
5132 }
5133
5134 if (priv->eeprom.version < 0x2f) {
5135 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5136 priv->eeprom.version);
5137 return -EINVAL;
5138 }
5139
5140 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5141
5142 priv->channel_count =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005143 ARRAY_SIZE(iwl3945_eeprom_band_1) +
5144 ARRAY_SIZE(iwl3945_eeprom_band_2) +
5145 ARRAY_SIZE(iwl3945_eeprom_band_3) +
5146 ARRAY_SIZE(iwl3945_eeprom_band_4) +
5147 ARRAY_SIZE(iwl3945_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07005148
5149 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5150
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005151 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
Zhu Yib481de92007-09-25 17:54:57 -07005152 priv->channel_count, GFP_KERNEL);
5153 if (!priv->channel_info) {
5154 IWL_ERROR("Could not allocate channel_info\n");
5155 priv->channel_count = 0;
5156 return -ENOMEM;
5157 }
5158
5159 ch_info = priv->channel_info;
5160
5161 /* Loop through the 5 EEPROM bands adding them in order to the
5162 * channel map we maintain (that contains additional information than
5163 * what just in the EEPROM) */
5164 for (band = 1; band <= 5; band++) {
5165
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005166 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
Zhu Yib481de92007-09-25 17:54:57 -07005167 &eeprom_ch_info, &eeprom_ch_index);
5168
5169 /* Loop through each band adding each of the channels */
5170 for (ch = 0; ch < eeprom_ch_count; ch++) {
5171 ch_info->channel = eeprom_ch_index[ch];
5172 ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
5173 MODE_IEEE80211A;
5174
5175 /* permanently store EEPROM's channel regulatory flags
5176 * and max power in channel info database. */
5177 ch_info->eeprom = eeprom_ch_info[ch];
5178
5179 /* Copy the run-time flags so they are there even on
5180 * invalid channels */
5181 ch_info->flags = eeprom_ch_info[ch].flags;
5182
5183 if (!(is_channel_valid(ch_info))) {
5184 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5185 "No traffic\n",
5186 ch_info->channel,
5187 ch_info->flags,
5188 is_channel_a_band(ch_info) ?
5189 "5.2" : "2.4");
5190 ch_info++;
5191 continue;
5192 }
5193
5194 /* Initialize regulatory-based run-time data */
5195 ch_info->max_power_avg = ch_info->curr_txpow =
5196 eeprom_ch_info[ch].max_power_avg;
5197 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5198 ch_info->min_power = 0;
5199
5200 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
5201 " %ddBm): Ad-Hoc %ssupported\n",
5202 ch_info->channel,
5203 is_channel_a_band(ch_info) ?
5204 "5.2" : "2.4",
5205 CHECK_AND_PRINT(IBSS),
5206 CHECK_AND_PRINT(ACTIVE),
5207 CHECK_AND_PRINT(RADAR),
5208 CHECK_AND_PRINT(WIDE),
5209 CHECK_AND_PRINT(NARROW),
5210 CHECK_AND_PRINT(DFS),
5211 eeprom_ch_info[ch].flags,
5212 eeprom_ch_info[ch].max_power_avg,
5213 ((eeprom_ch_info[ch].
5214 flags & EEPROM_CHANNEL_IBSS)
5215 && !(eeprom_ch_info[ch].
5216 flags & EEPROM_CHANNEL_RADAR))
5217 ? "" : "not ");
5218
5219 /* Set the user_txpower_limit to the highest power
5220 * supported by any channel */
5221 if (eeprom_ch_info[ch].max_power_avg >
5222 priv->user_txpower_limit)
5223 priv->user_txpower_limit =
5224 eeprom_ch_info[ch].max_power_avg;
5225
5226 ch_info++;
5227 }
5228 }
5229
Cahill, Ben M6440adb2007-11-29 11:09:55 +08005230 /* Set up txpower settings in driver for all channels */
Zhu Yib481de92007-09-25 17:54:57 -07005231 if (iwl3945_txpower_set_from_eeprom(priv))
5232 return -EIO;
5233
5234 return 0;
5235}
5236
5237/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5238 * sending probe req. This should be set long enough to hear probe responses
5239 * from more than one AP. */
5240#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5241#define IWL_ACTIVE_DWELL_TIME_52 (10)
5242
5243/* For faster active scanning, scan will move to the next channel if fewer than
5244 * PLCP_QUIET_THRESH packets are heard on this channel within
5245 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5246 * time if it's a quiet channel (nothing responded to our probe, and there's
5247 * no other traffic).
5248 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5249#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5250#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5251
5252/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5253 * Must be set longer than active dwell time.
5254 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5255#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5256#define IWL_PASSIVE_DWELL_TIME_52 (10)
5257#define IWL_PASSIVE_DWELL_BASE (100)
5258#define IWL_CHANNEL_TUNE_TIME 5
5259
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005260static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv, int phymode)
Zhu Yib481de92007-09-25 17:54:57 -07005261{
5262 if (phymode == MODE_IEEE80211A)
5263 return IWL_ACTIVE_DWELL_TIME_52;
5264 else
5265 return IWL_ACTIVE_DWELL_TIME_24;
5266}
5267
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005268static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv, int phymode)
Zhu Yib481de92007-09-25 17:54:57 -07005269{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005270 u16 active = iwl3945_get_active_dwell_time(priv, phymode);
Zhu Yib481de92007-09-25 17:54:57 -07005271 u16 passive = (phymode != MODE_IEEE80211A) ?
5272 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5273 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5274
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005275 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005276 /* If we're associated, we clamp the maximum passive
5277 * dwell time to be 98% of the beacon interval (minus
5278 * 2 * channel tune time) */
5279 passive = priv->beacon_int;
5280 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5281 passive = IWL_PASSIVE_DWELL_BASE;
5282 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5283 }
5284
5285 if (passive <= active)
5286 passive = active + 1;
5287
5288 return passive;
5289}
5290
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005291static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv, int phymode,
Zhu Yib481de92007-09-25 17:54:57 -07005292 u8 is_active, u8 direct_mask,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005293 struct iwl3945_scan_channel *scan_ch)
Zhu Yib481de92007-09-25 17:54:57 -07005294{
5295 const struct ieee80211_channel *channels = NULL;
5296 const struct ieee80211_hw_mode *hw_mode;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005297 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07005298 u16 passive_dwell = 0;
5299 u16 active_dwell = 0;
5300 int added, i;
5301
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005302 hw_mode = iwl3945_get_hw_mode(priv, phymode);
Zhu Yib481de92007-09-25 17:54:57 -07005303 if (!hw_mode)
5304 return 0;
5305
5306 channels = hw_mode->channels;
5307
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005308 active_dwell = iwl3945_get_active_dwell_time(priv, phymode);
5309 passive_dwell = iwl3945_get_passive_dwell_time(priv, phymode);
Zhu Yib481de92007-09-25 17:54:57 -07005310
5311 for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
5312 if (channels[i].chan ==
5313 le16_to_cpu(priv->active_rxon.channel)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005314 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005315 IWL_DEBUG_SCAN
5316 ("Skipping current channel %d\n",
5317 le16_to_cpu(priv->active_rxon.channel));
5318 continue;
5319 }
5320 } else if (priv->only_active_channel)
5321 continue;
5322
5323 scan_ch->channel = channels[i].chan;
5324
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005325 ch_info = iwl3945_get_channel_info(priv, phymode, scan_ch->channel);
Zhu Yib481de92007-09-25 17:54:57 -07005326 if (!is_channel_valid(ch_info)) {
5327 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5328 scan_ch->channel);
5329 continue;
5330 }
5331
5332 if (!is_active || is_channel_passive(ch_info) ||
5333 !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
5334 scan_ch->type = 0; /* passive */
5335 else
5336 scan_ch->type = 1; /* active */
5337
5338 if (scan_ch->type & 1)
5339 scan_ch->type |= (direct_mask << 1);
5340
5341 if (is_channel_narrow(ch_info))
5342 scan_ch->type |= (1 << 7);
5343
5344 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5345 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5346
Ben Cahill9fbab512007-11-29 11:09:47 +08005347 /* Set txpower levels to defaults */
Zhu Yib481de92007-09-25 17:54:57 -07005348 scan_ch->tpc.dsp_atten = 110;
5349 /* scan_pwr_info->tpc.dsp_atten; */
5350
5351 /*scan_pwr_info->tpc.tx_gain; */
5352 if (phymode == MODE_IEEE80211A)
5353 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5354 else {
5355 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5356 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
Ben Cahill9fbab512007-11-29 11:09:47 +08005357 * power level:
5358 * scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
Zhu Yib481de92007-09-25 17:54:57 -07005359 */
5360 }
5361
5362 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5363 scan_ch->channel,
5364 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5365 (scan_ch->type & 1) ?
5366 active_dwell : passive_dwell);
5367
5368 scan_ch++;
5369 added++;
5370 }
5371
5372 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5373 return added;
5374}
5375
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005376static void iwl3945_reset_channel_flag(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005377{
5378 int i, j;
5379 for (i = 0; i < 3; i++) {
5380 struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
5381 for (j = 0; j < hw_mode->num_channels; j++)
5382 hw_mode->channels[j].flag = hw_mode->channels[j].val;
5383 }
5384}
5385
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005386static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07005387 struct ieee80211_rate *rates)
5388{
5389 int i;
5390
5391 for (i = 0; i < IWL_RATE_COUNT; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005392 rates[i].rate = iwl3945_rates[i].ieee * 5;
Zhu Yib481de92007-09-25 17:54:57 -07005393 rates[i].val = i; /* Rate scaling will work on indexes */
5394 rates[i].val2 = i;
5395 rates[i].flags = IEEE80211_RATE_SUPPORTED;
5396 /* Only OFDM have the bits-per-symbol set */
5397 if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
5398 rates[i].flags |= IEEE80211_RATE_OFDM;
5399 else {
5400 /*
5401 * If CCK 1M then set rate flag to CCK else CCK_2
5402 * which is CCK | PREAMBLE2
5403 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005404 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
Zhu Yib481de92007-09-25 17:54:57 -07005405 IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
5406 }
5407
5408 /* Set up which ones are basic rates... */
5409 if (IWL_BASIC_RATES_MASK & (1 << i))
5410 rates[i].flags |= IEEE80211_RATE_BASIC;
5411 }
5412}
5413
5414/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005415 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07005416 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005417static int iwl3945_init_geos(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005418{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005419 struct iwl3945_channel_info *ch;
Zhu Yib481de92007-09-25 17:54:57 -07005420 struct ieee80211_hw_mode *modes;
5421 struct ieee80211_channel *channels;
5422 struct ieee80211_channel *geo_ch;
5423 struct ieee80211_rate *rates;
5424 int i = 0;
5425 enum {
5426 A = 0,
5427 B = 1,
5428 G = 2,
5429 };
5430 int mode_count = 3;
5431
5432 if (priv->modes) {
5433 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5434 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5435 return 0;
5436 }
5437
5438 modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
5439 GFP_KERNEL);
5440 if (!modes)
5441 return -ENOMEM;
5442
5443 channels = kzalloc(sizeof(struct ieee80211_channel) *
5444 priv->channel_count, GFP_KERNEL);
5445 if (!channels) {
5446 kfree(modes);
5447 return -ENOMEM;
5448 }
5449
5450 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
5451 GFP_KERNEL);
5452 if (!rates) {
5453 kfree(modes);
5454 kfree(channels);
5455 return -ENOMEM;
5456 }
5457
5458 /* 0 = 802.11a
5459 * 1 = 802.11b
5460 * 2 = 802.11g
5461 */
5462
5463 /* 5.2GHz channels start after the 2.4GHz channels */
5464 modes[A].mode = MODE_IEEE80211A;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005465 modes[A].channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
Mohamed Abbas14577f22007-11-12 11:37:42 +08005466 modes[A].rates = &rates[4];
Zhu Yib481de92007-09-25 17:54:57 -07005467 modes[A].num_rates = 8; /* just OFDM */
5468 modes[A].num_channels = 0;
5469
5470 modes[B].mode = MODE_IEEE80211B;
5471 modes[B].channels = channels;
Mohamed Abbas14577f22007-11-12 11:37:42 +08005472 modes[B].rates = rates;
Zhu Yib481de92007-09-25 17:54:57 -07005473 modes[B].num_rates = 4; /* just CCK */
5474 modes[B].num_channels = 0;
5475
5476 modes[G].mode = MODE_IEEE80211G;
5477 modes[G].channels = channels;
5478 modes[G].rates = rates;
5479 modes[G].num_rates = 12; /* OFDM & CCK */
5480 modes[G].num_channels = 0;
5481
5482 priv->ieee_channels = channels;
5483 priv->ieee_rates = rates;
5484
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005485 iwl3945_init_hw_rates(priv, rates);
Zhu Yib481de92007-09-25 17:54:57 -07005486
5487 for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
5488 ch = &priv->channel_info[i];
5489
5490 if (!is_channel_valid(ch)) {
5491 IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
5492 "skipping.\n",
5493 ch->channel, is_channel_a_band(ch) ?
5494 "5.2" : "2.4");
5495 continue;
5496 }
5497
5498 if (is_channel_a_band(ch))
5499 geo_ch = &modes[A].channels[modes[A].num_channels++];
5500 else {
5501 geo_ch = &modes[B].channels[modes[B].num_channels++];
5502 modes[G].num_channels++;
5503 }
5504
5505 geo_ch->freq = ieee80211chan2mhz(ch->channel);
5506 geo_ch->chan = ch->channel;
5507 geo_ch->power_level = ch->max_power_avg;
5508 geo_ch->antenna_max = 0xff;
5509
5510 if (is_channel_valid(ch)) {
5511 geo_ch->flag = IEEE80211_CHAN_W_SCAN;
5512 if (ch->flags & EEPROM_CHANNEL_IBSS)
5513 geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
5514
5515 if (ch->flags & EEPROM_CHANNEL_ACTIVE)
5516 geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
5517
5518 if (ch->flags & EEPROM_CHANNEL_RADAR)
5519 geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
5520
5521 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5522 priv->max_channel_txpower_limit =
5523 ch->max_power_avg;
5524 }
5525
5526 geo_ch->val = geo_ch->flag;
5527 }
5528
5529 if ((modes[A].num_channels == 0) && priv->is_abg) {
5530 printk(KERN_INFO DRV_NAME
5531 ": Incorrectly detected BG card as ABG. Please send "
5532 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5533 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5534 priv->is_abg = 0;
5535 }
5536
5537 printk(KERN_INFO DRV_NAME
5538 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5539 modes[G].num_channels, modes[A].num_channels);
5540
5541 /*
5542 * NOTE: We register these in preference of order -- the
5543 * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
5544 * a phymode based on rates or AP capabilities but seems to
5545 * configure it purely on if the channel being configured
5546 * is supported by a mode -- and the first match is taken
5547 */
5548
5549 if (modes[G].num_channels)
5550 ieee80211_register_hwmode(priv->hw, &modes[G]);
5551 if (modes[B].num_channels)
5552 ieee80211_register_hwmode(priv->hw, &modes[B]);
5553 if (modes[A].num_channels)
5554 ieee80211_register_hwmode(priv->hw, &modes[A]);
5555
5556 priv->modes = modes;
5557 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5558
5559 return 0;
5560}
5561
5562/******************************************************************************
5563 *
5564 * uCode download functions
5565 *
5566 ******************************************************************************/
5567
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005568static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005569{
5570 if (priv->ucode_code.v_addr != NULL) {
5571 pci_free_consistent(priv->pci_dev,
5572 priv->ucode_code.len,
5573 priv->ucode_code.v_addr,
5574 priv->ucode_code.p_addr);
5575 priv->ucode_code.v_addr = NULL;
5576 }
5577 if (priv->ucode_data.v_addr != NULL) {
5578 pci_free_consistent(priv->pci_dev,
5579 priv->ucode_data.len,
5580 priv->ucode_data.v_addr,
5581 priv->ucode_data.p_addr);
5582 priv->ucode_data.v_addr = NULL;
5583 }
5584 if (priv->ucode_data_backup.v_addr != NULL) {
5585 pci_free_consistent(priv->pci_dev,
5586 priv->ucode_data_backup.len,
5587 priv->ucode_data_backup.v_addr,
5588 priv->ucode_data_backup.p_addr);
5589 priv->ucode_data_backup.v_addr = NULL;
5590 }
5591 if (priv->ucode_init.v_addr != NULL) {
5592 pci_free_consistent(priv->pci_dev,
5593 priv->ucode_init.len,
5594 priv->ucode_init.v_addr,
5595 priv->ucode_init.p_addr);
5596 priv->ucode_init.v_addr = NULL;
5597 }
5598 if (priv->ucode_init_data.v_addr != NULL) {
5599 pci_free_consistent(priv->pci_dev,
5600 priv->ucode_init_data.len,
5601 priv->ucode_init_data.v_addr,
5602 priv->ucode_init_data.p_addr);
5603 priv->ucode_init_data.v_addr = NULL;
5604 }
5605 if (priv->ucode_boot.v_addr != NULL) {
5606 pci_free_consistent(priv->pci_dev,
5607 priv->ucode_boot.len,
5608 priv->ucode_boot.v_addr,
5609 priv->ucode_boot.p_addr);
5610 priv->ucode_boot.v_addr = NULL;
5611 }
5612}
5613
5614/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005615 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005616 * looking at all data.
5617 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005618static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 * image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005619{
5620 u32 val;
5621 u32 save_len = len;
5622 int rc = 0;
5623 u32 errcnt;
5624
5625 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5626
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005627 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005628 if (rc)
5629 return rc;
5630
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005631 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
Zhu Yib481de92007-09-25 17:54:57 -07005632
5633 errcnt = 0;
5634 for (; len > 0; len -= sizeof(u32), image++) {
5635 /* read data comes through single port, auto-incr addr */
5636 /* NOTE: Use the debugless read so we don't flood kernel log
5637 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005638 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005639 if (val != le32_to_cpu(*image)) {
5640 IWL_ERROR("uCode INST section is invalid at "
5641 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5642 save_len - len, val, le32_to_cpu(*image));
5643 rc = -EIO;
5644 errcnt++;
5645 if (errcnt >= 20)
5646 break;
5647 }
5648 }
5649
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005650 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005651
5652 if (!errcnt)
Ian Schrambc434dd2007-10-25 17:15:29 +08005653 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
Zhu Yib481de92007-09-25 17:54:57 -07005654
5655 return rc;
5656}
5657
5658
5659/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005660 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005661 * using sample data 100 bytes apart. If these sample points are good,
5662 * it's a pretty good bet that everything between them is good, too.
5663 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005664static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005665{
5666 u32 val;
5667 int rc = 0;
5668 u32 errcnt = 0;
5669 u32 i;
5670
5671 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5672
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005673 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005674 if (rc)
5675 return rc;
5676
5677 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5678 /* read data comes through single port, auto-incr addr */
5679 /* NOTE: Use the debugless read so we don't flood kernel log
5680 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005681 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
Zhu Yib481de92007-09-25 17:54:57 -07005682 i + RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005683 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005684 if (val != le32_to_cpu(*image)) {
5685#if 0 /* Enable this if you want to see details */
5686 IWL_ERROR("uCode INST section is invalid at "
5687 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5688 i, val, *image);
5689#endif
5690 rc = -EIO;
5691 errcnt++;
5692 if (errcnt >= 3)
5693 break;
5694 }
5695 }
5696
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005697 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005698
5699 return rc;
5700}
5701
5702
5703/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005704 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
Zhu Yib481de92007-09-25 17:54:57 -07005705 * and verify its contents
5706 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005707static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005708{
5709 __le32 *image;
5710 u32 len;
5711 int rc = 0;
5712
5713 /* Try bootstrap */
5714 image = (__le32 *)priv->ucode_boot.v_addr;
5715 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005716 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005717 if (rc == 0) {
5718 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5719 return 0;
5720 }
5721
5722 /* Try initialize */
5723 image = (__le32 *)priv->ucode_init.v_addr;
5724 len = priv->ucode_init.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005725 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005726 if (rc == 0) {
5727 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5728 return 0;
5729 }
5730
5731 /* Try runtime/protocol */
5732 image = (__le32 *)priv->ucode_code.v_addr;
5733 len = priv->ucode_code.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005734 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005735 if (rc == 0) {
5736 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5737 return 0;
5738 }
5739
5740 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5741
Ben Cahill9fbab512007-11-29 11:09:47 +08005742 /* Since nothing seems to match, show first several data entries in
5743 * instruction SRAM, so maybe visual inspection will give a clue.
5744 * Selection of bootstrap image (vs. other images) is arbitrary. */
Zhu Yib481de92007-09-25 17:54:57 -07005745 image = (__le32 *)priv->ucode_boot.v_addr;
5746 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005747 rc = iwl3945_verify_inst_full(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005748
5749 return rc;
5750}
5751
5752
5753/* check contents of special bootstrap uCode SRAM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005754static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005755{
5756 __le32 *image = priv->ucode_boot.v_addr;
5757 u32 len = priv->ucode_boot.len;
5758 u32 reg;
5759 u32 val;
5760
5761 IWL_DEBUG_INFO("Begin verify bsm\n");
5762
5763 /* verify BSM SRAM contents */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005764 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005765 for (reg = BSM_SRAM_LOWER_BOUND;
5766 reg < BSM_SRAM_LOWER_BOUND + len;
5767 reg += sizeof(u32), image ++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005768 val = iwl3945_read_prph(priv, reg);
Zhu Yib481de92007-09-25 17:54:57 -07005769 if (val != le32_to_cpu(*image)) {
5770 IWL_ERROR("BSM uCode verification failed at "
5771 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5772 BSM_SRAM_LOWER_BOUND,
5773 reg - BSM_SRAM_LOWER_BOUND, len,
5774 val, le32_to_cpu(*image));
5775 return -EIO;
5776 }
5777 }
5778
5779 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5780
5781 return 0;
5782}
5783
5784/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005785 * iwl3945_load_bsm - Load bootstrap instructions
Zhu Yib481de92007-09-25 17:54:57 -07005786 *
5787 * BSM operation:
5788 *
5789 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5790 * in special SRAM that does not power down during RFKILL. When powering back
5791 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5792 * the bootstrap program into the on-board processor, and starts it.
5793 *
5794 * The bootstrap program loads (via DMA) instructions and data for a new
5795 * program from host DRAM locations indicated by the host driver in the
5796 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5797 * automatically.
5798 *
5799 * When initializing the NIC, the host driver points the BSM to the
5800 * "initialize" uCode image. This uCode sets up some internal data, then
5801 * notifies host via "initialize alive" that it is complete.
5802 *
5803 * The host then replaces the BSM_DRAM_* pointer values to point to the
5804 * normal runtime uCode instructions and a backup uCode data cache buffer
5805 * (filled initially with starting data values for the on-board processor),
5806 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5807 * which begins normal operation.
5808 *
5809 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5810 * the backup data cache in DRAM before SRAM is powered down.
5811 *
5812 * When powering back up, the BSM loads the bootstrap program. This reloads
5813 * the runtime uCode instructions and the backup data cache into SRAM,
5814 * and re-launches the runtime uCode from where it left off.
5815 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005816static int iwl3945_load_bsm(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005817{
5818 __le32 *image = priv->ucode_boot.v_addr;
5819 u32 len = priv->ucode_boot.len;
5820 dma_addr_t pinst;
5821 dma_addr_t pdata;
5822 u32 inst_len;
5823 u32 data_len;
5824 int rc;
5825 int i;
5826 u32 done;
5827 u32 reg_offset;
5828
5829 IWL_DEBUG_INFO("Begin load bsm\n");
5830
5831 /* make sure bootstrap program is no larger than BSM's SRAM size */
5832 if (len > IWL_MAX_BSM_SIZE)
5833 return -EINVAL;
5834
5835 /* Tell bootstrap uCode where to find the "Initialize" uCode
Ben Cahill9fbab512007-11-29 11:09:47 +08005836 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005837 * NOTE: iwl3945_initialize_alive_start() will replace these values,
Zhu Yib481de92007-09-25 17:54:57 -07005838 * after the "initialize" uCode has run, to point to
5839 * runtime/protocol instructions and backup data cache. */
5840 pinst = priv->ucode_init.p_addr;
5841 pdata = priv->ucode_init_data.p_addr;
5842 inst_len = priv->ucode_init.len;
5843 data_len = priv->ucode_init_data.len;
5844
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005845 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005846 if (rc)
5847 return rc;
5848
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005849 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5850 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5851 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5852 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
Zhu Yib481de92007-09-25 17:54:57 -07005853
5854 /* Fill BSM memory with bootstrap instructions */
5855 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5856 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5857 reg_offset += sizeof(u32), image++)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005858 _iwl3945_write_prph(priv, reg_offset,
Zhu Yib481de92007-09-25 17:54:57 -07005859 le32_to_cpu(*image));
5860
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005861 rc = iwl3945_verify_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005862 if (rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005863 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005864 return rc;
5865 }
5866
5867 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005868 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5869 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005870 RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005871 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07005872
5873 /* Load bootstrap code into instruction SRAM now,
5874 * to prepare to load "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005875 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005876 BSM_WR_CTRL_REG_BIT_START);
5877
5878 /* Wait for load of bootstrap uCode to finish */
5879 for (i = 0; i < 100; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005880 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005881 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5882 break;
5883 udelay(10);
5884 }
5885 if (i < 100)
5886 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5887 else {
5888 IWL_ERROR("BSM write did not complete!\n");
5889 return -EIO;
5890 }
5891
5892 /* Enable future boot loads whenever power management unit triggers it
5893 * (e.g. when powering back up after power-save shutdown) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005894 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005895 BSM_WR_CTRL_REG_BIT_START_EN);
5896
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005897 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005898
5899 return 0;
5900}
5901
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005902static void iwl3945_nic_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005903{
5904 /* Remove all resets to allow NIC to operate */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005905 iwl3945_write32(priv, CSR_RESET, 0);
Zhu Yib481de92007-09-25 17:54:57 -07005906}
5907
Tomas Winkler90e759d2007-11-29 11:09:41 +08005908static int iwl3945_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
5909{
5910 desc->v_addr = pci_alloc_consistent(pci_dev, desc->len, &desc->p_addr);
5911 return (desc->v_addr != NULL) ? 0 : -ENOMEM;
5912}
5913
Zhu Yib481de92007-09-25 17:54:57 -07005914/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005915 * iwl3945_read_ucode - Read uCode images from disk file.
Zhu Yib481de92007-09-25 17:54:57 -07005916 *
5917 * Copy into buffers for card to fetch via bus-mastering
5918 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005919static int iwl3945_read_ucode(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005920{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005921 struct iwl3945_ucode *ucode;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005922 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07005923 const struct firmware *ucode_raw;
5924 /* firmware file name contains uCode/driver compatibility version */
5925 const char *name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode";
5926 u8 *src;
5927 size_t len;
5928 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5929
5930 /* Ask kernel firmware_class module to get the boot firmware off disk.
5931 * request_firmware() is synchronous, file is in memory on return. */
Tomas Winkler90e759d2007-11-29 11:09:41 +08005932 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5933 if (ret < 0) {
5934 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5935 name, ret);
Zhu Yib481de92007-09-25 17:54:57 -07005936 goto error;
5937 }
5938
5939 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5940 name, ucode_raw->size);
5941
5942 /* Make sure that we got at least our header! */
5943 if (ucode_raw->size < sizeof(*ucode)) {
5944 IWL_ERROR("File size way too small!\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08005945 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005946 goto err_release;
5947 }
5948
5949 /* Data from ucode file: header followed by uCode images */
5950 ucode = (void *)ucode_raw->data;
5951
5952 ver = le32_to_cpu(ucode->ver);
5953 inst_size = le32_to_cpu(ucode->inst_size);
5954 data_size = le32_to_cpu(ucode->data_size);
5955 init_size = le32_to_cpu(ucode->init_size);
5956 init_data_size = le32_to_cpu(ucode->init_data_size);
5957 boot_size = le32_to_cpu(ucode->boot_size);
5958
5959 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
Ian Schrambc434dd2007-10-25 17:15:29 +08005960 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5961 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5962 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5963 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5964 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
Zhu Yib481de92007-09-25 17:54:57 -07005965
5966 /* Verify size of file vs. image size info in file's header */
5967 if (ucode_raw->size < sizeof(*ucode) +
5968 inst_size + data_size + init_size +
5969 init_data_size + boot_size) {
5970
5971 IWL_DEBUG_INFO("uCode file size %d too small\n",
5972 (int)ucode_raw->size);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005973 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005974 goto err_release;
5975 }
5976
5977 /* Verify that uCode images will fit in card's SRAM */
5978 if (inst_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005979 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5980 inst_size);
5981 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005982 goto err_release;
5983 }
5984
5985 if (data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005986 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5987 data_size);
5988 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005989 goto err_release;
5990 }
5991 if (init_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005992 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5993 init_size);
5994 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005995 goto err_release;
5996 }
5997 if (init_data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005998 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5999 init_data_size);
6000 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07006001 goto err_release;
6002 }
6003 if (boot_size > IWL_MAX_BSM_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08006004 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
6005 boot_size);
6006 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07006007 goto err_release;
6008 }
6009
6010 /* Allocate ucode buffers for card's bus-master loading ... */
6011
6012 /* Runtime instructions and 2 copies of data:
6013 * 1) unmodified from disk
6014 * 2) backup cache for save/restore during power-downs */
6015 priv->ucode_code.len = inst_size;
Tomas Winkler90e759d2007-11-29 11:09:41 +08006016 iwl3945_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
Zhu Yib481de92007-09-25 17:54:57 -07006017
6018 priv->ucode_data.len = data_size;
Tomas Winkler90e759d2007-11-29 11:09:41 +08006019 iwl3945_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
Zhu Yib481de92007-09-25 17:54:57 -07006020
6021 priv->ucode_data_backup.len = data_size;
Tomas Winkler90e759d2007-11-29 11:09:41 +08006022 iwl3945_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
Zhu Yib481de92007-09-25 17:54:57 -07006023
6024 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
Tomas Winkler90e759d2007-11-29 11:09:41 +08006025 !priv->ucode_data_backup.v_addr)
Zhu Yib481de92007-09-25 17:54:57 -07006026 goto err_pci_alloc;
6027
Tomas Winkler90e759d2007-11-29 11:09:41 +08006028 /* Initialization instructions and data */
6029 if (init_size && init_data_size) {
6030 priv->ucode_init.len = init_size;
6031 iwl3945_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
6032
6033 priv->ucode_init_data.len = init_data_size;
6034 iwl3945_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
6035
6036 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
6037 goto err_pci_alloc;
6038 }
6039
6040 /* Bootstrap (instructions only, no data) */
6041 if (boot_size) {
6042 priv->ucode_boot.len = boot_size;
6043 iwl3945_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
6044
6045 if (!priv->ucode_boot.v_addr)
6046 goto err_pci_alloc;
6047 }
6048
Zhu Yib481de92007-09-25 17:54:57 -07006049 /* Copy images into buffers for card's bus-master reads ... */
6050
6051 /* Runtime instructions (first block of data in file) */
6052 src = &ucode->data[0];
6053 len = priv->ucode_code.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08006054 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07006055 memcpy(priv->ucode_code.v_addr, src, len);
6056 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
6057 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
6058
6059 /* Runtime data (2nd block)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006060 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
Zhu Yib481de92007-09-25 17:54:57 -07006061 src = &ucode->data[inst_size];
6062 len = priv->ucode_data.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08006063 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07006064 memcpy(priv->ucode_data.v_addr, src, len);
6065 memcpy(priv->ucode_data_backup.v_addr, src, len);
6066
6067 /* Initialization instructions (3rd block) */
6068 if (init_size) {
6069 src = &ucode->data[inst_size + data_size];
6070 len = priv->ucode_init.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08006071 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
6072 len);
Zhu Yib481de92007-09-25 17:54:57 -07006073 memcpy(priv->ucode_init.v_addr, src, len);
6074 }
6075
6076 /* Initialization data (4th block) */
6077 if (init_data_size) {
6078 src = &ucode->data[inst_size + data_size + init_size];
6079 len = priv->ucode_init_data.len;
6080 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
6081 (int)len);
6082 memcpy(priv->ucode_init_data.v_addr, src, len);
6083 }
6084
6085 /* Bootstrap instructions (5th block) */
6086 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
6087 len = priv->ucode_boot.len;
6088 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
6089 (int)len);
6090 memcpy(priv->ucode_boot.v_addr, src, len);
6091
6092 /* We have our copies now, allow OS release its copies */
6093 release_firmware(ucode_raw);
6094 return 0;
6095
6096 err_pci_alloc:
6097 IWL_ERROR("failed to allocate pci memory\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08006098 ret = -ENOMEM;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006099 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006100
6101 err_release:
6102 release_firmware(ucode_raw);
6103
6104 error:
Tomas Winkler90e759d2007-11-29 11:09:41 +08006105 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07006106}
6107
6108
6109/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006110 * iwl3945_set_ucode_ptrs - Set uCode address location
Zhu Yib481de92007-09-25 17:54:57 -07006111 *
6112 * Tell initialization uCode where to find runtime uCode.
6113 *
6114 * BSM registers initially contain pointers to initialization uCode.
6115 * We need to replace them to load runtime uCode inst and data,
6116 * and to save runtime data when powering down.
6117 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006118static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006119{
6120 dma_addr_t pinst;
6121 dma_addr_t pdata;
6122 int rc = 0;
6123 unsigned long flags;
6124
6125 /* bits 31:0 for 3945 */
6126 pinst = priv->ucode_code.p_addr;
6127 pdata = priv->ucode_data_backup.p_addr;
6128
6129 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006130 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006131 if (rc) {
6132 spin_unlock_irqrestore(&priv->lock, flags);
6133 return rc;
6134 }
6135
6136 /* Tell bootstrap uCode where to find image to load */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006137 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6138 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6139 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07006140 priv->ucode_data.len);
6141
6142 /* Inst bytecount must be last to set up, bit 31 signals uCode
6143 * that all new ptr/size info is in place */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006144 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07006145 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
6146
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006147 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006148
6149 spin_unlock_irqrestore(&priv->lock, flags);
6150
6151 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6152
6153 return rc;
6154}
6155
6156/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006157 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07006158 *
6159 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6160 *
Zhu Yib481de92007-09-25 17:54:57 -07006161 * Tell "initialize" uCode to go ahead and load the runtime uCode.
Ben Cahill9fbab512007-11-29 11:09:47 +08006162 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006163static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006164{
6165 /* Check alive response for "valid" sign from uCode */
6166 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6167 /* We had an error bringing up the hardware, so take it
6168 * all the way back down so we can try again */
6169 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6170 goto restart;
6171 }
6172
6173 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6174 * This is a paranoid check, because we would not have gotten the
6175 * "initialize" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006176 if (iwl3945_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006177 /* Runtime instruction load was bad;
6178 * take it all the way back down so we can try again */
6179 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6180 goto restart;
6181 }
6182
6183 /* Send pointers to protocol/runtime uCode image ... init code will
6184 * load and launch runtime uCode, which will send us another "Alive"
6185 * notification. */
6186 IWL_DEBUG_INFO("Initialization Alive received.\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006187 if (iwl3945_set_ucode_ptrs(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006188 /* Runtime instruction load won't happen;
6189 * take it all the way back down so we can try again */
6190 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6191 goto restart;
6192 }
6193 return;
6194
6195 restart:
6196 queue_work(priv->workqueue, &priv->restart);
6197}
6198
6199
6200/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006201 * iwl3945_alive_start - called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07006202 * from protocol/runtime uCode (initialization uCode's
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006203 * Alive gets handled by iwl3945_init_alive_start()).
Zhu Yib481de92007-09-25 17:54:57 -07006204 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006205static void iwl3945_alive_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006206{
6207 int rc = 0;
6208 int thermal_spin = 0;
6209 u32 rfkill;
6210
6211 IWL_DEBUG_INFO("Runtime Alive received.\n");
6212
6213 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6214 /* We had an error bringing up the hardware, so take it
6215 * all the way back down so we can try again */
6216 IWL_DEBUG_INFO("Alive failed.\n");
6217 goto restart;
6218 }
6219
6220 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6221 * This is a paranoid check, because we would not have gotten the
6222 * "runtime" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006223 if (iwl3945_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006224 /* Runtime instruction load was bad;
6225 * take it all the way back down so we can try again */
6226 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6227 goto restart;
6228 }
6229
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006230 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006231
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006232 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006233 if (rc) {
6234 IWL_WARNING("Can not read rfkill status from adapter\n");
6235 return;
6236 }
6237
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006238 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07006239 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006240 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006241
6242 if (rfkill & 0x1) {
6243 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6244 /* if rfkill is not on, then wait for thermal
6245 * sensor in adapter to kick in */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006246 while (iwl3945_hw_get_temperature(priv) == 0) {
Zhu Yib481de92007-09-25 17:54:57 -07006247 thermal_spin++;
6248 udelay(10);
6249 }
6250
6251 if (thermal_spin)
6252 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
6253 thermal_spin * 10);
6254 } else
6255 set_bit(STATUS_RF_KILL_HW, &priv->status);
6256
Ben Cahill9fbab512007-11-29 11:09:47 +08006257 /* After the ALIVE response, we can send commands to 3945 uCode */
Zhu Yib481de92007-09-25 17:54:57 -07006258 set_bit(STATUS_ALIVE, &priv->status);
6259
6260 /* Clear out the uCode error bit if it is set */
6261 clear_bit(STATUS_FW_ERROR, &priv->status);
6262
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006263 rc = iwl3945_init_channel_map(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006264 if (rc) {
6265 IWL_ERROR("initializing regulatory failed: %d\n", rc);
6266 return;
6267 }
6268
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006269 iwl3945_init_geos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006270
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006271 if (iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -07006272 return;
6273
6274 if (!priv->mac80211_registered) {
6275 /* Unlock so any user space entry points can call back into
6276 * the driver without a deadlock... */
6277 mutex_unlock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006278 iwl3945_rate_control_register(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07006279 rc = ieee80211_register_hw(priv->hw);
6280 priv->hw->conf.beacon_int = 100;
6281 mutex_lock(&priv->mutex);
6282
6283 if (rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006284 iwl3945_rate_control_unregister(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07006285 IWL_ERROR("Failed to register network "
6286 "device (error %d)\n", rc);
6287 return;
6288 }
6289
6290 priv->mac80211_registered = 1;
6291
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006292 iwl3945_reset_channel_flag(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006293 } else
6294 ieee80211_start_queues(priv->hw);
6295
6296 priv->active_rate = priv->rates_mask;
6297 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6298
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006299 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
Zhu Yib481de92007-09-25 17:54:57 -07006300
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006301 if (iwl3945_is_associated(priv)) {
6302 struct iwl3945_rxon_cmd *active_rxon =
6303 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07006304
6305 memcpy(&priv->staging_rxon, &priv->active_rxon,
6306 sizeof(priv->staging_rxon));
6307 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6308 } else {
6309 /* Initialize our rx_config data */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006310 iwl3945_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006311 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6312 }
6313
Ben Cahill9fbab512007-11-29 11:09:47 +08006314 /* Configure Bluetooth device coexistence support */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006315 iwl3945_send_bt_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006316
6317 /* Configure the adapter for unassociated operation */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006318 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006319
6320 /* At this point, the NIC is initialized and operational */
6321 priv->notif_missed_beacons = 0;
6322 set_bit(STATUS_READY, &priv->status);
6323
6324 iwl3945_reg_txpower_periodic(priv);
6325
6326 IWL_DEBUG_INFO("ALIVE processing complete.\n");
6327
6328 if (priv->error_recovering)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006329 iwl3945_error_recovery(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006330
6331 return;
6332
6333 restart:
6334 queue_work(priv->workqueue, &priv->restart);
6335}
6336
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006337static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
Zhu Yib481de92007-09-25 17:54:57 -07006338
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006339static void __iwl3945_down(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006340{
6341 unsigned long flags;
6342 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6343 struct ieee80211_conf *conf = NULL;
6344
6345 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6346
6347 conf = ieee80211_get_hw_conf(priv->hw);
6348
6349 if (!exit_pending)
6350 set_bit(STATUS_EXIT_PENDING, &priv->status);
6351
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006352 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006353
6354 /* Unblock any waiting calls */
6355 wake_up_interruptible_all(&priv->wait_command_queue);
6356
Zhu Yib481de92007-09-25 17:54:57 -07006357 /* Wipe out the EXIT_PENDING status bit if we are not actually
6358 * exiting the module */
6359 if (!exit_pending)
6360 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6361
6362 /* stop and reset the on-board processor */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006363 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
Zhu Yib481de92007-09-25 17:54:57 -07006364
6365 /* tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006366 iwl3945_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006367
6368 if (priv->mac80211_registered)
6369 ieee80211_stop_queues(priv->hw);
6370
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006371 /* If we have not previously called iwl3945_init() then
Zhu Yib481de92007-09-25 17:54:57 -07006372 * clear all bits but the RF Kill and SUSPEND bits and return */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006373 if (!iwl3945_is_init(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006374 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6375 STATUS_RF_KILL_HW |
6376 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6377 STATUS_RF_KILL_SW |
6378 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6379 STATUS_IN_SUSPEND;
6380 goto exit;
6381 }
6382
6383 /* ...otherwise clear out all the status bits but the RF Kill and
6384 * SUSPEND bits and continue taking the NIC down. */
6385 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6386 STATUS_RF_KILL_HW |
6387 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6388 STATUS_RF_KILL_SW |
6389 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6390 STATUS_IN_SUSPEND |
6391 test_bit(STATUS_FW_ERROR, &priv->status) <<
6392 STATUS_FW_ERROR;
6393
6394 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006395 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
Zhu Yib481de92007-09-25 17:54:57 -07006396 spin_unlock_irqrestore(&priv->lock, flags);
6397
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006398 iwl3945_hw_txq_ctx_stop(priv);
6399 iwl3945_hw_rxq_stop(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006400
6401 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006402 if (!iwl3945_grab_nic_access(priv)) {
6403 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
Zhu Yib481de92007-09-25 17:54:57 -07006404 APMG_CLK_VAL_DMA_CLK_RQT);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006405 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006406 }
6407 spin_unlock_irqrestore(&priv->lock, flags);
6408
6409 udelay(5);
6410
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006411 iwl3945_hw_nic_stop_master(priv);
6412 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6413 iwl3945_hw_nic_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006414
6415 exit:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006416 memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07006417
6418 if (priv->ibss_beacon)
6419 dev_kfree_skb(priv->ibss_beacon);
6420 priv->ibss_beacon = NULL;
6421
6422 /* clear out any free frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006423 iwl3945_clear_free_frames(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006424}
6425
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006426static void iwl3945_down(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006427{
6428 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006429 __iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006430 mutex_unlock(&priv->mutex);
Zhu Yib24d22b2007-12-19 13:59:52 +08006431
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006432 iwl3945_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006433}
6434
6435#define MAX_HW_RESTARTS 5
6436
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006437static int __iwl3945_up(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006438{
Joe Perches0795af52007-10-03 17:59:30 -07006439 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006440 int rc, i;
6441
6442 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6443 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6444 return -EIO;
6445 }
6446
6447 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6448 IWL_WARNING("Radio disabled by SW RF kill (module "
6449 "parameter)\n");
6450 return 0;
6451 }
6452
Reinette Chatrea781cf92008-01-21 10:08:31 -08006453 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6454 IWL_ERROR("ucode not available for device bringup\n");
6455 return -EIO;
6456 }
6457
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006458 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
Zhu Yib481de92007-09-25 17:54:57 -07006459
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006460 rc = iwl3945_hw_nic_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006461 if (rc) {
6462 IWL_ERROR("Unable to int nic\n");
6463 return rc;
6464 }
6465
6466 /* make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006467 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6468 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
Zhu Yib481de92007-09-25 17:54:57 -07006469 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6470
6471 /* clear (again), then enable host interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006472 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6473 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006474
6475 /* really make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006476 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6477 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07006478
6479 /* Copy original ucode data image from disk into backup cache.
6480 * This will be used to initialize the on-board processor's
6481 * data SRAM for a clean start when the runtime program first loads. */
6482 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
6483 priv->ucode_data.len);
6484
6485 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6486
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006487 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006488
6489 /* load bootstrap state machine,
6490 * load bootstrap program into processor's memory,
6491 * prepare to load the "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006492 rc = iwl3945_load_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006493
6494 if (rc) {
6495 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6496 continue;
6497 }
6498
6499 /* start card; "initialize" will load runtime ucode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006500 iwl3945_nic_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006501
Ben Cahill9fbab512007-11-29 11:09:47 +08006502 /* MAC Address location in EEPROM is same for 3945/4965 */
Zhu Yib481de92007-09-25 17:54:57 -07006503 get_eeprom_mac(priv, priv->mac_addr);
Joe Perches0795af52007-10-03 17:59:30 -07006504 IWL_DEBUG_INFO("MAC address: %s\n",
6505 print_mac(mac, priv->mac_addr));
Zhu Yib481de92007-09-25 17:54:57 -07006506
6507 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
6508
6509 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6510
6511 return 0;
6512 }
6513
6514 set_bit(STATUS_EXIT_PENDING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006515 __iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006516
6517 /* tried to restart and config the device for as long as our
6518 * patience could withstand */
6519 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6520 return -EIO;
6521}
6522
6523
6524/*****************************************************************************
6525 *
6526 * Workqueue callbacks
6527 *
6528 *****************************************************************************/
6529
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006530static void iwl3945_bg_init_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006531{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006532 struct iwl3945_priv *priv =
6533 container_of(data, struct iwl3945_priv, init_alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006534
6535 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6536 return;
6537
6538 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006539 iwl3945_init_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006540 mutex_unlock(&priv->mutex);
6541}
6542
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006543static void iwl3945_bg_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006544{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006545 struct iwl3945_priv *priv =
6546 container_of(data, struct iwl3945_priv, alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006547
6548 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6549 return;
6550
6551 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006552 iwl3945_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006553 mutex_unlock(&priv->mutex);
6554}
6555
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006556static void iwl3945_bg_rf_kill(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006557{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006558 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
Zhu Yib481de92007-09-25 17:54:57 -07006559
6560 wake_up_interruptible(&priv->wait_command_queue);
6561
6562 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6563 return;
6564
6565 mutex_lock(&priv->mutex);
6566
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006567 if (!iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006568 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6569 "HW and/or SW RF Kill no longer active, restarting "
6570 "device\n");
6571 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6572 queue_work(priv->workqueue, &priv->restart);
6573 } else {
6574
6575 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6576 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6577 "disabled by SW switch\n");
6578 else
6579 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6580 "Kill switch must be turned off for "
6581 "wireless networking to work.\n");
6582 }
6583 mutex_unlock(&priv->mutex);
6584}
6585
6586#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6587
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006588static void iwl3945_bg_scan_check(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006589{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006590 struct iwl3945_priv *priv =
6591 container_of(data, struct iwl3945_priv, scan_check.work);
Zhu Yib481de92007-09-25 17:54:57 -07006592
6593 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6594 return;
6595
6596 mutex_lock(&priv->mutex);
6597 if (test_bit(STATUS_SCANNING, &priv->status) ||
6598 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6599 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6600 "Scan completion watchdog resetting adapter (%dms)\n",
6601 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006602
Zhu Yib481de92007-09-25 17:54:57 -07006603 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006604 iwl3945_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006605 }
6606 mutex_unlock(&priv->mutex);
6607}
6608
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006609static void iwl3945_bg_request_scan(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006610{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006611 struct iwl3945_priv *priv =
6612 container_of(data, struct iwl3945_priv, request_scan);
6613 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07006614 .id = REPLY_SCAN_CMD,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006615 .len = sizeof(struct iwl3945_scan_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07006616 .meta.flags = CMD_SIZE_HUGE,
6617 };
6618 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006619 struct iwl3945_scan_cmd *scan;
Zhu Yib481de92007-09-25 17:54:57 -07006620 struct ieee80211_conf *conf = NULL;
6621 u8 direct_mask;
6622 int phymode;
6623
6624 conf = ieee80211_get_hw_conf(priv->hw);
6625
6626 mutex_lock(&priv->mutex);
6627
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006628 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006629 IWL_WARNING("request scan called when driver not ready.\n");
6630 goto done;
6631 }
6632
6633 /* Make sure the scan wasn't cancelled before this queued work
6634 * was given the chance to run... */
6635 if (!test_bit(STATUS_SCANNING, &priv->status))
6636 goto done;
6637
6638 /* This should never be called or scheduled if there is currently
6639 * a scan active in the hardware. */
6640 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6641 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6642 "Ignoring second request.\n");
6643 rc = -EIO;
6644 goto done;
6645 }
6646
6647 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6648 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6649 goto done;
6650 }
6651
6652 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6653 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6654 goto done;
6655 }
6656
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006657 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006658 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6659 goto done;
6660 }
6661
6662 if (!test_bit(STATUS_READY, &priv->status)) {
6663 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6664 goto done;
6665 }
6666
6667 if (!priv->scan_bands) {
6668 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6669 goto done;
6670 }
6671
6672 if (!priv->scan) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006673 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
Zhu Yib481de92007-09-25 17:54:57 -07006674 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6675 if (!priv->scan) {
6676 rc = -ENOMEM;
6677 goto done;
6678 }
6679 }
6680 scan = priv->scan;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006681 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
Zhu Yib481de92007-09-25 17:54:57 -07006682
6683 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6684 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6685
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006686 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006687 u16 interval = 0;
6688 u32 extra;
6689 u32 suspend_time = 100;
6690 u32 scan_suspend_time = 100;
6691 unsigned long flags;
6692
6693 IWL_DEBUG_INFO("Scanning while associated...\n");
6694
6695 spin_lock_irqsave(&priv->lock, flags);
6696 interval = priv->beacon_int;
6697 spin_unlock_irqrestore(&priv->lock, flags);
6698
6699 scan->suspend_time = 0;
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006700 scan->max_out_time = cpu_to_le32(200 * 1024);
Zhu Yib481de92007-09-25 17:54:57 -07006701 if (!interval)
6702 interval = suspend_time;
6703 /*
6704 * suspend time format:
6705 * 0-19: beacon interval in usec (time before exec.)
6706 * 20-23: 0
6707 * 24-31: number of beacons (suspend between channels)
6708 */
6709
6710 extra = (suspend_time / interval) << 24;
6711 scan_suspend_time = 0xFF0FFFFF &
6712 (extra | ((suspend_time % interval) * 1024));
6713
6714 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6715 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6716 scan_suspend_time, interval);
6717 }
6718
6719 /* We should add the ability for user to lock to PASSIVE ONLY */
6720 if (priv->one_direct_scan) {
6721 IWL_DEBUG_SCAN
6722 ("Kicking off one direct scan for '%s'\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006723 iwl3945_escape_essid(priv->direct_ssid,
Zhu Yib481de92007-09-25 17:54:57 -07006724 priv->direct_ssid_len));
6725 scan->direct_scan[0].id = WLAN_EID_SSID;
6726 scan->direct_scan[0].len = priv->direct_ssid_len;
6727 memcpy(scan->direct_scan[0].ssid,
6728 priv->direct_ssid, priv->direct_ssid_len);
6729 direct_mask = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006730 } else if (!iwl3945_is_associated(priv) && priv->essid_len) {
Zhu Yib481de92007-09-25 17:54:57 -07006731 scan->direct_scan[0].id = WLAN_EID_SSID;
6732 scan->direct_scan[0].len = priv->essid_len;
6733 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6734 direct_mask = 1;
6735 } else
6736 direct_mask = 0;
6737
6738 /* We don't build a direct scan probe request; the uCode will do
6739 * that based on the direct_mask added to each channel entry */
6740 scan->tx_cmd.len = cpu_to_le16(
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006741 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
Zhu Yib481de92007-09-25 17:54:57 -07006742 IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
6743 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6744 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6745 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6746
6747 /* flags + rate selection */
6748
6749 switch (priv->scan_bands) {
6750 case 2:
6751 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6752 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6753 scan->good_CRC_th = 0;
6754 phymode = MODE_IEEE80211G;
6755 break;
6756
6757 case 1:
6758 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6759 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6760 phymode = MODE_IEEE80211A;
6761 break;
6762
6763 default:
6764 IWL_WARNING("Invalid scan band count\n");
6765 goto done;
6766 }
6767
6768 /* select Rx antennas */
6769 scan->flags |= iwl3945_get_antenna_flags(priv);
6770
6771 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6772 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6773
6774 if (direct_mask)
6775 IWL_DEBUG_SCAN
6776 ("Initiating direct scan for %s.\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006777 iwl3945_escape_essid(priv->essid, priv->essid_len));
Zhu Yib481de92007-09-25 17:54:57 -07006778 else
6779 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
6780
6781 scan->channel_count =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006782 iwl3945_get_channels_for_scan(
Zhu Yib481de92007-09-25 17:54:57 -07006783 priv, phymode, 1, /* active */
6784 direct_mask,
6785 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6786
6787 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006788 scan->channel_count * sizeof(struct iwl3945_scan_channel);
Zhu Yib481de92007-09-25 17:54:57 -07006789 cmd.data = scan;
6790 scan->len = cpu_to_le16(cmd.len);
6791
6792 set_bit(STATUS_SCAN_HW, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006793 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07006794 if (rc)
6795 goto done;
6796
6797 queue_delayed_work(priv->workqueue, &priv->scan_check,
6798 IWL_SCAN_CHECK_WATCHDOG);
6799
6800 mutex_unlock(&priv->mutex);
6801 return;
6802
6803 done:
Ian Schram01ebd062007-10-25 17:15:22 +08006804 /* inform mac80211 scan aborted */
Zhu Yib481de92007-09-25 17:54:57 -07006805 queue_work(priv->workqueue, &priv->scan_completed);
6806 mutex_unlock(&priv->mutex);
6807}
6808
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006809static void iwl3945_bg_up(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006810{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006811 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
Zhu Yib481de92007-09-25 17:54:57 -07006812
6813 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6814 return;
6815
6816 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006817 __iwl3945_up(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006818 mutex_unlock(&priv->mutex);
6819}
6820
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006821static void iwl3945_bg_restart(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006822{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006823 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
Zhu Yib481de92007-09-25 17:54:57 -07006824
6825 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6826 return;
6827
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006828 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006829 queue_work(priv->workqueue, &priv->up);
6830}
6831
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006832static void iwl3945_bg_rx_replenish(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006833{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006834 struct iwl3945_priv *priv =
6835 container_of(data, struct iwl3945_priv, rx_replenish);
Zhu Yib481de92007-09-25 17:54:57 -07006836
6837 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6838 return;
6839
6840 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006841 iwl3945_rx_replenish(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006842 mutex_unlock(&priv->mutex);
6843}
6844
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08006845#define IWL_DELAY_NEXT_SCAN (HZ*2)
6846
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006847static void iwl3945_bg_post_associate(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006848{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006849 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv,
Zhu Yib481de92007-09-25 17:54:57 -07006850 post_associate.work);
6851
6852 int rc = 0;
6853 struct ieee80211_conf *conf = NULL;
Joe Perches0795af52007-10-03 17:59:30 -07006854 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006855
6856 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6857 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6858 return;
6859 }
6860
6861
Joe Perches0795af52007-10-03 17:59:30 -07006862 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6863 priv->assoc_id,
6864 print_mac(mac, priv->active_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07006865
6866 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6867 return;
6868
6869 mutex_lock(&priv->mutex);
6870
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006871 if (!priv->interface_id || !priv->is_open) {
6872 mutex_unlock(&priv->mutex);
6873 return;
6874 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006875 iwl3945_scan_cancel_timeout(priv, 200);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006876
Zhu Yib481de92007-09-25 17:54:57 -07006877 conf = ieee80211_get_hw_conf(priv->hw);
6878
6879 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006880 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006881
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006882 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6883 iwl3945_setup_rxon_timing(priv);
6884 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07006885 sizeof(priv->rxon_timing), &priv->rxon_timing);
6886 if (rc)
6887 IWL_WARNING("REPLY_RXON_TIMING failed - "
6888 "Attempting to continue.\n");
6889
6890 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6891
6892 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6893
6894 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6895 priv->assoc_id, priv->beacon_int);
6896
6897 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6898 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6899 else
6900 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6901
6902 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6903 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6904 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6905 else
6906 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6907
6908 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6909 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6910
6911 }
6912
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006913 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006914
6915 switch (priv->iw_mode) {
6916 case IEEE80211_IF_TYPE_STA:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006917 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07006918 break;
6919
6920 case IEEE80211_IF_TYPE_IBSS:
6921
6922 /* clear out the station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006923 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006924
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006925 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6926 iwl3945_add_station(priv, priv->bssid, 0, 0);
Zhu Yib481de92007-09-25 17:54:57 -07006927 iwl3945_sync_sta(priv, IWL_STA_ID,
6928 (priv->phymode == MODE_IEEE80211A)?
6929 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6930 CMD_ASYNC);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006931 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6932 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006933
6934 break;
6935
6936 default:
6937 IWL_ERROR("%s Should not be called in %d mode\n",
Ian Schrambc434dd2007-10-25 17:15:29 +08006938 __FUNCTION__, priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07006939 break;
6940 }
6941
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006942 iwl3945_sequence_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006943
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08006944#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006945 iwl3945_activate_qos(priv, 0);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08006946#endif /* CONFIG_IWL3945_QOS */
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08006947 /* we have just associated, don't start scan too early */
6948 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
Zhu Yib481de92007-09-25 17:54:57 -07006949 mutex_unlock(&priv->mutex);
6950}
6951
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006952static void iwl3945_bg_abort_scan(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006953{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006954 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
Zhu Yib481de92007-09-25 17:54:57 -07006955
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006956 if (!iwl3945_is_ready(priv))
Zhu Yib481de92007-09-25 17:54:57 -07006957 return;
6958
6959 mutex_lock(&priv->mutex);
6960
6961 set_bit(STATUS_SCAN_ABORTING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006962 iwl3945_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006963
6964 mutex_unlock(&priv->mutex);
6965}
6966
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006967static void iwl3945_bg_scan_completed(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006968{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006969 struct iwl3945_priv *priv =
6970 container_of(work, struct iwl3945_priv, scan_completed);
Zhu Yib481de92007-09-25 17:54:57 -07006971
6972 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6973
6974 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6975 return;
6976
6977 ieee80211_scan_completed(priv->hw);
6978
6979 /* Since setting the TXPOWER may have been deferred while
6980 * performing the scan, fire one off */
6981 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006982 iwl3945_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006983 mutex_unlock(&priv->mutex);
6984}
6985
6986/*****************************************************************************
6987 *
6988 * mac80211 entry point functions
6989 *
6990 *****************************************************************************/
6991
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006992static int iwl3945_mac_start(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07006993{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006994 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006995
6996 IWL_DEBUG_MAC80211("enter\n");
6997
6998 /* we should be verifying the device is ready to be opened */
6999 mutex_lock(&priv->mutex);
7000
7001 priv->is_open = 1;
7002
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007003 if (!iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007004 ieee80211_start_queues(priv->hw);
7005
7006 mutex_unlock(&priv->mutex);
7007 IWL_DEBUG_MAC80211("leave\n");
7008 return 0;
7009}
7010
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007011static void iwl3945_mac_stop(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007012{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007013 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007014
7015 IWL_DEBUG_MAC80211("enter\n");
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007016
7017
7018 mutex_lock(&priv->mutex);
7019 /* stop mac, cancel any scan request and clear
7020 * RXON_FILTER_ASSOC_MSK BIT
7021 */
Zhu Yib481de92007-09-25 17:54:57 -07007022 priv->is_open = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007023 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007024 cancel_delayed_work(&priv->post_associate);
7025 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007026 iwl3945_commit_rxon(priv);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007027 mutex_unlock(&priv->mutex);
7028
Zhu Yib481de92007-09-25 17:54:57 -07007029 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07007030}
7031
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007032static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07007033 struct ieee80211_tx_control *ctl)
7034{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007035 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007036
7037 IWL_DEBUG_MAC80211("enter\n");
7038
7039 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
7040 IWL_DEBUG_MAC80211("leave - monitor\n");
7041 return -1;
7042 }
7043
7044 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
7045 ctl->tx_rate);
7046
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007047 if (iwl3945_tx_skb(priv, skb, ctl))
Zhu Yib481de92007-09-25 17:54:57 -07007048 dev_kfree_skb_any(skb);
7049
7050 IWL_DEBUG_MAC80211("leave\n");
7051 return 0;
7052}
7053
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007054static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007055 struct ieee80211_if_init_conf *conf)
7056{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007057 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007058 unsigned long flags;
Joe Perches0795af52007-10-03 17:59:30 -07007059 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07007060
7061 IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07007062
7063 if (priv->interface_id) {
7064 IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
Tomas Winkler864792e2007-11-27 21:00:52 +02007065 return -EOPNOTSUPP;
Zhu Yib481de92007-09-25 17:54:57 -07007066 }
7067
7068 spin_lock_irqsave(&priv->lock, flags);
7069 priv->interface_id = conf->if_id;
7070
7071 spin_unlock_irqrestore(&priv->lock, flags);
7072
7073 mutex_lock(&priv->mutex);
Tomas Winkler864792e2007-11-27 21:00:52 +02007074
7075 if (conf->mac_addr) {
7076 IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
7077 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
7078 }
7079
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007080 iwl3945_set_mode(priv, conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07007081
7082 IWL_DEBUG_MAC80211("leave\n");
7083 mutex_unlock(&priv->mutex);
7084
7085 return 0;
7086}
7087
7088/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007089 * iwl3945_mac_config - mac80211 config callback
Zhu Yib481de92007-09-25 17:54:57 -07007090 *
7091 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
7092 * be set inappropriately and the driver currently sets the hardware up to
7093 * use it whenever needed.
7094 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007095static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
Zhu Yib481de92007-09-25 17:54:57 -07007096{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007097 struct iwl3945_priv *priv = hw->priv;
7098 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07007099 unsigned long flags;
7100
7101 mutex_lock(&priv->mutex);
7102 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
7103
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007104 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007105 IWL_DEBUG_MAC80211("leave - not ready\n");
7106 mutex_unlock(&priv->mutex);
7107 return -EIO;
7108 }
7109
7110 /* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
Ian Schram01ebd062007-10-25 17:15:22 +08007111 * what is exposed through include/ declarations */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007112 if (unlikely(!iwl3945_param_disable_hw_scan &&
Zhu Yib481de92007-09-25 17:54:57 -07007113 test_bit(STATUS_SCANNING, &priv->status))) {
7114 IWL_DEBUG_MAC80211("leave - scanning\n");
7115 mutex_unlock(&priv->mutex);
7116 return 0;
7117 }
7118
7119 spin_lock_irqsave(&priv->lock, flags);
7120
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007121 ch_info = iwl3945_get_channel_info(priv, conf->phymode, conf->channel);
Zhu Yib481de92007-09-25 17:54:57 -07007122 if (!is_channel_valid(ch_info)) {
7123 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
7124 conf->channel, conf->phymode);
7125 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7126 spin_unlock_irqrestore(&priv->lock, flags);
7127 mutex_unlock(&priv->mutex);
7128 return -EINVAL;
7129 }
7130
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007131 iwl3945_set_rxon_channel(priv, conf->phymode, conf->channel);
Zhu Yib481de92007-09-25 17:54:57 -07007132
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007133 iwl3945_set_flags_for_phymode(priv, conf->phymode);
Zhu Yib481de92007-09-25 17:54:57 -07007134
7135 /* The list of supported rates and rate mask can be different
7136 * for each phymode; since the phymode may have changed, reset
7137 * the rate mask to what mac80211 lists */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007138 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007139
7140 spin_unlock_irqrestore(&priv->lock, flags);
7141
7142#ifdef IEEE80211_CONF_CHANNEL_SWITCH
7143 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007144 iwl3945_hw_channel_switch(priv, conf->channel);
Zhu Yib481de92007-09-25 17:54:57 -07007145 mutex_unlock(&priv->mutex);
7146 return 0;
7147 }
7148#endif
7149
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007150 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
Zhu Yib481de92007-09-25 17:54:57 -07007151
7152 if (!conf->radio_enabled) {
7153 IWL_DEBUG_MAC80211("leave - radio disabled\n");
7154 mutex_unlock(&priv->mutex);
7155 return 0;
7156 }
7157
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007158 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007159 IWL_DEBUG_MAC80211("leave - RF kill\n");
7160 mutex_unlock(&priv->mutex);
7161 return -EIO;
7162 }
7163
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007164 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007165
7166 if (memcmp(&priv->active_rxon,
7167 &priv->staging_rxon, sizeof(priv->staging_rxon)))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007168 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007169 else
7170 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7171
7172 IWL_DEBUG_MAC80211("leave\n");
7173
7174 mutex_unlock(&priv->mutex);
7175
7176 return 0;
7177}
7178
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007179static void iwl3945_config_ap(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07007180{
7181 int rc = 0;
7182
7183 if (priv->status & STATUS_EXIT_PENDING)
7184 return;
7185
7186 /* The following should be done only at AP bring up */
7187 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7188
7189 /* RXON - unassoc (to set timing command) */
7190 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007191 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007192
7193 /* RXON Timing */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007194 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
7195 iwl3945_setup_rxon_timing(priv);
7196 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07007197 sizeof(priv->rxon_timing), &priv->rxon_timing);
7198 if (rc)
7199 IWL_WARNING("REPLY_RXON_TIMING failed - "
7200 "Attempting to continue.\n");
7201
7202 /* FIXME: what should be the assoc_id for AP? */
7203 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7204 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7205 priv->staging_rxon.flags |=
7206 RXON_FLG_SHORT_PREAMBLE_MSK;
7207 else
7208 priv->staging_rxon.flags &=
7209 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7210
7211 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7212 if (priv->assoc_capability &
7213 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7214 priv->staging_rxon.flags |=
7215 RXON_FLG_SHORT_SLOT_MSK;
7216 else
7217 priv->staging_rxon.flags &=
7218 ~RXON_FLG_SHORT_SLOT_MSK;
7219
7220 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7221 priv->staging_rxon.flags &=
7222 ~RXON_FLG_SHORT_SLOT_MSK;
7223 }
7224 /* restore RXON assoc */
7225 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007226 iwl3945_commit_rxon(priv);
7227 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
Zhu Yi556f8db2007-09-27 11:27:33 +08007228 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007229 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007230
7231 /* FIXME - we need to add code here to detect a totally new
7232 * configuration, reset the AP, unassoc, rxon timing, assoc,
7233 * clear sta table, add BCAST sta... */
7234}
7235
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007236static int iwl3945_mac_config_interface(struct ieee80211_hw *hw, int if_id,
Zhu Yib481de92007-09-25 17:54:57 -07007237 struct ieee80211_if_conf *conf)
7238{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007239 struct iwl3945_priv *priv = hw->priv;
Joe Perches0795af52007-10-03 17:59:30 -07007240 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07007241 unsigned long flags;
7242 int rc;
7243
7244 if (conf == NULL)
7245 return -EIO;
7246
Johannes Berg4150c572007-09-17 01:29:23 -04007247 /* XXX: this MUST use conf->mac_addr */
7248
Zhu Yib481de92007-09-25 17:54:57 -07007249 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7250 (!conf->beacon || !conf->ssid_len)) {
7251 IWL_DEBUG_MAC80211
7252 ("Leaving in AP mode because HostAPD is not ready.\n");
7253 return 0;
7254 }
7255
7256 mutex_lock(&priv->mutex);
7257
7258 IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
7259 if (conf->bssid)
Joe Perches0795af52007-10-03 17:59:30 -07007260 IWL_DEBUG_MAC80211("bssid: %s\n",
7261 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07007262
Johannes Berg4150c572007-09-17 01:29:23 -04007263/*
7264 * very dubious code was here; the probe filtering flag is never set:
7265 *
Zhu Yib481de92007-09-25 17:54:57 -07007266 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7267 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
Johannes Berg4150c572007-09-17 01:29:23 -04007268 */
7269 if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
Zhu Yib481de92007-09-25 17:54:57 -07007270 IWL_DEBUG_MAC80211("leave - scanning\n");
7271 mutex_unlock(&priv->mutex);
7272 return 0;
7273 }
7274
7275 if (priv->interface_id != if_id) {
7276 IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
7277 mutex_unlock(&priv->mutex);
7278 return 0;
7279 }
7280
7281 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7282 if (!conf->bssid) {
7283 conf->bssid = priv->mac_addr;
7284 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
Joe Perches0795af52007-10-03 17:59:30 -07007285 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7286 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07007287 }
7288 if (priv->ibss_beacon)
7289 dev_kfree_skb(priv->ibss_beacon);
7290
7291 priv->ibss_beacon = conf->beacon;
7292 }
7293
7294 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7295 !is_multicast_ether_addr(conf->bssid)) {
7296 /* If there is currently a HW scan going on in the background
7297 * then we need to cancel it else the RXON below will fail. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007298 if (iwl3945_scan_cancel_timeout(priv, 100)) {
Zhu Yib481de92007-09-25 17:54:57 -07007299 IWL_WARNING("Aborted scan still in progress "
7300 "after 100ms\n");
7301 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7302 mutex_unlock(&priv->mutex);
7303 return -EAGAIN;
7304 }
7305 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7306
7307 /* TODO: Audit driver for usage of these members and see
7308 * if mac80211 deprecates them (priv->bssid looks like it
7309 * shouldn't be there, but I haven't scanned the IBSS code
7310 * to verify) - jpk */
7311 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7312
7313 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007314 iwl3945_config_ap(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007315 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007316 rc = iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007317 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007318 iwl3945_add_station(priv,
Zhu Yi556f8db2007-09-27 11:27:33 +08007319 priv->active_rxon.bssid_addr, 1, 0);
Zhu Yib481de92007-09-25 17:54:57 -07007320 }
7321
7322 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007323 iwl3945_scan_cancel_timeout(priv, 100);
Zhu Yib481de92007-09-25 17:54:57 -07007324 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007325 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007326 }
7327
7328 spin_lock_irqsave(&priv->lock, flags);
7329 if (!conf->ssid_len)
7330 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7331 else
7332 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7333
7334 priv->essid_len = conf->ssid_len;
7335 spin_unlock_irqrestore(&priv->lock, flags);
7336
7337 IWL_DEBUG_MAC80211("leave\n");
7338 mutex_unlock(&priv->mutex);
7339
7340 return 0;
7341}
7342
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007343static void iwl3945_configure_filter(struct ieee80211_hw *hw,
Johannes Berg4150c572007-09-17 01:29:23 -04007344 unsigned int changed_flags,
7345 unsigned int *total_flags,
7346 int mc_count, struct dev_addr_list *mc_list)
7347{
7348 /*
7349 * XXX: dummy
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007350 * see also iwl3945_connection_init_rx_config
Johannes Berg4150c572007-09-17 01:29:23 -04007351 */
7352 *total_flags = 0;
7353}
7354
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007355static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007356 struct ieee80211_if_init_conf *conf)
7357{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007358 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007359
7360 IWL_DEBUG_MAC80211("enter\n");
7361
7362 mutex_lock(&priv->mutex);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007363
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007364 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007365 cancel_delayed_work(&priv->post_associate);
7366 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007367 iwl3945_commit_rxon(priv);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007368
Zhu Yib481de92007-09-25 17:54:57 -07007369 if (priv->interface_id == conf->if_id) {
7370 priv->interface_id = 0;
7371 memset(priv->bssid, 0, ETH_ALEN);
7372 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7373 priv->essid_len = 0;
7374 }
7375 mutex_unlock(&priv->mutex);
7376
7377 IWL_DEBUG_MAC80211("leave\n");
7378
7379}
7380
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007381static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
Zhu Yib481de92007-09-25 17:54:57 -07007382{
7383 int rc = 0;
7384 unsigned long flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007385 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007386
7387 IWL_DEBUG_MAC80211("enter\n");
7388
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007389 mutex_lock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007390 spin_lock_irqsave(&priv->lock, flags);
7391
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007392 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007393 rc = -EIO;
7394 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7395 goto out_unlock;
7396 }
7397
7398 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7399 rc = -EIO;
7400 IWL_ERROR("ERROR: APs don't scan\n");
7401 goto out_unlock;
7402 }
7403
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007404 /* we don't schedule scan within next_scan_jiffies period */
7405 if (priv->next_scan_jiffies &&
7406 time_after(priv->next_scan_jiffies, jiffies)) {
7407 rc = -EAGAIN;
7408 goto out_unlock;
7409 }
Zhu Yib481de92007-09-25 17:54:57 -07007410 /* if we just finished scan ask for delay */
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007411 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7412 IWL_DELAY_NEXT_SCAN, jiffies)) {
Zhu Yib481de92007-09-25 17:54:57 -07007413 rc = -EAGAIN;
7414 goto out_unlock;
7415 }
7416 if (len) {
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007417 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007418 iwl3945_escape_essid(ssid, len), (int)len);
Zhu Yib481de92007-09-25 17:54:57 -07007419
7420 priv->one_direct_scan = 1;
7421 priv->direct_ssid_len = (u8)
7422 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7423 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007424 } else
7425 priv->one_direct_scan = 0;
Zhu Yib481de92007-09-25 17:54:57 -07007426
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007427 rc = iwl3945_scan_initiate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007428
7429 IWL_DEBUG_MAC80211("leave\n");
7430
7431out_unlock:
7432 spin_unlock_irqrestore(&priv->lock, flags);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007433 mutex_unlock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007434
7435 return rc;
7436}
7437
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007438static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
Zhu Yib481de92007-09-25 17:54:57 -07007439 const u8 *local_addr, const u8 *addr,
7440 struct ieee80211_key_conf *key)
7441{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007442 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007443 int rc = 0;
7444 u8 sta_id;
7445
7446 IWL_DEBUG_MAC80211("enter\n");
7447
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007448 if (!iwl3945_param_hwcrypto) {
Zhu Yib481de92007-09-25 17:54:57 -07007449 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7450 return -EOPNOTSUPP;
7451 }
7452
7453 if (is_zero_ether_addr(addr))
7454 /* only support pairwise keys */
7455 return -EOPNOTSUPP;
7456
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007457 sta_id = iwl3945_hw_find_station(priv, addr);
Zhu Yib481de92007-09-25 17:54:57 -07007458 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07007459 DECLARE_MAC_BUF(mac);
7460
7461 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7462 print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -07007463 return -EINVAL;
7464 }
7465
7466 mutex_lock(&priv->mutex);
7467
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007468 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007469
Zhu Yib481de92007-09-25 17:54:57 -07007470 switch (cmd) {
7471 case SET_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007472 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007473 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007474 iwl3945_set_rxon_hwcrypto(priv, 1);
7475 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007476 key->hw_key_idx = sta_id;
7477 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7478 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7479 }
7480 break;
7481 case DISABLE_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007482 rc = iwl3945_clear_sta_key_info(priv, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007483 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007484 iwl3945_set_rxon_hwcrypto(priv, 0);
7485 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007486 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7487 }
7488 break;
7489 default:
7490 rc = -EINVAL;
7491 }
7492
7493 IWL_DEBUG_MAC80211("leave\n");
7494 mutex_unlock(&priv->mutex);
7495
7496 return rc;
7497}
7498
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007499static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, int queue,
Zhu Yib481de92007-09-25 17:54:57 -07007500 const struct ieee80211_tx_queue_params *params)
7501{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007502 struct iwl3945_priv *priv = hw->priv;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007503#ifdef CONFIG_IWL3945_QOS
Zhu Yib481de92007-09-25 17:54:57 -07007504 unsigned long flags;
7505 int q;
Reinette Chatre0054b342007-11-29 11:09:42 +08007506#endif /* CONFIG_IWL3945_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07007507
7508 IWL_DEBUG_MAC80211("enter\n");
7509
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007510 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007511 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7512 return -EIO;
7513 }
7514
7515 if (queue >= AC_NUM) {
7516 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7517 return 0;
7518 }
7519
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007520#ifdef CONFIG_IWL3945_QOS
Zhu Yib481de92007-09-25 17:54:57 -07007521 if (!priv->qos_data.qos_enable) {
7522 priv->qos_data.qos_active = 0;
7523 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7524 return 0;
7525 }
7526 q = AC_NUM - 1 - queue;
7527
7528 spin_lock_irqsave(&priv->lock, flags);
7529
7530 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7531 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7532 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7533 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7534 cpu_to_le16((params->burst_time * 100));
7535
7536 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7537 priv->qos_data.qos_active = 1;
7538
7539 spin_unlock_irqrestore(&priv->lock, flags);
7540
7541 mutex_lock(&priv->mutex);
7542 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007543 iwl3945_activate_qos(priv, 1);
7544 else if (priv->assoc_id && iwl3945_is_associated(priv))
7545 iwl3945_activate_qos(priv, 0);
Zhu Yib481de92007-09-25 17:54:57 -07007546
7547 mutex_unlock(&priv->mutex);
7548
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007549#endif /*CONFIG_IWL3945_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07007550
7551 IWL_DEBUG_MAC80211("leave\n");
7552 return 0;
7553}
7554
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007555static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007556 struct ieee80211_tx_queue_stats *stats)
7557{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007558 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007559 int i, avail;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007560 struct iwl3945_tx_queue *txq;
7561 struct iwl3945_queue *q;
Zhu Yib481de92007-09-25 17:54:57 -07007562 unsigned long flags;
7563
7564 IWL_DEBUG_MAC80211("enter\n");
7565
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007566 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007567 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7568 return -EIO;
7569 }
7570
7571 spin_lock_irqsave(&priv->lock, flags);
7572
7573 for (i = 0; i < AC_NUM; i++) {
7574 txq = &priv->txq[i];
7575 q = &txq->q;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007576 avail = iwl3945_queue_space(q);
Zhu Yib481de92007-09-25 17:54:57 -07007577
7578 stats->data[i].len = q->n_window - avail;
7579 stats->data[i].limit = q->n_window - q->high_mark;
7580 stats->data[i].count = q->n_window;
7581
7582 }
7583 spin_unlock_irqrestore(&priv->lock, flags);
7584
7585 IWL_DEBUG_MAC80211("leave\n");
7586
7587 return 0;
7588}
7589
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007590static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007591 struct ieee80211_low_level_stats *stats)
7592{
7593 IWL_DEBUG_MAC80211("enter\n");
7594 IWL_DEBUG_MAC80211("leave\n");
7595
7596 return 0;
7597}
7598
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007599static u64 iwl3945_mac_get_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007600{
7601 IWL_DEBUG_MAC80211("enter\n");
7602 IWL_DEBUG_MAC80211("leave\n");
7603
7604 return 0;
7605}
7606
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007607static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007608{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007609 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007610 unsigned long flags;
7611
7612 mutex_lock(&priv->mutex);
7613 IWL_DEBUG_MAC80211("enter\n");
7614
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007615#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007616 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007617#endif
7618 cancel_delayed_work(&priv->post_associate);
7619
7620 spin_lock_irqsave(&priv->lock, flags);
7621 priv->assoc_id = 0;
7622 priv->assoc_capability = 0;
7623 priv->call_post_assoc_from_beacon = 0;
7624
7625 /* new association get rid of ibss beacon skb */
7626 if (priv->ibss_beacon)
7627 dev_kfree_skb(priv->ibss_beacon);
7628
7629 priv->ibss_beacon = NULL;
7630
7631 priv->beacon_int = priv->hw->conf.beacon_int;
7632 priv->timestamp1 = 0;
7633 priv->timestamp0 = 0;
7634 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7635 priv->beacon_int = 0;
7636
7637 spin_unlock_irqrestore(&priv->lock, flags);
7638
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007639 /* we are restarting association process
7640 * clear RXON_FILTER_ASSOC_MSK bit
7641 */
7642 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007643 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007644 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007645 iwl3945_commit_rxon(priv);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007646 }
7647
Zhu Yib481de92007-09-25 17:54:57 -07007648 /* Per mac80211.h: This is only used in IBSS mode... */
7649 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007650
Zhu Yib481de92007-09-25 17:54:57 -07007651 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7652 mutex_unlock(&priv->mutex);
7653 return;
7654 }
7655
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007656 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007657 IWL_DEBUG_MAC80211("leave - not ready\n");
7658 mutex_unlock(&priv->mutex);
7659 return;
7660 }
7661
7662 priv->only_active_channel = 0;
7663
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007664 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007665
7666 mutex_unlock(&priv->mutex);
7667
7668 IWL_DEBUG_MAC80211("leave\n");
7669
7670}
7671
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007672static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07007673 struct ieee80211_tx_control *control)
7674{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007675 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007676 unsigned long flags;
7677
7678 mutex_lock(&priv->mutex);
7679 IWL_DEBUG_MAC80211("enter\n");
7680
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007681 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007682 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7683 mutex_unlock(&priv->mutex);
7684 return -EIO;
7685 }
7686
7687 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7688 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7689 mutex_unlock(&priv->mutex);
7690 return -EIO;
7691 }
7692
7693 spin_lock_irqsave(&priv->lock, flags);
7694
7695 if (priv->ibss_beacon)
7696 dev_kfree_skb(priv->ibss_beacon);
7697
7698 priv->ibss_beacon = skb;
7699
7700 priv->assoc_id = 0;
7701
7702 IWL_DEBUG_MAC80211("leave\n");
7703 spin_unlock_irqrestore(&priv->lock, flags);
7704
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007705#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007706 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007707#endif
7708
7709 queue_work(priv->workqueue, &priv->post_associate.work);
7710
7711 mutex_unlock(&priv->mutex);
7712
7713 return 0;
7714}
7715
7716/*****************************************************************************
7717 *
7718 * sysfs attributes
7719 *
7720 *****************************************************************************/
7721
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007722#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07007723
7724/*
7725 * The following adds a new attribute to the sysfs representation
7726 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7727 * used for controlling the debug level.
7728 *
7729 * See the level definitions in iwl for details.
7730 */
7731
7732static ssize_t show_debug_level(struct device_driver *d, char *buf)
7733{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007734 return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07007735}
7736static ssize_t store_debug_level(struct device_driver *d,
7737 const char *buf, size_t count)
7738{
7739 char *p = (char *)buf;
7740 u32 val;
7741
7742 val = simple_strtoul(p, &p, 0);
7743 if (p == buf)
7744 printk(KERN_INFO DRV_NAME
7745 ": %s is not in hex or decimal form.\n", buf);
7746 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007747 iwl3945_debug_level = val;
Zhu Yib481de92007-09-25 17:54:57 -07007748
7749 return strnlen(buf, count);
7750}
7751
7752static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7753 show_debug_level, store_debug_level);
7754
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007755#endif /* CONFIG_IWL3945_DEBUG */
Zhu Yib481de92007-09-25 17:54:57 -07007756
7757static ssize_t show_rf_kill(struct device *d,
7758 struct device_attribute *attr, char *buf)
7759{
7760 /*
7761 * 0 - RF kill not enabled
7762 * 1 - SW based RF kill active (sysfs)
7763 * 2 - HW based RF kill active
7764 * 3 - Both HW and SW based RF kill active
7765 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007766 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007767 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7768 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7769
7770 return sprintf(buf, "%i\n", val);
7771}
7772
7773static ssize_t store_rf_kill(struct device *d,
7774 struct device_attribute *attr,
7775 const char *buf, size_t count)
7776{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007777 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007778
7779 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007780 iwl3945_radio_kill_sw(priv, buf[0] == '1');
Zhu Yib481de92007-09-25 17:54:57 -07007781 mutex_unlock(&priv->mutex);
7782
7783 return count;
7784}
7785
7786static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7787
7788static ssize_t show_temperature(struct device *d,
7789 struct device_attribute *attr, char *buf)
7790{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007791 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007792
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007793 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007794 return -EAGAIN;
7795
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007796 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
Zhu Yib481de92007-09-25 17:54:57 -07007797}
7798
7799static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7800
7801static ssize_t show_rs_window(struct device *d,
7802 struct device_attribute *attr,
7803 char *buf)
7804{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007805 struct iwl3945_priv *priv = d->driver_data;
7806 return iwl3945_fill_rs_info(priv->hw, buf, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07007807}
7808static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7809
7810static ssize_t show_tx_power(struct device *d,
7811 struct device_attribute *attr, char *buf)
7812{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007813 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007814 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7815}
7816
7817static ssize_t store_tx_power(struct device *d,
7818 struct device_attribute *attr,
7819 const char *buf, size_t count)
7820{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007821 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007822 char *p = (char *)buf;
7823 u32 val;
7824
7825 val = simple_strtoul(p, &p, 10);
7826 if (p == buf)
7827 printk(KERN_INFO DRV_NAME
7828 ": %s is not in decimal form.\n", buf);
7829 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007830 iwl3945_hw_reg_set_txpower(priv, val);
Zhu Yib481de92007-09-25 17:54:57 -07007831
7832 return count;
7833}
7834
7835static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7836
7837static ssize_t show_flags(struct device *d,
7838 struct device_attribute *attr, char *buf)
7839{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007840 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007841
7842 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7843}
7844
7845static ssize_t store_flags(struct device *d,
7846 struct device_attribute *attr,
7847 const char *buf, size_t count)
7848{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007849 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007850 u32 flags = simple_strtoul(buf, NULL, 0);
7851
7852 mutex_lock(&priv->mutex);
7853 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7854 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007855 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007856 IWL_WARNING("Could not cancel scan.\n");
7857 else {
7858 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7859 flags);
7860 priv->staging_rxon.flags = cpu_to_le32(flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007861 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007862 }
7863 }
7864 mutex_unlock(&priv->mutex);
7865
7866 return count;
7867}
7868
7869static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7870
7871static ssize_t show_filter_flags(struct device *d,
7872 struct device_attribute *attr, char *buf)
7873{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007874 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007875
7876 return sprintf(buf, "0x%04X\n",
7877 le32_to_cpu(priv->active_rxon.filter_flags));
7878}
7879
7880static ssize_t store_filter_flags(struct device *d,
7881 struct device_attribute *attr,
7882 const char *buf, size_t count)
7883{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007884 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007885 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7886
7887 mutex_lock(&priv->mutex);
7888 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7889 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007890 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007891 IWL_WARNING("Could not cancel scan.\n");
7892 else {
7893 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7894 "0x%04X\n", filter_flags);
7895 priv->staging_rxon.filter_flags =
7896 cpu_to_le32(filter_flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007897 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007898 }
7899 }
7900 mutex_unlock(&priv->mutex);
7901
7902 return count;
7903}
7904
7905static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7906 store_filter_flags);
7907
7908static ssize_t show_tune(struct device *d,
7909 struct device_attribute *attr, char *buf)
7910{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007911 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007912
7913 return sprintf(buf, "0x%04X\n",
7914 (priv->phymode << 8) |
7915 le16_to_cpu(priv->active_rxon.channel));
7916}
7917
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007918static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv, u8 phymode);
Zhu Yib481de92007-09-25 17:54:57 -07007919
7920static ssize_t store_tune(struct device *d,
7921 struct device_attribute *attr,
7922 const char *buf, size_t count)
7923{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007924 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007925 char *p = (char *)buf;
7926 u16 tune = simple_strtoul(p, &p, 0);
7927 u8 phymode = (tune >> 8) & 0xff;
7928 u16 channel = tune & 0xff;
7929
7930 IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
7931
7932 mutex_lock(&priv->mutex);
7933 if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
7934 (priv->phymode != phymode)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007935 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07007936
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007937 ch_info = iwl3945_get_channel_info(priv, phymode, channel);
Zhu Yib481de92007-09-25 17:54:57 -07007938 if (!ch_info) {
7939 IWL_WARNING("Requested invalid phymode/channel "
7940 "combination: %d %d\n", phymode, channel);
7941 mutex_unlock(&priv->mutex);
7942 return -EINVAL;
7943 }
7944
7945 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007946 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007947 IWL_WARNING("Could not cancel scan.\n");
7948 else {
7949 IWL_DEBUG_INFO("Committing phymode and "
7950 "rxon.channel = %d %d\n",
7951 phymode, channel);
7952
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007953 iwl3945_set_rxon_channel(priv, phymode, channel);
7954 iwl3945_set_flags_for_phymode(priv, phymode);
Zhu Yib481de92007-09-25 17:54:57 -07007955
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007956 iwl3945_set_rate(priv);
7957 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007958 }
7959 }
7960 mutex_unlock(&priv->mutex);
7961
7962 return count;
7963}
7964
7965static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
7966
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007967#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07007968
7969static ssize_t show_measurement(struct device *d,
7970 struct device_attribute *attr, char *buf)
7971{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007972 struct iwl3945_priv *priv = dev_get_drvdata(d);
7973 struct iwl3945_spectrum_notification measure_report;
Zhu Yib481de92007-09-25 17:54:57 -07007974 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7975 u8 *data = (u8 *) & measure_report;
7976 unsigned long flags;
7977
7978 spin_lock_irqsave(&priv->lock, flags);
7979 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7980 spin_unlock_irqrestore(&priv->lock, flags);
7981 return 0;
7982 }
7983 memcpy(&measure_report, &priv->measure_report, size);
7984 priv->measurement_status = 0;
7985 spin_unlock_irqrestore(&priv->lock, flags);
7986
7987 while (size && (PAGE_SIZE - len)) {
7988 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7989 PAGE_SIZE - len, 1);
7990 len = strlen(buf);
7991 if (PAGE_SIZE - len)
7992 buf[len++] = '\n';
7993
7994 ofs += 16;
7995 size -= min(size, 16U);
7996 }
7997
7998 return len;
7999}
8000
8001static ssize_t store_measurement(struct device *d,
8002 struct device_attribute *attr,
8003 const char *buf, size_t count)
8004{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008005 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008006 struct ieee80211_measurement_params params = {
8007 .channel = le16_to_cpu(priv->active_rxon.channel),
8008 .start_time = cpu_to_le64(priv->last_tsf),
8009 .duration = cpu_to_le16(1),
8010 };
8011 u8 type = IWL_MEASURE_BASIC;
8012 u8 buffer[32];
8013 u8 channel;
8014
8015 if (count) {
8016 char *p = buffer;
8017 strncpy(buffer, buf, min(sizeof(buffer), count));
8018 channel = simple_strtoul(p, NULL, 0);
8019 if (channel)
8020 params.channel = channel;
8021
8022 p = buffer;
8023 while (*p && *p != ' ')
8024 p++;
8025 if (*p)
8026 type = simple_strtoul(p + 1, NULL, 0);
8027 }
8028
8029 IWL_DEBUG_INFO("Invoking measurement of type %d on "
8030 "channel %d (for '%s')\n", type, params.channel, buf);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008031 iwl3945_get_measurement(priv, &params, type);
Zhu Yib481de92007-09-25 17:54:57 -07008032
8033 return count;
8034}
8035
8036static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
8037 show_measurement, store_measurement);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008038#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
Zhu Yib481de92007-09-25 17:54:57 -07008039
8040static ssize_t show_rate(struct device *d,
8041 struct device_attribute *attr, char *buf)
8042{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008043 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008044 unsigned long flags;
8045 int i;
8046
8047 spin_lock_irqsave(&priv->sta_lock, flags);
8048 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
8049 i = priv->stations[IWL_AP_ID].current_rate.s.rate;
8050 else
8051 i = priv->stations[IWL_STA_ID].current_rate.s.rate;
8052 spin_unlock_irqrestore(&priv->sta_lock, flags);
8053
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008054 i = iwl3945_rate_index_from_plcp(i);
Zhu Yib481de92007-09-25 17:54:57 -07008055 if (i == -1)
8056 return sprintf(buf, "0\n");
8057
8058 return sprintf(buf, "%d%s\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008059 (iwl3945_rates[i].ieee >> 1),
8060 (iwl3945_rates[i].ieee & 0x1) ? ".5" : "");
Zhu Yib481de92007-09-25 17:54:57 -07008061}
8062
8063static DEVICE_ATTR(rate, S_IRUSR, show_rate, NULL);
8064
8065static ssize_t store_retry_rate(struct device *d,
8066 struct device_attribute *attr,
8067 const char *buf, size_t count)
8068{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008069 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008070
8071 priv->retry_rate = simple_strtoul(buf, NULL, 0);
8072 if (priv->retry_rate <= 0)
8073 priv->retry_rate = 1;
8074
8075 return count;
8076}
8077
8078static ssize_t show_retry_rate(struct device *d,
8079 struct device_attribute *attr, char *buf)
8080{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008081 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008082 return sprintf(buf, "%d", priv->retry_rate);
8083}
8084
8085static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
8086 store_retry_rate);
8087
8088static ssize_t store_power_level(struct device *d,
8089 struct device_attribute *attr,
8090 const char *buf, size_t count)
8091{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008092 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008093 int rc;
8094 int mode;
8095
8096 mode = simple_strtoul(buf, NULL, 0);
8097 mutex_lock(&priv->mutex);
8098
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008099 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07008100 rc = -EAGAIN;
8101 goto out;
8102 }
8103
8104 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
8105 mode = IWL_POWER_AC;
8106 else
8107 mode |= IWL_POWER_ENABLED;
8108
8109 if (mode != priv->power_mode) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008110 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
Zhu Yib481de92007-09-25 17:54:57 -07008111 if (rc) {
8112 IWL_DEBUG_MAC80211("failed setting power mode.\n");
8113 goto out;
8114 }
8115 priv->power_mode = mode;
8116 }
8117
8118 rc = count;
8119
8120 out:
8121 mutex_unlock(&priv->mutex);
8122 return rc;
8123}
8124
8125#define MAX_WX_STRING 80
8126
8127/* Values are in microsecond */
8128static const s32 timeout_duration[] = {
8129 350000,
8130 250000,
8131 75000,
8132 37000,
8133 25000,
8134};
8135static const s32 period_duration[] = {
8136 400000,
8137 700000,
8138 1000000,
8139 1000000,
8140 1000000
8141};
8142
8143static ssize_t show_power_level(struct device *d,
8144 struct device_attribute *attr, char *buf)
8145{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008146 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008147 int level = IWL_POWER_LEVEL(priv->power_mode);
8148 char *p = buf;
8149
8150 p += sprintf(p, "%d ", level);
8151 switch (level) {
8152 case IWL_POWER_MODE_CAM:
8153 case IWL_POWER_AC:
8154 p += sprintf(p, "(AC)");
8155 break;
8156 case IWL_POWER_BATTERY:
8157 p += sprintf(p, "(BATTERY)");
8158 break;
8159 default:
8160 p += sprintf(p,
8161 "(Timeout %dms, Period %dms)",
8162 timeout_duration[level - 1] / 1000,
8163 period_duration[level - 1] / 1000);
8164 }
8165
8166 if (!(priv->power_mode & IWL_POWER_ENABLED))
8167 p += sprintf(p, " OFF\n");
8168 else
8169 p += sprintf(p, " \n");
8170
8171 return (p - buf + 1);
8172
8173}
8174
8175static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8176 store_power_level);
8177
8178static ssize_t show_channels(struct device *d,
8179 struct device_attribute *attr, char *buf)
8180{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008181 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008182 int len = 0, i;
8183 struct ieee80211_channel *channels = NULL;
8184 const struct ieee80211_hw_mode *hw_mode = NULL;
8185 int count = 0;
8186
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008187 if (!iwl3945_is_ready(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008188 return -EAGAIN;
8189
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008190 hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211G);
Zhu Yib481de92007-09-25 17:54:57 -07008191 if (!hw_mode)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008192 hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211B);
Zhu Yib481de92007-09-25 17:54:57 -07008193 if (hw_mode) {
8194 channels = hw_mode->channels;
8195 count = hw_mode->num_channels;
8196 }
8197
8198 len +=
8199 sprintf(&buf[len],
8200 "Displaying %d channels in 2.4GHz band "
8201 "(802.11bg):\n", count);
8202
8203 for (i = 0; i < count; i++)
8204 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8205 channels[i].chan,
8206 channels[i].power_level,
8207 channels[i].
8208 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8209 " (IEEE 802.11h required)" : "",
8210 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8211 || (channels[i].
8212 flag &
8213 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8214 ", IBSS",
8215 channels[i].
8216 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8217 "active/passive" : "passive only");
8218
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008219 hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211A);
Zhu Yib481de92007-09-25 17:54:57 -07008220 if (hw_mode) {
8221 channels = hw_mode->channels;
8222 count = hw_mode->num_channels;
8223 } else {
8224 channels = NULL;
8225 count = 0;
8226 }
8227
8228 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
8229 "(802.11a):\n", count);
8230
8231 for (i = 0; i < count; i++)
8232 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8233 channels[i].chan,
8234 channels[i].power_level,
8235 channels[i].
8236 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8237 " (IEEE 802.11h required)" : "",
8238 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8239 || (channels[i].
8240 flag &
8241 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8242 ", IBSS",
8243 channels[i].
8244 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8245 "active/passive" : "passive only");
8246
8247 return len;
8248}
8249
8250static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8251
8252static ssize_t show_statistics(struct device *d,
8253 struct device_attribute *attr, char *buf)
8254{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008255 struct iwl3945_priv *priv = dev_get_drvdata(d);
8256 u32 size = sizeof(struct iwl3945_notif_statistics);
Zhu Yib481de92007-09-25 17:54:57 -07008257 u32 len = 0, ofs = 0;
8258 u8 *data = (u8 *) & priv->statistics;
8259 int rc = 0;
8260
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008261 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008262 return -EAGAIN;
8263
8264 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008265 rc = iwl3945_send_statistics_request(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008266 mutex_unlock(&priv->mutex);
8267
8268 if (rc) {
8269 len = sprintf(buf,
8270 "Error sending statistics request: 0x%08X\n", rc);
8271 return len;
8272 }
8273
8274 while (size && (PAGE_SIZE - len)) {
8275 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8276 PAGE_SIZE - len, 1);
8277 len = strlen(buf);
8278 if (PAGE_SIZE - len)
8279 buf[len++] = '\n';
8280
8281 ofs += 16;
8282 size -= min(size, 16U);
8283 }
8284
8285 return len;
8286}
8287
8288static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8289
8290static ssize_t show_antenna(struct device *d,
8291 struct device_attribute *attr, char *buf)
8292{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008293 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008294
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008295 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008296 return -EAGAIN;
8297
8298 return sprintf(buf, "%d\n", priv->antenna);
8299}
8300
8301static ssize_t store_antenna(struct device *d,
8302 struct device_attribute *attr,
8303 const char *buf, size_t count)
8304{
8305 int ant;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008306 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008307
8308 if (count == 0)
8309 return 0;
8310
8311 if (sscanf(buf, "%1i", &ant) != 1) {
8312 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8313 return count;
8314 }
8315
8316 if ((ant >= 0) && (ant <= 2)) {
8317 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008318 priv->antenna = (enum iwl3945_antenna)ant;
Zhu Yib481de92007-09-25 17:54:57 -07008319 } else
8320 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8321
8322
8323 return count;
8324}
8325
8326static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8327
8328static ssize_t show_status(struct device *d,
8329 struct device_attribute *attr, char *buf)
8330{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008331 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
8332 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008333 return -EAGAIN;
8334 return sprintf(buf, "0x%08x\n", (int)priv->status);
8335}
8336
8337static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8338
8339static ssize_t dump_error_log(struct device *d,
8340 struct device_attribute *attr,
8341 const char *buf, size_t count)
8342{
8343 char *p = (char *)buf;
8344
8345 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008346 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07008347
8348 return strnlen(buf, count);
8349}
8350
8351static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8352
8353static ssize_t dump_event_log(struct device *d,
8354 struct device_attribute *attr,
8355 const char *buf, size_t count)
8356{
8357 char *p = (char *)buf;
8358
8359 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008360 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07008361
8362 return strnlen(buf, count);
8363}
8364
8365static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8366
8367/*****************************************************************************
8368 *
8369 * driver setup and teardown
8370 *
8371 *****************************************************************************/
8372
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008373static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07008374{
8375 priv->workqueue = create_workqueue(DRV_NAME);
8376
8377 init_waitqueue_head(&priv->wait_command_queue);
8378
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008379 INIT_WORK(&priv->up, iwl3945_bg_up);
8380 INIT_WORK(&priv->restart, iwl3945_bg_restart);
8381 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
8382 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
8383 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
8384 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
8385 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
8386 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
8387 INIT_DELAYED_WORK(&priv->post_associate, iwl3945_bg_post_associate);
8388 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
8389 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
8390 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
Zhu Yib481de92007-09-25 17:54:57 -07008391
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008392 iwl3945_hw_setup_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008393
8394 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008395 iwl3945_irq_tasklet, (unsigned long)priv);
Zhu Yib481de92007-09-25 17:54:57 -07008396}
8397
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008398static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07008399{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008400 iwl3945_hw_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008401
Joonwoo Parke47eb6a2007-11-29 10:42:49 +09008402 cancel_delayed_work_sync(&priv->init_alive_start);
Zhu Yib481de92007-09-25 17:54:57 -07008403 cancel_delayed_work(&priv->scan_check);
8404 cancel_delayed_work(&priv->alive_start);
8405 cancel_delayed_work(&priv->post_associate);
8406 cancel_work_sync(&priv->beacon_update);
8407}
8408
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008409static struct attribute *iwl3945_sysfs_entries[] = {
Zhu Yib481de92007-09-25 17:54:57 -07008410 &dev_attr_antenna.attr,
8411 &dev_attr_channels.attr,
8412 &dev_attr_dump_errors.attr,
8413 &dev_attr_dump_events.attr,
8414 &dev_attr_flags.attr,
8415 &dev_attr_filter_flags.attr,
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008416#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07008417 &dev_attr_measurement.attr,
8418#endif
8419 &dev_attr_power_level.attr,
8420 &dev_attr_rate.attr,
8421 &dev_attr_retry_rate.attr,
8422 &dev_attr_rf_kill.attr,
8423 &dev_attr_rs_window.attr,
8424 &dev_attr_statistics.attr,
8425 &dev_attr_status.attr,
8426 &dev_attr_temperature.attr,
8427 &dev_attr_tune.attr,
8428 &dev_attr_tx_power.attr,
8429
8430 NULL
8431};
8432
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008433static struct attribute_group iwl3945_attribute_group = {
Zhu Yib481de92007-09-25 17:54:57 -07008434 .name = NULL, /* put in device directory */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008435 .attrs = iwl3945_sysfs_entries,
Zhu Yib481de92007-09-25 17:54:57 -07008436};
8437
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008438static struct ieee80211_ops iwl3945_hw_ops = {
8439 .tx = iwl3945_mac_tx,
8440 .start = iwl3945_mac_start,
8441 .stop = iwl3945_mac_stop,
8442 .add_interface = iwl3945_mac_add_interface,
8443 .remove_interface = iwl3945_mac_remove_interface,
8444 .config = iwl3945_mac_config,
8445 .config_interface = iwl3945_mac_config_interface,
8446 .configure_filter = iwl3945_configure_filter,
8447 .set_key = iwl3945_mac_set_key,
8448 .get_stats = iwl3945_mac_get_stats,
8449 .get_tx_stats = iwl3945_mac_get_tx_stats,
8450 .conf_tx = iwl3945_mac_conf_tx,
8451 .get_tsf = iwl3945_mac_get_tsf,
8452 .reset_tsf = iwl3945_mac_reset_tsf,
8453 .beacon_update = iwl3945_mac_beacon_update,
8454 .hw_scan = iwl3945_mac_hw_scan
Zhu Yib481de92007-09-25 17:54:57 -07008455};
8456
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008457static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
Zhu Yib481de92007-09-25 17:54:57 -07008458{
8459 int err = 0;
8460 u32 pci_id;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008461 struct iwl3945_priv *priv;
Zhu Yib481de92007-09-25 17:54:57 -07008462 struct ieee80211_hw *hw;
8463 int i;
8464
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008465 /* Disabling hardware scan means that mac80211 will perform scans
8466 * "the hard way", rather than using device's scan. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008467 if (iwl3945_param_disable_hw_scan) {
Zhu Yib481de92007-09-25 17:54:57 -07008468 IWL_DEBUG_INFO("Disabling hw_scan\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008469 iwl3945_hw_ops.hw_scan = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07008470 }
8471
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008472 if ((iwl3945_param_queues_num > IWL_MAX_NUM_QUEUES) ||
8473 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
Zhu Yib481de92007-09-25 17:54:57 -07008474 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
8475 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
8476 err = -EINVAL;
8477 goto out;
8478 }
8479
8480 /* mac80211 allocates memory for this device instance, including
8481 * space for this driver's private structure */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008482 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
Zhu Yib481de92007-09-25 17:54:57 -07008483 if (hw == NULL) {
8484 IWL_ERROR("Can not allocate network device\n");
8485 err = -ENOMEM;
8486 goto out;
8487 }
8488 SET_IEEE80211_DEV(hw, &pdev->dev);
8489
Johannes Bergf51359a2007-10-28 14:53:36 +01008490 hw->rate_control_algorithm = "iwl-3945-rs";
8491
Zhu Yib481de92007-09-25 17:54:57 -07008492 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
8493 priv = hw->priv;
8494 priv->hw = hw;
8495
8496 priv->pci_dev = pdev;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008497
8498 /* Select antenna (may be helpful if only one antenna is connected) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008499 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008500#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008501 iwl3945_debug_level = iwl3945_param_debug;
Zhu Yib481de92007-09-25 17:54:57 -07008502 atomic_set(&priv->restrict_refcnt, 0);
8503#endif
8504 priv->retry_rate = 1;
8505
8506 priv->ibss_beacon = NULL;
8507
8508 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
8509 * the range of signal quality values that we'll provide.
8510 * Negative values for level/noise indicate that we'll provide dBm.
8511 * For WE, at least, non-0 values here *enable* display of values
8512 * in app (iwconfig). */
8513 hw->max_rssi = -20; /* signal level, negative indicates dBm */
8514 hw->max_noise = -20; /* noise level, negative indicates dBm */
8515 hw->max_signal = 100; /* link quality indication (%) */
8516
8517 /* Tell mac80211 our Tx characteristics */
8518 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
8519
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008520 /* 4 EDCA QOS priorities */
Zhu Yib481de92007-09-25 17:54:57 -07008521 hw->queues = 4;
8522
8523 spin_lock_init(&priv->lock);
8524 spin_lock_init(&priv->power_data.lock);
8525 spin_lock_init(&priv->sta_lock);
8526 spin_lock_init(&priv->hcmd_lock);
8527
8528 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8529 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8530
8531 INIT_LIST_HEAD(&priv->free_frames);
8532
8533 mutex_init(&priv->mutex);
8534 if (pci_enable_device(pdev)) {
8535 err = -ENODEV;
8536 goto out_ieee80211_free_hw;
8537 }
8538
8539 pci_set_master(pdev);
8540
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008541 /* Clear the driver's (not device's) station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008542 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008543
8544 priv->data_retry_limit = -1;
8545 priv->ieee_channels = NULL;
8546 priv->ieee_rates = NULL;
8547 priv->phymode = -1;
8548
8549 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8550 if (!err)
8551 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8552 if (err) {
8553 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8554 goto out_pci_disable_device;
8555 }
8556
8557 pci_set_drvdata(pdev, priv);
8558 err = pci_request_regions(pdev, DRV_NAME);
8559 if (err)
8560 goto out_pci_disable_device;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008561
Zhu Yib481de92007-09-25 17:54:57 -07008562 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8563 * PCI Tx retries from interfering with C3 CPU state */
8564 pci_write_config_byte(pdev, 0x41, 0x00);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008565
Zhu Yib481de92007-09-25 17:54:57 -07008566 priv->hw_base = pci_iomap(pdev, 0, 0);
8567 if (!priv->hw_base) {
8568 err = -ENODEV;
8569 goto out_pci_release_regions;
8570 }
8571
8572 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8573 (unsigned long long) pci_resource_len(pdev, 0));
8574 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8575
8576 /* Initialize module parameter values here */
8577
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008578 /* Disable radio (SW RF KILL) via parameter when loading driver */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008579 if (iwl3945_param_disable) {
Zhu Yib481de92007-09-25 17:54:57 -07008580 set_bit(STATUS_RF_KILL_SW, &priv->status);
8581 IWL_DEBUG_INFO("Radio disabled.\n");
8582 }
8583
8584 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8585
8586 pci_id =
8587 (priv->pci_dev->device << 16) | priv->pci_dev->subsystem_device;
8588
8589 switch (pci_id) {
8590 case 0x42221005: /* 0x4222 0x8086 0x1005 is BG SKU */
8591 case 0x42221034: /* 0x4222 0x8086 0x1034 is BG SKU */
8592 case 0x42271014: /* 0x4227 0x8086 0x1014 is BG SKU */
8593 case 0x42221044: /* 0x4222 0x8086 0x1044 is BG SKU */
8594 priv->is_abg = 0;
8595 break;
8596
8597 /*
8598 * Rest are assumed ABG SKU -- if this is not the
8599 * case then the card will get the wrong 'Detected'
8600 * line in the kernel log however the code that
8601 * initializes the GEO table will detect no A-band
8602 * channels and remove the is_abg mask.
8603 */
8604 default:
8605 priv->is_abg = 1;
8606 break;
8607 }
8608
8609 printk(KERN_INFO DRV_NAME
8610 ": Detected Intel PRO/Wireless 3945%sBG Network Connection\n",
8611 priv->is_abg ? "A" : "");
8612
8613 /* Device-specific setup */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008614 if (iwl3945_hw_set_hw_setting(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07008615 IWL_ERROR("failed to set hw settings\n");
8616 mutex_unlock(&priv->mutex);
8617 goto out_iounmap;
8618 }
8619
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008620#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008621 if (iwl3945_param_qos_enable)
Zhu Yib481de92007-09-25 17:54:57 -07008622 priv->qos_data.qos_enable = 1;
8623
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008624 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008625
8626 priv->qos_data.qos_active = 0;
8627 priv->qos_data.qos_cap.val = 0;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008628#endif /* CONFIG_IWL3945_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07008629
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008630 iwl3945_set_rxon_channel(priv, MODE_IEEE80211G, 6);
8631 iwl3945_setup_deferred_work(priv);
8632 iwl3945_setup_rx_handlers(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008633
8634 priv->rates_mask = IWL_RATES_MASK;
8635 /* If power management is turned on, default to AC mode */
8636 priv->power_mode = IWL_POWER_AC;
8637 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8638
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008639 iwl3945_disable_interrupts(priv);
Jes Sorensen49df2b32007-10-26 16:10:39 +02008640
Zhu Yib481de92007-09-25 17:54:57 -07008641 pci_enable_msi(pdev);
8642
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008643 err = request_irq(pdev->irq, iwl3945_isr, IRQF_SHARED, DRV_NAME, priv);
Zhu Yib481de92007-09-25 17:54:57 -07008644 if (err) {
8645 IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
8646 goto out_disable_msi;
8647 }
8648
8649 mutex_lock(&priv->mutex);
8650
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008651 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008652 if (err) {
8653 IWL_ERROR("failed to create sysfs device attributes\n");
8654 mutex_unlock(&priv->mutex);
8655 goto out_release_irq;
8656 }
8657
8658 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
8659 * ucode filename and max sizes are card-specific. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008660 err = iwl3945_read_ucode(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008661 if (err) {
8662 IWL_ERROR("Could not read microcode: %d\n", err);
8663 mutex_unlock(&priv->mutex);
8664 goto out_pci_alloc;
8665 }
8666
8667 mutex_unlock(&priv->mutex);
8668
Ian Schram01ebd062007-10-25 17:15:22 +08008669 IWL_DEBUG_INFO("Queueing UP work.\n");
Zhu Yib481de92007-09-25 17:54:57 -07008670
8671 queue_work(priv->workqueue, &priv->up);
8672
8673 return 0;
8674
8675 out_pci_alloc:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008676 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008677
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008678 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008679
8680 out_release_irq:
8681 free_irq(pdev->irq, priv);
8682
8683 out_disable_msi:
8684 pci_disable_msi(pdev);
8685 destroy_workqueue(priv->workqueue);
8686 priv->workqueue = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008687 iwl3945_unset_hw_setting(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008688
8689 out_iounmap:
8690 pci_iounmap(pdev, priv->hw_base);
8691 out_pci_release_regions:
8692 pci_release_regions(pdev);
8693 out_pci_disable_device:
8694 pci_disable_device(pdev);
8695 pci_set_drvdata(pdev, NULL);
8696 out_ieee80211_free_hw:
8697 ieee80211_free_hw(priv->hw);
8698 out:
8699 return err;
8700}
8701
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008702static void iwl3945_pci_remove(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07008703{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008704 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008705 struct list_head *p, *q;
8706 int i;
8707
8708 if (!priv)
8709 return;
8710
8711 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8712
Zhu Yib481de92007-09-25 17:54:57 -07008713 set_bit(STATUS_EXIT_PENDING, &priv->status);
Zhu Yib24d22b2007-12-19 13:59:52 +08008714
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008715 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008716
8717 /* Free MAC hash list for ADHOC */
8718 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8719 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8720 list_del(p);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008721 kfree(list_entry(p, struct iwl3945_ibss_seq, list));
Zhu Yib481de92007-09-25 17:54:57 -07008722 }
8723 }
8724
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008725 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008726
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008727 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008728
8729 if (priv->rxq.bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008730 iwl3945_rx_queue_free(priv, &priv->rxq);
8731 iwl3945_hw_txq_ctx_free(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008732
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008733 iwl3945_unset_hw_setting(priv);
8734 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008735
8736 if (priv->mac80211_registered) {
8737 ieee80211_unregister_hw(priv->hw);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008738 iwl3945_rate_control_unregister(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07008739 }
8740
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08008741 /*netif_stop_queue(dev); */
8742 flush_workqueue(priv->workqueue);
8743
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008744 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
Zhu Yib481de92007-09-25 17:54:57 -07008745 * priv->workqueue... so we can't take down the workqueue
8746 * until now... */
8747 destroy_workqueue(priv->workqueue);
8748 priv->workqueue = NULL;
8749
8750 free_irq(pdev->irq, priv);
8751 pci_disable_msi(pdev);
8752 pci_iounmap(pdev, priv->hw_base);
8753 pci_release_regions(pdev);
8754 pci_disable_device(pdev);
8755 pci_set_drvdata(pdev, NULL);
8756
8757 kfree(priv->channel_info);
8758
8759 kfree(priv->ieee_channels);
8760 kfree(priv->ieee_rates);
8761
8762 if (priv->ibss_beacon)
8763 dev_kfree_skb(priv->ibss_beacon);
8764
8765 ieee80211_free_hw(priv->hw);
8766}
8767
8768#ifdef CONFIG_PM
8769
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008770static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
Zhu Yib481de92007-09-25 17:54:57 -07008771{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008772 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008773
Zhu Yib481de92007-09-25 17:54:57 -07008774 set_bit(STATUS_IN_SUSPEND, &priv->status);
8775
8776 /* Take down the device; powers it off, etc. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008777 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008778
8779 if (priv->mac80211_registered)
8780 ieee80211_stop_queues(priv->hw);
8781
8782 pci_save_state(pdev);
8783 pci_disable_device(pdev);
8784 pci_set_power_state(pdev, PCI_D3hot);
8785
Zhu Yib481de92007-09-25 17:54:57 -07008786 return 0;
8787}
8788
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008789static void iwl3945_resume(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07008790{
8791 unsigned long flags;
8792
8793 /* The following it a temporary work around due to the
8794 * suspend / resume not fully initializing the NIC correctly.
8795 * Without all of the following, resume will not attempt to take
8796 * down the NIC (it shouldn't really need to) and will just try
8797 * and bring the NIC back up. However that fails during the
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008798 * ucode verification process. This then causes iwl3945_down to be
8799 * called *after* iwl3945_hw_nic_init() has succeeded -- which
Zhu Yib481de92007-09-25 17:54:57 -07008800 * then lets the next init sequence succeed. So, we've
8801 * replicated all of that NIC init code here... */
8802
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008803 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
Zhu Yib481de92007-09-25 17:54:57 -07008804
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008805 iwl3945_hw_nic_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008806
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008807 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
8808 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
Zhu Yib481de92007-09-25 17:54:57 -07008809 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008810 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
8811 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
8812 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07008813
8814 /* tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008815 iwl3945_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008816
8817 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008818 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
Zhu Yib481de92007-09-25 17:54:57 -07008819
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008820 if (!iwl3945_grab_nic_access(priv)) {
8821 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
Zhu Yib481de92007-09-25 17:54:57 -07008822 APMG_CLK_VAL_DMA_CLK_RQT);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008823 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008824 }
8825 spin_unlock_irqrestore(&priv->lock, flags);
8826
8827 udelay(5);
8828
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008829 iwl3945_hw_nic_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008830
8831 /* Bring the device back up */
8832 clear_bit(STATUS_IN_SUSPEND, &priv->status);
8833 queue_work(priv->workqueue, &priv->up);
8834}
8835
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008836static int iwl3945_pci_resume(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07008837{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008838 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008839 int err;
8840
8841 printk(KERN_INFO "Coming out of suspend...\n");
8842
Zhu Yib481de92007-09-25 17:54:57 -07008843 pci_set_power_state(pdev, PCI_D0);
8844 err = pci_enable_device(pdev);
8845 pci_restore_state(pdev);
8846
8847 /*
8848 * Suspend/Resume resets the PCI configuration space, so we have to
8849 * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
8850 * from interfering with C3 CPU state. pci_restore_state won't help
8851 * here since it only restores the first 64 bytes pci config header.
8852 */
8853 pci_write_config_byte(pdev, 0x41, 0x00);
8854
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008855 iwl3945_resume(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008856
8857 return 0;
8858}
8859
8860#endif /* CONFIG_PM */
8861
8862/*****************************************************************************
8863 *
8864 * driver and module entry point
8865 *
8866 *****************************************************************************/
8867
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008868static struct pci_driver iwl3945_driver = {
Zhu Yib481de92007-09-25 17:54:57 -07008869 .name = DRV_NAME,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008870 .id_table = iwl3945_hw_card_ids,
8871 .probe = iwl3945_pci_probe,
8872 .remove = __devexit_p(iwl3945_pci_remove),
Zhu Yib481de92007-09-25 17:54:57 -07008873#ifdef CONFIG_PM
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008874 .suspend = iwl3945_pci_suspend,
8875 .resume = iwl3945_pci_resume,
Zhu Yib481de92007-09-25 17:54:57 -07008876#endif
8877};
8878
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008879static int __init iwl3945_init(void)
Zhu Yib481de92007-09-25 17:54:57 -07008880{
8881
8882 int ret;
8883 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8884 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008885 ret = pci_register_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008886 if (ret) {
8887 IWL_ERROR("Unable to initialize PCI module\n");
8888 return ret;
8889 }
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008890#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008891 ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008892 if (ret) {
8893 IWL_ERROR("Unable to create driver sysfs file\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008894 pci_unregister_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008895 return ret;
8896 }
8897#endif
8898
8899 return ret;
8900}
8901
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008902static void __exit iwl3945_exit(void)
Zhu Yib481de92007-09-25 17:54:57 -07008903{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008904#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008905 driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008906#endif
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008907 pci_unregister_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008908}
8909
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008910module_param_named(antenna, iwl3945_param_antenna, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008911MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008912module_param_named(disable, iwl3945_param_disable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008913MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008914module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008915MODULE_PARM_DESC(hwcrypto,
8916 "using hardware crypto engine (default 0 [software])\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008917module_param_named(debug, iwl3945_param_debug, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008918MODULE_PARM_DESC(debug, "debug output mask");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008919module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008920MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8921
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008922module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008923MODULE_PARM_DESC(queues_num, "number of hw queues.");
8924
8925/* QoS */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008926module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008927MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8928
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008929module_exit(iwl3945_exit);
8930module_init(iwl3945_init);