2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affilates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <trace/events/kvm.h>
48 #define CREATE_TRACE_POINTS
51 #include <asm/debugreg.h>
59 #define MAX_IO_MSRS 256
60 #define CR0_RESERVED_BITS \
61 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
62 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
63 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
64 #define CR4_RESERVED_BITS \
65 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
66 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
67 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
69 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
71 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
73 #define KVM_MAX_MCE_BANKS 32
74 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
77 * - enable syscall per default because its emulated by KVM
78 * - enable LME and LMA per default on 64 bit KVM
81 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
83 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
89 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
90 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
91 struct kvm_cpuid_entry2 __user *entries);
93 struct kvm_x86_ops *kvm_x86_ops;
94 EXPORT_SYMBOL_GPL(kvm_x86_ops);
97 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
99 #define KVM_NR_SHARED_MSRS 16
101 struct kvm_shared_msrs_global {
103 u32 msrs[KVM_NR_SHARED_MSRS];
106 struct kvm_shared_msrs {
107 struct user_return_notifier urn;
109 struct kvm_shared_msr_values {
112 } values[KVM_NR_SHARED_MSRS];
115 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
116 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
118 struct kvm_stats_debugfs_item debugfs_entries[] = {
119 { "pf_fixed", VCPU_STAT(pf_fixed) },
120 { "pf_guest", VCPU_STAT(pf_guest) },
121 { "tlb_flush", VCPU_STAT(tlb_flush) },
122 { "invlpg", VCPU_STAT(invlpg) },
123 { "exits", VCPU_STAT(exits) },
124 { "io_exits", VCPU_STAT(io_exits) },
125 { "mmio_exits", VCPU_STAT(mmio_exits) },
126 { "signal_exits", VCPU_STAT(signal_exits) },
127 { "irq_window", VCPU_STAT(irq_window_exits) },
128 { "nmi_window", VCPU_STAT(nmi_window_exits) },
129 { "halt_exits", VCPU_STAT(halt_exits) },
130 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
131 { "hypercalls", VCPU_STAT(hypercalls) },
132 { "request_irq", VCPU_STAT(request_irq_exits) },
133 { "irq_exits", VCPU_STAT(irq_exits) },
134 { "host_state_reload", VCPU_STAT(host_state_reload) },
135 { "efer_reload", VCPU_STAT(efer_reload) },
136 { "fpu_reload", VCPU_STAT(fpu_reload) },
137 { "insn_emulation", VCPU_STAT(insn_emulation) },
138 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
139 { "irq_injections", VCPU_STAT(irq_injections) },
140 { "nmi_injections", VCPU_STAT(nmi_injections) },
141 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
142 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
143 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
144 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
145 { "mmu_flooded", VM_STAT(mmu_flooded) },
146 { "mmu_recycled", VM_STAT(mmu_recycled) },
147 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
148 { "mmu_unsync", VM_STAT(mmu_unsync) },
149 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
150 { "largepages", VM_STAT(lpages) },
154 u64 __read_mostly host_xcr0;
156 static inline u32 bit(int bitno)
158 return 1 << (bitno & 31);
161 static void kvm_on_user_return(struct user_return_notifier *urn)
164 struct kvm_shared_msrs *locals
165 = container_of(urn, struct kvm_shared_msrs, urn);
166 struct kvm_shared_msr_values *values;
168 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
169 values = &locals->values[slot];
170 if (values->host != values->curr) {
171 wrmsrl(shared_msrs_global.msrs[slot], values->host);
172 values->curr = values->host;
175 locals->registered = false;
176 user_return_notifier_unregister(urn);
179 static void shared_msr_update(unsigned slot, u32 msr)
181 struct kvm_shared_msrs *smsr;
184 smsr = &__get_cpu_var(shared_msrs);
185 /* only read, and nobody should modify it at this time,
186 * so don't need lock */
187 if (slot >= shared_msrs_global.nr) {
188 printk(KERN_ERR "kvm: invalid MSR slot!");
191 rdmsrl_safe(msr, &value);
192 smsr->values[slot].host = value;
193 smsr->values[slot].curr = value;
196 void kvm_define_shared_msr(unsigned slot, u32 msr)
198 if (slot >= shared_msrs_global.nr)
199 shared_msrs_global.nr = slot + 1;
200 shared_msrs_global.msrs[slot] = msr;
201 /* we need ensured the shared_msr_global have been updated */
204 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
206 static void kvm_shared_msr_cpu_online(void)
210 for (i = 0; i < shared_msrs_global.nr; ++i)
211 shared_msr_update(i, shared_msrs_global.msrs[i]);
214 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
216 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
218 if (((value ^ smsr->values[slot].curr) & mask) == 0)
220 smsr->values[slot].curr = value;
221 wrmsrl(shared_msrs_global.msrs[slot], value);
222 if (!smsr->registered) {
223 smsr->urn.on_user_return = kvm_on_user_return;
224 user_return_notifier_register(&smsr->urn);
225 smsr->registered = true;
228 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
230 static void drop_user_return_notifiers(void *ignore)
232 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
234 if (smsr->registered)
235 kvm_on_user_return(&smsr->urn);
238 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
240 if (irqchip_in_kernel(vcpu->kvm))
241 return vcpu->arch.apic_base;
243 return vcpu->arch.apic_base;
245 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
247 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
249 /* TODO: reserve bits check */
250 if (irqchip_in_kernel(vcpu->kvm))
251 kvm_lapic_set_base(vcpu, data);
253 vcpu->arch.apic_base = data;
255 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
257 #define EXCPT_BENIGN 0
258 #define EXCPT_CONTRIBUTORY 1
261 static int exception_class(int vector)
271 return EXCPT_CONTRIBUTORY;
278 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
279 unsigned nr, bool has_error, u32 error_code,
285 if (!vcpu->arch.exception.pending) {
287 vcpu->arch.exception.pending = true;
288 vcpu->arch.exception.has_error_code = has_error;
289 vcpu->arch.exception.nr = nr;
290 vcpu->arch.exception.error_code = error_code;
291 vcpu->arch.exception.reinject = reinject;
295 /* to check exception */
296 prev_nr = vcpu->arch.exception.nr;
297 if (prev_nr == DF_VECTOR) {
298 /* triple fault -> shutdown */
299 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
302 class1 = exception_class(prev_nr);
303 class2 = exception_class(nr);
304 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
305 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
306 /* generate double fault per SDM Table 5-5 */
307 vcpu->arch.exception.pending = true;
308 vcpu->arch.exception.has_error_code = true;
309 vcpu->arch.exception.nr = DF_VECTOR;
310 vcpu->arch.exception.error_code = 0;
312 /* replace previous exception with a new one in a hope
313 that instruction re-execution will regenerate lost
318 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
320 kvm_multiple_exception(vcpu, nr, false, 0, false);
322 EXPORT_SYMBOL_GPL(kvm_queue_exception);
324 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
326 kvm_multiple_exception(vcpu, nr, false, 0, true);
328 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
330 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
333 ++vcpu->stat.pf_guest;
334 vcpu->arch.cr2 = addr;
335 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
338 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
340 vcpu->arch.nmi_pending = 1;
342 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
344 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
346 kvm_multiple_exception(vcpu, nr, true, error_code, false);
348 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
350 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
352 kvm_multiple_exception(vcpu, nr, true, error_code, true);
354 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
357 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
358 * a #GP and return false.
360 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
362 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
364 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
367 EXPORT_SYMBOL_GPL(kvm_require_cpl);
370 * Load the pae pdptrs. Return true is they are all valid.
372 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
374 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
375 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
378 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
380 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
381 offset * sizeof(u64), sizeof(pdpte));
386 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
387 if (is_present_gpte(pdpte[i]) &&
388 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
395 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
396 __set_bit(VCPU_EXREG_PDPTR,
397 (unsigned long *)&vcpu->arch.regs_avail);
398 __set_bit(VCPU_EXREG_PDPTR,
399 (unsigned long *)&vcpu->arch.regs_dirty);
404 EXPORT_SYMBOL_GPL(load_pdptrs);
406 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
408 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
412 if (is_long_mode(vcpu) || !is_pae(vcpu))
415 if (!test_bit(VCPU_EXREG_PDPTR,
416 (unsigned long *)&vcpu->arch.regs_avail))
419 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
422 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
428 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
430 unsigned long old_cr0 = kvm_read_cr0(vcpu);
431 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
432 X86_CR0_CD | X86_CR0_NW;
437 if (cr0 & 0xffffffff00000000UL)
441 cr0 &= ~CR0_RESERVED_BITS;
443 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
446 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
449 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
451 if ((vcpu->arch.efer & EFER_LME)) {
456 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
461 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3))
465 kvm_x86_ops->set_cr0(vcpu, cr0);
467 if ((cr0 ^ old_cr0) & update_bits)
468 kvm_mmu_reset_context(vcpu);
471 EXPORT_SYMBOL_GPL(kvm_set_cr0);
473 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
475 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
477 EXPORT_SYMBOL_GPL(kvm_lmsw);
479 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
483 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
484 if (index != XCR_XFEATURE_ENABLED_MASK)
487 if (kvm_x86_ops->get_cpl(vcpu) != 0)
489 if (!(xcr0 & XSTATE_FP))
491 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
493 if (xcr0 & ~host_xcr0)
495 vcpu->arch.xcr0 = xcr0;
496 vcpu->guest_xcr0_loaded = 0;
500 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
502 if (__kvm_set_xcr(vcpu, index, xcr)) {
503 kvm_inject_gp(vcpu, 0);
508 EXPORT_SYMBOL_GPL(kvm_set_xcr);
510 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
512 struct kvm_cpuid_entry2 *best;
514 best = kvm_find_cpuid_entry(vcpu, 1, 0);
515 return best && (best->ecx & bit(X86_FEATURE_XSAVE));
518 static void update_cpuid(struct kvm_vcpu *vcpu)
520 struct kvm_cpuid_entry2 *best;
522 best = kvm_find_cpuid_entry(vcpu, 1, 0);
526 /* Update OSXSAVE bit */
527 if (cpu_has_xsave && best->function == 0x1) {
528 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
529 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
530 best->ecx |= bit(X86_FEATURE_OSXSAVE);
534 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
536 unsigned long old_cr4 = kvm_read_cr4(vcpu);
537 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
539 if (cr4 & CR4_RESERVED_BITS)
542 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
545 if (is_long_mode(vcpu)) {
546 if (!(cr4 & X86_CR4_PAE))
548 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
549 && ((cr4 ^ old_cr4) & pdptr_bits)
550 && !load_pdptrs(vcpu, vcpu->arch.cr3))
553 if (cr4 & X86_CR4_VMXE)
556 kvm_x86_ops->set_cr4(vcpu, cr4);
558 if ((cr4 ^ old_cr4) & pdptr_bits)
559 kvm_mmu_reset_context(vcpu);
561 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
566 EXPORT_SYMBOL_GPL(kvm_set_cr4);
568 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
570 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
571 kvm_mmu_sync_roots(vcpu);
572 kvm_mmu_flush_tlb(vcpu);
576 if (is_long_mode(vcpu)) {
577 if (cr3 & CR3_L_MODE_RESERVED_BITS)
581 if (cr3 & CR3_PAE_RESERVED_BITS)
583 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3))
587 * We don't check reserved bits in nonpae mode, because
588 * this isn't enforced, and VMware depends on this.
593 * Does the new cr3 value map to physical memory? (Note, we
594 * catch an invalid cr3 even in real-mode, because it would
595 * cause trouble later on when we turn on paging anyway.)
597 * A real CPU would silently accept an invalid cr3 and would
598 * attempt to use it - with largely undefined (and often hard
599 * to debug) behavior on the guest side.
601 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
603 vcpu->arch.cr3 = cr3;
604 vcpu->arch.mmu.new_cr3(vcpu);
607 EXPORT_SYMBOL_GPL(kvm_set_cr3);
609 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
611 if (cr8 & CR8_RESERVED_BITS)
613 if (irqchip_in_kernel(vcpu->kvm))
614 kvm_lapic_set_tpr(vcpu, cr8);
616 vcpu->arch.cr8 = cr8;
620 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
622 if (__kvm_set_cr8(vcpu, cr8))
623 kvm_inject_gp(vcpu, 0);
625 EXPORT_SYMBOL_GPL(kvm_set_cr8);
627 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
629 if (irqchip_in_kernel(vcpu->kvm))
630 return kvm_lapic_get_cr8(vcpu);
632 return vcpu->arch.cr8;
634 EXPORT_SYMBOL_GPL(kvm_get_cr8);
636 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
640 vcpu->arch.db[dr] = val;
641 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
642 vcpu->arch.eff_db[dr] = val;
645 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
649 if (val & 0xffffffff00000000ULL)
651 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
654 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
658 if (val & 0xffffffff00000000ULL)
660 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
661 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
662 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
663 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
671 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
675 res = __kvm_set_dr(vcpu, dr, val);
677 kvm_queue_exception(vcpu, UD_VECTOR);
679 kvm_inject_gp(vcpu, 0);
683 EXPORT_SYMBOL_GPL(kvm_set_dr);
685 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
689 *val = vcpu->arch.db[dr];
692 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
696 *val = vcpu->arch.dr6;
699 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
703 *val = vcpu->arch.dr7;
710 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
712 if (_kvm_get_dr(vcpu, dr, val)) {
713 kvm_queue_exception(vcpu, UD_VECTOR);
718 EXPORT_SYMBOL_GPL(kvm_get_dr);
721 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
722 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
724 * This list is modified at module load time to reflect the
725 * capabilities of the host cpu. This capabilities test skips MSRs that are
726 * kvm-specific. Those are put in the beginning of the list.
729 #define KVM_SAVE_MSRS_BEGIN 7
730 static u32 msrs_to_save[] = {
731 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
732 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
733 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
734 HV_X64_MSR_APIC_ASSIST_PAGE,
735 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
738 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
740 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
743 static unsigned num_msrs_to_save;
745 static u32 emulated_msrs[] = {
746 MSR_IA32_MISC_ENABLE,
751 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
753 u64 old_efer = vcpu->arch.efer;
755 if (efer & efer_reserved_bits)
759 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
762 if (efer & EFER_FFXSR) {
763 struct kvm_cpuid_entry2 *feat;
765 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
766 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
770 if (efer & EFER_SVME) {
771 struct kvm_cpuid_entry2 *feat;
773 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
774 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
779 efer |= vcpu->arch.efer & EFER_LMA;
781 kvm_x86_ops->set_efer(vcpu, efer);
783 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
784 kvm_mmu_reset_context(vcpu);
786 /* Update reserved bits */
787 if ((efer ^ old_efer) & EFER_NX)
788 kvm_mmu_reset_context(vcpu);
793 void kvm_enable_efer_bits(u64 mask)
795 efer_reserved_bits &= ~mask;
797 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
801 * Writes msr value into into the appropriate "register".
802 * Returns 0 on success, non-0 otherwise.
803 * Assumes vcpu_load() was already called.
805 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
807 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
811 * Adapt set_msr() to msr_io()'s calling convention
813 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
815 return kvm_set_msr(vcpu, index, *data);
818 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
822 struct pvclock_wall_clock wc;
823 struct timespec boot;
828 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
833 ++version; /* first time write, random junk */
837 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
840 * The guest calculates current wall clock time by adding
841 * system time (updated by kvm_write_guest_time below) to the
842 * wall clock specified here. guest system time equals host
843 * system time for us, thus we must fill in host boot time here.
847 wc.sec = boot.tv_sec;
848 wc.nsec = boot.tv_nsec;
849 wc.version = version;
851 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
854 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
857 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
859 uint32_t quotient, remainder;
861 /* Don't try to replace with do_div(), this one calculates
862 * "(dividend << 32) / divisor" */
864 : "=a" (quotient), "=d" (remainder)
865 : "0" (0), "1" (dividend), "r" (divisor) );
869 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
871 uint64_t nsecs = 1000000000LL;
876 tps64 = tsc_khz * 1000LL;
877 while (tps64 > nsecs*2) {
882 tps32 = (uint32_t)tps64;
883 while (tps32 <= (uint32_t)nsecs) {
888 hv_clock->tsc_shift = shift;
889 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
891 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
892 __func__, tsc_khz, hv_clock->tsc_shift,
893 hv_clock->tsc_to_system_mul);
896 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
898 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
900 struct kvm *kvm = vcpu->kvm;
904 spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
905 offset = data - native_read_tsc();
906 kvm_x86_ops->write_tsc_offset(vcpu, offset);
907 spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
909 /* Reset of TSC must disable overshoot protection below */
910 vcpu->arch.hv_clock.tsc_timestamp = 0;
912 EXPORT_SYMBOL_GPL(kvm_write_tsc);
914 static void kvm_write_guest_time(struct kvm_vcpu *v)
918 struct kvm_vcpu_arch *vcpu = &v->arch;
920 unsigned long this_tsc_khz;
922 if ((!vcpu->time_page))
925 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
926 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
927 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
928 vcpu->hv_clock_tsc_khz = this_tsc_khz;
930 put_cpu_var(cpu_tsc_khz);
932 /* Keep irq disabled to prevent changes to the clock */
933 local_irq_save(flags);
934 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
936 monotonic_to_bootbased(&ts);
937 local_irq_restore(flags);
939 /* With all the info we got, fill in the values */
941 vcpu->hv_clock.system_time = ts.tv_nsec +
942 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
944 vcpu->hv_clock.flags = 0;
947 * The interface expects us to write an even number signaling that the
948 * update is finished. Since the guest won't see the intermediate
949 * state, we just increase by 2 at the end.
951 vcpu->hv_clock.version += 2;
953 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
955 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
956 sizeof(vcpu->hv_clock));
958 kunmap_atomic(shared_kaddr, KM_USER0);
960 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
963 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
965 struct kvm_vcpu_arch *vcpu = &v->arch;
967 if (!vcpu->time_page)
969 kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE, v);
973 static bool msr_mtrr_valid(unsigned msr)
976 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
977 case MSR_MTRRfix64K_00000:
978 case MSR_MTRRfix16K_80000:
979 case MSR_MTRRfix16K_A0000:
980 case MSR_MTRRfix4K_C0000:
981 case MSR_MTRRfix4K_C8000:
982 case MSR_MTRRfix4K_D0000:
983 case MSR_MTRRfix4K_D8000:
984 case MSR_MTRRfix4K_E0000:
985 case MSR_MTRRfix4K_E8000:
986 case MSR_MTRRfix4K_F0000:
987 case MSR_MTRRfix4K_F8000:
988 case MSR_MTRRdefType:
989 case MSR_IA32_CR_PAT:
997 static bool valid_pat_type(unsigned t)
999 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1002 static bool valid_mtrr_type(unsigned t)
1004 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1007 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1011 if (!msr_mtrr_valid(msr))
1014 if (msr == MSR_IA32_CR_PAT) {
1015 for (i = 0; i < 8; i++)
1016 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1019 } else if (msr == MSR_MTRRdefType) {
1022 return valid_mtrr_type(data & 0xff);
1023 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1024 for (i = 0; i < 8 ; i++)
1025 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1030 /* variable MTRRs */
1031 return valid_mtrr_type(data & 0xff);
1034 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1036 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1038 if (!mtrr_valid(vcpu, msr, data))
1041 if (msr == MSR_MTRRdefType) {
1042 vcpu->arch.mtrr_state.def_type = data;
1043 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1044 } else if (msr == MSR_MTRRfix64K_00000)
1046 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1047 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1048 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1049 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1050 else if (msr == MSR_IA32_CR_PAT)
1051 vcpu->arch.pat = data;
1052 else { /* Variable MTRRs */
1053 int idx, is_mtrr_mask;
1056 idx = (msr - 0x200) / 2;
1057 is_mtrr_mask = msr - 0x200 - 2 * idx;
1060 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1063 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1067 kvm_mmu_reset_context(vcpu);
1071 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1073 u64 mcg_cap = vcpu->arch.mcg_cap;
1074 unsigned bank_num = mcg_cap & 0xff;
1077 case MSR_IA32_MCG_STATUS:
1078 vcpu->arch.mcg_status = data;
1080 case MSR_IA32_MCG_CTL:
1081 if (!(mcg_cap & MCG_CTL_P))
1083 if (data != 0 && data != ~(u64)0)
1085 vcpu->arch.mcg_ctl = data;
1088 if (msr >= MSR_IA32_MC0_CTL &&
1089 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1090 u32 offset = msr - MSR_IA32_MC0_CTL;
1091 /* only 0 or all 1s can be written to IA32_MCi_CTL
1092 * some Linux kernels though clear bit 10 in bank 4 to
1093 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1094 * this to avoid an uncatched #GP in the guest
1096 if ((offset & 0x3) == 0 &&
1097 data != 0 && (data | (1 << 10)) != ~(u64)0)
1099 vcpu->arch.mce_banks[offset] = data;
1107 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1109 struct kvm *kvm = vcpu->kvm;
1110 int lm = is_long_mode(vcpu);
1111 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1112 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1113 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1114 : kvm->arch.xen_hvm_config.blob_size_32;
1115 u32 page_num = data & ~PAGE_MASK;
1116 u64 page_addr = data & PAGE_MASK;
1121 if (page_num >= blob_size)
1124 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1128 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1130 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1139 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1141 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1144 static bool kvm_hv_msr_partition_wide(u32 msr)
1148 case HV_X64_MSR_GUEST_OS_ID:
1149 case HV_X64_MSR_HYPERCALL:
1157 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1159 struct kvm *kvm = vcpu->kvm;
1162 case HV_X64_MSR_GUEST_OS_ID:
1163 kvm->arch.hv_guest_os_id = data;
1164 /* setting guest os id to zero disables hypercall page */
1165 if (!kvm->arch.hv_guest_os_id)
1166 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1168 case HV_X64_MSR_HYPERCALL: {
1173 /* if guest os id is not set hypercall should remain disabled */
1174 if (!kvm->arch.hv_guest_os_id)
1176 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1177 kvm->arch.hv_hypercall = data;
1180 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1181 addr = gfn_to_hva(kvm, gfn);
1182 if (kvm_is_error_hva(addr))
1184 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1185 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1186 if (copy_to_user((void __user *)addr, instructions, 4))
1188 kvm->arch.hv_hypercall = data;
1192 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1193 "data 0x%llx\n", msr, data);
1199 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1202 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1205 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1206 vcpu->arch.hv_vapic = data;
1209 addr = gfn_to_hva(vcpu->kvm, data >>
1210 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1211 if (kvm_is_error_hva(addr))
1213 if (clear_user((void __user *)addr, PAGE_SIZE))
1215 vcpu->arch.hv_vapic = data;
1218 case HV_X64_MSR_EOI:
1219 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1220 case HV_X64_MSR_ICR:
1221 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1222 case HV_X64_MSR_TPR:
1223 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1225 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1226 "data 0x%llx\n", msr, data);
1233 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1237 return set_efer(vcpu, data);
1239 data &= ~(u64)0x40; /* ignore flush filter disable */
1240 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1242 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1247 case MSR_FAM10H_MMIO_CONF_BASE:
1249 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1254 case MSR_AMD64_NB_CFG:
1256 case MSR_IA32_DEBUGCTLMSR:
1258 /* We support the non-activated case already */
1260 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1261 /* Values other than LBR and BTF are vendor-specific,
1262 thus reserved and should throw a #GP */
1265 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1268 case MSR_IA32_UCODE_REV:
1269 case MSR_IA32_UCODE_WRITE:
1270 case MSR_VM_HSAVE_PA:
1271 case MSR_AMD64_PATCH_LOADER:
1273 case 0x200 ... 0x2ff:
1274 return set_msr_mtrr(vcpu, msr, data);
1275 case MSR_IA32_APICBASE:
1276 kvm_set_apic_base(vcpu, data);
1278 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1279 return kvm_x2apic_msr_write(vcpu, msr, data);
1280 case MSR_IA32_MISC_ENABLE:
1281 vcpu->arch.ia32_misc_enable_msr = data;
1283 case MSR_KVM_WALL_CLOCK_NEW:
1284 case MSR_KVM_WALL_CLOCK:
1285 vcpu->kvm->arch.wall_clock = data;
1286 kvm_write_wall_clock(vcpu->kvm, data);
1288 case MSR_KVM_SYSTEM_TIME_NEW:
1289 case MSR_KVM_SYSTEM_TIME: {
1290 if (vcpu->arch.time_page) {
1291 kvm_release_page_dirty(vcpu->arch.time_page);
1292 vcpu->arch.time_page = NULL;
1295 vcpu->arch.time = data;
1297 /* we verify if the enable bit is set... */
1301 /* ...but clean it before doing the actual write */
1302 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1304 vcpu->arch.time_page =
1305 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1307 if (is_error_page(vcpu->arch.time_page)) {
1308 kvm_release_page_clean(vcpu->arch.time_page);
1309 vcpu->arch.time_page = NULL;
1312 kvm_request_guest_time_update(vcpu);
1315 case MSR_IA32_MCG_CTL:
1316 case MSR_IA32_MCG_STATUS:
1317 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1318 return set_msr_mce(vcpu, msr, data);
1320 /* Performance counters are not protected by a CPUID bit,
1321 * so we should check all of them in the generic path for the sake of
1322 * cross vendor migration.
1323 * Writing a zero into the event select MSRs disables them,
1324 * which we perfectly emulate ;-). Any other value should be at least
1325 * reported, some guests depend on them.
1327 case MSR_P6_EVNTSEL0:
1328 case MSR_P6_EVNTSEL1:
1329 case MSR_K7_EVNTSEL0:
1330 case MSR_K7_EVNTSEL1:
1331 case MSR_K7_EVNTSEL2:
1332 case MSR_K7_EVNTSEL3:
1334 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1335 "0x%x data 0x%llx\n", msr, data);
1337 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1338 * so we ignore writes to make it happy.
1340 case MSR_P6_PERFCTR0:
1341 case MSR_P6_PERFCTR1:
1342 case MSR_K7_PERFCTR0:
1343 case MSR_K7_PERFCTR1:
1344 case MSR_K7_PERFCTR2:
1345 case MSR_K7_PERFCTR3:
1346 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1347 "0x%x data 0x%llx\n", msr, data);
1349 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1350 if (kvm_hv_msr_partition_wide(msr)) {
1352 mutex_lock(&vcpu->kvm->lock);
1353 r = set_msr_hyperv_pw(vcpu, msr, data);
1354 mutex_unlock(&vcpu->kvm->lock);
1357 return set_msr_hyperv(vcpu, msr, data);
1360 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1361 return xen_hvm_config(vcpu, data);
1363 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1367 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1374 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1378 * Reads an msr value (of 'msr_index') into 'pdata'.
1379 * Returns 0 on success, non-0 otherwise.
1380 * Assumes vcpu_load() was already called.
1382 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1384 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1387 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1389 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1391 if (!msr_mtrr_valid(msr))
1394 if (msr == MSR_MTRRdefType)
1395 *pdata = vcpu->arch.mtrr_state.def_type +
1396 (vcpu->arch.mtrr_state.enabled << 10);
1397 else if (msr == MSR_MTRRfix64K_00000)
1399 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1400 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1401 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1402 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1403 else if (msr == MSR_IA32_CR_PAT)
1404 *pdata = vcpu->arch.pat;
1405 else { /* Variable MTRRs */
1406 int idx, is_mtrr_mask;
1409 idx = (msr - 0x200) / 2;
1410 is_mtrr_mask = msr - 0x200 - 2 * idx;
1413 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1416 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1423 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1426 u64 mcg_cap = vcpu->arch.mcg_cap;
1427 unsigned bank_num = mcg_cap & 0xff;
1430 case MSR_IA32_P5_MC_ADDR:
1431 case MSR_IA32_P5_MC_TYPE:
1434 case MSR_IA32_MCG_CAP:
1435 data = vcpu->arch.mcg_cap;
1437 case MSR_IA32_MCG_CTL:
1438 if (!(mcg_cap & MCG_CTL_P))
1440 data = vcpu->arch.mcg_ctl;
1442 case MSR_IA32_MCG_STATUS:
1443 data = vcpu->arch.mcg_status;
1446 if (msr >= MSR_IA32_MC0_CTL &&
1447 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1448 u32 offset = msr - MSR_IA32_MC0_CTL;
1449 data = vcpu->arch.mce_banks[offset];
1458 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1461 struct kvm *kvm = vcpu->kvm;
1464 case HV_X64_MSR_GUEST_OS_ID:
1465 data = kvm->arch.hv_guest_os_id;
1467 case HV_X64_MSR_HYPERCALL:
1468 data = kvm->arch.hv_hypercall;
1471 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1479 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1484 case HV_X64_MSR_VP_INDEX: {
1487 kvm_for_each_vcpu(r, v, vcpu->kvm)
1492 case HV_X64_MSR_EOI:
1493 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1494 case HV_X64_MSR_ICR:
1495 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1496 case HV_X64_MSR_TPR:
1497 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1499 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1506 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1511 case MSR_IA32_PLATFORM_ID:
1512 case MSR_IA32_UCODE_REV:
1513 case MSR_IA32_EBL_CR_POWERON:
1514 case MSR_IA32_DEBUGCTLMSR:
1515 case MSR_IA32_LASTBRANCHFROMIP:
1516 case MSR_IA32_LASTBRANCHTOIP:
1517 case MSR_IA32_LASTINTFROMIP:
1518 case MSR_IA32_LASTINTTOIP:
1521 case MSR_VM_HSAVE_PA:
1522 case MSR_P6_PERFCTR0:
1523 case MSR_P6_PERFCTR1:
1524 case MSR_P6_EVNTSEL0:
1525 case MSR_P6_EVNTSEL1:
1526 case MSR_K7_EVNTSEL0:
1527 case MSR_K7_PERFCTR0:
1528 case MSR_K8_INT_PENDING_MSG:
1529 case MSR_AMD64_NB_CFG:
1530 case MSR_FAM10H_MMIO_CONF_BASE:
1534 data = 0x500 | KVM_NR_VAR_MTRR;
1536 case 0x200 ... 0x2ff:
1537 return get_msr_mtrr(vcpu, msr, pdata);
1538 case 0xcd: /* fsb frequency */
1541 case MSR_IA32_APICBASE:
1542 data = kvm_get_apic_base(vcpu);
1544 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1545 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1547 case MSR_IA32_MISC_ENABLE:
1548 data = vcpu->arch.ia32_misc_enable_msr;
1550 case MSR_IA32_PERF_STATUS:
1551 /* TSC increment by tick */
1553 /* CPU multiplier */
1554 data |= (((uint64_t)4ULL) << 40);
1557 data = vcpu->arch.efer;
1559 case MSR_KVM_WALL_CLOCK:
1560 case MSR_KVM_WALL_CLOCK_NEW:
1561 data = vcpu->kvm->arch.wall_clock;
1563 case MSR_KVM_SYSTEM_TIME:
1564 case MSR_KVM_SYSTEM_TIME_NEW:
1565 data = vcpu->arch.time;
1567 case MSR_IA32_P5_MC_ADDR:
1568 case MSR_IA32_P5_MC_TYPE:
1569 case MSR_IA32_MCG_CAP:
1570 case MSR_IA32_MCG_CTL:
1571 case MSR_IA32_MCG_STATUS:
1572 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1573 return get_msr_mce(vcpu, msr, pdata);
1574 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1575 if (kvm_hv_msr_partition_wide(msr)) {
1577 mutex_lock(&vcpu->kvm->lock);
1578 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1579 mutex_unlock(&vcpu->kvm->lock);
1582 return get_msr_hyperv(vcpu, msr, pdata);
1586 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1589 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1597 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1600 * Read or write a bunch of msrs. All parameters are kernel addresses.
1602 * @return number of msrs set successfully.
1604 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1605 struct kvm_msr_entry *entries,
1606 int (*do_msr)(struct kvm_vcpu *vcpu,
1607 unsigned index, u64 *data))
1611 idx = srcu_read_lock(&vcpu->kvm->srcu);
1612 for (i = 0; i < msrs->nmsrs; ++i)
1613 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1615 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1621 * Read or write a bunch of msrs. Parameters are user addresses.
1623 * @return number of msrs set successfully.
1625 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1626 int (*do_msr)(struct kvm_vcpu *vcpu,
1627 unsigned index, u64 *data),
1630 struct kvm_msrs msrs;
1631 struct kvm_msr_entry *entries;
1636 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1640 if (msrs.nmsrs >= MAX_IO_MSRS)
1644 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1645 entries = kmalloc(size, GFP_KERNEL);
1650 if (copy_from_user(entries, user_msrs->entries, size))
1653 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1658 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1669 int kvm_dev_ioctl_check_extension(long ext)
1674 case KVM_CAP_IRQCHIP:
1676 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1677 case KVM_CAP_SET_TSS_ADDR:
1678 case KVM_CAP_EXT_CPUID:
1679 case KVM_CAP_CLOCKSOURCE:
1681 case KVM_CAP_NOP_IO_DELAY:
1682 case KVM_CAP_MP_STATE:
1683 case KVM_CAP_SYNC_MMU:
1684 case KVM_CAP_REINJECT_CONTROL:
1685 case KVM_CAP_IRQ_INJECT_STATUS:
1686 case KVM_CAP_ASSIGN_DEV_IRQ:
1688 case KVM_CAP_IOEVENTFD:
1690 case KVM_CAP_PIT_STATE2:
1691 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1692 case KVM_CAP_XEN_HVM:
1693 case KVM_CAP_ADJUST_CLOCK:
1694 case KVM_CAP_VCPU_EVENTS:
1695 case KVM_CAP_HYPERV:
1696 case KVM_CAP_HYPERV_VAPIC:
1697 case KVM_CAP_HYPERV_SPIN:
1698 case KVM_CAP_PCI_SEGMENT:
1699 case KVM_CAP_DEBUGREGS:
1700 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1704 case KVM_CAP_COALESCED_MMIO:
1705 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1708 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1710 case KVM_CAP_NR_VCPUS:
1713 case KVM_CAP_NR_MEMSLOTS:
1714 r = KVM_MEMORY_SLOTS;
1716 case KVM_CAP_PV_MMU: /* obsolete */
1723 r = KVM_MAX_MCE_BANKS;
1736 long kvm_arch_dev_ioctl(struct file *filp,
1737 unsigned int ioctl, unsigned long arg)
1739 void __user *argp = (void __user *)arg;
1743 case KVM_GET_MSR_INDEX_LIST: {
1744 struct kvm_msr_list __user *user_msr_list = argp;
1745 struct kvm_msr_list msr_list;
1749 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1752 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1753 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1756 if (n < msr_list.nmsrs)
1759 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1760 num_msrs_to_save * sizeof(u32)))
1762 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1764 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1769 case KVM_GET_SUPPORTED_CPUID: {
1770 struct kvm_cpuid2 __user *cpuid_arg = argp;
1771 struct kvm_cpuid2 cpuid;
1774 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1776 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1777 cpuid_arg->entries);
1782 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1787 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1790 mce_cap = KVM_MCE_CAP_SUPPORTED;
1792 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1804 static void wbinvd_ipi(void *garbage)
1809 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
1811 return vcpu->kvm->arch.iommu_domain &&
1812 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
1815 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1817 /* Address WBINVD may be executed by guest */
1818 if (need_emulate_wbinvd(vcpu)) {
1819 if (kvm_x86_ops->has_wbinvd_exit())
1820 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
1821 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
1822 smp_call_function_single(vcpu->cpu,
1823 wbinvd_ipi, NULL, 1);
1826 kvm_x86_ops->vcpu_load(vcpu, cpu);
1827 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1828 unsigned long khz = cpufreq_quick_get(cpu);
1831 per_cpu(cpu_tsc_khz, cpu) = khz;
1833 kvm_request_guest_time_update(vcpu);
1836 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1838 kvm_x86_ops->vcpu_put(vcpu);
1839 kvm_put_guest_fpu(vcpu);
1842 static int is_efer_nx(void)
1844 unsigned long long efer = 0;
1846 rdmsrl_safe(MSR_EFER, &efer);
1847 return efer & EFER_NX;
1850 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1853 struct kvm_cpuid_entry2 *e, *entry;
1856 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1857 e = &vcpu->arch.cpuid_entries[i];
1858 if (e->function == 0x80000001) {
1863 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1864 entry->edx &= ~(1 << 20);
1865 printk(KERN_INFO "kvm: guest NX capability removed\n");
1869 /* when an old userspace process fills a new kernel module */
1870 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1871 struct kvm_cpuid *cpuid,
1872 struct kvm_cpuid_entry __user *entries)
1875 struct kvm_cpuid_entry *cpuid_entries;
1878 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1881 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1885 if (copy_from_user(cpuid_entries, entries,
1886 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1888 for (i = 0; i < cpuid->nent; i++) {
1889 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1890 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1891 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1892 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1893 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1894 vcpu->arch.cpuid_entries[i].index = 0;
1895 vcpu->arch.cpuid_entries[i].flags = 0;
1896 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1897 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1898 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1900 vcpu->arch.cpuid_nent = cpuid->nent;
1901 cpuid_fix_nx_cap(vcpu);
1903 kvm_apic_set_version(vcpu);
1904 kvm_x86_ops->cpuid_update(vcpu);
1908 vfree(cpuid_entries);
1913 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1914 struct kvm_cpuid2 *cpuid,
1915 struct kvm_cpuid_entry2 __user *entries)
1920 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1923 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1924 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1926 vcpu->arch.cpuid_nent = cpuid->nent;
1927 kvm_apic_set_version(vcpu);
1928 kvm_x86_ops->cpuid_update(vcpu);
1936 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1937 struct kvm_cpuid2 *cpuid,
1938 struct kvm_cpuid_entry2 __user *entries)
1943 if (cpuid->nent < vcpu->arch.cpuid_nent)
1946 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1947 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1952 cpuid->nent = vcpu->arch.cpuid_nent;
1956 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1959 entry->function = function;
1960 entry->index = index;
1961 cpuid_count(entry->function, entry->index,
1962 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1966 #define F(x) bit(X86_FEATURE_##x)
1968 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1969 u32 index, int *nent, int maxnent)
1971 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1972 #ifdef CONFIG_X86_64
1973 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
1975 unsigned f_lm = F(LM);
1977 unsigned f_gbpages = 0;
1980 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1983 const u32 kvm_supported_word0_x86_features =
1984 F(FPU) | F(VME) | F(DE) | F(PSE) |
1985 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1986 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1987 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1988 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1989 0 /* Reserved, DS, ACPI */ | F(MMX) |
1990 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1991 0 /* HTT, TM, Reserved, PBE */;
1992 /* cpuid 0x80000001.edx */
1993 const u32 kvm_supported_word1_x86_features =
1994 F(FPU) | F(VME) | F(DE) | F(PSE) |
1995 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1996 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1997 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1998 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1999 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2000 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2001 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2003 const u32 kvm_supported_word4_x86_features =
2004 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2005 0 /* DS-CPL, VMX, SMX, EST */ |
2006 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2007 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2008 0 /* Reserved, DCA */ | F(XMM4_1) |
2009 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2010 0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX);
2011 /* cpuid 0x80000001.ecx */
2012 const u32 kvm_supported_word6_x86_features =
2013 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
2014 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2015 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
2016 0 /* SKINIT */ | 0 /* WDT */;
2018 /* all calls to cpuid_count() should be made on the same cpu */
2020 do_cpuid_1_ent(entry, function, index);
2025 entry->eax = min(entry->eax, (u32)0xd);
2028 entry->edx &= kvm_supported_word0_x86_features;
2029 entry->ecx &= kvm_supported_word4_x86_features;
2030 /* we support x2apic emulation even if host does not support
2031 * it since we emulate x2apic in software */
2032 entry->ecx |= F(X2APIC);
2034 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2035 * may return different values. This forces us to get_cpu() before
2036 * issuing the first command, and also to emulate this annoying behavior
2037 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2039 int t, times = entry->eax & 0xff;
2041 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2042 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2043 for (t = 1; t < times && *nent < maxnent; ++t) {
2044 do_cpuid_1_ent(&entry[t], function, 0);
2045 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2050 /* function 4 and 0xb have additional index. */
2054 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2055 /* read more entries until cache_type is zero */
2056 for (i = 1; *nent < maxnent; ++i) {
2057 cache_type = entry[i - 1].eax & 0x1f;
2060 do_cpuid_1_ent(&entry[i], function, i);
2062 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2070 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2071 /* read more entries until level_type is zero */
2072 for (i = 1; *nent < maxnent; ++i) {
2073 level_type = entry[i - 1].ecx & 0xff00;
2076 do_cpuid_1_ent(&entry[i], function, i);
2078 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2086 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2087 for (i = 1; *nent < maxnent; ++i) {
2088 if (entry[i - 1].eax == 0 && i != 2)
2090 do_cpuid_1_ent(&entry[i], function, i);
2092 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2097 case KVM_CPUID_SIGNATURE: {
2098 char signature[12] = "KVMKVMKVM\0\0";
2099 u32 *sigptr = (u32 *)signature;
2101 entry->ebx = sigptr[0];
2102 entry->ecx = sigptr[1];
2103 entry->edx = sigptr[2];
2106 case KVM_CPUID_FEATURES:
2107 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2108 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2109 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2110 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2116 entry->eax = min(entry->eax, 0x8000001a);
2119 entry->edx &= kvm_supported_word1_x86_features;
2120 entry->ecx &= kvm_supported_word6_x86_features;
2124 kvm_x86_ops->set_supported_cpuid(function, entry);
2131 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2132 struct kvm_cpuid_entry2 __user *entries)
2134 struct kvm_cpuid_entry2 *cpuid_entries;
2135 int limit, nent = 0, r = -E2BIG;
2138 if (cpuid->nent < 1)
2140 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2141 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2143 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2147 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2148 limit = cpuid_entries[0].eax;
2149 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2150 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2151 &nent, cpuid->nent);
2153 if (nent >= cpuid->nent)
2156 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2157 limit = cpuid_entries[nent - 1].eax;
2158 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2159 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2160 &nent, cpuid->nent);
2165 if (nent >= cpuid->nent)
2168 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2172 if (nent >= cpuid->nent)
2175 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2179 if (nent >= cpuid->nent)
2183 if (copy_to_user(entries, cpuid_entries,
2184 nent * sizeof(struct kvm_cpuid_entry2)))
2190 vfree(cpuid_entries);
2195 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2196 struct kvm_lapic_state *s)
2198 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2203 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2204 struct kvm_lapic_state *s)
2206 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2207 kvm_apic_post_state_restore(vcpu);
2208 update_cr8_intercept(vcpu);
2213 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2214 struct kvm_interrupt *irq)
2216 if (irq->irq < 0 || irq->irq >= 256)
2218 if (irqchip_in_kernel(vcpu->kvm))
2221 kvm_queue_interrupt(vcpu, irq->irq, false);
2226 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2228 kvm_inject_nmi(vcpu);
2233 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2234 struct kvm_tpr_access_ctl *tac)
2238 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2242 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2246 unsigned bank_num = mcg_cap & 0xff, bank;
2249 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2251 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2254 vcpu->arch.mcg_cap = mcg_cap;
2255 /* Init IA32_MCG_CTL to all 1s */
2256 if (mcg_cap & MCG_CTL_P)
2257 vcpu->arch.mcg_ctl = ~(u64)0;
2258 /* Init IA32_MCi_CTL to all 1s */
2259 for (bank = 0; bank < bank_num; bank++)
2260 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2265 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2266 struct kvm_x86_mce *mce)
2268 u64 mcg_cap = vcpu->arch.mcg_cap;
2269 unsigned bank_num = mcg_cap & 0xff;
2270 u64 *banks = vcpu->arch.mce_banks;
2272 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2275 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2276 * reporting is disabled
2278 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2279 vcpu->arch.mcg_ctl != ~(u64)0)
2281 banks += 4 * mce->bank;
2283 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2284 * reporting is disabled for the bank
2286 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2288 if (mce->status & MCI_STATUS_UC) {
2289 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2290 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2291 printk(KERN_DEBUG "kvm: set_mce: "
2292 "injects mce exception while "
2293 "previous one is in progress!\n");
2294 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2297 if (banks[1] & MCI_STATUS_VAL)
2298 mce->status |= MCI_STATUS_OVER;
2299 banks[2] = mce->addr;
2300 banks[3] = mce->misc;
2301 vcpu->arch.mcg_status = mce->mcg_status;
2302 banks[1] = mce->status;
2303 kvm_queue_exception(vcpu, MC_VECTOR);
2304 } else if (!(banks[1] & MCI_STATUS_VAL)
2305 || !(banks[1] & MCI_STATUS_UC)) {
2306 if (banks[1] & MCI_STATUS_VAL)
2307 mce->status |= MCI_STATUS_OVER;
2308 banks[2] = mce->addr;
2309 banks[3] = mce->misc;
2310 banks[1] = mce->status;
2312 banks[1] |= MCI_STATUS_OVER;
2316 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2317 struct kvm_vcpu_events *events)
2319 events->exception.injected =
2320 vcpu->arch.exception.pending &&
2321 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2322 events->exception.nr = vcpu->arch.exception.nr;
2323 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2324 events->exception.error_code = vcpu->arch.exception.error_code;
2326 events->interrupt.injected =
2327 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2328 events->interrupt.nr = vcpu->arch.interrupt.nr;
2329 events->interrupt.soft = 0;
2330 events->interrupt.shadow =
2331 kvm_x86_ops->get_interrupt_shadow(vcpu,
2332 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2334 events->nmi.injected = vcpu->arch.nmi_injected;
2335 events->nmi.pending = vcpu->arch.nmi_pending;
2336 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2338 events->sipi_vector = vcpu->arch.sipi_vector;
2340 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2341 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2342 | KVM_VCPUEVENT_VALID_SHADOW);
2345 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2346 struct kvm_vcpu_events *events)
2348 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2349 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2350 | KVM_VCPUEVENT_VALID_SHADOW))
2353 vcpu->arch.exception.pending = events->exception.injected;
2354 vcpu->arch.exception.nr = events->exception.nr;
2355 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2356 vcpu->arch.exception.error_code = events->exception.error_code;
2358 vcpu->arch.interrupt.pending = events->interrupt.injected;
2359 vcpu->arch.interrupt.nr = events->interrupt.nr;
2360 vcpu->arch.interrupt.soft = events->interrupt.soft;
2361 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2362 kvm_pic_clear_isr_ack(vcpu->kvm);
2363 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2364 kvm_x86_ops->set_interrupt_shadow(vcpu,
2365 events->interrupt.shadow);
2367 vcpu->arch.nmi_injected = events->nmi.injected;
2368 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2369 vcpu->arch.nmi_pending = events->nmi.pending;
2370 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2372 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2373 vcpu->arch.sipi_vector = events->sipi_vector;
2378 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2379 struct kvm_debugregs *dbgregs)
2381 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2382 dbgregs->dr6 = vcpu->arch.dr6;
2383 dbgregs->dr7 = vcpu->arch.dr7;
2387 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2388 struct kvm_debugregs *dbgregs)
2393 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2394 vcpu->arch.dr6 = dbgregs->dr6;
2395 vcpu->arch.dr7 = dbgregs->dr7;
2400 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2401 struct kvm_xsave *guest_xsave)
2404 memcpy(guest_xsave->region,
2405 &vcpu->arch.guest_fpu.state->xsave,
2408 memcpy(guest_xsave->region,
2409 &vcpu->arch.guest_fpu.state->fxsave,
2410 sizeof(struct i387_fxsave_struct));
2411 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2416 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2417 struct kvm_xsave *guest_xsave)
2420 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2423 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2424 guest_xsave->region, xstate_size);
2426 if (xstate_bv & ~XSTATE_FPSSE)
2428 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2429 guest_xsave->region, sizeof(struct i387_fxsave_struct));
2434 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2435 struct kvm_xcrs *guest_xcrs)
2437 if (!cpu_has_xsave) {
2438 guest_xcrs->nr_xcrs = 0;
2442 guest_xcrs->nr_xcrs = 1;
2443 guest_xcrs->flags = 0;
2444 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2445 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2448 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2449 struct kvm_xcrs *guest_xcrs)
2456 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2459 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2460 /* Only support XCR0 currently */
2461 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2462 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2463 guest_xcrs->xcrs[0].value);
2471 long kvm_arch_vcpu_ioctl(struct file *filp,
2472 unsigned int ioctl, unsigned long arg)
2474 struct kvm_vcpu *vcpu = filp->private_data;
2475 void __user *argp = (void __user *)arg;
2478 struct kvm_lapic_state *lapic;
2479 struct kvm_xsave *xsave;
2480 struct kvm_xcrs *xcrs;
2486 case KVM_GET_LAPIC: {
2488 if (!vcpu->arch.apic)
2490 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2495 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2499 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2504 case KVM_SET_LAPIC: {
2506 if (!vcpu->arch.apic)
2508 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2513 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2515 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2521 case KVM_INTERRUPT: {
2522 struct kvm_interrupt irq;
2525 if (copy_from_user(&irq, argp, sizeof irq))
2527 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2534 r = kvm_vcpu_ioctl_nmi(vcpu);
2540 case KVM_SET_CPUID: {
2541 struct kvm_cpuid __user *cpuid_arg = argp;
2542 struct kvm_cpuid cpuid;
2545 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2547 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2552 case KVM_SET_CPUID2: {
2553 struct kvm_cpuid2 __user *cpuid_arg = argp;
2554 struct kvm_cpuid2 cpuid;
2557 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2559 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2560 cpuid_arg->entries);
2565 case KVM_GET_CPUID2: {
2566 struct kvm_cpuid2 __user *cpuid_arg = argp;
2567 struct kvm_cpuid2 cpuid;
2570 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2572 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2573 cpuid_arg->entries);
2577 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2583 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2586 r = msr_io(vcpu, argp, do_set_msr, 0);
2588 case KVM_TPR_ACCESS_REPORTING: {
2589 struct kvm_tpr_access_ctl tac;
2592 if (copy_from_user(&tac, argp, sizeof tac))
2594 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2598 if (copy_to_user(argp, &tac, sizeof tac))
2603 case KVM_SET_VAPIC_ADDR: {
2604 struct kvm_vapic_addr va;
2607 if (!irqchip_in_kernel(vcpu->kvm))
2610 if (copy_from_user(&va, argp, sizeof va))
2613 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2616 case KVM_X86_SETUP_MCE: {
2620 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2622 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2625 case KVM_X86_SET_MCE: {
2626 struct kvm_x86_mce mce;
2629 if (copy_from_user(&mce, argp, sizeof mce))
2631 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2634 case KVM_GET_VCPU_EVENTS: {
2635 struct kvm_vcpu_events events;
2637 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2640 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2645 case KVM_SET_VCPU_EVENTS: {
2646 struct kvm_vcpu_events events;
2649 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2652 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2655 case KVM_GET_DEBUGREGS: {
2656 struct kvm_debugregs dbgregs;
2658 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2661 if (copy_to_user(argp, &dbgregs,
2662 sizeof(struct kvm_debugregs)))
2667 case KVM_SET_DEBUGREGS: {
2668 struct kvm_debugregs dbgregs;
2671 if (copy_from_user(&dbgregs, argp,
2672 sizeof(struct kvm_debugregs)))
2675 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2678 case KVM_GET_XSAVE: {
2679 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2684 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2687 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2692 case KVM_SET_XSAVE: {
2693 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2699 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2702 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2705 case KVM_GET_XCRS: {
2706 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2711 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2714 if (copy_to_user(argp, u.xcrs,
2715 sizeof(struct kvm_xcrs)))
2720 case KVM_SET_XCRS: {
2721 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2727 if (copy_from_user(u.xcrs, argp,
2728 sizeof(struct kvm_xcrs)))
2731 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2742 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2746 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2748 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2752 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2755 kvm->arch.ept_identity_map_addr = ident_addr;
2759 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2760 u32 kvm_nr_mmu_pages)
2762 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2765 mutex_lock(&kvm->slots_lock);
2766 spin_lock(&kvm->mmu_lock);
2768 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2769 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2771 spin_unlock(&kvm->mmu_lock);
2772 mutex_unlock(&kvm->slots_lock);
2776 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2778 return kvm->arch.n_max_mmu_pages;
2781 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2786 switch (chip->chip_id) {
2787 case KVM_IRQCHIP_PIC_MASTER:
2788 memcpy(&chip->chip.pic,
2789 &pic_irqchip(kvm)->pics[0],
2790 sizeof(struct kvm_pic_state));
2792 case KVM_IRQCHIP_PIC_SLAVE:
2793 memcpy(&chip->chip.pic,
2794 &pic_irqchip(kvm)->pics[1],
2795 sizeof(struct kvm_pic_state));
2797 case KVM_IRQCHIP_IOAPIC:
2798 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2807 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2812 switch (chip->chip_id) {
2813 case KVM_IRQCHIP_PIC_MASTER:
2814 raw_spin_lock(&pic_irqchip(kvm)->lock);
2815 memcpy(&pic_irqchip(kvm)->pics[0],
2817 sizeof(struct kvm_pic_state));
2818 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2820 case KVM_IRQCHIP_PIC_SLAVE:
2821 raw_spin_lock(&pic_irqchip(kvm)->lock);
2822 memcpy(&pic_irqchip(kvm)->pics[1],
2824 sizeof(struct kvm_pic_state));
2825 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2827 case KVM_IRQCHIP_IOAPIC:
2828 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2834 kvm_pic_update_irq(pic_irqchip(kvm));
2838 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2842 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2843 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2844 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2848 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2852 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2853 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2854 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2855 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2859 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2863 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2864 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2865 sizeof(ps->channels));
2866 ps->flags = kvm->arch.vpit->pit_state.flags;
2867 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2871 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2873 int r = 0, start = 0;
2874 u32 prev_legacy, cur_legacy;
2875 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2876 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2877 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2878 if (!prev_legacy && cur_legacy)
2880 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2881 sizeof(kvm->arch.vpit->pit_state.channels));
2882 kvm->arch.vpit->pit_state.flags = ps->flags;
2883 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2884 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2888 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2889 struct kvm_reinject_control *control)
2891 if (!kvm->arch.vpit)
2893 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2894 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2895 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2900 * Get (and clear) the dirty memory log for a memory slot.
2902 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2903 struct kvm_dirty_log *log)
2906 struct kvm_memory_slot *memslot;
2908 unsigned long is_dirty = 0;
2910 mutex_lock(&kvm->slots_lock);
2913 if (log->slot >= KVM_MEMORY_SLOTS)
2916 memslot = &kvm->memslots->memslots[log->slot];
2918 if (!memslot->dirty_bitmap)
2921 n = kvm_dirty_bitmap_bytes(memslot);
2923 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2924 is_dirty = memslot->dirty_bitmap[i];
2926 /* If nothing is dirty, don't bother messing with page tables. */
2928 struct kvm_memslots *slots, *old_slots;
2929 unsigned long *dirty_bitmap;
2931 spin_lock(&kvm->mmu_lock);
2932 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2933 spin_unlock(&kvm->mmu_lock);
2936 dirty_bitmap = vmalloc(n);
2939 memset(dirty_bitmap, 0, n);
2942 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2944 vfree(dirty_bitmap);
2947 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2948 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2950 old_slots = kvm->memslots;
2951 rcu_assign_pointer(kvm->memslots, slots);
2952 synchronize_srcu_expedited(&kvm->srcu);
2953 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
2957 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
2958 vfree(dirty_bitmap);
2961 vfree(dirty_bitmap);
2964 if (clear_user(log->dirty_bitmap, n))
2970 mutex_unlock(&kvm->slots_lock);
2974 long kvm_arch_vm_ioctl(struct file *filp,
2975 unsigned int ioctl, unsigned long arg)
2977 struct kvm *kvm = filp->private_data;
2978 void __user *argp = (void __user *)arg;
2981 * This union makes it completely explicit to gcc-3.x
2982 * that these two variables' stack usage should be
2983 * combined, not added together.
2986 struct kvm_pit_state ps;
2987 struct kvm_pit_state2 ps2;
2988 struct kvm_pit_config pit_config;
2992 case KVM_SET_TSS_ADDR:
2993 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2997 case KVM_SET_IDENTITY_MAP_ADDR: {
3001 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3003 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3008 case KVM_SET_NR_MMU_PAGES:
3009 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3013 case KVM_GET_NR_MMU_PAGES:
3014 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3016 case KVM_CREATE_IRQCHIP: {
3017 struct kvm_pic *vpic;
3019 mutex_lock(&kvm->lock);
3022 goto create_irqchip_unlock;
3024 vpic = kvm_create_pic(kvm);
3026 r = kvm_ioapic_init(kvm);
3028 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3031 goto create_irqchip_unlock;
3034 goto create_irqchip_unlock;
3036 kvm->arch.vpic = vpic;
3038 r = kvm_setup_default_irq_routing(kvm);
3040 mutex_lock(&kvm->irq_lock);
3041 kvm_ioapic_destroy(kvm);
3042 kvm_destroy_pic(kvm);
3043 mutex_unlock(&kvm->irq_lock);
3045 create_irqchip_unlock:
3046 mutex_unlock(&kvm->lock);
3049 case KVM_CREATE_PIT:
3050 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3052 case KVM_CREATE_PIT2:
3054 if (copy_from_user(&u.pit_config, argp,
3055 sizeof(struct kvm_pit_config)))
3058 mutex_lock(&kvm->slots_lock);
3061 goto create_pit_unlock;
3063 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3067 mutex_unlock(&kvm->slots_lock);
3069 case KVM_IRQ_LINE_STATUS:
3070 case KVM_IRQ_LINE: {
3071 struct kvm_irq_level irq_event;
3074 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3077 if (irqchip_in_kernel(kvm)) {
3079 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3080 irq_event.irq, irq_event.level);
3081 if (ioctl == KVM_IRQ_LINE_STATUS) {
3083 irq_event.status = status;
3084 if (copy_to_user(argp, &irq_event,
3092 case KVM_GET_IRQCHIP: {
3093 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3094 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3100 if (copy_from_user(chip, argp, sizeof *chip))
3101 goto get_irqchip_out;
3103 if (!irqchip_in_kernel(kvm))
3104 goto get_irqchip_out;
3105 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3107 goto get_irqchip_out;
3109 if (copy_to_user(argp, chip, sizeof *chip))
3110 goto get_irqchip_out;
3118 case KVM_SET_IRQCHIP: {
3119 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3120 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3126 if (copy_from_user(chip, argp, sizeof *chip))
3127 goto set_irqchip_out;
3129 if (!irqchip_in_kernel(kvm))
3130 goto set_irqchip_out;
3131 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3133 goto set_irqchip_out;
3143 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3146 if (!kvm->arch.vpit)
3148 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3152 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3159 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3162 if (!kvm->arch.vpit)
3164 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3170 case KVM_GET_PIT2: {
3172 if (!kvm->arch.vpit)
3174 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3178 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3183 case KVM_SET_PIT2: {
3185 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3188 if (!kvm->arch.vpit)
3190 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3196 case KVM_REINJECT_CONTROL: {
3197 struct kvm_reinject_control control;
3199 if (copy_from_user(&control, argp, sizeof(control)))
3201 r = kvm_vm_ioctl_reinject(kvm, &control);
3207 case KVM_XEN_HVM_CONFIG: {
3209 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3210 sizeof(struct kvm_xen_hvm_config)))
3213 if (kvm->arch.xen_hvm_config.flags)
3218 case KVM_SET_CLOCK: {
3219 struct timespec now;
3220 struct kvm_clock_data user_ns;
3225 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3234 now_ns = timespec_to_ns(&now);
3235 delta = user_ns.clock - now_ns;
3236 kvm->arch.kvmclock_offset = delta;
3239 case KVM_GET_CLOCK: {
3240 struct timespec now;
3241 struct kvm_clock_data user_ns;
3245 now_ns = timespec_to_ns(&now);
3246 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3250 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3263 static void kvm_init_msr_list(void)
3268 /* skip the first msrs in the list. KVM-specific */
3269 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3270 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3273 msrs_to_save[j] = msrs_to_save[i];
3276 num_msrs_to_save = j;
3279 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3282 if (vcpu->arch.apic &&
3283 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3286 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3289 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3291 if (vcpu->arch.apic &&
3292 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3295 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3298 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3299 struct kvm_segment *var, int seg)
3301 kvm_x86_ops->set_segment(vcpu, var, seg);
3304 void kvm_get_segment(struct kvm_vcpu *vcpu,
3305 struct kvm_segment *var, int seg)
3307 kvm_x86_ops->get_segment(vcpu, var, seg);
3310 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3312 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3313 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3316 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3318 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3319 access |= PFERR_FETCH_MASK;
3320 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3323 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3325 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3326 access |= PFERR_WRITE_MASK;
3327 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3330 /* uses this to access any guest's mapped memory without checking CPL */
3331 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3333 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3336 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3337 struct kvm_vcpu *vcpu, u32 access,
3341 int r = X86EMUL_CONTINUE;
3344 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3345 unsigned offset = addr & (PAGE_SIZE-1);
3346 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3349 if (gpa == UNMAPPED_GVA) {
3350 r = X86EMUL_PROPAGATE_FAULT;
3353 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3355 r = X86EMUL_IO_NEEDED;
3367 /* used for instruction fetching */
3368 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3369 struct kvm_vcpu *vcpu, u32 *error)
3371 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3372 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3373 access | PFERR_FETCH_MASK, error);
3376 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3377 struct kvm_vcpu *vcpu, u32 *error)
3379 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3380 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3384 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3385 struct kvm_vcpu *vcpu, u32 *error)
3387 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3390 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3392 struct kvm_vcpu *vcpu,
3396 int r = X86EMUL_CONTINUE;
3399 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr,
3400 PFERR_WRITE_MASK, error);
3401 unsigned offset = addr & (PAGE_SIZE-1);
3402 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3405 if (gpa == UNMAPPED_GVA) {
3406 r = X86EMUL_PROPAGATE_FAULT;
3409 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3411 r = X86EMUL_IO_NEEDED;
3423 static int emulator_read_emulated(unsigned long addr,
3426 unsigned int *error_code,
3427 struct kvm_vcpu *vcpu)
3431 if (vcpu->mmio_read_completed) {
3432 memcpy(val, vcpu->mmio_data, bytes);
3433 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3434 vcpu->mmio_phys_addr, *(u64 *)val);
3435 vcpu->mmio_read_completed = 0;
3436 return X86EMUL_CONTINUE;
3439 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3441 if (gpa == UNMAPPED_GVA)
3442 return X86EMUL_PROPAGATE_FAULT;
3444 /* For APIC access vmexit */
3445 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3448 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3449 == X86EMUL_CONTINUE)
3450 return X86EMUL_CONTINUE;
3454 * Is this MMIO handled locally?
3456 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3457 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3458 return X86EMUL_CONTINUE;
3461 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3463 vcpu->mmio_needed = 1;
3464 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3465 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3466 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3467 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3469 return X86EMUL_IO_NEEDED;
3472 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3473 const void *val, int bytes)
3477 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3480 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3484 static int emulator_write_emulated_onepage(unsigned long addr,
3487 unsigned int *error_code,
3488 struct kvm_vcpu *vcpu)
3492 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3494 if (gpa == UNMAPPED_GVA)
3495 return X86EMUL_PROPAGATE_FAULT;
3497 /* For APIC access vmexit */
3498 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3501 if (emulator_write_phys(vcpu, gpa, val, bytes))
3502 return X86EMUL_CONTINUE;
3505 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3507 * Is this MMIO handled locally?
3509 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3510 return X86EMUL_CONTINUE;
3512 vcpu->mmio_needed = 1;
3513 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3514 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3515 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3516 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3517 memcpy(vcpu->run->mmio.data, val, bytes);
3519 return X86EMUL_CONTINUE;
3522 int emulator_write_emulated(unsigned long addr,
3525 unsigned int *error_code,
3526 struct kvm_vcpu *vcpu)
3528 /* Crossing a page boundary? */
3529 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3532 now = -addr & ~PAGE_MASK;
3533 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3535 if (rc != X86EMUL_CONTINUE)
3541 return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3545 #define CMPXCHG_TYPE(t, ptr, old, new) \
3546 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3548 #ifdef CONFIG_X86_64
3549 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3551 # define CMPXCHG64(ptr, old, new) \
3552 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3555 static int emulator_cmpxchg_emulated(unsigned long addr,
3559 unsigned int *error_code,
3560 struct kvm_vcpu *vcpu)
3567 /* guests cmpxchg8b have to be emulated atomically */
3568 if (bytes > 8 || (bytes & (bytes - 1)))
3571 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3573 if (gpa == UNMAPPED_GVA ||
3574 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3577 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3580 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3581 if (is_error_page(page)) {
3582 kvm_release_page_clean(page);
3586 kaddr = kmap_atomic(page, KM_USER0);
3587 kaddr += offset_in_page(gpa);
3590 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3593 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3596 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3599 exchanged = CMPXCHG64(kaddr, old, new);
3604 kunmap_atomic(kaddr, KM_USER0);
3605 kvm_release_page_dirty(page);
3608 return X86EMUL_CMPXCHG_FAILED;
3610 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3612 return X86EMUL_CONTINUE;
3615 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3617 return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3620 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3622 /* TODO: String I/O for in kernel device */
3625 if (vcpu->arch.pio.in)
3626 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3627 vcpu->arch.pio.size, pd);
3629 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3630 vcpu->arch.pio.port, vcpu->arch.pio.size,
3636 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3637 unsigned int count, struct kvm_vcpu *vcpu)
3639 if (vcpu->arch.pio.count)
3642 trace_kvm_pio(1, port, size, 1);
3644 vcpu->arch.pio.port = port;
3645 vcpu->arch.pio.in = 1;
3646 vcpu->arch.pio.count = count;
3647 vcpu->arch.pio.size = size;
3649 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3651 memcpy(val, vcpu->arch.pio_data, size * count);
3652 vcpu->arch.pio.count = 0;
3656 vcpu->run->exit_reason = KVM_EXIT_IO;
3657 vcpu->run->io.direction = KVM_EXIT_IO_IN;
3658 vcpu->run->io.size = size;
3659 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3660 vcpu->run->io.count = count;
3661 vcpu->run->io.port = port;
3666 static int emulator_pio_out_emulated(int size, unsigned short port,
3667 const void *val, unsigned int count,
3668 struct kvm_vcpu *vcpu)
3670 trace_kvm_pio(0, port, size, 1);
3672 vcpu->arch.pio.port = port;
3673 vcpu->arch.pio.in = 0;
3674 vcpu->arch.pio.count = count;
3675 vcpu->arch.pio.size = size;
3677 memcpy(vcpu->arch.pio_data, val, size * count);
3679 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3680 vcpu->arch.pio.count = 0;
3684 vcpu->run->exit_reason = KVM_EXIT_IO;
3685 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3686 vcpu->run->io.size = size;
3687 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3688 vcpu->run->io.count = count;
3689 vcpu->run->io.port = port;
3694 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3696 return kvm_x86_ops->get_segment_base(vcpu, seg);
3699 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3701 kvm_mmu_invlpg(vcpu, address);
3702 return X86EMUL_CONTINUE;
3705 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3707 if (!need_emulate_wbinvd(vcpu))
3708 return X86EMUL_CONTINUE;
3710 if (kvm_x86_ops->has_wbinvd_exit()) {
3711 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3712 wbinvd_ipi, NULL, 1);
3713 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3716 return X86EMUL_CONTINUE;
3718 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3720 int emulate_clts(struct kvm_vcpu *vcpu)
3722 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3723 kvm_x86_ops->fpu_activate(vcpu);
3724 return X86EMUL_CONTINUE;
3727 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3729 return _kvm_get_dr(vcpu, dr, dest);
3732 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3735 return __kvm_set_dr(vcpu, dr, value);
3738 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3740 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3743 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3745 unsigned long value;
3749 value = kvm_read_cr0(vcpu);
3752 value = vcpu->arch.cr2;
3755 value = vcpu->arch.cr3;
3758 value = kvm_read_cr4(vcpu);
3761 value = kvm_get_cr8(vcpu);
3764 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3771 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3777 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3780 vcpu->arch.cr2 = val;
3783 res = kvm_set_cr3(vcpu, val);
3786 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3789 res = __kvm_set_cr8(vcpu, val & 0xfUL);
3792 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3799 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
3801 return kvm_x86_ops->get_cpl(vcpu);
3804 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3806 kvm_x86_ops->get_gdt(vcpu, dt);
3809 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3811 kvm_x86_ops->get_idt(vcpu, dt);
3814 static unsigned long emulator_get_cached_segment_base(int seg,
3815 struct kvm_vcpu *vcpu)
3817 return get_segment_base(vcpu, seg);
3820 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
3821 struct kvm_vcpu *vcpu)
3823 struct kvm_segment var;
3825 kvm_get_segment(vcpu, &var, seg);
3832 set_desc_limit(desc, var.limit);
3833 set_desc_base(desc, (unsigned long)var.base);
3834 desc->type = var.type;
3836 desc->dpl = var.dpl;
3837 desc->p = var.present;
3838 desc->avl = var.avl;
3846 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
3847 struct kvm_vcpu *vcpu)
3849 struct kvm_segment var;
3851 /* needed to preserve selector */
3852 kvm_get_segment(vcpu, &var, seg);
3854 var.base = get_desc_base(desc);
3855 var.limit = get_desc_limit(desc);
3857 var.limit = (var.limit << 12) | 0xfff;
3858 var.type = desc->type;
3859 var.present = desc->p;
3860 var.dpl = desc->dpl;
3865 var.avl = desc->avl;
3866 var.present = desc->p;
3867 var.unusable = !var.present;
3870 kvm_set_segment(vcpu, &var, seg);
3874 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
3876 struct kvm_segment kvm_seg;
3878 kvm_get_segment(vcpu, &kvm_seg, seg);
3879 return kvm_seg.selector;
3882 static void emulator_set_segment_selector(u16 sel, int seg,
3883 struct kvm_vcpu *vcpu)
3885 struct kvm_segment kvm_seg;
3887 kvm_get_segment(vcpu, &kvm_seg, seg);
3888 kvm_seg.selector = sel;
3889 kvm_set_segment(vcpu, &kvm_seg, seg);
3892 static struct x86_emulate_ops emulate_ops = {
3893 .read_std = kvm_read_guest_virt_system,
3894 .write_std = kvm_write_guest_virt_system,
3895 .fetch = kvm_fetch_guest_virt,
3896 .read_emulated = emulator_read_emulated,
3897 .write_emulated = emulator_write_emulated,
3898 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3899 .pio_in_emulated = emulator_pio_in_emulated,
3900 .pio_out_emulated = emulator_pio_out_emulated,
3901 .get_cached_descriptor = emulator_get_cached_descriptor,
3902 .set_cached_descriptor = emulator_set_cached_descriptor,
3903 .get_segment_selector = emulator_get_segment_selector,
3904 .set_segment_selector = emulator_set_segment_selector,
3905 .get_cached_segment_base = emulator_get_cached_segment_base,
3906 .get_gdt = emulator_get_gdt,
3907 .get_idt = emulator_get_idt,
3908 .get_cr = emulator_get_cr,
3909 .set_cr = emulator_set_cr,
3910 .cpl = emulator_get_cpl,
3911 .get_dr = emulator_get_dr,
3912 .set_dr = emulator_set_dr,
3913 .set_msr = kvm_set_msr,
3914 .get_msr = kvm_get_msr,
3917 static void cache_all_regs(struct kvm_vcpu *vcpu)
3919 kvm_register_read(vcpu, VCPU_REGS_RAX);
3920 kvm_register_read(vcpu, VCPU_REGS_RSP);
3921 kvm_register_read(vcpu, VCPU_REGS_RIP);
3922 vcpu->arch.regs_dirty = ~0;
3925 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
3927 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
3929 * an sti; sti; sequence only disable interrupts for the first
3930 * instruction. So, if the last instruction, be it emulated or
3931 * not, left the system with the INT_STI flag enabled, it
3932 * means that the last instruction is an sti. We should not
3933 * leave the flag on in this case. The same goes for mov ss
3935 if (!(int_shadow & mask))
3936 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
3939 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
3941 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
3942 if (ctxt->exception == PF_VECTOR)
3943 kvm_inject_page_fault(vcpu, ctxt->cr2, ctxt->error_code);
3944 else if (ctxt->error_code_valid)
3945 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
3947 kvm_queue_exception(vcpu, ctxt->exception);
3950 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
3952 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
3955 cache_all_regs(vcpu);
3957 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3959 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3960 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
3961 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
3962 vcpu->arch.emulate_ctxt.mode =
3963 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
3964 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3965 ? X86EMUL_MODE_VM86 : cs_l
3966 ? X86EMUL_MODE_PROT64 : cs_db
3967 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3968 memset(c, 0, sizeof(struct decode_cache));
3969 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
3972 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
3974 ++vcpu->stat.insn_emulation_fail;
3975 trace_kvm_emulate_insn_failed(vcpu);
3976 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
3977 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
3978 vcpu->run->internal.ndata = 0;
3979 kvm_queue_exception(vcpu, UD_VECTOR);
3980 return EMULATE_FAIL;
3983 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
3991 * if emulation was due to access to shadowed page table
3992 * and it failed try to unshadow page and re-entetr the
3993 * guest to let CPU execute the instruction.
3995 if (kvm_mmu_unprotect_page_virt(vcpu, gva))
3998 gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4000 if (gpa == UNMAPPED_GVA)
4001 return true; /* let cpu generate fault */
4003 if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4009 int emulate_instruction(struct kvm_vcpu *vcpu,
4015 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4017 kvm_clear_exception_queue(vcpu);
4018 vcpu->arch.mmio_fault_cr2 = cr2;
4020 * TODO: fix emulate.c to use guest_read/write_register
4021 * instead of direct ->regs accesses, can save hundred cycles
4022 * on Intel for instructions that don't read/change RSP, for
4025 cache_all_regs(vcpu);
4027 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4028 init_emulate_ctxt(vcpu);
4029 vcpu->arch.emulate_ctxt.interruptibility = 0;
4030 vcpu->arch.emulate_ctxt.exception = -1;
4031 vcpu->arch.emulate_ctxt.perm_ok = false;
4033 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4034 trace_kvm_emulate_insn_start(vcpu);
4036 /* Only allow emulation of specific instructions on #UD
4037 * (namely VMMCALL, sysenter, sysexit, syscall)*/
4038 if (emulation_type & EMULTYPE_TRAP_UD) {
4040 return EMULATE_FAIL;
4042 case 0x01: /* VMMCALL */
4043 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4044 return EMULATE_FAIL;
4046 case 0x34: /* sysenter */
4047 case 0x35: /* sysexit */
4048 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4049 return EMULATE_FAIL;
4051 case 0x05: /* syscall */
4052 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4053 return EMULATE_FAIL;
4056 return EMULATE_FAIL;
4059 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4060 return EMULATE_FAIL;
4063 ++vcpu->stat.insn_emulation;
4065 if (reexecute_instruction(vcpu, cr2))
4066 return EMULATE_DONE;
4067 if (emulation_type & EMULTYPE_SKIP)
4068 return EMULATE_FAIL;
4069 return handle_emulation_failure(vcpu);
4073 if (emulation_type & EMULTYPE_SKIP) {
4074 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4075 return EMULATE_DONE;
4078 /* this is needed for vmware backdor interface to work since it
4079 changes registers values during IO operation */
4080 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4083 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4085 if (r) { /* emulation failed */
4086 if (reexecute_instruction(vcpu, cr2))
4087 return EMULATE_DONE;
4089 return handle_emulation_failure(vcpu);
4094 if (vcpu->arch.emulate_ctxt.exception >= 0)
4095 inject_emulated_exception(vcpu);
4096 else if (vcpu->arch.pio.count) {
4097 if (!vcpu->arch.pio.in)
4098 vcpu->arch.pio.count = 0;
4099 r = EMULATE_DO_MMIO;
4100 } else if (vcpu->mmio_needed) {
4101 if (vcpu->mmio_is_write)
4102 vcpu->mmio_needed = 0;
4103 r = EMULATE_DO_MMIO;
4104 } else if (vcpu->arch.emulate_ctxt.restart)
4107 toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4108 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4109 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4110 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4114 EXPORT_SYMBOL_GPL(emulate_instruction);
4116 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4118 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4119 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4120 /* do not return to emulator after return from userspace */
4121 vcpu->arch.pio.count = 0;
4124 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4126 static void bounce_off(void *info)
4131 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4134 struct cpufreq_freqs *freq = data;
4136 struct kvm_vcpu *vcpu;
4137 int i, send_ipi = 0;
4139 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4141 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4143 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
4145 spin_lock(&kvm_lock);
4146 list_for_each_entry(kvm, &vm_list, vm_list) {
4147 kvm_for_each_vcpu(i, vcpu, kvm) {
4148 if (vcpu->cpu != freq->cpu)
4150 if (!kvm_request_guest_time_update(vcpu))
4152 if (vcpu->cpu != smp_processor_id())
4156 spin_unlock(&kvm_lock);
4158 if (freq->old < freq->new && send_ipi) {
4160 * We upscale the frequency. Must make the guest
4161 * doesn't see old kvmclock values while running with
4162 * the new frequency, otherwise we risk the guest sees
4163 * time go backwards.
4165 * In case we update the frequency for another cpu
4166 * (which might be in guest context) send an interrupt
4167 * to kick the cpu out of guest context. Next time
4168 * guest context is entered kvmclock will be updated,
4169 * so the guest will not see stale values.
4171 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
4176 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4177 .notifier_call = kvmclock_cpufreq_notifier
4180 static void kvm_timer_init(void)
4184 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4185 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4186 CPUFREQ_TRANSITION_NOTIFIER);
4187 for_each_online_cpu(cpu) {
4188 unsigned long khz = cpufreq_get(cpu);
4191 per_cpu(cpu_tsc_khz, cpu) = khz;
4194 for_each_possible_cpu(cpu)
4195 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
4199 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4201 static int kvm_is_in_guest(void)
4203 return percpu_read(current_vcpu) != NULL;
4206 static int kvm_is_user_mode(void)
4210 if (percpu_read(current_vcpu))
4211 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4213 return user_mode != 0;
4216 static unsigned long kvm_get_guest_ip(void)
4218 unsigned long ip = 0;
4220 if (percpu_read(current_vcpu))
4221 ip = kvm_rip_read(percpu_read(current_vcpu));
4226 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4227 .is_in_guest = kvm_is_in_guest,
4228 .is_user_mode = kvm_is_user_mode,
4229 .get_guest_ip = kvm_get_guest_ip,
4232 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4234 percpu_write(current_vcpu, vcpu);
4236 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4238 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4240 percpu_write(current_vcpu, NULL);
4242 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4244 int kvm_arch_init(void *opaque)
4247 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4250 printk(KERN_ERR "kvm: already loaded the other module\n");
4255 if (!ops->cpu_has_kvm_support()) {
4256 printk(KERN_ERR "kvm: no hardware support\n");
4260 if (ops->disabled_by_bios()) {
4261 printk(KERN_ERR "kvm: disabled by bios\n");
4266 r = kvm_mmu_module_init();
4270 kvm_init_msr_list();
4273 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4274 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4275 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4276 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4280 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4283 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4291 void kvm_arch_exit(void)
4293 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4295 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4296 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4297 CPUFREQ_TRANSITION_NOTIFIER);
4299 kvm_mmu_module_exit();
4302 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4304 ++vcpu->stat.halt_exits;
4305 if (irqchip_in_kernel(vcpu->kvm)) {
4306 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4309 vcpu->run->exit_reason = KVM_EXIT_HLT;
4313 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4315 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4318 if (is_long_mode(vcpu))
4321 return a0 | ((gpa_t)a1 << 32);
4324 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4326 u64 param, ingpa, outgpa, ret;
4327 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4328 bool fast, longmode;
4332 * hypercall generates UD from non zero cpl and real mode
4335 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4336 kvm_queue_exception(vcpu, UD_VECTOR);
4340 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4341 longmode = is_long_mode(vcpu) && cs_l == 1;
4344 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4345 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4346 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4347 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4348 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4349 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4351 #ifdef CONFIG_X86_64
4353 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4354 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4355 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4359 code = param & 0xffff;
4360 fast = (param >> 16) & 0x1;
4361 rep_cnt = (param >> 32) & 0xfff;
4362 rep_idx = (param >> 48) & 0xfff;
4364 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4367 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4368 kvm_vcpu_on_spin(vcpu);
4371 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4375 ret = res | (((u64)rep_done & 0xfff) << 32);
4377 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4379 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4380 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4386 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4388 unsigned long nr, a0, a1, a2, a3, ret;
4391 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4392 return kvm_hv_hypercall(vcpu);
4394 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4395 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4396 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4397 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4398 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4400 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4402 if (!is_long_mode(vcpu)) {
4410 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4416 case KVM_HC_VAPIC_POLL_IRQ:
4420 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4427 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4428 ++vcpu->stat.hypercalls;
4431 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4433 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4435 char instruction[3];
4436 unsigned long rip = kvm_rip_read(vcpu);
4439 * Blow out the MMU to ensure that no other VCPU has an active mapping
4440 * to ensure that the updated hypercall appears atomically across all
4443 kvm_mmu_zap_all(vcpu->kvm);
4445 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4447 return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4450 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4452 struct desc_ptr dt = { limit, base };
4454 kvm_x86_ops->set_gdt(vcpu, &dt);
4457 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4459 struct desc_ptr dt = { limit, base };
4461 kvm_x86_ops->set_idt(vcpu, &dt);
4464 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4466 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4467 int j, nent = vcpu->arch.cpuid_nent;
4469 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4470 /* when no next entry is found, the current entry[i] is reselected */
4471 for (j = i + 1; ; j = (j + 1) % nent) {
4472 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4473 if (ej->function == e->function) {
4474 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4478 return 0; /* silence gcc, even though control never reaches here */
4481 /* find an entry with matching function, matching index (if needed), and that
4482 * should be read next (if it's stateful) */
4483 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4484 u32 function, u32 index)
4486 if (e->function != function)
4488 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4490 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4491 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4496 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4497 u32 function, u32 index)
4500 struct kvm_cpuid_entry2 *best = NULL;
4502 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4503 struct kvm_cpuid_entry2 *e;
4505 e = &vcpu->arch.cpuid_entries[i];
4506 if (is_matching_cpuid_entry(e, function, index)) {
4507 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4508 move_to_next_stateful_cpuid_entry(vcpu, i);
4513 * Both basic or both extended?
4515 if (((e->function ^ function) & 0x80000000) == 0)
4516 if (!best || e->function > best->function)
4521 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4523 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4525 struct kvm_cpuid_entry2 *best;
4527 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4528 if (!best || best->eax < 0x80000008)
4530 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4532 return best->eax & 0xff;
4537 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4539 u32 function, index;
4540 struct kvm_cpuid_entry2 *best;
4542 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4543 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4544 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4545 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4546 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4547 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4548 best = kvm_find_cpuid_entry(vcpu, function, index);
4550 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4551 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4552 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4553 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4555 kvm_x86_ops->skip_emulated_instruction(vcpu);
4556 trace_kvm_cpuid(function,
4557 kvm_register_read(vcpu, VCPU_REGS_RAX),
4558 kvm_register_read(vcpu, VCPU_REGS_RBX),
4559 kvm_register_read(vcpu, VCPU_REGS_RCX),
4560 kvm_register_read(vcpu, VCPU_REGS_RDX));
4562 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4565 * Check if userspace requested an interrupt window, and that the
4566 * interrupt window is open.
4568 * No need to exit to userspace if we already have an interrupt queued.
4570 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4572 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4573 vcpu->run->request_interrupt_window &&
4574 kvm_arch_interrupt_allowed(vcpu));
4577 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4579 struct kvm_run *kvm_run = vcpu->run;
4581 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4582 kvm_run->cr8 = kvm_get_cr8(vcpu);
4583 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4584 if (irqchip_in_kernel(vcpu->kvm))
4585 kvm_run->ready_for_interrupt_injection = 1;
4587 kvm_run->ready_for_interrupt_injection =
4588 kvm_arch_interrupt_allowed(vcpu) &&
4589 !kvm_cpu_has_interrupt(vcpu) &&
4590 !kvm_event_needs_reinjection(vcpu);
4593 static void vapic_enter(struct kvm_vcpu *vcpu)
4595 struct kvm_lapic *apic = vcpu->arch.apic;
4598 if (!apic || !apic->vapic_addr)
4601 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4603 vcpu->arch.apic->vapic_page = page;
4606 static void vapic_exit(struct kvm_vcpu *vcpu)
4608 struct kvm_lapic *apic = vcpu->arch.apic;
4611 if (!apic || !apic->vapic_addr)
4614 idx = srcu_read_lock(&vcpu->kvm->srcu);
4615 kvm_release_page_dirty(apic->vapic_page);
4616 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4617 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4620 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4624 if (!kvm_x86_ops->update_cr8_intercept)
4627 if (!vcpu->arch.apic)
4630 if (!vcpu->arch.apic->vapic_addr)
4631 max_irr = kvm_lapic_find_highest_irr(vcpu);
4638 tpr = kvm_lapic_get_cr8(vcpu);
4640 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4643 static void inject_pending_event(struct kvm_vcpu *vcpu)
4645 /* try to reinject previous events if any */
4646 if (vcpu->arch.exception.pending) {
4647 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4648 vcpu->arch.exception.has_error_code,
4649 vcpu->arch.exception.error_code);
4650 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4651 vcpu->arch.exception.has_error_code,
4652 vcpu->arch.exception.error_code,
4653 vcpu->arch.exception.reinject);
4657 if (vcpu->arch.nmi_injected) {
4658 kvm_x86_ops->set_nmi(vcpu);
4662 if (vcpu->arch.interrupt.pending) {
4663 kvm_x86_ops->set_irq(vcpu);
4667 /* try to inject new event if pending */
4668 if (vcpu->arch.nmi_pending) {
4669 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4670 vcpu->arch.nmi_pending = false;
4671 vcpu->arch.nmi_injected = true;
4672 kvm_x86_ops->set_nmi(vcpu);
4674 } else if (kvm_cpu_has_interrupt(vcpu)) {
4675 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4676 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4678 kvm_x86_ops->set_irq(vcpu);
4683 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
4685 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
4686 !vcpu->guest_xcr0_loaded) {
4687 /* kvm_set_xcr() also depends on this */
4688 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
4689 vcpu->guest_xcr0_loaded = 1;
4693 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
4695 if (vcpu->guest_xcr0_loaded) {
4696 if (vcpu->arch.xcr0 != host_xcr0)
4697 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
4698 vcpu->guest_xcr0_loaded = 0;
4702 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4705 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4706 vcpu->run->request_interrupt_window;
4708 if (vcpu->requests) {
4709 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
4710 kvm_mmu_unload(vcpu);
4711 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
4712 __kvm_migrate_timers(vcpu);
4713 if (kvm_check_request(KVM_REQ_KVMCLOCK_UPDATE, vcpu))
4714 kvm_write_guest_time(vcpu);
4715 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
4716 kvm_mmu_sync_roots(vcpu);
4717 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
4718 kvm_x86_ops->tlb_flush(vcpu);
4719 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
4720 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4724 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
4725 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4729 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
4730 vcpu->fpu_active = 0;
4731 kvm_x86_ops->fpu_deactivate(vcpu);
4735 r = kvm_mmu_reload(vcpu);
4741 kvm_x86_ops->prepare_guest_switch(vcpu);
4742 if (vcpu->fpu_active)
4743 kvm_load_guest_fpu(vcpu);
4744 kvm_load_guest_xcr0(vcpu);
4746 atomic_set(&vcpu->guest_mode, 1);
4749 local_irq_disable();
4751 if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
4752 || need_resched() || signal_pending(current)) {
4753 atomic_set(&vcpu->guest_mode, 0);
4761 inject_pending_event(vcpu);
4763 /* enable NMI/IRQ window open exits if needed */
4764 if (vcpu->arch.nmi_pending)
4765 kvm_x86_ops->enable_nmi_window(vcpu);
4766 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4767 kvm_x86_ops->enable_irq_window(vcpu);
4769 if (kvm_lapic_enabled(vcpu)) {
4770 update_cr8_intercept(vcpu);
4771 kvm_lapic_sync_to_vapic(vcpu);
4774 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4778 if (unlikely(vcpu->arch.switch_db_regs)) {
4780 set_debugreg(vcpu->arch.eff_db[0], 0);
4781 set_debugreg(vcpu->arch.eff_db[1], 1);
4782 set_debugreg(vcpu->arch.eff_db[2], 2);
4783 set_debugreg(vcpu->arch.eff_db[3], 3);
4786 trace_kvm_entry(vcpu->vcpu_id);
4787 kvm_x86_ops->run(vcpu);
4790 * If the guest has used debug registers, at least dr7
4791 * will be disabled while returning to the host.
4792 * If we don't have active breakpoints in the host, we don't
4793 * care about the messed up debug address registers. But if
4794 * we have some of them active, restore the old state.
4796 if (hw_breakpoint_active())
4797 hw_breakpoint_restore();
4799 atomic_set(&vcpu->guest_mode, 0);
4806 * We must have an instruction between local_irq_enable() and
4807 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4808 * the interrupt shadow. The stat.exits increment will do nicely.
4809 * But we need to prevent reordering, hence this barrier():
4817 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4820 * Profile KVM exit RIPs:
4822 if (unlikely(prof_on == KVM_PROFILING)) {
4823 unsigned long rip = kvm_rip_read(vcpu);
4824 profile_hit(KVM_PROFILING, (void *)rip);
4828 kvm_lapic_sync_from_vapic(vcpu);
4830 r = kvm_x86_ops->handle_exit(vcpu);
4836 static int __vcpu_run(struct kvm_vcpu *vcpu)
4839 struct kvm *kvm = vcpu->kvm;
4841 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4842 pr_debug("vcpu %d received sipi with vector # %x\n",
4843 vcpu->vcpu_id, vcpu->arch.sipi_vector);
4844 kvm_lapic_reset(vcpu);
4845 r = kvm_arch_vcpu_reset(vcpu);
4848 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4851 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4856 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4857 r = vcpu_enter_guest(vcpu);
4859 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4860 kvm_vcpu_block(vcpu);
4861 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4862 if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
4864 switch(vcpu->arch.mp_state) {
4865 case KVM_MP_STATE_HALTED:
4866 vcpu->arch.mp_state =
4867 KVM_MP_STATE_RUNNABLE;
4868 case KVM_MP_STATE_RUNNABLE:
4870 case KVM_MP_STATE_SIPI_RECEIVED:
4881 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4882 if (kvm_cpu_has_pending_timer(vcpu))
4883 kvm_inject_pending_timer_irqs(vcpu);
4885 if (dm_request_for_irq_injection(vcpu)) {
4887 vcpu->run->exit_reason = KVM_EXIT_INTR;
4888 ++vcpu->stat.request_irq_exits;
4890 if (signal_pending(current)) {
4892 vcpu->run->exit_reason = KVM_EXIT_INTR;
4893 ++vcpu->stat.signal_exits;
4895 if (need_resched()) {
4896 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4898 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4902 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4909 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4914 if (vcpu->sigset_active)
4915 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4917 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4918 kvm_vcpu_block(vcpu);
4919 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4924 /* re-sync apic's tpr */
4925 if (!irqchip_in_kernel(vcpu->kvm))
4926 kvm_set_cr8(vcpu, kvm_run->cr8);
4928 if (vcpu->arch.pio.count || vcpu->mmio_needed ||
4929 vcpu->arch.emulate_ctxt.restart) {
4930 if (vcpu->mmio_needed) {
4931 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4932 vcpu->mmio_read_completed = 1;
4933 vcpu->mmio_needed = 0;
4935 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4936 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
4937 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4938 if (r != EMULATE_DONE) {
4943 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4944 kvm_register_write(vcpu, VCPU_REGS_RAX,
4945 kvm_run->hypercall.ret);
4947 r = __vcpu_run(vcpu);
4950 post_kvm_run_save(vcpu);
4951 if (vcpu->sigset_active)
4952 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4957 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4959 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4960 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4961 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4962 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4963 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4964 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4965 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4966 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4967 #ifdef CONFIG_X86_64
4968 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4969 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4970 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4971 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4972 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4973 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4974 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4975 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4978 regs->rip = kvm_rip_read(vcpu);
4979 regs->rflags = kvm_get_rflags(vcpu);
4984 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4986 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4987 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4988 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4989 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4990 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4991 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4992 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4993 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4994 #ifdef CONFIG_X86_64
4995 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4996 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4997 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4998 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4999 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5000 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5001 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5002 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5005 kvm_rip_write(vcpu, regs->rip);
5006 kvm_set_rflags(vcpu, regs->rflags);
5008 vcpu->arch.exception.pending = false;
5013 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5015 struct kvm_segment cs;
5017 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5021 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5023 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5024 struct kvm_sregs *sregs)
5028 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5029 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5030 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5031 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5032 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5033 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5035 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5036 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5038 kvm_x86_ops->get_idt(vcpu, &dt);
5039 sregs->idt.limit = dt.size;
5040 sregs->idt.base = dt.address;
5041 kvm_x86_ops->get_gdt(vcpu, &dt);
5042 sregs->gdt.limit = dt.size;
5043 sregs->gdt.base = dt.address;
5045 sregs->cr0 = kvm_read_cr0(vcpu);
5046 sregs->cr2 = vcpu->arch.cr2;
5047 sregs->cr3 = vcpu->arch.cr3;
5048 sregs->cr4 = kvm_read_cr4(vcpu);
5049 sregs->cr8 = kvm_get_cr8(vcpu);
5050 sregs->efer = vcpu->arch.efer;
5051 sregs->apic_base = kvm_get_apic_base(vcpu);
5053 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5055 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5056 set_bit(vcpu->arch.interrupt.nr,
5057 (unsigned long *)sregs->interrupt_bitmap);
5062 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5063 struct kvm_mp_state *mp_state)
5065 mp_state->mp_state = vcpu->arch.mp_state;
5069 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5070 struct kvm_mp_state *mp_state)
5072 vcpu->arch.mp_state = mp_state->mp_state;
5076 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5077 bool has_error_code, u32 error_code)
5079 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5082 init_emulate_ctxt(vcpu);
5084 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5085 tss_selector, reason, has_error_code,
5089 return EMULATE_FAIL;
5091 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5092 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5093 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5094 return EMULATE_DONE;
5096 EXPORT_SYMBOL_GPL(kvm_task_switch);
5098 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5099 struct kvm_sregs *sregs)
5101 int mmu_reset_needed = 0;
5102 int pending_vec, max_bits;
5105 dt.size = sregs->idt.limit;
5106 dt.address = sregs->idt.base;
5107 kvm_x86_ops->set_idt(vcpu, &dt);
5108 dt.size = sregs->gdt.limit;
5109 dt.address = sregs->gdt.base;
5110 kvm_x86_ops->set_gdt(vcpu, &dt);
5112 vcpu->arch.cr2 = sregs->cr2;
5113 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5114 vcpu->arch.cr3 = sregs->cr3;
5116 kvm_set_cr8(vcpu, sregs->cr8);
5118 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5119 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5120 kvm_set_apic_base(vcpu, sregs->apic_base);
5122 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5123 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5124 vcpu->arch.cr0 = sregs->cr0;
5126 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5127 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5128 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5129 load_pdptrs(vcpu, vcpu->arch.cr3);
5130 mmu_reset_needed = 1;
5133 if (mmu_reset_needed)
5134 kvm_mmu_reset_context(vcpu);
5136 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5137 pending_vec = find_first_bit(
5138 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5139 if (pending_vec < max_bits) {
5140 kvm_queue_interrupt(vcpu, pending_vec, false);
5141 pr_debug("Set back pending irq %d\n", pending_vec);
5142 if (irqchip_in_kernel(vcpu->kvm))
5143 kvm_pic_clear_isr_ack(vcpu->kvm);
5146 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5147 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5148 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5149 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5150 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5151 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5153 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5154 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5156 update_cr8_intercept(vcpu);
5158 /* Older userspace won't unhalt the vcpu on reset. */
5159 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5160 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5162 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5167 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5168 struct kvm_guest_debug *dbg)
5170 unsigned long rflags;
5173 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5175 if (vcpu->arch.exception.pending)
5177 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5178 kvm_queue_exception(vcpu, DB_VECTOR);
5180 kvm_queue_exception(vcpu, BP_VECTOR);
5184 * Read rflags as long as potentially injected trace flags are still
5187 rflags = kvm_get_rflags(vcpu);
5189 vcpu->guest_debug = dbg->control;
5190 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5191 vcpu->guest_debug = 0;
5193 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5194 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5195 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5196 vcpu->arch.switch_db_regs =
5197 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5199 for (i = 0; i < KVM_NR_DB_REGS; i++)
5200 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5201 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5204 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5205 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5206 get_segment_base(vcpu, VCPU_SREG_CS);
5209 * Trigger an rflags update that will inject or remove the trace
5212 kvm_set_rflags(vcpu, rflags);
5214 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5224 * Translate a guest virtual address to a guest physical address.
5226 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5227 struct kvm_translation *tr)
5229 unsigned long vaddr = tr->linear_address;
5233 idx = srcu_read_lock(&vcpu->kvm->srcu);
5234 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5235 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5236 tr->physical_address = gpa;
5237 tr->valid = gpa != UNMAPPED_GVA;
5244 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5246 struct i387_fxsave_struct *fxsave =
5247 &vcpu->arch.guest_fpu.state->fxsave;
5249 memcpy(fpu->fpr, fxsave->st_space, 128);
5250 fpu->fcw = fxsave->cwd;
5251 fpu->fsw = fxsave->swd;
5252 fpu->ftwx = fxsave->twd;
5253 fpu->last_opcode = fxsave->fop;
5254 fpu->last_ip = fxsave->rip;
5255 fpu->last_dp = fxsave->rdp;
5256 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5261 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5263 struct i387_fxsave_struct *fxsave =
5264 &vcpu->arch.guest_fpu.state->fxsave;
5266 memcpy(fxsave->st_space, fpu->fpr, 128);
5267 fxsave->cwd = fpu->fcw;
5268 fxsave->swd = fpu->fsw;
5269 fxsave->twd = fpu->ftwx;
5270 fxsave->fop = fpu->last_opcode;
5271 fxsave->rip = fpu->last_ip;
5272 fxsave->rdp = fpu->last_dp;
5273 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5278 int fx_init(struct kvm_vcpu *vcpu)
5282 err = fpu_alloc(&vcpu->arch.guest_fpu);
5286 fpu_finit(&vcpu->arch.guest_fpu);
5289 * Ensure guest xcr0 is valid for loading
5291 vcpu->arch.xcr0 = XSTATE_FP;
5293 vcpu->arch.cr0 |= X86_CR0_ET;
5297 EXPORT_SYMBOL_GPL(fx_init);
5299 static void fx_free(struct kvm_vcpu *vcpu)
5301 fpu_free(&vcpu->arch.guest_fpu);
5304 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5306 if (vcpu->guest_fpu_loaded)
5310 * Restore all possible states in the guest,
5311 * and assume host would use all available bits.
5312 * Guest xcr0 would be loaded later.
5314 kvm_put_guest_xcr0(vcpu);
5315 vcpu->guest_fpu_loaded = 1;
5316 unlazy_fpu(current);
5317 fpu_restore_checking(&vcpu->arch.guest_fpu);
5321 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5323 kvm_put_guest_xcr0(vcpu);
5325 if (!vcpu->guest_fpu_loaded)
5328 vcpu->guest_fpu_loaded = 0;
5329 fpu_save_init(&vcpu->arch.guest_fpu);
5330 ++vcpu->stat.fpu_reload;
5331 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5335 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5337 if (vcpu->arch.time_page) {
5338 kvm_release_page_dirty(vcpu->arch.time_page);
5339 vcpu->arch.time_page = NULL;
5342 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5344 kvm_x86_ops->vcpu_free(vcpu);
5347 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5350 return kvm_x86_ops->vcpu_create(kvm, id);
5353 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5357 vcpu->arch.mtrr_state.have_fixed = 1;
5359 r = kvm_arch_vcpu_reset(vcpu);
5361 r = kvm_mmu_setup(vcpu);
5368 kvm_x86_ops->vcpu_free(vcpu);
5372 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5375 kvm_mmu_unload(vcpu);
5379 kvm_x86_ops->vcpu_free(vcpu);
5382 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5384 vcpu->arch.nmi_pending = false;
5385 vcpu->arch.nmi_injected = false;
5387 vcpu->arch.switch_db_regs = 0;
5388 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5389 vcpu->arch.dr6 = DR6_FIXED_1;
5390 vcpu->arch.dr7 = DR7_FIXED_1;
5392 return kvm_x86_ops->vcpu_reset(vcpu);
5395 int kvm_arch_hardware_enable(void *garbage)
5398 * Since this may be called from a hotplug notifcation,
5399 * we can't get the CPU frequency directly.
5401 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5402 int cpu = raw_smp_processor_id();
5403 per_cpu(cpu_tsc_khz, cpu) = 0;
5406 kvm_shared_msr_cpu_online();
5408 return kvm_x86_ops->hardware_enable(garbage);
5411 void kvm_arch_hardware_disable(void *garbage)
5413 kvm_x86_ops->hardware_disable(garbage);
5414 drop_user_return_notifiers(garbage);
5417 int kvm_arch_hardware_setup(void)
5419 return kvm_x86_ops->hardware_setup();
5422 void kvm_arch_hardware_unsetup(void)
5424 kvm_x86_ops->hardware_unsetup();
5427 void kvm_arch_check_processor_compat(void *rtn)
5429 kvm_x86_ops->check_processor_compatibility(rtn);
5432 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5438 BUG_ON(vcpu->kvm == NULL);
5441 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5442 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5443 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5444 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5446 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5448 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5453 vcpu->arch.pio_data = page_address(page);
5455 r = kvm_mmu_create(vcpu);
5457 goto fail_free_pio_data;
5459 if (irqchip_in_kernel(kvm)) {
5460 r = kvm_create_lapic(vcpu);
5462 goto fail_mmu_destroy;
5465 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5467 if (!vcpu->arch.mce_banks) {
5469 goto fail_free_lapic;
5471 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5473 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5474 goto fail_free_mce_banks;
5477 fail_free_mce_banks:
5478 kfree(vcpu->arch.mce_banks);
5480 kvm_free_lapic(vcpu);
5482 kvm_mmu_destroy(vcpu);
5484 free_page((unsigned long)vcpu->arch.pio_data);
5489 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5493 kfree(vcpu->arch.mce_banks);
5494 kvm_free_lapic(vcpu);
5495 idx = srcu_read_lock(&vcpu->kvm->srcu);
5496 kvm_mmu_destroy(vcpu);
5497 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5498 free_page((unsigned long)vcpu->arch.pio_data);
5501 struct kvm *kvm_arch_create_vm(void)
5503 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5506 return ERR_PTR(-ENOMEM);
5508 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5509 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5511 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5512 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5514 spin_lock_init(&kvm->arch.tsc_write_lock);
5519 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5522 kvm_mmu_unload(vcpu);
5526 static void kvm_free_vcpus(struct kvm *kvm)
5529 struct kvm_vcpu *vcpu;
5532 * Unpin any mmu pages first.
5534 kvm_for_each_vcpu(i, vcpu, kvm)
5535 kvm_unload_vcpu_mmu(vcpu);
5536 kvm_for_each_vcpu(i, vcpu, kvm)
5537 kvm_arch_vcpu_free(vcpu);
5539 mutex_lock(&kvm->lock);
5540 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5541 kvm->vcpus[i] = NULL;
5543 atomic_set(&kvm->online_vcpus, 0);
5544 mutex_unlock(&kvm->lock);
5547 void kvm_arch_sync_events(struct kvm *kvm)
5549 kvm_free_all_assigned_devices(kvm);
5553 void kvm_arch_destroy_vm(struct kvm *kvm)
5555 kvm_iommu_unmap_guest(kvm);
5556 kfree(kvm->arch.vpic);
5557 kfree(kvm->arch.vioapic);
5558 kvm_free_vcpus(kvm);
5559 kvm_free_physmem(kvm);
5560 if (kvm->arch.apic_access_page)
5561 put_page(kvm->arch.apic_access_page);
5562 if (kvm->arch.ept_identity_pagetable)
5563 put_page(kvm->arch.ept_identity_pagetable);
5564 cleanup_srcu_struct(&kvm->srcu);
5568 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5569 struct kvm_memory_slot *memslot,
5570 struct kvm_memory_slot old,
5571 struct kvm_userspace_memory_region *mem,
5574 int npages = memslot->npages;
5575 int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
5577 /* Prevent internal slot pages from being moved by fork()/COW. */
5578 if (memslot->id >= KVM_MEMORY_SLOTS)
5579 map_flags = MAP_SHARED | MAP_ANONYMOUS;
5581 /*To keep backward compatibility with older userspace,
5582 *x86 needs to hanlde !user_alloc case.
5585 if (npages && !old.rmap) {
5586 unsigned long userspace_addr;
5588 down_write(¤t->mm->mmap_sem);
5589 userspace_addr = do_mmap(NULL, 0,
5591 PROT_READ | PROT_WRITE,
5594 up_write(¤t->mm->mmap_sem);
5596 if (IS_ERR((void *)userspace_addr))
5597 return PTR_ERR((void *)userspace_addr);
5599 memslot->userspace_addr = userspace_addr;
5607 void kvm_arch_commit_memory_region(struct kvm *kvm,
5608 struct kvm_userspace_memory_region *mem,
5609 struct kvm_memory_slot old,
5613 int npages = mem->memory_size >> PAGE_SHIFT;
5615 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5618 down_write(¤t->mm->mmap_sem);
5619 ret = do_munmap(current->mm, old.userspace_addr,
5620 old.npages * PAGE_SIZE);
5621 up_write(¤t->mm->mmap_sem);
5624 "kvm_vm_ioctl_set_memory_region: "
5625 "failed to munmap memory\n");
5628 spin_lock(&kvm->mmu_lock);
5629 if (!kvm->arch.n_requested_mmu_pages) {
5630 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5631 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5634 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5635 spin_unlock(&kvm->mmu_lock);
5638 void kvm_arch_flush_shadow(struct kvm *kvm)
5640 kvm_mmu_zap_all(kvm);
5641 kvm_reload_remote_mmus(kvm);
5644 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5646 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5647 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5648 || vcpu->arch.nmi_pending ||
5649 (kvm_arch_interrupt_allowed(vcpu) &&
5650 kvm_cpu_has_interrupt(vcpu));
5653 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5656 int cpu = vcpu->cpu;
5658 if (waitqueue_active(&vcpu->wq)) {
5659 wake_up_interruptible(&vcpu->wq);
5660 ++vcpu->stat.halt_wakeup;
5664 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5665 if (atomic_xchg(&vcpu->guest_mode, 0))
5666 smp_send_reschedule(cpu);
5670 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5672 return kvm_x86_ops->interrupt_allowed(vcpu);
5675 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5677 unsigned long current_rip = kvm_rip_read(vcpu) +
5678 get_segment_base(vcpu, VCPU_SREG_CS);
5680 return current_rip == linear_rip;
5682 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5684 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5686 unsigned long rflags;
5688 rflags = kvm_x86_ops->get_rflags(vcpu);
5689 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5690 rflags &= ~X86_EFLAGS_TF;
5693 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5695 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5697 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5698 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5699 rflags |= X86_EFLAGS_TF;
5700 kvm_x86_ops->set_rflags(vcpu, rflags);
5702 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5704 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5705 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5706 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5707 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5708 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5709 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5710 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5711 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5712 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5713 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5714 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5715 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);