[UPSTREAM] PCI: dwc: Restore MSI Receiver mask during resume
If a host that uses the IP's integrated MSI Receiver lost power
during suspend, we call dw_pcie_setup_rc() to reinit the RC. But
dw_pcie_setup_rc() always sets pp->irq_mask[ctrl] to ~0, so the mask
register is always set as 0xffffffff incorrectly, thus the MSI can't
work after resume.
Fix this issue by moving pp->irq_mask[ctrl] initialization to
dw_pcie_host_init() so we can correctly set the mask reg during both
boot and resume.
Tested-by: Richard Zhu <hongxing.zhu@nxp.com>
Link: https://lore.kernel.org/r/20211226074019.2556-1-jszhang@kernel.org
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
(cherry-picked from commit 815953dc2011ad7a34de355dfa703dcef1085219)
This is a change we had already applied for R36:
https://git-master.nvidia.com/r/c/3rdparty/canonical/linux-jammy/+/3116302. Submit a new one base on R35 code base.
Bug 5064165
Change-Id: Ic4762891daf899d0bc65c78e59030f98f7e189db
Signed-off-by: robelin <robelin@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-5.10/+/3302233
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
1 file changed