blob: 71e9b7c52d57af7e2fff1e3a878a675aeabcf69c [file] [log] [blame]
Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
Zhu Yib481de92007-09-25 17:54:57 -070030#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
Zhu Yib481de92007-09-25 17:54:57 -070041#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
44#include <net/ieee80211_radiotap.h>
45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
Zhu Yib481de92007-09-25 17:54:57 -070049#include "iwl-3945.h"
50#include "iwl-helpers.h"
51
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080052#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080053u32 iwl3945_debug_level;
Zhu Yib481de92007-09-25 17:54:57 -070054#endif
55
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080056static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
57 struct iwl3945_tx_queue *txq);
Christoph Hellwig416e1432007-10-25 17:15:49 +080058
Zhu Yib481de92007-09-25 17:54:57 -070059/******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
65/* module parameters */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080066static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
67static int iwl3945_param_debug; /* def: 0 = minimal debug log messages */
68static int iwl3945_param_disable; /* def: 0 = enable radio */
Ben Cahill9fbab512007-11-29 11:09:47 +080069static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080070int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
71static int iwl3945_param_qos_enable = 1; /* def: 1 = use quality of service */
72int iwl3945_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 8 Tx queues */
Zhu Yib481de92007-09-25 17:54:57 -070073
74/*
75 * module name, copyright, version, etc.
76 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
77 */
78
79#define DRV_DESCRIPTION \
80"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
81
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080082#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -070083#define VD "d"
84#else
85#define VD
86#endif
87
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080088#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -070089#define VS "s"
90#else
91#define VS
92#endif
93
Zhu Yi80f3e022007-10-25 17:15:48 +080094#define IWLWIFI_VERSION "1.1.19k" VD VS
Zhu Yib481de92007-09-25 17:54:57 -070095#define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
96#define DRV_VERSION IWLWIFI_VERSION
97
98/* Change firmware file name, using "-" and incrementing number,
99 * *only* when uCode interface or architecture changes so that it
100 * is not compatible with earlier drivers.
101 * This number will also appear in << 8 position of 1st dword of uCode file */
102#define IWL3945_UCODE_API "-1"
103
104MODULE_DESCRIPTION(DRV_DESCRIPTION);
105MODULE_VERSION(DRV_VERSION);
106MODULE_AUTHOR(DRV_COPYRIGHT);
107MODULE_LICENSE("GPL");
108
Christoph Hellwig416e1432007-10-25 17:15:49 +0800109static __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
Zhu Yib481de92007-09-25 17:54:57 -0700110{
111 u16 fc = le16_to_cpu(hdr->frame_control);
112 int hdr_len = ieee80211_get_hdrlen(fc);
113
114 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
115 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
116 return NULL;
117}
118
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800119static const struct ieee80211_hw_mode *iwl3945_get_hw_mode(
120 struct iwl3945_priv *priv, int mode)
Zhu Yib481de92007-09-25 17:54:57 -0700121{
122 int i;
123
124 for (i = 0; i < 3; i++)
125 if (priv->modes[i].mode == mode)
126 return &priv->modes[i];
127
128 return NULL;
129}
130
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800131static int iwl3945_is_empty_essid(const char *essid, int essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700132{
133 /* Single white space is for Linksys APs */
134 if (essid_len == 1 && essid[0] == ' ')
135 return 1;
136
137 /* Otherwise, if the entire essid is 0, we assume it is hidden */
138 while (essid_len) {
139 essid_len--;
140 if (essid[essid_len] != '\0')
141 return 0;
142 }
143
144 return 1;
145}
146
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800147static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700148{
149 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
150 const char *s = essid;
151 char *d = escaped;
152
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800153 if (iwl3945_is_empty_essid(essid, essid_len)) {
Zhu Yib481de92007-09-25 17:54:57 -0700154 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
155 return escaped;
156 }
157
158 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
159 while (essid_len--) {
160 if (*s == '\0') {
161 *d++ = '\\';
162 *d++ = '0';
163 s++;
164 } else
165 *d++ = *s++;
166 }
167 *d = '\0';
168 return escaped;
169}
170
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800171static void iwl3945_print_hex_dump(int level, void *p, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -0700172{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +0800173#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800174 if (!(iwl3945_debug_level & level))
Zhu Yib481de92007-09-25 17:54:57 -0700175 return;
176
177 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
178 p, len, 1);
179#endif
180}
181
182/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
183 * DMA services
184 *
185 * Theory of operation
186 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800187 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
188 * of buffer descriptors, each of which points to one or more data buffers for
189 * the device to read from or fill. Driver and device exchange status of each
190 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
191 * entries in each circular buffer, to protect against confusing empty and full
192 * queue states.
193 *
194 * The device reads or writes the data in the queues via the device's several
195 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
Zhu Yib481de92007-09-25 17:54:57 -0700196 *
197 * For Tx queue, there are low mark and high mark limits. If, after queuing
198 * the packet for Tx, free space become < low mark, Tx queue stopped. When
199 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
200 * Tx queue resumed.
201 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800202 * The 3945 operates with six queues: One receive queue, one transmit queue
203 * (#4) for sending commands to the device firmware, and four transmit queues
204 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
Zhu Yib481de92007-09-25 17:54:57 -0700205 ***************************************************/
206
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800207static int iwl3945_queue_space(const struct iwl3945_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -0700208{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800209 int s = q->read_ptr - q->write_ptr;
Zhu Yib481de92007-09-25 17:54:57 -0700210
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800211 if (q->read_ptr > q->write_ptr)
Zhu Yib481de92007-09-25 17:54:57 -0700212 s -= q->n_bd;
213
214 if (s <= 0)
215 s += q->n_window;
216 /* keep some reserve to not confuse empty and full situations */
217 s -= 2;
218 if (s < 0)
219 s = 0;
220 return s;
221}
222
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800223/**
224 * iwl3945_queue_inc_wrap - increment queue index, wrap back to beginning
225 * @index -- current index
226 * @n_bd -- total number of entries in queue (must be power of 2)
227 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800228static inline int iwl3945_queue_inc_wrap(int index, int n_bd)
Zhu Yib481de92007-09-25 17:54:57 -0700229{
230 return ++index & (n_bd - 1);
231}
232
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800233/**
234 * iwl3945_queue_dec_wrap - increment queue index, wrap back to end
235 * @index -- current index
236 * @n_bd -- total number of entries in queue (must be power of 2)
237 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800238static inline int iwl3945_queue_dec_wrap(int index, int n_bd)
Zhu Yib481de92007-09-25 17:54:57 -0700239{
240 return --index & (n_bd - 1);
241}
242
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800243static inline int x2_queue_used(const struct iwl3945_queue *q, int i)
Zhu Yib481de92007-09-25 17:54:57 -0700244{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800245 return q->write_ptr > q->read_ptr ?
246 (i >= q->read_ptr && i < q->write_ptr) :
247 !(i < q->read_ptr && i >= q->write_ptr);
Zhu Yib481de92007-09-25 17:54:57 -0700248}
249
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800250static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
Zhu Yib481de92007-09-25 17:54:57 -0700251{
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800252 /* This is for scan command, the big buffer at end of command array */
Zhu Yib481de92007-09-25 17:54:57 -0700253 if (is_huge)
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800254 return q->n_window; /* must be power of 2 */
Zhu Yib481de92007-09-25 17:54:57 -0700255
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800256 /* Otherwise, use normal size buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700257 return index & (q->n_window - 1);
258}
259
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800260/**
261 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
262 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800263static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
Zhu Yib481de92007-09-25 17:54:57 -0700264 int count, int slots_num, u32 id)
265{
266 q->n_bd = count;
267 q->n_window = slots_num;
268 q->id = id;
269
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800270 /* count must be power-of-two size, otherwise iwl3945_queue_inc_wrap
271 * and iwl3945_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700272 BUG_ON(!is_power_of_2(count));
273
274 /* slots_num must be power-of-two size, otherwise
275 * get_cmd_index is broken. */
276 BUG_ON(!is_power_of_2(slots_num));
277
278 q->low_mark = q->n_window / 4;
279 if (q->low_mark < 4)
280 q->low_mark = 4;
281
282 q->high_mark = q->n_window / 8;
283 if (q->high_mark < 2)
284 q->high_mark = 2;
285
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800286 q->write_ptr = q->read_ptr = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700287
288 return 0;
289}
290
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800291/**
292 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
293 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800294static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
295 struct iwl3945_tx_queue *txq, u32 id)
Zhu Yib481de92007-09-25 17:54:57 -0700296{
297 struct pci_dev *dev = priv->pci_dev;
298
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800299 /* Driver private data, only for Tx (not command) queues,
300 * not shared with device. */
Zhu Yib481de92007-09-25 17:54:57 -0700301 if (id != IWL_CMD_QUEUE_NUM) {
302 txq->txb = kmalloc(sizeof(txq->txb[0]) *
303 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
304 if (!txq->txb) {
Ian Schram01ebd062007-10-25 17:15:22 +0800305 IWL_ERROR("kmalloc for auxiliary BD "
Zhu Yib481de92007-09-25 17:54:57 -0700306 "structures failed\n");
307 goto error;
308 }
309 } else
310 txq->txb = NULL;
311
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800312 /* Circular buffer of transmit frame descriptors (TFDs),
313 * shared with device */
Zhu Yib481de92007-09-25 17:54:57 -0700314 txq->bd = pci_alloc_consistent(dev,
315 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
316 &txq->q.dma_addr);
317
318 if (!txq->bd) {
319 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
320 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
321 goto error;
322 }
323 txq->q.id = id;
324
325 return 0;
326
327 error:
328 if (txq->txb) {
329 kfree(txq->txb);
330 txq->txb = NULL;
331 }
332
333 return -ENOMEM;
334}
335
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800336/**
337 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
338 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800339int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
340 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
Zhu Yib481de92007-09-25 17:54:57 -0700341{
342 struct pci_dev *dev = priv->pci_dev;
343 int len;
344 int rc = 0;
345
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800346 /*
347 * Alloc buffer array for commands (Tx or other types of commands).
348 * For the command queue (#4), allocate command space + one big
349 * command for scan, since scan command is very huge; the system will
350 * not have two scans at the same time, so only one is needed.
351 * For data Tx queues (all other queues), no super-size command
352 * space is needed.
353 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800354 len = sizeof(struct iwl3945_cmd) * slots_num;
Zhu Yib481de92007-09-25 17:54:57 -0700355 if (txq_id == IWL_CMD_QUEUE_NUM)
356 len += IWL_MAX_SCAN_SIZE;
357 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
358 if (!txq->cmd)
359 return -ENOMEM;
360
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800361 /* Alloc driver data array and TFD circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800362 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700363 if (rc) {
364 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
365
366 return -ENOMEM;
367 }
368 txq->need_update = 0;
369
370 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800371 * iwl3945_queue_inc_wrap and iwl3945_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700372 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800373
374 /* Initialize queue high/low-water, head/tail indexes */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800375 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700376
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800377 /* Tell device where to find queue, enable DMA channel. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800378 iwl3945_hw_tx_queue_init(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700379
380 return 0;
381}
382
383/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800384 * iwl3945_tx_queue_free - Deallocate DMA queue.
Zhu Yib481de92007-09-25 17:54:57 -0700385 * @txq: Transmit queue to deallocate.
386 *
387 * Empty queue by removing and destroying all BD's.
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800388 * Free all buffers.
389 * 0-fill, but do not free "txq" descriptor structure.
Zhu Yib481de92007-09-25 17:54:57 -0700390 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800391void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -0700392{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800393 struct iwl3945_queue *q = &txq->q;
Zhu Yib481de92007-09-25 17:54:57 -0700394 struct pci_dev *dev = priv->pci_dev;
395 int len;
396
397 if (q->n_bd == 0)
398 return;
399
400 /* first, empty all BD's */
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800401 for (; q->write_ptr != q->read_ptr;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800402 q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd))
403 iwl3945_hw_txq_free_tfd(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700404
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800405 len = sizeof(struct iwl3945_cmd) * q->n_window;
Zhu Yib481de92007-09-25 17:54:57 -0700406 if (q->id == IWL_CMD_QUEUE_NUM)
407 len += IWL_MAX_SCAN_SIZE;
408
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800409 /* De-alloc array of command/tx buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700410 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
411
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800412 /* De-alloc circular buffer of TFDs */
Zhu Yib481de92007-09-25 17:54:57 -0700413 if (txq->q.n_bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800414 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
Zhu Yib481de92007-09-25 17:54:57 -0700415 txq->q.n_bd, txq->bd, txq->q.dma_addr);
416
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800417 /* De-alloc array of per-TFD driver data */
Zhu Yib481de92007-09-25 17:54:57 -0700418 if (txq->txb) {
419 kfree(txq->txb);
420 txq->txb = NULL;
421 }
422
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800423 /* 0-fill queue descriptor structure */
Zhu Yib481de92007-09-25 17:54:57 -0700424 memset(txq, 0, sizeof(*txq));
425}
426
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800427const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
Zhu Yib481de92007-09-25 17:54:57 -0700428
429/*************** STATION TABLE MANAGEMENT ****
Ben Cahill9fbab512007-11-29 11:09:47 +0800430 * mac80211 should be examined to determine if sta_info is duplicating
Zhu Yib481de92007-09-25 17:54:57 -0700431 * the functionality provided here
432 */
433
434/**************************************************************/
Ian Schram01ebd062007-10-25 17:15:22 +0800435#if 0 /* temporary disable till we add real remove station */
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800436/**
437 * iwl3945_remove_station - Remove driver's knowledge of station.
438 *
439 * NOTE: This does not remove station from device's station table.
440 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800441static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
Zhu Yib481de92007-09-25 17:54:57 -0700442{
443 int index = IWL_INVALID_STATION;
444 int i;
445 unsigned long flags;
446
447 spin_lock_irqsave(&priv->sta_lock, flags);
448
449 if (is_ap)
450 index = IWL_AP_ID;
451 else if (is_broadcast_ether_addr(addr))
452 index = priv->hw_setting.bcast_sta_id;
453 else
454 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
455 if (priv->stations[i].used &&
456 !compare_ether_addr(priv->stations[i].sta.sta.addr,
457 addr)) {
458 index = i;
459 break;
460 }
461
462 if (unlikely(index == IWL_INVALID_STATION))
463 goto out;
464
465 if (priv->stations[index].used) {
466 priv->stations[index].used = 0;
467 priv->num_stations--;
468 }
469
470 BUG_ON(priv->num_stations < 0);
471
472out:
473 spin_unlock_irqrestore(&priv->sta_lock, flags);
474 return 0;
475}
Zhu Yi556f8db2007-09-27 11:27:33 +0800476#endif
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800477
478/**
479 * iwl3945_clear_stations_table - Clear the driver's station table
480 *
481 * NOTE: This does not clear or otherwise alter the device's station table.
482 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800483static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700484{
485 unsigned long flags;
486
487 spin_lock_irqsave(&priv->sta_lock, flags);
488
489 priv->num_stations = 0;
490 memset(priv->stations, 0, sizeof(priv->stations));
491
492 spin_unlock_irqrestore(&priv->sta_lock, flags);
493}
494
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800495/**
496 * iwl3945_add_station - Add station to station tables in driver and device
497 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800498u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -0700499{
500 int i;
501 int index = IWL_INVALID_STATION;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800502 struct iwl3945_station_entry *station;
Zhu Yib481de92007-09-25 17:54:57 -0700503 unsigned long flags_spin;
Joe Perches0795af52007-10-03 17:59:30 -0700504 DECLARE_MAC_BUF(mac);
Zhu Yic14c5212007-09-27 11:27:35 +0800505 u8 rate;
Zhu Yib481de92007-09-25 17:54:57 -0700506
507 spin_lock_irqsave(&priv->sta_lock, flags_spin);
508 if (is_ap)
509 index = IWL_AP_ID;
510 else if (is_broadcast_ether_addr(addr))
511 index = priv->hw_setting.bcast_sta_id;
512 else
513 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
514 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
515 addr)) {
516 index = i;
517 break;
518 }
519
520 if (!priv->stations[i].used &&
521 index == IWL_INVALID_STATION)
522 index = i;
523 }
524
Ian Schram01ebd062007-10-25 17:15:22 +0800525 /* These two conditions has the same outcome but keep them separate
Zhu Yib481de92007-09-25 17:54:57 -0700526 since they have different meaning */
527 if (unlikely(index == IWL_INVALID_STATION)) {
528 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
529 return index;
530 }
531
532 if (priv->stations[index].used &&
533 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
534 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
535 return index;
536 }
537
Joe Perches0795af52007-10-03 17:59:30 -0700538 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -0700539 station = &priv->stations[index];
540 station->used = 1;
541 priv->num_stations++;
542
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800543 /* Set up the REPLY_ADD_STA command to send to device */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800544 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
Zhu Yib481de92007-09-25 17:54:57 -0700545 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
546 station->sta.mode = 0;
547 station->sta.sta.sta_id = index;
548 station->sta.station_flags = 0;
549
Tomas Winkler69946332007-10-25 17:15:27 +0800550 if (priv->phymode == MODE_IEEE80211A)
551 rate = IWL_RATE_6M_PLCP;
552 else
553 rate = IWL_RATE_1M_PLCP;
Zhu Yic14c5212007-09-27 11:27:35 +0800554
555 /* Turn on both antennas for the station... */
556 station->sta.rate_n_flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800557 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
Zhu Yic14c5212007-09-27 11:27:35 +0800558 station->current_rate.rate_n_flags =
559 le16_to_cpu(station->sta.rate_n_flags);
560
Zhu Yib481de92007-09-25 17:54:57 -0700561 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800562
563 /* Add station to device's station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800564 iwl3945_send_add_station(priv, &station->sta, flags);
Zhu Yib481de92007-09-25 17:54:57 -0700565 return index;
566
567}
568
569/*************** DRIVER STATUS FUNCTIONS *****/
570
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800571static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700572{
573 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
574 * set but EXIT_PENDING is not */
575 return test_bit(STATUS_READY, &priv->status) &&
576 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
577 !test_bit(STATUS_EXIT_PENDING, &priv->status);
578}
579
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800580static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700581{
582 return test_bit(STATUS_ALIVE, &priv->status);
583}
584
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800585static inline int iwl3945_is_init(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700586{
587 return test_bit(STATUS_INIT, &priv->status);
588}
589
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800590static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700591{
592 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
593 test_bit(STATUS_RF_KILL_SW, &priv->status);
594}
595
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800596static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700597{
598
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800599 if (iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -0700600 return 0;
601
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800602 return iwl3945_is_ready(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700603}
604
605/*************** HOST COMMAND QUEUE FUNCTIONS *****/
606
607#define IWL_CMD(x) case x : return #x
608
609static const char *get_cmd_string(u8 cmd)
610{
611 switch (cmd) {
612 IWL_CMD(REPLY_ALIVE);
613 IWL_CMD(REPLY_ERROR);
614 IWL_CMD(REPLY_RXON);
615 IWL_CMD(REPLY_RXON_ASSOC);
616 IWL_CMD(REPLY_QOS_PARAM);
617 IWL_CMD(REPLY_RXON_TIMING);
618 IWL_CMD(REPLY_ADD_STA);
619 IWL_CMD(REPLY_REMOVE_STA);
620 IWL_CMD(REPLY_REMOVE_ALL_STA);
621 IWL_CMD(REPLY_3945_RX);
622 IWL_CMD(REPLY_TX);
623 IWL_CMD(REPLY_RATE_SCALE);
624 IWL_CMD(REPLY_LEDS_CMD);
625 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
626 IWL_CMD(RADAR_NOTIFICATION);
627 IWL_CMD(REPLY_QUIET_CMD);
628 IWL_CMD(REPLY_CHANNEL_SWITCH);
629 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
630 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
631 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
632 IWL_CMD(POWER_TABLE_CMD);
633 IWL_CMD(PM_SLEEP_NOTIFICATION);
634 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
635 IWL_CMD(REPLY_SCAN_CMD);
636 IWL_CMD(REPLY_SCAN_ABORT_CMD);
637 IWL_CMD(SCAN_START_NOTIFICATION);
638 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
639 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
640 IWL_CMD(BEACON_NOTIFICATION);
641 IWL_CMD(REPLY_TX_BEACON);
642 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
643 IWL_CMD(QUIET_NOTIFICATION);
644 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
645 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
646 IWL_CMD(REPLY_BT_CONFIG);
647 IWL_CMD(REPLY_STATISTICS_CMD);
648 IWL_CMD(STATISTICS_NOTIFICATION);
649 IWL_CMD(REPLY_CARD_STATE_CMD);
650 IWL_CMD(CARD_STATE_NOTIFICATION);
651 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
652 default:
653 return "UNKNOWN";
654
655 }
656}
657
658#define HOST_COMPLETE_TIMEOUT (HZ / 2)
659
660/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800661 * iwl3945_enqueue_hcmd - enqueue a uCode command
Zhu Yib481de92007-09-25 17:54:57 -0700662 * @priv: device private data point
663 * @cmd: a point to the ucode command structure
664 *
665 * The function returns < 0 values to indicate the operation is
666 * failed. On success, it turns the index (> 0) of command in the
667 * command queue.
668 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800669static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700670{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800671 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
672 struct iwl3945_queue *q = &txq->q;
673 struct iwl3945_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -0700674 u32 *control_flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800675 struct iwl3945_cmd *out_cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700676 u32 idx;
677 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
678 dma_addr_t phys_addr;
679 int pad;
680 u16 count;
681 int ret;
682 unsigned long flags;
683
684 /* If any of the command structures end up being larger than
685 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
686 * we will need to increase the size of the TFD entries */
687 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
688 !(cmd->meta.flags & CMD_SIZE_HUGE));
689
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800690 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
Zhu Yib481de92007-09-25 17:54:57 -0700691 IWL_ERROR("No space for Tx\n");
692 return -ENOSPC;
693 }
694
695 spin_lock_irqsave(&priv->hcmd_lock, flags);
696
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800697 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -0700698 memset(tfd, 0, sizeof(*tfd));
699
700 control_flags = (u32 *) tfd;
701
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800702 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
Zhu Yib481de92007-09-25 17:54:57 -0700703 out_cmd = &txq->cmd[idx];
704
705 out_cmd->hdr.cmd = cmd->id;
706 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
707 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
708
709 /* At this point, the out_cmd now has all of the incoming cmd
710 * information */
711
712 out_cmd->hdr.flags = 0;
713 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800714 INDEX_TO_SEQ(q->write_ptr));
Zhu Yib481de92007-09-25 17:54:57 -0700715 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
716 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
717
718 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800719 offsetof(struct iwl3945_cmd, hdr);
720 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
Zhu Yib481de92007-09-25 17:54:57 -0700721
722 pad = U32_PAD(cmd->len);
723 count = TFD_CTL_COUNT_GET(*control_flags);
724 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
725
726 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
727 "%d bytes at %d[%d]:%d\n",
728 get_cmd_string(out_cmd->hdr.cmd),
729 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800730 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
Zhu Yib481de92007-09-25 17:54:57 -0700731
732 txq->need_update = 1;
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800733
734 /* Increment and update queue's write index */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800735 q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
736 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700737
738 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
739 return ret ? ret : idx;
740}
741
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800742static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700743{
744 int ret;
745
746 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
747
748 /* An asynchronous command can not expect an SKB to be set. */
749 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
750
751 /* An asynchronous command MUST have a callback. */
752 BUG_ON(!cmd->meta.u.callback);
753
754 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
755 return -EBUSY;
756
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800757 ret = iwl3945_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700758 if (ret < 0) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800759 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700760 get_cmd_string(cmd->id), ret);
761 return ret;
762 }
763 return 0;
764}
765
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800766static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700767{
768 int cmd_idx;
769 int ret;
770 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
771
772 BUG_ON(cmd->meta.flags & CMD_ASYNC);
773
774 /* A synchronous command can not have a callback set. */
775 BUG_ON(cmd->meta.u.callback != NULL);
776
777 if (atomic_xchg(&entry, 1)) {
778 IWL_ERROR("Error sending %s: Already sending a host command\n",
779 get_cmd_string(cmd->id));
780 return -EBUSY;
781 }
782
783 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
784
785 if (cmd->meta.flags & CMD_WANT_SKB)
786 cmd->meta.source = &cmd->meta;
787
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800788 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700789 if (cmd_idx < 0) {
790 ret = cmd_idx;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800791 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700792 get_cmd_string(cmd->id), ret);
793 goto out;
794 }
795
796 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
797 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
798 HOST_COMPLETE_TIMEOUT);
799 if (!ret) {
800 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
801 IWL_ERROR("Error sending %s: time out after %dms.\n",
802 get_cmd_string(cmd->id),
803 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
804
805 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
806 ret = -ETIMEDOUT;
807 goto cancel;
808 }
809 }
810
811 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
812 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
813 get_cmd_string(cmd->id));
814 ret = -ECANCELED;
815 goto fail;
816 }
817 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
818 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
819 get_cmd_string(cmd->id));
820 ret = -EIO;
821 goto fail;
822 }
823 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
824 IWL_ERROR("Error: Response NULL in '%s'\n",
825 get_cmd_string(cmd->id));
826 ret = -EIO;
827 goto out;
828 }
829
830 ret = 0;
831 goto out;
832
833cancel:
834 if (cmd->meta.flags & CMD_WANT_SKB) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800835 struct iwl3945_cmd *qcmd;
Zhu Yib481de92007-09-25 17:54:57 -0700836
837 /* Cancel the CMD_WANT_SKB flag for the cmd in the
838 * TX cmd queue. Otherwise in case the cmd comes
839 * in later, it will possibly set an invalid
840 * address (cmd->meta.source). */
841 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
842 qcmd->meta.flags &= ~CMD_WANT_SKB;
843 }
844fail:
845 if (cmd->meta.u.skb) {
846 dev_kfree_skb_any(cmd->meta.u.skb);
847 cmd->meta.u.skb = NULL;
848 }
849out:
850 atomic_set(&entry, 0);
851 return ret;
852}
853
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800854int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700855{
Zhu Yib481de92007-09-25 17:54:57 -0700856 if (cmd->meta.flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800857 return iwl3945_send_cmd_async(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700858
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800859 return iwl3945_send_cmd_sync(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700860}
861
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800862int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
Zhu Yib481de92007-09-25 17:54:57 -0700863{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800864 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700865 .id = id,
866 .len = len,
867 .data = data,
868 };
869
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800870 return iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700871}
872
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800873static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
Zhu Yib481de92007-09-25 17:54:57 -0700874{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800875 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700876 .id = id,
877 .len = sizeof(val),
878 .data = &val,
879 };
880
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800881 return iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700882}
883
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800884int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700885{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800886 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700887}
888
889/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800890 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
Zhu Yib481de92007-09-25 17:54:57 -0700891 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
892 * @channel: Any channel valid for the requested phymode
893
894 * In addition to setting the staging RXON, priv->phymode is also set.
895 *
896 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
897 * in the staging RXON flag structure based on the phymode
898 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800899static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv, u8 phymode, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -0700900{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800901 if (!iwl3945_get_channel_info(priv, phymode, channel)) {
Zhu Yib481de92007-09-25 17:54:57 -0700902 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
903 channel, phymode);
904 return -EINVAL;
905 }
906
907 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
908 (priv->phymode == phymode))
909 return 0;
910
911 priv->staging_rxon.channel = cpu_to_le16(channel);
912 if (phymode == MODE_IEEE80211A)
913 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
914 else
915 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
916
917 priv->phymode = phymode;
918
919 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
920
921 return 0;
922}
923
924/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800925 * iwl3945_check_rxon_cmd - validate RXON structure is valid
Zhu Yib481de92007-09-25 17:54:57 -0700926 *
927 * NOTE: This is really only useful during development and can eventually
928 * be #ifdef'd out once the driver is stable and folks aren't actively
929 * making changes
930 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800931static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -0700932{
933 int error = 0;
934 int counter = 1;
935
936 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
937 error |= le32_to_cpu(rxon->flags &
938 (RXON_FLG_TGJ_NARROW_BAND_MSK |
939 RXON_FLG_RADAR_DETECT_MSK));
940 if (error)
941 IWL_WARNING("check 24G fields %d | %d\n",
942 counter++, error);
943 } else {
944 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
945 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
946 if (error)
947 IWL_WARNING("check 52 fields %d | %d\n",
948 counter++, error);
949 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
950 if (error)
951 IWL_WARNING("check 52 CCK %d | %d\n",
952 counter++, error);
953 }
954 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
955 if (error)
956 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
957
958 /* make sure basic rates 6Mbps and 1Mbps are supported */
959 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
960 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
961 if (error)
962 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
963
964 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
965 if (error)
966 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
967
968 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
969 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
970 if (error)
971 IWL_WARNING("check CCK and short slot %d | %d\n",
972 counter++, error);
973
974 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
975 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
976 if (error)
977 IWL_WARNING("check CCK & auto detect %d | %d\n",
978 counter++, error);
979
980 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
981 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
982 if (error)
983 IWL_WARNING("check TGG and auto detect %d | %d\n",
984 counter++, error);
985
986 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
987 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
988 RXON_FLG_ANT_A_MSK)) == 0);
989 if (error)
990 IWL_WARNING("check antenna %d %d\n", counter++, error);
991
992 if (error)
993 IWL_WARNING("Tuning to channel %d\n",
994 le16_to_cpu(rxon->channel));
995
996 if (error) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800997 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
Zhu Yib481de92007-09-25 17:54:57 -0700998 return -1;
999 }
1000 return 0;
1001}
1002
1003/**
Ben Cahill9fbab512007-11-29 11:09:47 +08001004 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
Ian Schram01ebd062007-10-25 17:15:22 +08001005 * @priv: staging_rxon is compared to active_rxon
Zhu Yib481de92007-09-25 17:54:57 -07001006 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001007 * If the RXON structure is changing enough to require a new tune,
1008 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1009 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
Zhu Yib481de92007-09-25 17:54:57 -07001010 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001011static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001012{
1013
1014 /* These items are only settable from the full RXON command */
1015 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1016 compare_ether_addr(priv->staging_rxon.bssid_addr,
1017 priv->active_rxon.bssid_addr) ||
1018 compare_ether_addr(priv->staging_rxon.node_addr,
1019 priv->active_rxon.node_addr) ||
1020 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1021 priv->active_rxon.wlap_bssid_addr) ||
1022 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1023 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1024 (priv->staging_rxon.air_propagation !=
1025 priv->active_rxon.air_propagation) ||
1026 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1027 return 1;
1028
1029 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1030 * be updated with the RXON_ASSOC command -- however only some
1031 * flag transitions are allowed using RXON_ASSOC */
1032
1033 /* Check if we are not switching bands */
1034 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1035 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1036 return 1;
1037
1038 /* Check if we are switching association toggle */
1039 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1040 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1041 return 1;
1042
1043 return 0;
1044}
1045
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001046static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001047{
1048 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001049 struct iwl3945_rx_packet *res = NULL;
1050 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1051 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001052 .id = REPLY_RXON_ASSOC,
1053 .len = sizeof(rxon_assoc),
1054 .meta.flags = CMD_WANT_SKB,
1055 .data = &rxon_assoc,
1056 };
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001057 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
1058 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001059
1060 if ((rxon1->flags == rxon2->flags) &&
1061 (rxon1->filter_flags == rxon2->filter_flags) &&
1062 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1063 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1064 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1065 return 0;
1066 }
1067
1068 rxon_assoc.flags = priv->staging_rxon.flags;
1069 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1070 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1071 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1072 rxon_assoc.reserved = 0;
1073
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001074 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001075 if (rc)
1076 return rc;
1077
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001078 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001079 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1080 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1081 rc = -EIO;
1082 }
1083
1084 priv->alloc_rxb_skb--;
1085 dev_kfree_skb_any(cmd.meta.u.skb);
1086
1087 return rc;
1088}
1089
1090/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001091 * iwl3945_commit_rxon - commit staging_rxon to hardware
Zhu Yib481de92007-09-25 17:54:57 -07001092 *
Ian Schram01ebd062007-10-25 17:15:22 +08001093 * The RXON command in staging_rxon is committed to the hardware and
Zhu Yib481de92007-09-25 17:54:57 -07001094 * the active_rxon structure is updated with the new data. This
1095 * function correctly transitions out of the RXON_ASSOC_MSK state if
1096 * a HW tune is required based on the RXON structure changes.
1097 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001098static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001099{
1100 /* cast away the const for active_rxon in this function */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001101 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001102 int rc = 0;
Joe Perches0795af52007-10-03 17:59:30 -07001103 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07001104
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001105 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07001106 return -1;
1107
1108 /* always get timestamp with Rx frame */
1109 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1110
1111 /* select antenna */
1112 priv->staging_rxon.flags &=
1113 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1114 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1115
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001116 rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001117 if (rc) {
1118 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1119 return -EINVAL;
1120 }
1121
1122 /* If we don't need to send a full RXON, we can use
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001123 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
Zhu Yib481de92007-09-25 17:54:57 -07001124 * and other flags for the current radio configuration. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001125 if (!iwl3945_full_rxon_required(priv)) {
1126 rc = iwl3945_send_rxon_assoc(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001127 if (rc) {
1128 IWL_ERROR("Error setting RXON_ASSOC "
1129 "configuration (%d).\n", rc);
1130 return rc;
1131 }
1132
1133 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1134
1135 return 0;
1136 }
1137
1138 /* If we are currently associated and the new config requires
1139 * an RXON_ASSOC and the new config wants the associated mask enabled,
1140 * we must clear the associated from the active configuration
1141 * before we apply the new config */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001142 if (iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001143 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1144 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1145 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1146
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001147 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1148 sizeof(struct iwl3945_rxon_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001149 &priv->active_rxon);
1150
1151 /* If the mask clearing failed then we set
1152 * active_rxon back to what it was previously */
1153 if (rc) {
1154 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1155 IWL_ERROR("Error clearing ASSOC_MSK on current "
1156 "configuration (%d).\n", rc);
1157 return rc;
1158 }
Zhu Yib481de92007-09-25 17:54:57 -07001159 }
1160
1161 IWL_DEBUG_INFO("Sending RXON\n"
1162 "* with%s RXON_FILTER_ASSOC_MSK\n"
1163 "* channel = %d\n"
Joe Perches0795af52007-10-03 17:59:30 -07001164 "* bssid = %s\n",
Zhu Yib481de92007-09-25 17:54:57 -07001165 ((priv->staging_rxon.filter_flags &
1166 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1167 le16_to_cpu(priv->staging_rxon.channel),
Joe Perches0795af52007-10-03 17:59:30 -07001168 print_mac(mac, priv->staging_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07001169
1170 /* Apply the new configuration */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001171 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1172 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001173 if (rc) {
1174 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1175 return rc;
1176 }
1177
1178 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1179
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001180 iwl3945_clear_stations_table(priv);
Zhu Yi556f8db2007-09-27 11:27:33 +08001181
Zhu Yib481de92007-09-25 17:54:57 -07001182 /* If we issue a new RXON command which required a tune then we must
1183 * send a new TXPOWER command or we won't be able to Tx any frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001184 rc = iwl3945_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001185 if (rc) {
1186 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1187 return rc;
1188 }
1189
1190 /* Add the broadcast address so we can send broadcast frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001191 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
Zhu Yib481de92007-09-25 17:54:57 -07001192 IWL_INVALID_STATION) {
1193 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1194 return -EIO;
1195 }
1196
1197 /* If we have set the ASSOC_MSK and we are in BSS mode then
1198 * add the IWL_AP_ID to the station rate table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001199 if (iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001200 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001201 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
Zhu Yib481de92007-09-25 17:54:57 -07001202 == IWL_INVALID_STATION) {
1203 IWL_ERROR("Error adding AP address for transmit.\n");
1204 return -EIO;
1205 }
1206
1207 /* Init the hardware's rate fallback order based on the
1208 * phymode */
1209 rc = iwl3945_init_hw_rate_table(priv);
1210 if (rc) {
1211 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1212 return -EIO;
1213 }
1214
1215 return 0;
1216}
1217
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001218static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001219{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001220 struct iwl3945_bt_cmd bt_cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001221 .flags = 3,
1222 .lead_time = 0xAA,
1223 .max_kill = 1,
1224 .kill_ack_mask = 0,
1225 .kill_cts_mask = 0,
1226 };
1227
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001228 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1229 sizeof(struct iwl3945_bt_cmd), &bt_cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001230}
1231
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001232static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001233{
1234 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001235 struct iwl3945_rx_packet *res;
1236 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001237 .id = REPLY_SCAN_ABORT_CMD,
1238 .meta.flags = CMD_WANT_SKB,
1239 };
1240
1241 /* If there isn't a scan actively going on in the hardware
1242 * then we are in between scan bands and not actually
1243 * actively scanning, so don't send the abort command */
1244 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1245 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1246 return 0;
1247 }
1248
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001249 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001250 if (rc) {
1251 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1252 return rc;
1253 }
1254
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001255 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001256 if (res->u.status != CAN_ABORT_STATUS) {
1257 /* The scan abort will return 1 for success or
1258 * 2 for "failure". A failure condition can be
1259 * due to simply not being in an active scan which
1260 * can occur if we send the scan abort before we
1261 * the microcode has notified us that a scan is
1262 * completed. */
1263 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1264 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1265 clear_bit(STATUS_SCAN_HW, &priv->status);
1266 }
1267
1268 dev_kfree_skb_any(cmd.meta.u.skb);
1269
1270 return rc;
1271}
1272
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001273static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1274 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07001275 struct sk_buff *skb)
1276{
1277 return 1;
1278}
1279
1280/*
1281 * CARD_STATE_CMD
1282 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001283 * Use: Sets the device's internal card state to enable, disable, or halt
Zhu Yib481de92007-09-25 17:54:57 -07001284 *
1285 * When in the 'enable' state the card operates as normal.
1286 * When in the 'disable' state, the card enters into a low power mode.
1287 * When in the 'halt' state, the card is shut down and must be fully
1288 * restarted to come back on.
1289 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001290static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
Zhu Yib481de92007-09-25 17:54:57 -07001291{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001292 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001293 .id = REPLY_CARD_STATE_CMD,
1294 .len = sizeof(u32),
1295 .data = &flags,
1296 .meta.flags = meta_flag,
1297 };
1298
1299 if (meta_flag & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001300 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001301
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001302 return iwl3945_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001303}
1304
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001305static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1306 struct iwl3945_cmd *cmd, struct sk_buff *skb)
Zhu Yib481de92007-09-25 17:54:57 -07001307{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001308 struct iwl3945_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001309
1310 if (!skb) {
1311 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1312 return 1;
1313 }
1314
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001315 res = (struct iwl3945_rx_packet *)skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001316 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1317 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1318 res->hdr.flags);
1319 return 1;
1320 }
1321
1322 switch (res->u.add_sta.status) {
1323 case ADD_STA_SUCCESS_MSK:
1324 break;
1325 default:
1326 break;
1327 }
1328
1329 /* We didn't cache the SKB; let the caller free it */
1330 return 1;
1331}
1332
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001333int iwl3945_send_add_station(struct iwl3945_priv *priv,
1334 struct iwl3945_addsta_cmd *sta, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -07001335{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001336 struct iwl3945_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001337 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001338 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001339 .id = REPLY_ADD_STA,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001340 .len = sizeof(struct iwl3945_addsta_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001341 .meta.flags = flags,
1342 .data = sta,
1343 };
1344
1345 if (flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001346 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001347 else
1348 cmd.meta.flags |= CMD_WANT_SKB;
1349
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001350 rc = iwl3945_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001351
1352 if (rc || (flags & CMD_ASYNC))
1353 return rc;
1354
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001355 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001356 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1357 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1358 res->hdr.flags);
1359 rc = -EIO;
1360 }
1361
1362 if (rc == 0) {
1363 switch (res->u.add_sta.status) {
1364 case ADD_STA_SUCCESS_MSK:
1365 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1366 break;
1367 default:
1368 rc = -EIO;
1369 IWL_WARNING("REPLY_ADD_STA failed\n");
1370 break;
1371 }
1372 }
1373
1374 priv->alloc_rxb_skb--;
1375 dev_kfree_skb_any(cmd.meta.u.skb);
1376
1377 return rc;
1378}
1379
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001380static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001381 struct ieee80211_key_conf *keyconf,
1382 u8 sta_id)
1383{
1384 unsigned long flags;
1385 __le16 key_flags = 0;
1386
1387 switch (keyconf->alg) {
1388 case ALG_CCMP:
1389 key_flags |= STA_KEY_FLG_CCMP;
1390 key_flags |= cpu_to_le16(
1391 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1392 key_flags &= ~STA_KEY_FLG_INVALID;
1393 break;
1394 case ALG_TKIP:
1395 case ALG_WEP:
Zhu Yib481de92007-09-25 17:54:57 -07001396 default:
1397 return -EINVAL;
1398 }
1399 spin_lock_irqsave(&priv->sta_lock, flags);
1400 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1401 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1402 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1403 keyconf->keylen);
1404
1405 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1406 keyconf->keylen);
1407 priv->stations[sta_id].sta.key.key_flags = key_flags;
1408 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1409 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1410
1411 spin_unlock_irqrestore(&priv->sta_lock, flags);
1412
1413 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001414 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001415 return 0;
1416}
1417
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001418static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
Zhu Yib481de92007-09-25 17:54:57 -07001419{
1420 unsigned long flags;
1421
1422 spin_lock_irqsave(&priv->sta_lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001423 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1424 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
Zhu Yib481de92007-09-25 17:54:57 -07001425 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1426 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1427 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1428 spin_unlock_irqrestore(&priv->sta_lock, flags);
1429
1430 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001431 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001432 return 0;
1433}
1434
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001435static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001436{
1437 struct list_head *element;
1438
1439 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1440 priv->frames_count);
1441
1442 while (!list_empty(&priv->free_frames)) {
1443 element = priv->free_frames.next;
1444 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001445 kfree(list_entry(element, struct iwl3945_frame, list));
Zhu Yib481de92007-09-25 17:54:57 -07001446 priv->frames_count--;
1447 }
1448
1449 if (priv->frames_count) {
1450 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1451 priv->frames_count);
1452 priv->frames_count = 0;
1453 }
1454}
1455
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001456static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001457{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001458 struct iwl3945_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001459 struct list_head *element;
1460 if (list_empty(&priv->free_frames)) {
1461 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1462 if (!frame) {
1463 IWL_ERROR("Could not allocate frame!\n");
1464 return NULL;
1465 }
1466
1467 priv->frames_count++;
1468 return frame;
1469 }
1470
1471 element = priv->free_frames.next;
1472 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001473 return list_entry(element, struct iwl3945_frame, list);
Zhu Yib481de92007-09-25 17:54:57 -07001474}
1475
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001476static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
Zhu Yib481de92007-09-25 17:54:57 -07001477{
1478 memset(frame, 0, sizeof(*frame));
1479 list_add(&frame->list, &priv->free_frames);
1480}
1481
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001482unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001483 struct ieee80211_hdr *hdr,
1484 const u8 *dest, int left)
1485{
1486
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001487 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
Zhu Yib481de92007-09-25 17:54:57 -07001488 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1489 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1490 return 0;
1491
1492 if (priv->ibss_beacon->len > left)
1493 return 0;
1494
1495 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1496
1497 return priv->ibss_beacon->len;
1498}
1499
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001500static int iwl3945_rate_index_from_plcp(int plcp)
Zhu Yib481de92007-09-25 17:54:57 -07001501{
1502 int i = 0;
1503
1504 for (i = 0; i < IWL_RATE_COUNT; i++)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001505 if (iwl3945_rates[i].plcp == plcp)
Zhu Yib481de92007-09-25 17:54:57 -07001506 return i;
1507 return -1;
1508}
1509
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001510static u8 iwl3945_rate_get_lowest_plcp(int rate_mask)
Zhu Yib481de92007-09-25 17:54:57 -07001511{
1512 u8 i;
1513
1514 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001515 i = iwl3945_rates[i].next_ieee) {
Zhu Yib481de92007-09-25 17:54:57 -07001516 if (rate_mask & (1 << i))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001517 return iwl3945_rates[i].plcp;
Zhu Yib481de92007-09-25 17:54:57 -07001518 }
1519
1520 return IWL_RATE_INVALID;
1521}
1522
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001523static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001524{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001525 struct iwl3945_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001526 unsigned int frame_size;
1527 int rc;
1528 u8 rate;
1529
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001530 frame = iwl3945_get_free_frame(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001531
1532 if (!frame) {
1533 IWL_ERROR("Could not obtain free frame buffer for beacon "
1534 "command.\n");
1535 return -ENOMEM;
1536 }
1537
1538 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001539 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic &
Zhu Yib481de92007-09-25 17:54:57 -07001540 0xFF0);
1541 if (rate == IWL_INVALID_RATE)
1542 rate = IWL_RATE_6M_PLCP;
1543 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001544 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
Zhu Yib481de92007-09-25 17:54:57 -07001545 if (rate == IWL_INVALID_RATE)
1546 rate = IWL_RATE_1M_PLCP;
1547 }
1548
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001549 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
Zhu Yib481de92007-09-25 17:54:57 -07001550
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001551 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
Zhu Yib481de92007-09-25 17:54:57 -07001552 &frame->u.cmd[0]);
1553
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001554 iwl3945_free_frame(priv, frame);
Zhu Yib481de92007-09-25 17:54:57 -07001555
1556 return rc;
1557}
1558
1559/******************************************************************************
1560 *
1561 * EEPROM related functions
1562 *
1563 ******************************************************************************/
1564
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001565static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
Zhu Yib481de92007-09-25 17:54:57 -07001566{
1567 memcpy(mac, priv->eeprom.mac_address, 6);
1568}
1569
1570/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001571 * iwl3945_eeprom_init - read EEPROM contents
Zhu Yib481de92007-09-25 17:54:57 -07001572 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001573 * Load the EEPROM contents from adapter into priv->eeprom
Zhu Yib481de92007-09-25 17:54:57 -07001574 *
1575 * NOTE: This routine uses the non-debug IO access functions.
1576 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001577int iwl3945_eeprom_init(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001578{
1579 u16 *e = (u16 *)&priv->eeprom;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001580 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
Zhu Yib481de92007-09-25 17:54:57 -07001581 u32 r;
1582 int sz = sizeof(priv->eeprom);
1583 int rc;
1584 int i;
1585 u16 addr;
1586
1587 /* The EEPROM structure has several padding buffers within it
1588 * and when adding new EEPROM maps is subject to programmer errors
1589 * which may be very difficult to identify without explicitly
1590 * checking the resulting size of the eeprom map. */
1591 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1592
1593 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1594 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1595 return -ENOENT;
1596 }
1597
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001598 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001599 rc = iwl3945_eeprom_acquire_semaphore(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001600 if (rc < 0) {
Ian Schram91e17472007-10-25 17:15:23 +08001601 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
Zhu Yib481de92007-09-25 17:54:57 -07001602 return -ENOENT;
1603 }
1604
1605 /* eeprom is an array of 16bit values */
1606 for (addr = 0; addr < sz; addr += sizeof(u16)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001607 _iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
1608 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
Zhu Yib481de92007-09-25 17:54:57 -07001609
1610 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1611 i += IWL_EEPROM_ACCESS_DELAY) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001612 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
Zhu Yib481de92007-09-25 17:54:57 -07001613 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1614 break;
1615 udelay(IWL_EEPROM_ACCESS_DELAY);
1616 }
1617
1618 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1619 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1620 return -ETIMEDOUT;
1621 }
1622 e[addr / 2] = le16_to_cpu(r >> 16);
1623 }
1624
1625 return 0;
1626}
1627
1628/******************************************************************************
1629 *
1630 * Misc. internal state and helper functions
1631 *
1632 ******************************************************************************/
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08001633#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07001634
1635/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001636 * iwl3945_report_frame - dump frame to syslog during debug sessions
Zhu Yib481de92007-09-25 17:54:57 -07001637 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001638 * You may hack this function to show different aspects of received frames,
Zhu Yib481de92007-09-25 17:54:57 -07001639 * including selective frame dumps.
1640 * group100 parameter selects whether to show 1 out of 100 good frames.
Zhu Yib481de92007-09-25 17:54:57 -07001641 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001642void iwl3945_report_frame(struct iwl3945_priv *priv,
1643 struct iwl3945_rx_packet *pkt,
Zhu Yib481de92007-09-25 17:54:57 -07001644 struct ieee80211_hdr *header, int group100)
1645{
1646 u32 to_us;
1647 u32 print_summary = 0;
1648 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
1649 u32 hundred = 0;
1650 u32 dataframe = 0;
1651 u16 fc;
1652 u16 seq_ctl;
1653 u16 channel;
1654 u16 phy_flags;
1655 int rate_sym;
1656 u16 length;
1657 u16 status;
1658 u16 bcn_tmr;
1659 u32 tsf_low;
1660 u64 tsf;
1661 u8 rssi;
1662 u8 agc;
1663 u16 sig_avg;
1664 u16 noise_diff;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001665 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
1666 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
1667 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
Zhu Yib481de92007-09-25 17:54:57 -07001668 u8 *data = IWL_RX_DATA(pkt);
1669
1670 /* MAC header */
1671 fc = le16_to_cpu(header->frame_control);
1672 seq_ctl = le16_to_cpu(header->seq_ctrl);
1673
1674 /* metadata */
1675 channel = le16_to_cpu(rx_hdr->channel);
1676 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
1677 rate_sym = rx_hdr->rate;
1678 length = le16_to_cpu(rx_hdr->len);
1679
1680 /* end-of-frame status and timestamp */
1681 status = le32_to_cpu(rx_end->status);
1682 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
1683 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
1684 tsf = le64_to_cpu(rx_end->timestamp);
1685
1686 /* signal statistics */
1687 rssi = rx_stats->rssi;
1688 agc = rx_stats->agc;
1689 sig_avg = le16_to_cpu(rx_stats->sig_avg);
1690 noise_diff = le16_to_cpu(rx_stats->noise_diff);
1691
1692 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
1693
1694 /* if data frame is to us and all is good,
1695 * (optionally) print summary for only 1 out of every 100 */
1696 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
1697 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
1698 dataframe = 1;
1699 if (!group100)
1700 print_summary = 1; /* print each frame */
1701 else if (priv->framecnt_to_us < 100) {
1702 priv->framecnt_to_us++;
1703 print_summary = 0;
1704 } else {
1705 priv->framecnt_to_us = 0;
1706 print_summary = 1;
1707 hundred = 1;
1708 }
1709 } else {
1710 /* print summary for all other frames */
1711 print_summary = 1;
1712 }
1713
1714 if (print_summary) {
1715 char *title;
1716 u32 rate;
1717
1718 if (hundred)
1719 title = "100Frames";
1720 else if (fc & IEEE80211_FCTL_RETRY)
1721 title = "Retry";
1722 else if (ieee80211_is_assoc_response(fc))
1723 title = "AscRsp";
1724 else if (ieee80211_is_reassoc_response(fc))
1725 title = "RasRsp";
1726 else if (ieee80211_is_probe_response(fc)) {
1727 title = "PrbRsp";
1728 print_dump = 1; /* dump frame contents */
1729 } else if (ieee80211_is_beacon(fc)) {
1730 title = "Beacon";
1731 print_dump = 1; /* dump frame contents */
1732 } else if (ieee80211_is_atim(fc))
1733 title = "ATIM";
1734 else if (ieee80211_is_auth(fc))
1735 title = "Auth";
1736 else if (ieee80211_is_deauth(fc))
1737 title = "DeAuth";
1738 else if (ieee80211_is_disassoc(fc))
1739 title = "DisAssoc";
1740 else
1741 title = "Frame";
1742
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001743 rate = iwl3945_rate_index_from_plcp(rate_sym);
Zhu Yib481de92007-09-25 17:54:57 -07001744 if (rate == -1)
1745 rate = 0;
1746 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001747 rate = iwl3945_rates[rate].ieee / 2;
Zhu Yib481de92007-09-25 17:54:57 -07001748
1749 /* print frame summary.
1750 * MAC addresses show just the last byte (for brevity),
1751 * but you can hack it to show more, if you'd like to. */
1752 if (dataframe)
1753 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
1754 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
1755 title, fc, header->addr1[5],
1756 length, rssi, channel, rate);
1757 else {
1758 /* src/dst addresses assume managed mode */
1759 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
1760 "src=0x%02x, rssi=%u, tim=%lu usec, "
1761 "phy=0x%02x, chnl=%d\n",
1762 title, fc, header->addr1[5],
1763 header->addr3[5], rssi,
1764 tsf_low - priv->scan_start_tsf,
1765 phy_flags, channel);
1766 }
1767 }
1768 if (print_dump)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001769 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
Zhu Yib481de92007-09-25 17:54:57 -07001770}
1771#endif
1772
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001773static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001774{
1775 if (priv->hw_setting.shared_virt)
1776 pci_free_consistent(priv->pci_dev,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001777 sizeof(struct iwl3945_shared),
Zhu Yib481de92007-09-25 17:54:57 -07001778 priv->hw_setting.shared_virt,
1779 priv->hw_setting.shared_phys);
1780}
1781
1782/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001783 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
Zhu Yib481de92007-09-25 17:54:57 -07001784 *
1785 * return : set the bit for each supported rate insert in ie
1786 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001787static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001788 u16 basic_rate, int *left)
Zhu Yib481de92007-09-25 17:54:57 -07001789{
1790 u16 ret_rates = 0, bit;
1791 int i;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001792 u8 *cnt = ie;
1793 u8 *rates = ie + 1;
Zhu Yib481de92007-09-25 17:54:57 -07001794
1795 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1796 if (bit & supported_rate) {
1797 ret_rates |= bit;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001798 rates[*cnt] = iwl3945_rates[i].ieee |
Tomas Winklerc7c46672007-10-18 02:04:15 +02001799 ((bit & basic_rate) ? 0x80 : 0x00);
1800 (*cnt)++;
1801 (*left)--;
1802 if ((*left <= 0) ||
1803 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
Zhu Yib481de92007-09-25 17:54:57 -07001804 break;
1805 }
1806 }
1807
1808 return ret_rates;
1809}
1810
1811/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001812 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
Zhu Yib481de92007-09-25 17:54:57 -07001813 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001814static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001815 struct ieee80211_mgmt *frame,
1816 int left, int is_direct)
1817{
1818 int len = 0;
1819 u8 *pos = NULL;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001820 u16 active_rates, ret_rates, cck_rates;
Zhu Yib481de92007-09-25 17:54:57 -07001821
1822 /* Make sure there is enough space for the probe request,
1823 * two mandatory IEs and the data */
1824 left -= 24;
1825 if (left < 0)
1826 return 0;
1827 len += 24;
1828
1829 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001830 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001831 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001832 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001833 frame->seq_ctrl = 0;
1834
1835 /* fill in our indirect SSID IE */
1836 /* ...next IE... */
1837
1838 left -= 2;
1839 if (left < 0)
1840 return 0;
1841 len += 2;
1842 pos = &(frame->u.probe_req.variable[0]);
1843 *pos++ = WLAN_EID_SSID;
1844 *pos++ = 0;
1845
1846 /* fill in our direct SSID IE... */
1847 if (is_direct) {
1848 /* ...next IE... */
1849 left -= 2 + priv->essid_len;
1850 if (left < 0)
1851 return 0;
1852 /* ... fill it in... */
1853 *pos++ = WLAN_EID_SSID;
1854 *pos++ = priv->essid_len;
1855 memcpy(pos, priv->essid, priv->essid_len);
1856 pos += priv->essid_len;
1857 len += 2 + priv->essid_len;
1858 }
1859
1860 /* fill in supported rate */
1861 /* ...next IE... */
1862 left -= 2;
1863 if (left < 0)
1864 return 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001865
Zhu Yib481de92007-09-25 17:54:57 -07001866 /* ... fill it in... */
1867 *pos++ = WLAN_EID_SUPP_RATES;
1868 *pos = 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001869
1870 priv->active_rate = priv->rates_mask;
1871 active_rates = priv->active_rate;
Zhu Yib481de92007-09-25 17:54:57 -07001872 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1873
Tomas Winklerc7c46672007-10-18 02:04:15 +02001874 cck_rates = IWL_CCK_RATES_MASK & active_rates;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001875 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001876 priv->active_rate_basic, &left);
1877 active_rates &= ~ret_rates;
1878
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001879 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001880 priv->active_rate_basic, &left);
1881 active_rates &= ~ret_rates;
1882
Zhu Yib481de92007-09-25 17:54:57 -07001883 len += 2 + *pos;
1884 pos += (*pos) + 1;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001885 if (active_rates == 0)
Zhu Yib481de92007-09-25 17:54:57 -07001886 goto fill_end;
1887
1888 /* fill in supported extended rate */
1889 /* ...next IE... */
1890 left -= 2;
1891 if (left < 0)
1892 return 0;
1893 /* ... fill it in... */
1894 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1895 *pos = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001896 iwl3945_supported_rate_to_ie(pos, active_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001897 priv->active_rate_basic, &left);
Zhu Yib481de92007-09-25 17:54:57 -07001898 if (*pos > 0)
1899 len += 2 + *pos;
1900
1901 fill_end:
1902 return (u16)len;
1903}
1904
1905/*
1906 * QoS support
1907*/
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08001908#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001909static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1910 struct iwl3945_qosparam_cmd *qos)
Zhu Yib481de92007-09-25 17:54:57 -07001911{
1912
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001913 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1914 sizeof(struct iwl3945_qosparam_cmd), qos);
Zhu Yib481de92007-09-25 17:54:57 -07001915}
1916
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001917static void iwl3945_reset_qos(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001918{
1919 u16 cw_min = 15;
1920 u16 cw_max = 1023;
1921 u8 aifs = 2;
1922 u8 is_legacy = 0;
1923 unsigned long flags;
1924 int i;
1925
1926 spin_lock_irqsave(&priv->lock, flags);
1927 priv->qos_data.qos_active = 0;
1928
1929 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1930 if (priv->qos_data.qos_enable)
1931 priv->qos_data.qos_active = 1;
1932 if (!(priv->active_rate & 0xfff0)) {
1933 cw_min = 31;
1934 is_legacy = 1;
1935 }
1936 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1937 if (priv->qos_data.qos_enable)
1938 priv->qos_data.qos_active = 1;
1939 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1940 cw_min = 31;
1941 is_legacy = 1;
1942 }
1943
1944 if (priv->qos_data.qos_active)
1945 aifs = 3;
1946
1947 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1948 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1949 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1950 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1951 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1952
1953 if (priv->qos_data.qos_active) {
1954 i = 1;
1955 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1956 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1957 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1958 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1959 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1960
1961 i = 2;
1962 priv->qos_data.def_qos_parm.ac[i].cw_min =
1963 cpu_to_le16((cw_min + 1) / 2 - 1);
1964 priv->qos_data.def_qos_parm.ac[i].cw_max =
1965 cpu_to_le16(cw_max);
1966 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1967 if (is_legacy)
1968 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1969 cpu_to_le16(6016);
1970 else
1971 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1972 cpu_to_le16(3008);
1973 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1974
1975 i = 3;
1976 priv->qos_data.def_qos_parm.ac[i].cw_min =
1977 cpu_to_le16((cw_min + 1) / 4 - 1);
1978 priv->qos_data.def_qos_parm.ac[i].cw_max =
1979 cpu_to_le16((cw_max + 1) / 2 - 1);
1980 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1981 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1982 if (is_legacy)
1983 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1984 cpu_to_le16(3264);
1985 else
1986 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1987 cpu_to_le16(1504);
1988 } else {
1989 for (i = 1; i < 4; i++) {
1990 priv->qos_data.def_qos_parm.ac[i].cw_min =
1991 cpu_to_le16(cw_min);
1992 priv->qos_data.def_qos_parm.ac[i].cw_max =
1993 cpu_to_le16(cw_max);
1994 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1995 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1996 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1997 }
1998 }
1999 IWL_DEBUG_QOS("set QoS to default \n");
2000
2001 spin_unlock_irqrestore(&priv->lock, flags);
2002}
2003
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002004static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
Zhu Yib481de92007-09-25 17:54:57 -07002005{
2006 unsigned long flags;
2007
Zhu Yib481de92007-09-25 17:54:57 -07002008 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2009 return;
2010
2011 if (!priv->qos_data.qos_enable)
2012 return;
2013
2014 spin_lock_irqsave(&priv->lock, flags);
2015 priv->qos_data.def_qos_parm.qos_flags = 0;
2016
2017 if (priv->qos_data.qos_cap.q_AP.queue_request &&
2018 !priv->qos_data.qos_cap.q_AP.txop_request)
2019 priv->qos_data.def_qos_parm.qos_flags |=
2020 QOS_PARAM_FLG_TXOP_TYPE_MSK;
2021
2022 if (priv->qos_data.qos_active)
2023 priv->qos_data.def_qos_parm.qos_flags |=
2024 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
2025
2026 spin_unlock_irqrestore(&priv->lock, flags);
2027
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002028 if (force || iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002029 IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
2030 priv->qos_data.qos_active);
2031
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002032 iwl3945_send_qos_params_command(priv,
Zhu Yib481de92007-09-25 17:54:57 -07002033 &(priv->qos_data.def_qos_parm));
2034 }
2035}
2036
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002037#endif /* CONFIG_IWL3945_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07002038/*
2039 * Power management (not Tx power!) functions
2040 */
2041#define MSEC_TO_USEC 1024
2042
2043#define NOSLP __constant_cpu_to_le32(0)
2044#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
2045#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
2046#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
2047 __constant_cpu_to_le32(X1), \
2048 __constant_cpu_to_le32(X2), \
2049 __constant_cpu_to_le32(X3), \
2050 __constant_cpu_to_le32(X4)}
2051
2052
2053/* default power management (not Tx power) table values */
2054/* for tim 0-10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002055static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07002056 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2057 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
2058 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
2059 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
2060 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
2061 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
2062};
2063
2064/* for tim > 10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002065static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07002066 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2067 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
2068 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
2069 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
2070 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
2071 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
2072 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
2073 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
2074 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
2075 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
2076};
2077
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002078int iwl3945_power_init_handle(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002079{
2080 int rc = 0, i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002081 struct iwl3945_power_mgr *pow_data;
2082 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
Zhu Yib481de92007-09-25 17:54:57 -07002083 u16 pci_pm;
2084
2085 IWL_DEBUG_POWER("Initialize power \n");
2086
2087 pow_data = &(priv->power_data);
2088
2089 memset(pow_data, 0, sizeof(*pow_data));
2090
2091 pow_data->active_index = IWL_POWER_RANGE_0;
2092 pow_data->dtim_val = 0xffff;
2093
2094 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
2095 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
2096
2097 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
2098 if (rc != 0)
2099 return 0;
2100 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002101 struct iwl3945_powertable_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07002102
2103 IWL_DEBUG_POWER("adjust power command flags\n");
2104
2105 for (i = 0; i < IWL_POWER_AC; i++) {
2106 cmd = &pow_data->pwr_range_0[i].cmd;
2107
2108 if (pci_pm & 0x1)
2109 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
2110 else
2111 cmd->flags |= IWL_POWER_PCI_PM_MSK;
2112 }
2113 }
2114 return rc;
2115}
2116
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002117static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
2118 struct iwl3945_powertable_cmd *cmd, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07002119{
2120 int rc = 0, i;
2121 u8 skip;
2122 u32 max_sleep = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002123 struct iwl3945_power_vec_entry *range;
Zhu Yib481de92007-09-25 17:54:57 -07002124 u8 period = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002125 struct iwl3945_power_mgr *pow_data;
Zhu Yib481de92007-09-25 17:54:57 -07002126
2127 if (mode > IWL_POWER_INDEX_5) {
2128 IWL_DEBUG_POWER("Error invalid power mode \n");
2129 return -1;
2130 }
2131 pow_data = &(priv->power_data);
2132
2133 if (pow_data->active_index == IWL_POWER_RANGE_0)
2134 range = &pow_data->pwr_range_0[0];
2135 else
2136 range = &pow_data->pwr_range_1[1];
2137
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002138 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
Zhu Yib481de92007-09-25 17:54:57 -07002139
2140#ifdef IWL_MAC80211_DISABLE
2141 if (priv->assoc_network != NULL) {
2142 unsigned long flags;
2143
2144 period = priv->assoc_network->tim.tim_period;
2145 }
2146#endif /*IWL_MAC80211_DISABLE */
2147 skip = range[mode].no_dtim;
2148
2149 if (period == 0) {
2150 period = 1;
2151 skip = 0;
2152 }
2153
2154 if (skip == 0) {
2155 max_sleep = period;
2156 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
2157 } else {
2158 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
2159 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
2160 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
2161 }
2162
2163 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
2164 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
2165 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
2166 }
2167
2168 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
2169 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
2170 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
2171 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
2172 le32_to_cpu(cmd->sleep_interval[0]),
2173 le32_to_cpu(cmd->sleep_interval[1]),
2174 le32_to_cpu(cmd->sleep_interval[2]),
2175 le32_to_cpu(cmd->sleep_interval[3]),
2176 le32_to_cpu(cmd->sleep_interval[4]));
2177
2178 return rc;
2179}
2180
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002181static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07002182{
John W. Linville9a62f732007-11-15 16:27:36 -05002183 u32 uninitialized_var(final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002184 int rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002185 struct iwl3945_powertable_cmd cmd;
Zhu Yib481de92007-09-25 17:54:57 -07002186
2187 /* If on battery, set to 3,
Ian Schram01ebd062007-10-25 17:15:22 +08002188 * if plugged into AC power, set to CAM ("continuously aware mode"),
Zhu Yib481de92007-09-25 17:54:57 -07002189 * else user level */
2190 switch (mode) {
2191 case IWL_POWER_BATTERY:
2192 final_mode = IWL_POWER_INDEX_3;
2193 break;
2194 case IWL_POWER_AC:
2195 final_mode = IWL_POWER_MODE_CAM;
2196 break;
2197 default:
2198 final_mode = mode;
2199 break;
2200 }
2201
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002202 iwl3945_update_power_cmd(priv, &cmd, final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002203
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002204 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07002205
2206 if (final_mode == IWL_POWER_MODE_CAM)
2207 clear_bit(STATUS_POWER_PMI, &priv->status);
2208 else
2209 set_bit(STATUS_POWER_PMI, &priv->status);
2210
2211 return rc;
2212}
2213
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002214int iwl3945_is_network_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07002215{
2216 /* Filter incoming packets to determine if they are targeted toward
2217 * this network, discarding packets coming from ourselves */
2218 switch (priv->iw_mode) {
2219 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2220 /* packets from our adapter are dropped (echo) */
2221 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2222 return 0;
2223 /* {broad,multi}cast packets to our IBSS go through */
2224 if (is_multicast_ether_addr(header->addr1))
2225 return !compare_ether_addr(header->addr3, priv->bssid);
2226 /* packets to our adapter go through */
2227 return !compare_ether_addr(header->addr1, priv->mac_addr);
2228 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2229 /* packets from our adapter are dropped (echo) */
2230 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2231 return 0;
2232 /* {broad,multi}cast packets to our BSS go through */
2233 if (is_multicast_ether_addr(header->addr1))
2234 return !compare_ether_addr(header->addr2, priv->bssid);
2235 /* packets to our adapter go through */
2236 return !compare_ether_addr(header->addr1, priv->mac_addr);
2237 }
2238
2239 return 1;
2240}
2241
2242#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2243
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002244static const char *iwl3945_get_tx_fail_reason(u32 status)
Zhu Yib481de92007-09-25 17:54:57 -07002245{
2246 switch (status & TX_STATUS_MSK) {
2247 case TX_STATUS_SUCCESS:
2248 return "SUCCESS";
2249 TX_STATUS_ENTRY(SHORT_LIMIT);
2250 TX_STATUS_ENTRY(LONG_LIMIT);
2251 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2252 TX_STATUS_ENTRY(MGMNT_ABORT);
2253 TX_STATUS_ENTRY(NEXT_FRAG);
2254 TX_STATUS_ENTRY(LIFE_EXPIRE);
2255 TX_STATUS_ENTRY(DEST_PS);
2256 TX_STATUS_ENTRY(ABORTED);
2257 TX_STATUS_ENTRY(BT_RETRY);
2258 TX_STATUS_ENTRY(STA_INVALID);
2259 TX_STATUS_ENTRY(FRAG_DROPPED);
2260 TX_STATUS_ENTRY(TID_DISABLE);
2261 TX_STATUS_ENTRY(FRAME_FLUSHED);
2262 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2263 TX_STATUS_ENTRY(TX_LOCKED);
2264 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2265 }
2266
2267 return "UNKNOWN";
2268}
2269
2270/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002271 * iwl3945_scan_cancel - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002272 *
2273 * NOTE: priv->mutex is not required before calling this function
2274 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002275static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002276{
2277 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2278 clear_bit(STATUS_SCANNING, &priv->status);
2279 return 0;
2280 }
2281
2282 if (test_bit(STATUS_SCANNING, &priv->status)) {
2283 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2284 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2285 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2286 queue_work(priv->workqueue, &priv->abort_scan);
2287
2288 } else
2289 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2290
2291 return test_bit(STATUS_SCANNING, &priv->status);
2292 }
2293
2294 return 0;
2295}
2296
2297/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002298 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002299 * @ms: amount of time to wait (in milliseconds) for scan to abort
2300 *
2301 * NOTE: priv->mutex must be held before calling this function
2302 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002303static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
Zhu Yib481de92007-09-25 17:54:57 -07002304{
2305 unsigned long now = jiffies;
2306 int ret;
2307
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002308 ret = iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002309 if (ret && ms) {
2310 mutex_unlock(&priv->mutex);
2311 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2312 test_bit(STATUS_SCANNING, &priv->status))
2313 msleep(1);
2314 mutex_lock(&priv->mutex);
2315
2316 return test_bit(STATUS_SCANNING, &priv->status);
2317 }
2318
2319 return ret;
2320}
2321
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002322static void iwl3945_sequence_reset(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002323{
2324 /* Reset ieee stats */
2325
2326 /* We don't reset the net_device_stats (ieee->stats) on
2327 * re-association */
2328
2329 priv->last_seq_num = -1;
2330 priv->last_frag_num = -1;
2331 priv->last_packet_time = 0;
2332
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002333 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002334}
2335
2336#define MAX_UCODE_BEACON_INTERVAL 1024
2337#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2338
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002339static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
Zhu Yib481de92007-09-25 17:54:57 -07002340{
2341 u16 new_val = 0;
2342 u16 beacon_factor = 0;
2343
2344 beacon_factor =
2345 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2346 / MAX_UCODE_BEACON_INTERVAL;
2347 new_val = beacon_val / beacon_factor;
2348
2349 return cpu_to_le16(new_val);
2350}
2351
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002352static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002353{
2354 u64 interval_tm_unit;
2355 u64 tsf, result;
2356 unsigned long flags;
2357 struct ieee80211_conf *conf = NULL;
2358 u16 beacon_int = 0;
2359
2360 conf = ieee80211_get_hw_conf(priv->hw);
2361
2362 spin_lock_irqsave(&priv->lock, flags);
2363 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2364 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2365
2366 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2367
2368 tsf = priv->timestamp1;
2369 tsf = ((tsf << 32) | priv->timestamp0);
2370
2371 beacon_int = priv->beacon_int;
2372 spin_unlock_irqrestore(&priv->lock, flags);
2373
2374 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2375 if (beacon_int == 0) {
2376 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2377 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2378 } else {
2379 priv->rxon_timing.beacon_interval =
2380 cpu_to_le16(beacon_int);
2381 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002382 iwl3945_adjust_beacon_interval(
Zhu Yib481de92007-09-25 17:54:57 -07002383 le16_to_cpu(priv->rxon_timing.beacon_interval));
2384 }
2385
2386 priv->rxon_timing.atim_window = 0;
2387 } else {
2388 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002389 iwl3945_adjust_beacon_interval(conf->beacon_int);
Zhu Yib481de92007-09-25 17:54:57 -07002390 /* TODO: we need to get atim_window from upper stack
2391 * for now we set to 0 */
2392 priv->rxon_timing.atim_window = 0;
2393 }
2394
2395 interval_tm_unit =
2396 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2397 result = do_div(tsf, interval_tm_unit);
2398 priv->rxon_timing.beacon_init_val =
2399 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2400
2401 IWL_DEBUG_ASSOC
2402 ("beacon interval %d beacon timer %d beacon tim %d\n",
2403 le16_to_cpu(priv->rxon_timing.beacon_interval),
2404 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2405 le16_to_cpu(priv->rxon_timing.atim_window));
2406}
2407
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002408static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002409{
2410 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2411 IWL_ERROR("APs don't scan.\n");
2412 return 0;
2413 }
2414
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002415 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002416 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2417 return -EIO;
2418 }
2419
2420 if (test_bit(STATUS_SCANNING, &priv->status)) {
2421 IWL_DEBUG_SCAN("Scan already in progress.\n");
2422 return -EAGAIN;
2423 }
2424
2425 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2426 IWL_DEBUG_SCAN("Scan request while abort pending. "
2427 "Queuing.\n");
2428 return -EAGAIN;
2429 }
2430
2431 IWL_DEBUG_INFO("Starting scan...\n");
2432 priv->scan_bands = 2;
2433 set_bit(STATUS_SCANNING, &priv->status);
2434 priv->scan_start = jiffies;
2435 priv->scan_pass_start = priv->scan_start;
2436
2437 queue_work(priv->workqueue, &priv->request_scan);
2438
2439 return 0;
2440}
2441
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002442static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
Zhu Yib481de92007-09-25 17:54:57 -07002443{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002444 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07002445
2446 if (hw_decrypt)
2447 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2448 else
2449 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2450
2451 return 0;
2452}
2453
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002454static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv, u8 phymode)
Zhu Yib481de92007-09-25 17:54:57 -07002455{
2456 if (phymode == MODE_IEEE80211A) {
2457 priv->staging_rxon.flags &=
2458 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2459 | RXON_FLG_CCK_MSK);
2460 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2461 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002462 /* Copied from iwl3945_bg_post_associate() */
Zhu Yib481de92007-09-25 17:54:57 -07002463 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2464 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2465 else
2466 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2467
2468 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2469 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2470
2471 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2472 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2473 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2474 }
2475}
2476
2477/*
Ian Schram01ebd062007-10-25 17:15:22 +08002478 * initialize rxon structure with default values from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07002479 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002480static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002481{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002482 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002483
2484 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2485
2486 switch (priv->iw_mode) {
2487 case IEEE80211_IF_TYPE_AP:
2488 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2489 break;
2490
2491 case IEEE80211_IF_TYPE_STA:
2492 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2493 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2494 break;
2495
2496 case IEEE80211_IF_TYPE_IBSS:
2497 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2498 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2499 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2500 RXON_FILTER_ACCEPT_GRP_MSK;
2501 break;
2502
2503 case IEEE80211_IF_TYPE_MNTR:
2504 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2505 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2506 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2507 break;
2508 }
2509
2510#if 0
2511 /* TODO: Figure out when short_preamble would be set and cache from
2512 * that */
2513 if (!hw_to_local(priv->hw)->short_preamble)
2514 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2515 else
2516 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2517#endif
2518
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002519 ch_info = iwl3945_get_channel_info(priv, priv->phymode,
Zhu Yib481de92007-09-25 17:54:57 -07002520 le16_to_cpu(priv->staging_rxon.channel));
2521
2522 if (!ch_info)
2523 ch_info = &priv->channel_info[0];
2524
2525 /*
2526 * in some case A channels are all non IBSS
2527 * in this case force B/G channel
2528 */
2529 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2530 !(is_channel_ibss(ch_info)))
2531 ch_info = &priv->channel_info[0];
2532
2533 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2534 if (is_channel_a_band(ch_info))
2535 priv->phymode = MODE_IEEE80211A;
2536 else
2537 priv->phymode = MODE_IEEE80211G;
2538
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002539 iwl3945_set_flags_for_phymode(priv, priv->phymode);
Zhu Yib481de92007-09-25 17:54:57 -07002540
2541 priv->staging_rxon.ofdm_basic_rates =
2542 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2543 priv->staging_rxon.cck_basic_rates =
2544 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2545}
2546
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002547static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
Zhu Yib481de92007-09-25 17:54:57 -07002548{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002549 if (!iwl3945_is_ready_rf(priv))
Zhu Yib481de92007-09-25 17:54:57 -07002550 return -EAGAIN;
2551
2552 if (mode == IEEE80211_IF_TYPE_IBSS) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002553 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002554
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002555 ch_info = iwl3945_get_channel_info(priv,
Zhu Yib481de92007-09-25 17:54:57 -07002556 priv->phymode,
2557 le16_to_cpu(priv->staging_rxon.channel));
2558
2559 if (!ch_info || !is_channel_ibss(ch_info)) {
2560 IWL_ERROR("channel %d not IBSS channel\n",
2561 le16_to_cpu(priv->staging_rxon.channel));
2562 return -EINVAL;
2563 }
2564 }
2565
2566 cancel_delayed_work(&priv->scan_check);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002567 if (iwl3945_scan_cancel_timeout(priv, 100)) {
Zhu Yib481de92007-09-25 17:54:57 -07002568 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2569 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2570 return -EAGAIN;
2571 }
2572
2573 priv->iw_mode = mode;
2574
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002575 iwl3945_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002576 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2577
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002578 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002579
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002580 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002581
2582 return 0;
2583}
2584
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002585static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07002586 struct ieee80211_tx_control *ctl,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002587 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07002588 struct sk_buff *skb_frag,
2589 int last_frag)
2590{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002591 struct iwl3945_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
Zhu Yib481de92007-09-25 17:54:57 -07002592
2593 switch (keyinfo->alg) {
2594 case ALG_CCMP:
2595 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2596 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2597 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2598 break;
2599
2600 case ALG_TKIP:
2601#if 0
2602 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2603
2604 if (last_frag)
2605 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2606 8);
2607 else
2608 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2609#endif
2610 break;
2611
2612 case ALG_WEP:
2613 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2614 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2615
2616 if (keyinfo->keylen == 13)
2617 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2618
2619 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2620
2621 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2622 "with key %d\n", ctl->key_idx);
2623 break;
2624
Zhu Yib481de92007-09-25 17:54:57 -07002625 default:
2626 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2627 break;
2628 }
2629}
2630
2631/*
2632 * handle build REPLY_TX command notification.
2633 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002634static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2635 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07002636 struct ieee80211_tx_control *ctrl,
2637 struct ieee80211_hdr *hdr,
2638 int is_unicast, u8 std_id)
2639{
2640 __le16 *qc;
2641 u16 fc = le16_to_cpu(hdr->frame_control);
2642 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2643
2644 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2645 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2646 tx_flags |= TX_CMD_FLG_ACK_MSK;
2647 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2648 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2649 if (ieee80211_is_probe_response(fc) &&
2650 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2651 tx_flags |= TX_CMD_FLG_TSF_MSK;
2652 } else {
2653 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2654 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2655 }
2656
2657 cmd->cmd.tx.sta_id = std_id;
2658 if (ieee80211_get_morefrag(hdr))
2659 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2660
2661 qc = ieee80211_get_qos_ctrl(hdr);
2662 if (qc) {
2663 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2664 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2665 } else
2666 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2667
2668 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2669 tx_flags |= TX_CMD_FLG_RTS_MSK;
2670 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2671 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2672 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2673 tx_flags |= TX_CMD_FLG_CTS_MSK;
2674 }
2675
2676 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2677 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2678
2679 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2680 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2681 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2682 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
Ian Schrambc434dd2007-10-25 17:15:29 +08002683 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
Zhu Yib481de92007-09-25 17:54:57 -07002684 else
Ian Schrambc434dd2007-10-25 17:15:29 +08002685 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
Zhu Yib481de92007-09-25 17:54:57 -07002686 } else
2687 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2688
2689 cmd->cmd.tx.driver_txop = 0;
2690 cmd->cmd.tx.tx_flags = tx_flags;
2691 cmd->cmd.tx.next_frame_len = 0;
2692}
2693
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002694/**
2695 * iwl3945_get_sta_id - Find station's index within station table
2696 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002697static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
Zhu Yib481de92007-09-25 17:54:57 -07002698{
2699 int sta_id;
2700 u16 fc = le16_to_cpu(hdr->frame_control);
2701
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002702 /* If this frame is broadcast or management, use broadcast station id */
Zhu Yib481de92007-09-25 17:54:57 -07002703 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2704 is_multicast_ether_addr(hdr->addr1))
2705 return priv->hw_setting.bcast_sta_id;
2706
2707 switch (priv->iw_mode) {
2708
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002709 /* If we are a client station in a BSS network, use the special
2710 * AP station entry (that's the only station we communicate with) */
Zhu Yib481de92007-09-25 17:54:57 -07002711 case IEEE80211_IF_TYPE_STA:
2712 return IWL_AP_ID;
2713
2714 /* If we are an AP, then find the station, or use BCAST */
2715 case IEEE80211_IF_TYPE_AP:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002716 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002717 if (sta_id != IWL_INVALID_STATION)
2718 return sta_id;
2719 return priv->hw_setting.bcast_sta_id;
2720
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002721 /* If this frame is going out to an IBSS network, find the station,
2722 * or create a new station table entry */
Joe Perches0795af52007-10-03 17:59:30 -07002723 case IEEE80211_IF_TYPE_IBSS: {
2724 DECLARE_MAC_BUF(mac);
2725
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002726 /* Create new station table entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002727 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002728 if (sta_id != IWL_INVALID_STATION)
2729 return sta_id;
2730
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002731 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07002732
2733 if (sta_id != IWL_INVALID_STATION)
2734 return sta_id;
2735
Joe Perches0795af52007-10-03 17:59:30 -07002736 IWL_DEBUG_DROP("Station %s not in station map. "
Zhu Yib481de92007-09-25 17:54:57 -07002737 "Defaulting to broadcast...\n",
Joe Perches0795af52007-10-03 17:59:30 -07002738 print_mac(mac, hdr->addr1));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002739 iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
Zhu Yib481de92007-09-25 17:54:57 -07002740 return priv->hw_setting.bcast_sta_id;
Joe Perches0795af52007-10-03 17:59:30 -07002741 }
Zhu Yib481de92007-09-25 17:54:57 -07002742 default:
Ian Schram01ebd062007-10-25 17:15:22 +08002743 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002744 return priv->hw_setting.bcast_sta_id;
2745 }
2746}
2747
2748/*
2749 * start REPLY_TX command process
2750 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002751static int iwl3945_tx_skb(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07002752 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2753{
2754 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002755 struct iwl3945_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -07002756 u32 *control_flags;
2757 int txq_id = ctl->queue;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002758 struct iwl3945_tx_queue *txq = NULL;
2759 struct iwl3945_queue *q = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002760 dma_addr_t phys_addr;
2761 dma_addr_t txcmd_phys;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002762 struct iwl3945_cmd *out_cmd = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002763 u16 len, idx, len_org;
2764 u8 id, hdr_len, unicast;
2765 u8 sta_id;
2766 u16 seq_number = 0;
2767 u16 fc;
2768 __le16 *qc;
2769 u8 wait_write_ptr = 0;
2770 unsigned long flags;
2771 int rc;
2772
2773 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002774 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002775 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2776 goto drop_unlock;
2777 }
2778
2779 if (!priv->interface_id) {
2780 IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
2781 goto drop_unlock;
2782 }
2783
2784 if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
2785 IWL_ERROR("ERROR: No TX rate available.\n");
2786 goto drop_unlock;
2787 }
2788
2789 unicast = !is_multicast_ether_addr(hdr->addr1);
2790 id = 0;
2791
2792 fc = le16_to_cpu(hdr->frame_control);
2793
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002794#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07002795 if (ieee80211_is_auth(fc))
2796 IWL_DEBUG_TX("Sending AUTH frame\n");
2797 else if (ieee80211_is_assoc_request(fc))
2798 IWL_DEBUG_TX("Sending ASSOC frame\n");
2799 else if (ieee80211_is_reassoc_request(fc))
2800 IWL_DEBUG_TX("Sending REASSOC frame\n");
2801#endif
2802
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002803 if (!iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07002804 ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002805 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
Zhu Yib481de92007-09-25 17:54:57 -07002806 goto drop_unlock;
2807 }
2808
2809 spin_unlock_irqrestore(&priv->lock, flags);
2810
2811 hdr_len = ieee80211_get_hdrlen(fc);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002812
2813 /* Find (or create) index into station table for destination station */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002814 sta_id = iwl3945_get_sta_id(priv, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002815 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07002816 DECLARE_MAC_BUF(mac);
2817
2818 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2819 print_mac(mac, hdr->addr1));
Zhu Yib481de92007-09-25 17:54:57 -07002820 goto drop;
2821 }
2822
2823 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2824
2825 qc = ieee80211_get_qos_ctrl(hdr);
2826 if (qc) {
2827 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2828 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2829 IEEE80211_SCTL_SEQ;
2830 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2831 (hdr->seq_ctrl &
2832 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2833 seq_number += 0x10;
2834 }
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002835
2836 /* Descriptor for chosen Tx queue */
Zhu Yib481de92007-09-25 17:54:57 -07002837 txq = &priv->txq[txq_id];
2838 q = &txq->q;
2839
2840 spin_lock_irqsave(&priv->lock, flags);
2841
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002842 /* Set up first empty TFD within this queue's circular TFD buffer */
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002843 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -07002844 memset(tfd, 0, sizeof(*tfd));
2845 control_flags = (u32 *) tfd;
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002846 idx = get_cmd_index(q, q->write_ptr, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002847
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002848 /* Set up driver data for this TFD */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002849 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002850 txq->txb[q->write_ptr].skb[0] = skb;
2851 memcpy(&(txq->txb[q->write_ptr].status.control),
Zhu Yib481de92007-09-25 17:54:57 -07002852 ctl, sizeof(struct ieee80211_tx_control));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002853
2854 /* Init first empty entry in queue's array of Tx/cmd buffers */
Zhu Yib481de92007-09-25 17:54:57 -07002855 out_cmd = &txq->cmd[idx];
2856 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2857 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002858
2859 /*
2860 * Set up the Tx-command (not MAC!) header.
2861 * Store the chosen Tx queue and TFD index within the sequence field;
2862 * after Tx, uCode's Tx response will return this value so driver can
2863 * locate the frame within the tx queue and do post-tx processing.
2864 */
Zhu Yib481de92007-09-25 17:54:57 -07002865 out_cmd->hdr.cmd = REPLY_TX;
2866 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002867 INDEX_TO_SEQ(q->write_ptr)));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002868
2869 /* Copy MAC header from skb into command buffer */
Zhu Yib481de92007-09-25 17:54:57 -07002870 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2871
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002872 /*
2873 * Use the first empty entry in this queue's command buffer array
2874 * to contain the Tx command and MAC header concatenated together
2875 * (payload data will be in another buffer).
2876 * Size of this varies, due to varying MAC header length.
2877 * If end is not dword aligned, we'll have 2 extra bytes at the end
2878 * of the MAC header (device reads on dword boundaries).
2879 * We'll tell device about this padding later.
2880 */
Zhu Yib481de92007-09-25 17:54:57 -07002881 len = priv->hw_setting.tx_cmd_len +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002882 sizeof(struct iwl3945_cmd_header) + hdr_len;
Zhu Yib481de92007-09-25 17:54:57 -07002883
2884 len_org = len;
2885 len = (len + 3) & ~3;
2886
2887 if (len_org != len)
2888 len_org = 1;
2889 else
2890 len_org = 0;
2891
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002892 /* Physical address of this Tx command's header (not MAC header!),
2893 * within command buffer array. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002894 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2895 offsetof(struct iwl3945_cmd, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002896
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002897 /* Add buffer containing Tx command and MAC(!) header to TFD's
2898 * first entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002899 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
Zhu Yib481de92007-09-25 17:54:57 -07002900
2901 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002902 iwl3945_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002903
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002904 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2905 * if any (802.11 null frames have no payload). */
Zhu Yib481de92007-09-25 17:54:57 -07002906 len = skb->len - hdr_len;
2907 if (len) {
2908 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2909 len, PCI_DMA_TODEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002910 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
Zhu Yib481de92007-09-25 17:54:57 -07002911 }
2912
Zhu Yib481de92007-09-25 17:54:57 -07002913 if (!len)
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002914 /* If there is no payload, then we use only one Tx buffer */
Zhu Yib481de92007-09-25 17:54:57 -07002915 *control_flags = TFD_CTL_COUNT_SET(1);
2916 else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002917 /* Else use 2 buffers.
2918 * Tell 3945 about any padding after MAC header */
Zhu Yib481de92007-09-25 17:54:57 -07002919 *control_flags = TFD_CTL_COUNT_SET(2) |
2920 TFD_CTL_PAD_SET(U32_PAD(len));
2921
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002922 /* Total # bytes to be transmitted */
Zhu Yib481de92007-09-25 17:54:57 -07002923 len = (u16)skb->len;
2924 out_cmd->cmd.tx.len = cpu_to_le16(len);
2925
2926 /* TODO need this for burst mode later on */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002927 iwl3945_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07002928
2929 /* set is_hcca to 0; it probably will never be implemented */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002930 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002931
2932 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2933 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2934
2935 if (!ieee80211_get_morefrag(hdr)) {
2936 txq->need_update = 1;
2937 if (qc) {
2938 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2939 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2940 }
2941 } else {
2942 wait_write_ptr = 1;
2943 txq->need_update = 0;
2944 }
2945
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002946 iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
Zhu Yib481de92007-09-25 17:54:57 -07002947 sizeof(out_cmd->cmd.tx));
2948
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002949 iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
Zhu Yib481de92007-09-25 17:54:57 -07002950 ieee80211_get_hdrlen(fc));
2951
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002952 /* Tell device the write index *just past* this latest filled TFD */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002953 q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
2954 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07002955 spin_unlock_irqrestore(&priv->lock, flags);
2956
2957 if (rc)
2958 return rc;
2959
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002960 if ((iwl3945_queue_space(q) < q->high_mark)
Zhu Yib481de92007-09-25 17:54:57 -07002961 && priv->mac80211_registered) {
2962 if (wait_write_ptr) {
2963 spin_lock_irqsave(&priv->lock, flags);
2964 txq->need_update = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002965 iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07002966 spin_unlock_irqrestore(&priv->lock, flags);
2967 }
2968
2969 ieee80211_stop_queue(priv->hw, ctl->queue);
2970 }
2971
2972 return 0;
2973
2974drop_unlock:
2975 spin_unlock_irqrestore(&priv->lock, flags);
2976drop:
2977 return -1;
2978}
2979
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002980static void iwl3945_set_rate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002981{
2982 const struct ieee80211_hw_mode *hw = NULL;
2983 struct ieee80211_rate *rate;
2984 int i;
2985
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002986 hw = iwl3945_get_hw_mode(priv, priv->phymode);
Saleem Abdulrasoolc4ba9622007-11-18 23:59:08 -08002987 if (!hw) {
2988 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2989 return;
2990 }
Zhu Yib481de92007-09-25 17:54:57 -07002991
2992 priv->active_rate = 0;
2993 priv->active_rate_basic = 0;
2994
2995 IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
2996 hw->mode == MODE_IEEE80211A ?
2997 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
2998
2999 for (i = 0; i < hw->num_rates; i++) {
3000 rate = &(hw->rates[i]);
3001 if ((rate->val < IWL_RATE_COUNT) &&
3002 (rate->flags & IEEE80211_RATE_SUPPORTED)) {
3003 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003004 rate->val, iwl3945_rates[rate->val].plcp,
Zhu Yib481de92007-09-25 17:54:57 -07003005 (rate->flags & IEEE80211_RATE_BASIC) ?
3006 "*" : "");
3007 priv->active_rate |= (1 << rate->val);
3008 if (rate->flags & IEEE80211_RATE_BASIC)
3009 priv->active_rate_basic |= (1 << rate->val);
3010 } else
3011 IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003012 rate->val, iwl3945_rates[rate->val].plcp);
Zhu Yib481de92007-09-25 17:54:57 -07003013 }
3014
3015 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
3016 priv->active_rate, priv->active_rate_basic);
3017
3018 /*
3019 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
3020 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
3021 * OFDM
3022 */
3023 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
3024 priv->staging_rxon.cck_basic_rates =
3025 ((priv->active_rate_basic &
3026 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
3027 else
3028 priv->staging_rxon.cck_basic_rates =
3029 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
3030
3031 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
3032 priv->staging_rxon.ofdm_basic_rates =
3033 ((priv->active_rate_basic &
3034 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
3035 IWL_FIRST_OFDM_RATE) & 0xFF;
3036 else
3037 priv->staging_rxon.ofdm_basic_rates =
3038 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
3039}
3040
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003041static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
Zhu Yib481de92007-09-25 17:54:57 -07003042{
3043 unsigned long flags;
3044
3045 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
3046 return;
3047
3048 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
3049 disable_radio ? "OFF" : "ON");
3050
3051 if (disable_radio) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003052 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003053 /* FIXME: This is a workaround for AP */
3054 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3055 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003056 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07003057 CSR_UCODE_SW_BIT_RFKILL);
3058 spin_unlock_irqrestore(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003059 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
Zhu Yib481de92007-09-25 17:54:57 -07003060 set_bit(STATUS_RF_KILL_SW, &priv->status);
3061 }
3062 return;
3063 }
3064
3065 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003066 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07003067
3068 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3069 spin_unlock_irqrestore(&priv->lock, flags);
3070
3071 /* wake up ucode */
3072 msleep(10);
3073
3074 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003075 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3076 if (!iwl3945_grab_nic_access(priv))
3077 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003078 spin_unlock_irqrestore(&priv->lock, flags);
3079
3080 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
3081 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
3082 "disabled by HW switch\n");
3083 return;
3084 }
3085
3086 queue_work(priv->workqueue, &priv->restart);
3087 return;
3088}
3089
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003090void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07003091 u32 decrypt_res, struct ieee80211_rx_status *stats)
3092{
3093 u16 fc =
3094 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
3095
3096 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
3097 return;
3098
3099 if (!(fc & IEEE80211_FCTL_PROTECTED))
3100 return;
3101
3102 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
3103 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
3104 case RX_RES_STATUS_SEC_TYPE_TKIP:
3105 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3106 RX_RES_STATUS_BAD_ICV_MIC)
3107 stats->flag |= RX_FLAG_MMIC_ERROR;
3108 case RX_RES_STATUS_SEC_TYPE_WEP:
3109 case RX_RES_STATUS_SEC_TYPE_CCMP:
3110 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3111 RX_RES_STATUS_DECRYPT_OK) {
3112 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
3113 stats->flag |= RX_FLAG_DECRYPTED;
3114 }
3115 break;
3116
3117 default:
3118 break;
3119 }
3120}
3121
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003122void iwl3945_handle_data_packet_monitor(struct iwl3945_priv *priv,
3123 struct iwl3945_rx_mem_buffer *rxb,
Zhu Yib481de92007-09-25 17:54:57 -07003124 void *data, short len,
3125 struct ieee80211_rx_status *stats,
3126 u16 phy_flags)
3127{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003128 struct iwl3945_rt_rx_hdr *iwl3945_rt;
Zhu Yib481de92007-09-25 17:54:57 -07003129
3130 /* First cache any information we need before we overwrite
3131 * the information provided in the skb from the hardware */
3132 s8 signal = stats->ssi;
3133 s8 noise = 0;
3134 int rate = stats->rate;
3135 u64 tsf = stats->mactime;
3136 __le16 phy_flags_hw = cpu_to_le16(phy_flags);
3137
3138 /* We received data from the HW, so stop the watchdog */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003139 if (len > IWL_RX_BUF_SIZE - sizeof(*iwl3945_rt)) {
Zhu Yib481de92007-09-25 17:54:57 -07003140 IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
3141 return;
3142 }
3143
3144 /* copy the frame data to write after where the radiotap header goes */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003145 iwl3945_rt = (void *)rxb->skb->data;
3146 memmove(iwl3945_rt->payload, data, len);
Zhu Yib481de92007-09-25 17:54:57 -07003147
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003148 iwl3945_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
3149 iwl3945_rt->rt_hdr.it_pad = 0; /* always good to zero */
Zhu Yib481de92007-09-25 17:54:57 -07003150
3151 /* total header + data */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003152 iwl3945_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl3945_rt));
Zhu Yib481de92007-09-25 17:54:57 -07003153
3154 /* Set the size of the skb to the size of the frame */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003155 skb_put(rxb->skb, sizeof(*iwl3945_rt) + len);
Zhu Yib481de92007-09-25 17:54:57 -07003156
3157 /* Big bitfield of all the fields we provide in radiotap */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003158 iwl3945_rt->rt_hdr.it_present =
Zhu Yib481de92007-09-25 17:54:57 -07003159 cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
3160 (1 << IEEE80211_RADIOTAP_FLAGS) |
3161 (1 << IEEE80211_RADIOTAP_RATE) |
3162 (1 << IEEE80211_RADIOTAP_CHANNEL) |
3163 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
3164 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
3165 (1 << IEEE80211_RADIOTAP_ANTENNA));
3166
3167 /* Zero the flags, we'll add to them as we go */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003168 iwl3945_rt->rt_flags = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003169
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003170 iwl3945_rt->rt_tsf = cpu_to_le64(tsf);
Zhu Yib481de92007-09-25 17:54:57 -07003171
3172 /* Convert to dBm */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003173 iwl3945_rt->rt_dbmsignal = signal;
3174 iwl3945_rt->rt_dbmnoise = noise;
Zhu Yib481de92007-09-25 17:54:57 -07003175
3176 /* Convert the channel frequency and set the flags */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003177 iwl3945_rt->rt_channelMHz = cpu_to_le16(stats->freq);
Zhu Yib481de92007-09-25 17:54:57 -07003178 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003179 iwl3945_rt->rt_chbitmask =
Zhu Yib481de92007-09-25 17:54:57 -07003180 cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
3181 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003182 iwl3945_rt->rt_chbitmask =
Zhu Yib481de92007-09-25 17:54:57 -07003183 cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
3184 else /* 802.11g */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003185 iwl3945_rt->rt_chbitmask =
Zhu Yib481de92007-09-25 17:54:57 -07003186 cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));
3187
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003188 rate = iwl3945_rate_index_from_plcp(rate);
Zhu Yib481de92007-09-25 17:54:57 -07003189 if (rate == -1)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003190 iwl3945_rt->rt_rate = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003191 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003192 iwl3945_rt->rt_rate = iwl3945_rates[rate].ieee;
Zhu Yib481de92007-09-25 17:54:57 -07003193
3194 /* antenna number */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003195 iwl3945_rt->rt_antenna =
Zhu Yib481de92007-09-25 17:54:57 -07003196 le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
3197
3198 /* set the preamble flag if we have it */
3199 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003200 iwl3945_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
Zhu Yib481de92007-09-25 17:54:57 -07003201
3202 IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
3203
3204 stats->flag |= RX_FLAG_RADIOTAP;
3205 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
3206 rxb->skb = NULL;
3207}
3208
3209
3210#define IWL_PACKET_RETRY_TIME HZ
3211
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003212int iwl3945_is_duplicate_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07003213{
3214 u16 sc = le16_to_cpu(header->seq_ctrl);
3215 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
3216 u16 frag = sc & IEEE80211_SCTL_FRAG;
3217 u16 *last_seq, *last_frag;
3218 unsigned long *last_time;
3219
3220 switch (priv->iw_mode) {
3221 case IEEE80211_IF_TYPE_IBSS:{
3222 struct list_head *p;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003223 struct iwl3945_ibss_seq *entry = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07003224 u8 *mac = header->addr2;
3225 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
3226
3227 __list_for_each(p, &priv->ibss_mac_hash[index]) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003228 entry = list_entry(p, struct iwl3945_ibss_seq, list);
Zhu Yib481de92007-09-25 17:54:57 -07003229 if (!compare_ether_addr(entry->mac, mac))
3230 break;
3231 }
3232 if (p == &priv->ibss_mac_hash[index]) {
3233 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
3234 if (!entry) {
Ian Schrambc434dd2007-10-25 17:15:29 +08003235 IWL_ERROR("Cannot malloc new mac entry\n");
Zhu Yib481de92007-09-25 17:54:57 -07003236 return 0;
3237 }
3238 memcpy(entry->mac, mac, ETH_ALEN);
3239 entry->seq_num = seq;
3240 entry->frag_num = frag;
3241 entry->packet_time = jiffies;
Ian Schrambc434dd2007-10-25 17:15:29 +08003242 list_add(&entry->list, &priv->ibss_mac_hash[index]);
Zhu Yib481de92007-09-25 17:54:57 -07003243 return 0;
3244 }
3245 last_seq = &entry->seq_num;
3246 last_frag = &entry->frag_num;
3247 last_time = &entry->packet_time;
3248 break;
3249 }
3250 case IEEE80211_IF_TYPE_STA:
3251 last_seq = &priv->last_seq_num;
3252 last_frag = &priv->last_frag_num;
3253 last_time = &priv->last_packet_time;
3254 break;
3255 default:
3256 return 0;
3257 }
3258 if ((*last_seq == seq) &&
3259 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3260 if (*last_frag == frag)
3261 goto drop;
3262 if (*last_frag + 1 != frag)
3263 /* out-of-order fragment */
3264 goto drop;
3265 } else
3266 *last_seq = seq;
3267
3268 *last_frag = frag;
3269 *last_time = jiffies;
3270 return 0;
3271
3272 drop:
3273 return 1;
3274}
3275
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003276#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07003277
3278#include "iwl-spectrum.h"
3279
3280#define BEACON_TIME_MASK_LOW 0x00FFFFFF
3281#define BEACON_TIME_MASK_HIGH 0xFF000000
3282#define TIME_UNIT 1024
3283
3284/*
3285 * extended beacon time format
3286 * time in usec will be changed into a 32-bit value in 8:24 format
3287 * the high 1 byte is the beacon counts
3288 * the lower 3 bytes is the time in usec within one beacon interval
3289 */
3290
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003291static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07003292{
3293 u32 quot;
3294 u32 rem;
3295 u32 interval = beacon_interval * 1024;
3296
3297 if (!interval || !usec)
3298 return 0;
3299
3300 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3301 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3302
3303 return (quot << 24) + rem;
3304}
3305
3306/* base is usually what we get from ucode with each received frame,
3307 * the same as HW timer counter counting down
3308 */
3309
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003310static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07003311{
3312 u32 base_low = base & BEACON_TIME_MASK_LOW;
3313 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3314 u32 interval = beacon_interval * TIME_UNIT;
3315 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3316 (addon & BEACON_TIME_MASK_HIGH);
3317
3318 if (base_low > addon_low)
3319 res += base_low - addon_low;
3320 else if (base_low < addon_low) {
3321 res += interval + base_low - addon_low;
3322 res += (1 << 24);
3323 } else
3324 res += (1 << 24);
3325
3326 return cpu_to_le32(res);
3327}
3328
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003329static int iwl3945_get_measurement(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07003330 struct ieee80211_measurement_params *params,
3331 u8 type)
3332{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003333 struct iwl3945_spectrum_cmd spectrum;
3334 struct iwl3945_rx_packet *res;
3335 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07003336 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3337 .data = (void *)&spectrum,
3338 .meta.flags = CMD_WANT_SKB,
3339 };
3340 u32 add_time = le64_to_cpu(params->start_time);
3341 int rc;
3342 int spectrum_resp_status;
3343 int duration = le16_to_cpu(params->duration);
3344
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003345 if (iwl3945_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003346 add_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003347 iwl3945_usecs_to_beacons(
Zhu Yib481de92007-09-25 17:54:57 -07003348 le64_to_cpu(params->start_time) - priv->last_tsf,
3349 le16_to_cpu(priv->rxon_timing.beacon_interval));
3350
3351 memset(&spectrum, 0, sizeof(spectrum));
3352
3353 spectrum.channel_count = cpu_to_le16(1);
3354 spectrum.flags =
3355 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3356 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3357 cmd.len = sizeof(spectrum);
3358 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3359
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003360 if (iwl3945_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003361 spectrum.start_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003362 iwl3945_add_beacon_time(priv->last_beacon_time,
Zhu Yib481de92007-09-25 17:54:57 -07003363 add_time,
3364 le16_to_cpu(priv->rxon_timing.beacon_interval));
3365 else
3366 spectrum.start_time = 0;
3367
3368 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3369 spectrum.channels[0].channel = params->channel;
3370 spectrum.channels[0].type = type;
3371 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3372 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3373 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3374
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003375 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07003376 if (rc)
3377 return rc;
3378
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003379 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003380 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3381 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3382 rc = -EIO;
3383 }
3384
3385 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3386 switch (spectrum_resp_status) {
3387 case 0: /* Command will be handled */
3388 if (res->u.spectrum.id != 0xff) {
Ian Schrambc434dd2007-10-25 17:15:29 +08003389 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
3390 res->u.spectrum.id);
Zhu Yib481de92007-09-25 17:54:57 -07003391 priv->measurement_status &= ~MEASUREMENT_READY;
3392 }
3393 priv->measurement_status |= MEASUREMENT_ACTIVE;
3394 rc = 0;
3395 break;
3396
3397 case 1: /* Command will not be handled */
3398 rc = -EAGAIN;
3399 break;
3400 }
3401
3402 dev_kfree_skb_any(cmd.meta.u.skb);
3403
3404 return rc;
3405}
3406#endif
3407
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003408static void iwl3945_txstatus_to_ieee(struct iwl3945_priv *priv,
3409 struct iwl3945_tx_info *tx_sta)
Zhu Yib481de92007-09-25 17:54:57 -07003410{
3411
3412 tx_sta->status.ack_signal = 0;
3413 tx_sta->status.excessive_retries = 0;
3414 tx_sta->status.queue_length = 0;
3415 tx_sta->status.queue_number = 0;
3416
3417 if (in_interrupt())
3418 ieee80211_tx_status_irqsafe(priv->hw,
3419 tx_sta->skb[0], &(tx_sta->status));
3420 else
3421 ieee80211_tx_status(priv->hw,
3422 tx_sta->skb[0], &(tx_sta->status));
3423
3424 tx_sta->skb[0] = NULL;
3425}
3426
3427/**
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003428 * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
Zhu Yib481de92007-09-25 17:54:57 -07003429 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003430 * When FW advances 'R' index, all entries between old and new 'R' index
3431 * need to be reclaimed. As result, some free space forms. If there is
3432 * enough free space (> low mark), wake the stack that feeds us.
Zhu Yib481de92007-09-25 17:54:57 -07003433 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003434static int iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv, int txq_id, int index)
Zhu Yib481de92007-09-25 17:54:57 -07003435{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003436 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3437 struct iwl3945_queue *q = &txq->q;
Zhu Yib481de92007-09-25 17:54:57 -07003438 int nfreed = 0;
3439
3440 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3441 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3442 "is out of range [0-%d] %d %d.\n", txq_id,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003443 index, q->n_bd, q->write_ptr, q->read_ptr);
Zhu Yib481de92007-09-25 17:54:57 -07003444 return 0;
3445 }
3446
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003447 for (index = iwl3945_queue_inc_wrap(index, q->n_bd);
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003448 q->read_ptr != index;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003449 q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd)) {
Zhu Yib481de92007-09-25 17:54:57 -07003450 if (txq_id != IWL_CMD_QUEUE_NUM) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003451 iwl3945_txstatus_to_ieee(priv,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003452 &(txq->txb[txq->q.read_ptr]));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003453 iwl3945_hw_txq_free_tfd(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07003454 } else if (nfreed > 1) {
3455 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003456 q->write_ptr, q->read_ptr);
Zhu Yib481de92007-09-25 17:54:57 -07003457 queue_work(priv->workqueue, &priv->restart);
3458 }
3459 nfreed++;
3460 }
3461
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003462 if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
Zhu Yib481de92007-09-25 17:54:57 -07003463 (txq_id != IWL_CMD_QUEUE_NUM) &&
3464 priv->mac80211_registered)
3465 ieee80211_wake_queue(priv->hw, txq_id);
3466
3467
3468 return nfreed;
3469}
3470
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003471static int iwl3945_is_tx_success(u32 status)
Zhu Yib481de92007-09-25 17:54:57 -07003472{
3473 return (status & 0xFF) == 0x1;
3474}
3475
3476/******************************************************************************
3477 *
3478 * Generic RX handler implementations
3479 *
3480 ******************************************************************************/
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003481/**
3482 * iwl3945_rx_reply_tx - Handle Tx response
3483 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003484static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
3485 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003486{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003487 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003488 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3489 int txq_id = SEQ_TO_QUEUE(sequence);
3490 int index = SEQ_TO_INDEX(sequence);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003491 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
Zhu Yib481de92007-09-25 17:54:57 -07003492 struct ieee80211_tx_status *tx_status;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003493 struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
Zhu Yib481de92007-09-25 17:54:57 -07003494 u32 status = le32_to_cpu(tx_resp->status);
3495
3496 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3497 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3498 "is out of range [0-%d] %d %d\n", txq_id,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003499 index, txq->q.n_bd, txq->q.write_ptr,
3500 txq->q.read_ptr);
Zhu Yib481de92007-09-25 17:54:57 -07003501 return;
3502 }
3503
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003504 tx_status = &(txq->txb[txq->q.read_ptr].status);
Zhu Yib481de92007-09-25 17:54:57 -07003505
3506 tx_status->retry_count = tx_resp->failure_frame;
3507 tx_status->queue_number = status;
3508 tx_status->queue_length = tx_resp->bt_kill_count;
3509 tx_status->queue_length |= tx_resp->failure_rts;
3510
3511 tx_status->flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003512 iwl3945_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
Zhu Yib481de92007-09-25 17:54:57 -07003513
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003514 tx_status->control.tx_rate = iwl3945_rate_index_from_plcp(tx_resp->rate);
Zhu Yib481de92007-09-25 17:54:57 -07003515
3516 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003517 txq_id, iwl3945_get_tx_fail_reason(status), status,
Zhu Yib481de92007-09-25 17:54:57 -07003518 tx_resp->rate, tx_resp->failure_frame);
3519
3520 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3521 if (index != -1)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003522 iwl3945_tx_queue_reclaim(priv, txq_id, index);
Zhu Yib481de92007-09-25 17:54:57 -07003523
3524 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3525 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3526}
3527
3528
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003529static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
3530 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003531{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003532 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3533 struct iwl3945_alive_resp *palive;
Zhu Yib481de92007-09-25 17:54:57 -07003534 struct delayed_work *pwork;
3535
3536 palive = &pkt->u.alive_frame;
3537
3538 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3539 "0x%01X 0x%01X\n",
3540 palive->is_valid, palive->ver_type,
3541 palive->ver_subtype);
3542
3543 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3544 IWL_DEBUG_INFO("Initialization Alive received.\n");
3545 memcpy(&priv->card_alive_init,
3546 &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003547 sizeof(struct iwl3945_init_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003548 pwork = &priv->init_alive_start;
3549 } else {
3550 IWL_DEBUG_INFO("Runtime Alive received.\n");
3551 memcpy(&priv->card_alive, &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003552 sizeof(struct iwl3945_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003553 pwork = &priv->alive_start;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003554 iwl3945_disable_events(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003555 }
3556
3557 /* We delay the ALIVE response by 5ms to
3558 * give the HW RF Kill time to activate... */
3559 if (palive->is_valid == UCODE_VALID_OK)
3560 queue_delayed_work(priv->workqueue, pwork,
3561 msecs_to_jiffies(5));
3562 else
3563 IWL_WARNING("uCode did not respond OK.\n");
3564}
3565
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003566static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
3567 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003568{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003569 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003570
3571 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3572 return;
3573}
3574
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003575static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
3576 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003577{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003578 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003579
3580 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3581 "seq 0x%04X ser 0x%08X\n",
3582 le32_to_cpu(pkt->u.err_resp.error_type),
3583 get_cmd_string(pkt->u.err_resp.cmd_id),
3584 pkt->u.err_resp.cmd_id,
3585 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3586 le32_to_cpu(pkt->u.err_resp.error_info));
3587}
3588
3589#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3590
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003591static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003592{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003593 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3594 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3595 struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003596 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3597 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3598 rxon->channel = csa->channel;
3599 priv->staging_rxon.channel = csa->channel;
3600}
3601
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003602static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3603 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003604{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003605#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003606 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3607 struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003608
3609 if (!report->state) {
3610 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3611 "Spectrum Measure Notification: Start\n");
3612 return;
3613 }
3614
3615 memcpy(&priv->measure_report, report, sizeof(*report));
3616 priv->measurement_status |= MEASUREMENT_READY;
3617#endif
3618}
3619
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003620static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3621 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003622{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003623#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003624 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3625 struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003626 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3627 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3628#endif
3629}
3630
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003631static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3632 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003633{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003634 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003635 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3636 "notification for %s:\n",
3637 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003638 iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
Zhu Yib481de92007-09-25 17:54:57 -07003639}
3640
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003641static void iwl3945_bg_beacon_update(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07003642{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003643 struct iwl3945_priv *priv =
3644 container_of(work, struct iwl3945_priv, beacon_update);
Zhu Yib481de92007-09-25 17:54:57 -07003645 struct sk_buff *beacon;
3646
3647 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3648 beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);
3649
3650 if (!beacon) {
3651 IWL_ERROR("update beacon failed\n");
3652 return;
3653 }
3654
3655 mutex_lock(&priv->mutex);
3656 /* new beacon skb is allocated every time; dispose previous.*/
3657 if (priv->ibss_beacon)
3658 dev_kfree_skb(priv->ibss_beacon);
3659
3660 priv->ibss_beacon = beacon;
3661 mutex_unlock(&priv->mutex);
3662
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003663 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003664}
3665
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003666static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3667 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003668{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003669#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003670 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3671 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
Zhu Yib481de92007-09-25 17:54:57 -07003672 u8 rate = beacon->beacon_notify_hdr.rate;
3673
3674 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3675 "tsf %d %d rate %d\n",
3676 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3677 beacon->beacon_notify_hdr.failure_frame,
3678 le32_to_cpu(beacon->ibss_mgr_status),
3679 le32_to_cpu(beacon->high_tsf),
3680 le32_to_cpu(beacon->low_tsf), rate);
3681#endif
3682
3683 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3684 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3685 queue_work(priv->workqueue, &priv->beacon_update);
3686}
3687
3688/* Service response to REPLY_SCAN_CMD (0x80) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003689static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3690 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003691{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003692#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003693 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3694 struct iwl3945_scanreq_notification *notif =
3695 (struct iwl3945_scanreq_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003696
3697 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3698#endif
3699}
3700
3701/* Service SCAN_START_NOTIFICATION (0x82) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003702static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3703 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003704{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003705 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3706 struct iwl3945_scanstart_notification *notif =
3707 (struct iwl3945_scanstart_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003708 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3709 IWL_DEBUG_SCAN("Scan start: "
3710 "%d [802.11%s] "
3711 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3712 notif->channel,
3713 notif->band ? "bg" : "a",
3714 notif->tsf_high,
3715 notif->tsf_low, notif->status, notif->beacon_timer);
3716}
3717
3718/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003719static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3720 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003721{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003722 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3723 struct iwl3945_scanresults_notification *notif =
3724 (struct iwl3945_scanresults_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003725
3726 IWL_DEBUG_SCAN("Scan ch.res: "
3727 "%d [802.11%s] "
3728 "(TSF: 0x%08X:%08X) - %d "
3729 "elapsed=%lu usec (%dms since last)\n",
3730 notif->channel,
3731 notif->band ? "bg" : "a",
3732 le32_to_cpu(notif->tsf_high),
3733 le32_to_cpu(notif->tsf_low),
3734 le32_to_cpu(notif->statistics[0]),
3735 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3736 jiffies_to_msecs(elapsed_jiffies
3737 (priv->last_scan_jiffies, jiffies)));
3738
3739 priv->last_scan_jiffies = jiffies;
3740}
3741
3742/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003743static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3744 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003745{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003746 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3747 struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003748
3749 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3750 scan_notif->scanned_channels,
3751 scan_notif->tsf_low,
3752 scan_notif->tsf_high, scan_notif->status);
3753
3754 /* The HW is no longer scanning */
3755 clear_bit(STATUS_SCAN_HW, &priv->status);
3756
3757 /* The scan completion notification came in, so kill that timer... */
3758 cancel_delayed_work(&priv->scan_check);
3759
3760 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3761 (priv->scan_bands == 2) ? "2.4" : "5.2",
3762 jiffies_to_msecs(elapsed_jiffies
3763 (priv->scan_pass_start, jiffies)));
3764
3765 /* Remove this scanned band from the list
3766 * of pending bands to scan */
3767 priv->scan_bands--;
3768
3769 /* If a request to abort was given, or the scan did not succeed
3770 * then we reset the scan state machine and terminate,
3771 * re-queuing another scan if one has been requested */
3772 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3773 IWL_DEBUG_INFO("Aborted scan completed.\n");
3774 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3775 } else {
3776 /* If there are more bands on this scan pass reschedule */
3777 if (priv->scan_bands > 0)
3778 goto reschedule;
3779 }
3780
3781 priv->last_scan_jiffies = jiffies;
3782 IWL_DEBUG_INFO("Setting scan to off\n");
3783
3784 clear_bit(STATUS_SCANNING, &priv->status);
3785
3786 IWL_DEBUG_INFO("Scan took %dms\n",
3787 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3788
3789 queue_work(priv->workqueue, &priv->scan_completed);
3790
3791 return;
3792
3793reschedule:
3794 priv->scan_pass_start = jiffies;
3795 queue_work(priv->workqueue, &priv->request_scan);
3796}
3797
3798/* Handle notification from uCode that card's power state is changing
3799 * due to software, hardware, or critical temperature RFKILL */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003800static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3801 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003802{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003803 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003804 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3805 unsigned long status = priv->status;
3806
3807 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3808 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3809 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3810
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003811 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07003812 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3813
3814 if (flags & HW_CARD_DISABLED)
3815 set_bit(STATUS_RF_KILL_HW, &priv->status);
3816 else
3817 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3818
3819
3820 if (flags & SW_CARD_DISABLED)
3821 set_bit(STATUS_RF_KILL_SW, &priv->status);
3822 else
3823 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3824
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003825 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003826
3827 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3828 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3829 (test_bit(STATUS_RF_KILL_SW, &status) !=
3830 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3831 queue_work(priv->workqueue, &priv->rf_kill);
3832 else
3833 wake_up_interruptible(&priv->wait_command_queue);
3834}
3835
3836/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003837 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
Zhu Yib481de92007-09-25 17:54:57 -07003838 *
3839 * Setup the RX handlers for each of the reply types sent from the uCode
3840 * to the host.
3841 *
3842 * This function chains into the hardware specific files for them to setup
3843 * any hardware specific handlers as well.
3844 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003845static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003846{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003847 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3848 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3849 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3850 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
Zhu Yib481de92007-09-25 17:54:57 -07003851 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003852 iwl3945_rx_spectrum_measure_notif;
3853 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003854 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003855 iwl3945_rx_pm_debug_statistics_notif;
3856 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003857
Ben Cahill9fbab512007-11-29 11:09:47 +08003858 /*
3859 * The same handler is used for both the REPLY to a discrete
3860 * statistics request from the host as well as for the periodic
3861 * statistics notifications (after received beacons) from the uCode.
Zhu Yib481de92007-09-25 17:54:57 -07003862 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003863 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3864 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
Zhu Yib481de92007-09-25 17:54:57 -07003865
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003866 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3867 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003868 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003869 iwl3945_rx_scan_results_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003870 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003871 iwl3945_rx_scan_complete_notif;
3872 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3873 priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
Zhu Yib481de92007-09-25 17:54:57 -07003874
Ben Cahill9fbab512007-11-29 11:09:47 +08003875 /* Set up hardware specific Rx handlers */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003876 iwl3945_hw_rx_handler_setup(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003877}
3878
3879/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003880 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
Zhu Yib481de92007-09-25 17:54:57 -07003881 * @rxb: Rx buffer to reclaim
3882 *
3883 * If an Rx buffer has an async callback associated with it the callback
3884 * will be executed. The attached skb (if present) will only be freed
3885 * if the callback returns 1
3886 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003887static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3888 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003889{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003890 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003891 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3892 int txq_id = SEQ_TO_QUEUE(sequence);
3893 int index = SEQ_TO_INDEX(sequence);
3894 int huge = sequence & SEQ_HUGE_FRAME;
3895 int cmd_index;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003896 struct iwl3945_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07003897
3898 /* If a Tx command is being handled and it isn't in the actual
3899 * command queue then there a command routing bug has been introduced
3900 * in the queue management code. */
3901 if (txq_id != IWL_CMD_QUEUE_NUM)
3902 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3903 txq_id, pkt->hdr.cmd);
3904 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3905
3906 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3907 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3908
3909 /* Input error checking is done when commands are added to queue. */
3910 if (cmd->meta.flags & CMD_WANT_SKB) {
3911 cmd->meta.source->u.skb = rxb->skb;
3912 rxb->skb = NULL;
3913 } else if (cmd->meta.u.callback &&
3914 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3915 rxb->skb = NULL;
3916
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003917 iwl3945_tx_queue_reclaim(priv, txq_id, index);
Zhu Yib481de92007-09-25 17:54:57 -07003918
3919 if (!(cmd->meta.flags & CMD_ASYNC)) {
3920 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3921 wake_up_interruptible(&priv->wait_command_queue);
3922 }
3923}
3924
3925/************************** RX-FUNCTIONS ****************************/
3926/*
3927 * Rx theory of operation
3928 *
3929 * The host allocates 32 DMA target addresses and passes the host address
3930 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3931 * 0 to 31
3932 *
3933 * Rx Queue Indexes
3934 * The host/firmware share two index registers for managing the Rx buffers.
3935 *
3936 * The READ index maps to the first position that the firmware may be writing
3937 * to -- the driver can read up to (but not including) this position and get
3938 * good data.
3939 * The READ index is managed by the firmware once the card is enabled.
3940 *
3941 * The WRITE index maps to the last position the driver has read from -- the
3942 * position preceding WRITE is the last slot the firmware can place a packet.
3943 *
3944 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3945 * WRITE = READ.
3946 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003947 * During initialization, the host sets up the READ queue position to the first
Zhu Yib481de92007-09-25 17:54:57 -07003948 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3949 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003950 * When the firmware places a packet in a buffer, it will advance the READ index
Zhu Yib481de92007-09-25 17:54:57 -07003951 * and fire the RX interrupt. The driver can then query the READ index and
3952 * process as many packets as possible, moving the WRITE index forward as it
3953 * resets the Rx queue buffers with new memory.
3954 *
3955 * The management in the driver is as follows:
3956 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3957 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
Ian Schram01ebd062007-10-25 17:15:22 +08003958 * to replenish the iwl->rxq->rx_free.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003959 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
Zhu Yib481de92007-09-25 17:54:57 -07003960 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3961 * 'processed' and 'read' driver indexes as well)
3962 * + A received packet is processed and handed to the kernel network stack,
3963 * detached from the iwl->rxq. The driver 'processed' index is updated.
3964 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3965 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3966 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3967 * were enough free buffers and RX_STALLED is set it is cleared.
3968 *
3969 *
3970 * Driver sequence:
3971 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003972 * iwl3945_rx_queue_alloc() Allocates rx_free
3973 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003974 * iwl3945_rx_queue_restock
Ben Cahill9fbab512007-11-29 11:09:47 +08003975 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
Zhu Yib481de92007-09-25 17:54:57 -07003976 * queue, updates firmware pointers, and updates
3977 * the WRITE index. If insufficient rx_free buffers
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003978 * are available, schedules iwl3945_rx_replenish
Zhu Yib481de92007-09-25 17:54:57 -07003979 *
3980 * -- enable interrupts --
Ben Cahill9fbab512007-11-29 11:09:47 +08003981 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
Zhu Yib481de92007-09-25 17:54:57 -07003982 * READ INDEX, detaching the SKB from the pool.
3983 * Moves the packet buffer from queue to rx_used.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003984 * Calls iwl3945_rx_queue_restock to refill any empty
Zhu Yib481de92007-09-25 17:54:57 -07003985 * slots.
3986 * ...
3987 *
3988 */
3989
3990/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003991 * iwl3945_rx_queue_space - Return number of free slots available in queue.
Zhu Yib481de92007-09-25 17:54:57 -07003992 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003993static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07003994{
3995 int s = q->read - q->write;
3996 if (s <= 0)
3997 s += RX_QUEUE_SIZE;
3998 /* keep some buffer to not confuse full and empty queue */
3999 s -= 2;
4000 if (s < 0)
4001 s = 0;
4002 return s;
4003}
4004
4005/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004006 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
Zhu Yib481de92007-09-25 17:54:57 -07004007 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004008int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07004009{
4010 u32 reg = 0;
4011 int rc = 0;
4012 unsigned long flags;
4013
4014 spin_lock_irqsave(&q->lock, flags);
4015
4016 if (q->need_update == 0)
4017 goto exit_unlock;
4018
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004019 /* If power-saving is in use, make sure device is awake */
Zhu Yib481de92007-09-25 17:54:57 -07004020 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004021 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07004022
4023 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004024 iwl3945_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07004025 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4026 goto exit_unlock;
4027 }
4028
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004029 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004030 if (rc)
4031 goto exit_unlock;
4032
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004033 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004034 iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
Zhu Yib481de92007-09-25 17:54:57 -07004035 q->write & ~0x7);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004036 iwl3945_release_nic_access(priv);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004037
4038 /* Else device is assumed to be awake */
Zhu Yib481de92007-09-25 17:54:57 -07004039 } else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004040 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004041 iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
Zhu Yib481de92007-09-25 17:54:57 -07004042
4043
4044 q->need_update = 0;
4045
4046 exit_unlock:
4047 spin_unlock_irqrestore(&q->lock, flags);
4048 return rc;
4049}
4050
4051/**
Ben Cahill9fbab512007-11-29 11:09:47 +08004052 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
Zhu Yib481de92007-09-25 17:54:57 -07004053 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004054static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07004055 dma_addr_t dma_addr)
4056{
4057 return cpu_to_le32((u32)dma_addr);
4058}
4059
4060/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004061 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
Zhu Yib481de92007-09-25 17:54:57 -07004062 *
Ben Cahill9fbab512007-11-29 11:09:47 +08004063 * If there are slots in the RX queue that need to be restocked,
Zhu Yib481de92007-09-25 17:54:57 -07004064 * and we have free pre-allocated buffers, fill the ranks as much
Ben Cahill9fbab512007-11-29 11:09:47 +08004065 * as we can, pulling from rx_free.
Zhu Yib481de92007-09-25 17:54:57 -07004066 *
4067 * This moves the 'write' index forward to catch up with 'processed', and
4068 * also updates the memory address in the firmware to reference the new
4069 * target buffer.
4070 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004071static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004072{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004073 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004074 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004075 struct iwl3945_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07004076 unsigned long flags;
4077 int write, rc;
4078
4079 spin_lock_irqsave(&rxq->lock, flags);
4080 write = rxq->write & ~0x7;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004081 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004082 /* Get next free Rx buffer, remove from free list */
Zhu Yib481de92007-09-25 17:54:57 -07004083 element = rxq->rx_free.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004084 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
Zhu Yib481de92007-09-25 17:54:57 -07004085 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004086
4087 /* Point to Rx buffer via next RBD in circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004088 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
Zhu Yib481de92007-09-25 17:54:57 -07004089 rxq->queue[rxq->write] = rxb;
4090 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
4091 rxq->free_count--;
4092 }
4093 spin_unlock_irqrestore(&rxq->lock, flags);
4094 /* If the pre-allocated buffer pool is dropping low, schedule to
4095 * refill it */
4096 if (rxq->free_count <= RX_LOW_WATERMARK)
4097 queue_work(priv->workqueue, &priv->rx_replenish);
4098
4099
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004100 /* If we've added more space for the firmware to place data, tell it.
4101 * Increment device's write pointer in multiples of 8. */
Zhu Yib481de92007-09-25 17:54:57 -07004102 if ((write != (rxq->write & ~0x7))
4103 || (abs(rxq->write - rxq->read) > 7)) {
4104 spin_lock_irqsave(&rxq->lock, flags);
4105 rxq->need_update = 1;
4106 spin_unlock_irqrestore(&rxq->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004107 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
Zhu Yib481de92007-09-25 17:54:57 -07004108 if (rc)
4109 return rc;
4110 }
4111
4112 return 0;
4113}
4114
4115/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004116 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
Zhu Yib481de92007-09-25 17:54:57 -07004117 *
4118 * When moving to rx_free an SKB is allocated for the slot.
4119 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004120 * Also restock the Rx queue via iwl3945_rx_queue_restock.
Ian Schram01ebd062007-10-25 17:15:22 +08004121 * This is called as a scheduled work item (except for during initialization)
Zhu Yib481de92007-09-25 17:54:57 -07004122 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004123void iwl3945_rx_replenish(void *data)
Zhu Yib481de92007-09-25 17:54:57 -07004124{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004125 struct iwl3945_priv *priv = data;
4126 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004127 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004128 struct iwl3945_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07004129 unsigned long flags;
4130 spin_lock_irqsave(&rxq->lock, flags);
4131 while (!list_empty(&rxq->rx_used)) {
4132 element = rxq->rx_used.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004133 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004134
4135 /* Alloc a new receive buffer */
Zhu Yib481de92007-09-25 17:54:57 -07004136 rxb->skb =
4137 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
4138 if (!rxb->skb) {
4139 if (net_ratelimit())
4140 printk(KERN_CRIT DRV_NAME
4141 ": Can not allocate SKB buffers\n");
4142 /* We don't reschedule replenish work here -- we will
4143 * call the restock method and if it still needs
4144 * more buffers it will schedule replenish */
4145 break;
4146 }
4147 priv->alloc_rxb_skb++;
4148 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004149
4150 /* Get physical address of RB/SKB */
Zhu Yib481de92007-09-25 17:54:57 -07004151 rxb->dma_addr =
4152 pci_map_single(priv->pci_dev, rxb->skb->data,
4153 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4154 list_add_tail(&rxb->list, &rxq->rx_free);
4155 rxq->free_count++;
4156 }
4157 spin_unlock_irqrestore(&rxq->lock, flags);
4158
4159 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004160 iwl3945_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004161 spin_unlock_irqrestore(&priv->lock, flags);
4162}
4163
4164/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
Ben Cahill9fbab512007-11-29 11:09:47 +08004165 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
Zhu Yib481de92007-09-25 17:54:57 -07004166 * This free routine walks the list of POOL entries and if SKB is set to
4167 * non NULL it is unmapped and freed
4168 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004169static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07004170{
4171 int i;
4172 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4173 if (rxq->pool[i].skb != NULL) {
4174 pci_unmap_single(priv->pci_dev,
4175 rxq->pool[i].dma_addr,
4176 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4177 dev_kfree_skb(rxq->pool[i].skb);
4178 }
4179 }
4180
4181 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4182 rxq->dma_addr);
4183 rxq->bd = NULL;
4184}
4185
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004186int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004187{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004188 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004189 struct pci_dev *dev = priv->pci_dev;
4190 int i;
4191
4192 spin_lock_init(&rxq->lock);
4193 INIT_LIST_HEAD(&rxq->rx_free);
4194 INIT_LIST_HEAD(&rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004195
4196 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
Zhu Yib481de92007-09-25 17:54:57 -07004197 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4198 if (!rxq->bd)
4199 return -ENOMEM;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004200
Zhu Yib481de92007-09-25 17:54:57 -07004201 /* Fill the rx_used queue with _all_ of the Rx buffers */
4202 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4203 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004204
Zhu Yib481de92007-09-25 17:54:57 -07004205 /* Set us so that we have processed and used all buffers, but have
4206 * not restocked the Rx queue with fresh buffers */
4207 rxq->read = rxq->write = 0;
4208 rxq->free_count = 0;
4209 rxq->need_update = 0;
4210 return 0;
4211}
4212
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004213void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07004214{
4215 unsigned long flags;
4216 int i;
4217 spin_lock_irqsave(&rxq->lock, flags);
4218 INIT_LIST_HEAD(&rxq->rx_free);
4219 INIT_LIST_HEAD(&rxq->rx_used);
4220 /* Fill the rx_used queue with _all_ of the Rx buffers */
4221 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4222 /* In the reset function, these buffers may have been allocated
4223 * to an SKB, so we need to unmap and free potential storage */
4224 if (rxq->pool[i].skb != NULL) {
4225 pci_unmap_single(priv->pci_dev,
4226 rxq->pool[i].dma_addr,
4227 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4228 priv->alloc_rxb_skb--;
4229 dev_kfree_skb(rxq->pool[i].skb);
4230 rxq->pool[i].skb = NULL;
4231 }
4232 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4233 }
4234
4235 /* Set us so that we have processed and used all buffers, but have
4236 * not restocked the Rx queue with fresh buffers */
4237 rxq->read = rxq->write = 0;
4238 rxq->free_count = 0;
4239 spin_unlock_irqrestore(&rxq->lock, flags);
4240}
4241
4242/* Convert linear signal-to-noise ratio into dB */
4243static u8 ratio2dB[100] = {
4244/* 0 1 2 3 4 5 6 7 8 9 */
4245 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4246 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4247 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4248 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4249 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4250 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4251 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4252 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4253 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4254 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4255};
4256
4257/* Calculates a relative dB value from a ratio of linear
4258 * (i.e. not dB) signal levels.
4259 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004260int iwl3945_calc_db_from_ratio(int sig_ratio)
Zhu Yib481de92007-09-25 17:54:57 -07004261{
4262 /* Anything above 1000:1 just report as 60 dB */
4263 if (sig_ratio > 1000)
4264 return 60;
4265
4266 /* Above 100:1, divide by 10 and use table,
4267 * add 20 dB to make up for divide by 10 */
4268 if (sig_ratio > 100)
4269 return (20 + (int)ratio2dB[sig_ratio/10]);
4270
4271 /* We shouldn't see this */
4272 if (sig_ratio < 1)
4273 return 0;
4274
4275 /* Use table for ratios 1:1 - 99:1 */
4276 return (int)ratio2dB[sig_ratio];
4277}
4278
4279#define PERFECT_RSSI (-20) /* dBm */
4280#define WORST_RSSI (-95) /* dBm */
4281#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4282
4283/* Calculate an indication of rx signal quality (a percentage, not dBm!).
4284 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4285 * about formulas used below. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004286int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
Zhu Yib481de92007-09-25 17:54:57 -07004287{
4288 int sig_qual;
4289 int degradation = PERFECT_RSSI - rssi_dbm;
4290
4291 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4292 * as indicator; formula is (signal dbm - noise dbm).
4293 * SNR at or above 40 is a great signal (100%).
4294 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4295 * Weakest usable signal is usually 10 - 15 dB SNR. */
4296 if (noise_dbm) {
4297 if (rssi_dbm - noise_dbm >= 40)
4298 return 100;
4299 else if (rssi_dbm < noise_dbm)
4300 return 0;
4301 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4302
4303 /* Else use just the signal level.
4304 * This formula is a least squares fit of data points collected and
4305 * compared with a reference system that had a percentage (%) display
4306 * for signal quality. */
4307 } else
4308 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4309 (15 * RSSI_RANGE + 62 * degradation)) /
4310 (RSSI_RANGE * RSSI_RANGE);
4311
4312 if (sig_qual > 100)
4313 sig_qual = 100;
4314 else if (sig_qual < 1)
4315 sig_qual = 0;
4316
4317 return sig_qual;
4318}
4319
4320/**
Ben Cahill9fbab512007-11-29 11:09:47 +08004321 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
Zhu Yib481de92007-09-25 17:54:57 -07004322 *
4323 * Uses the priv->rx_handlers callback function array to invoke
4324 * the appropriate handlers, including command responses,
4325 * frame-received notifications, and other notifications.
4326 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004327static void iwl3945_rx_handle(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004328{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004329 struct iwl3945_rx_mem_buffer *rxb;
4330 struct iwl3945_rx_packet *pkt;
4331 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004332 u32 r, i;
4333 int reclaim;
4334 unsigned long flags;
4335
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004336 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4337 * buffer that the driver may process (last buffer filled by ucode). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004338 r = iwl3945_hw_get_rx_read(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004339 i = rxq->read;
4340
4341 /* Rx interrupt, but nothing sent from uCode */
4342 if (i == r)
4343 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4344
4345 while (i != r) {
4346 rxb = rxq->queue[i];
4347
Ben Cahill9fbab512007-11-29 11:09:47 +08004348 /* If an RXB doesn't have a Rx queue slot associated with it,
Zhu Yib481de92007-09-25 17:54:57 -07004349 * then a bug has been introduced in the queue refilling
4350 * routines -- catch it here */
4351 BUG_ON(rxb == NULL);
4352
4353 rxq->queue[i] = NULL;
4354
4355 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4356 IWL_RX_BUF_SIZE,
4357 PCI_DMA_FROMDEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004358 pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07004359
4360 /* Reclaim a command buffer only if this packet is a response
4361 * to a (driver-originated) command.
4362 * If the packet (e.g. Rx frame) originated from uCode,
4363 * there is no command buffer to reclaim.
4364 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4365 * but apparently a few don't get set; catch them here. */
4366 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4367 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4368 (pkt->hdr.cmd != REPLY_TX);
4369
4370 /* Based on type of command response or notification,
4371 * handle those that need handling via function in
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004372 * rx_handlers table. See iwl3945_setup_rx_handlers() */
Zhu Yib481de92007-09-25 17:54:57 -07004373 if (priv->rx_handlers[pkt->hdr.cmd]) {
4374 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4375 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4376 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4377 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4378 } else {
4379 /* No handling needed */
4380 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4381 "r %d i %d No handler needed for %s, 0x%02x\n",
4382 r, i, get_cmd_string(pkt->hdr.cmd),
4383 pkt->hdr.cmd);
4384 }
4385
4386 if (reclaim) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004387 /* Invoke any callbacks, transfer the skb to caller, and
4388 * fire off the (possibly) blocking iwl3945_send_cmd()
Zhu Yib481de92007-09-25 17:54:57 -07004389 * as we reclaim the driver command queue */
4390 if (rxb && rxb->skb)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004391 iwl3945_tx_cmd_complete(priv, rxb);
Zhu Yib481de92007-09-25 17:54:57 -07004392 else
4393 IWL_WARNING("Claim null rxb?\n");
4394 }
4395
4396 /* For now we just don't re-use anything. We can tweak this
4397 * later to try and re-use notification packets and SKBs that
4398 * fail to Rx correctly */
4399 if (rxb->skb != NULL) {
4400 priv->alloc_rxb_skb--;
4401 dev_kfree_skb_any(rxb->skb);
4402 rxb->skb = NULL;
4403 }
4404
4405 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4406 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4407 spin_lock_irqsave(&rxq->lock, flags);
4408 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4409 spin_unlock_irqrestore(&rxq->lock, flags);
4410 i = (i + 1) & RX_QUEUE_MASK;
4411 }
4412
4413 /* Backtrack one entry */
4414 priv->rxq.read = i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004415 iwl3945_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004416}
4417
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004418/**
4419 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
4420 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004421static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
4422 struct iwl3945_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -07004423{
4424 u32 reg = 0;
4425 int rc = 0;
4426 int txq_id = txq->q.id;
4427
4428 if (txq->need_update == 0)
4429 return rc;
4430
4431 /* if we're trying to save power */
4432 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4433 /* wake up nic if it's powered down ...
4434 * uCode will wake up, and interrupt us again, so next
4435 * time we'll skip this part. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004436 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07004437
4438 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4439 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004440 iwl3945_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07004441 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4442 return rc;
4443 }
4444
4445 /* restore this queue's parameters in nic hardware. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004446 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004447 if (rc)
4448 return rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004449 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004450 txq->q.write_ptr | (txq_id << 8));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004451 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004452
4453 /* else not in power-save mode, uCode will never sleep when we're
4454 * trying to tx (during RFKILL, we're not trying to tx). */
4455 } else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004456 iwl3945_write32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004457 txq->q.write_ptr | (txq_id << 8));
Zhu Yib481de92007-09-25 17:54:57 -07004458
4459 txq->need_update = 0;
4460
4461 return rc;
4462}
4463
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004464#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004465static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -07004466{
Joe Perches0795af52007-10-03 17:59:30 -07004467 DECLARE_MAC_BUF(mac);
4468
Zhu Yib481de92007-09-25 17:54:57 -07004469 IWL_DEBUG_RADIO("RX CONFIG:\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004470 iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
Zhu Yib481de92007-09-25 17:54:57 -07004471 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4472 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4473 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4474 le32_to_cpu(rxon->filter_flags));
4475 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4476 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4477 rxon->ofdm_basic_rates);
4478 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
Joe Perches0795af52007-10-03 17:59:30 -07004479 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4480 print_mac(mac, rxon->node_addr));
4481 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4482 print_mac(mac, rxon->bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07004483 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4484}
4485#endif
4486
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004487static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004488{
4489 IWL_DEBUG_ISR("Enabling interrupts\n");
4490 set_bit(STATUS_INT_ENABLED, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004491 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004492}
4493
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004494static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004495{
4496 clear_bit(STATUS_INT_ENABLED, &priv->status);
4497
4498 /* disable interrupts from uCode/NIC to host */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004499 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004500
4501 /* acknowledge/clear/reset any interrupts still pending
4502 * from uCode or flow handler (Rx/Tx DMA) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004503 iwl3945_write32(priv, CSR_INT, 0xffffffff);
4504 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
Zhu Yib481de92007-09-25 17:54:57 -07004505 IWL_DEBUG_ISR("Disabled interrupts\n");
4506}
4507
4508static const char *desc_lookup(int i)
4509{
4510 switch (i) {
4511 case 1:
4512 return "FAIL";
4513 case 2:
4514 return "BAD_PARAM";
4515 case 3:
4516 return "BAD_CHECKSUM";
4517 case 4:
4518 return "NMI_INTERRUPT";
4519 case 5:
4520 return "SYSASSERT";
4521 case 6:
4522 return "FATAL_ERROR";
4523 }
4524
4525 return "UNKNOWN";
4526}
4527
4528#define ERROR_START_OFFSET (1 * sizeof(u32))
4529#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4530
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004531static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004532{
4533 u32 i;
4534 u32 desc, time, count, base, data1;
4535 u32 blink1, blink2, ilink1, ilink2;
4536 int rc;
4537
4538 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4539
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004540 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004541 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4542 return;
4543 }
4544
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004545 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004546 if (rc) {
4547 IWL_WARNING("Can not read from adapter at this time.\n");
4548 return;
4549 }
4550
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004551 count = iwl3945_read_targ_mem(priv, base);
Zhu Yib481de92007-09-25 17:54:57 -07004552
4553 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4554 IWL_ERROR("Start IWL Error Log Dump:\n");
4555 IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
4556 priv->status, priv->config, count);
4557 }
4558
4559 IWL_ERROR("Desc Time asrtPC blink2 "
4560 "ilink1 nmiPC Line\n");
4561 for (i = ERROR_START_OFFSET;
4562 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4563 i += ERROR_ELEM_SIZE) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004564 desc = iwl3945_read_targ_mem(priv, base + i);
Zhu Yib481de92007-09-25 17:54:57 -07004565 time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004566 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004567 blink1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004568 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004569 blink2 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004570 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004571 ilink1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004572 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004573 ilink2 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004574 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004575 data1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004576 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004577
4578 IWL_ERROR
4579 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4580 desc_lookup(desc), desc, time, blink1, blink2,
4581 ilink1, ilink2, data1);
4582 }
4583
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004584 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004585
4586}
4587
Ben Cahillf58177b2007-11-29 11:09:43 +08004588#define EVENT_START_OFFSET (6 * sizeof(u32))
Zhu Yib481de92007-09-25 17:54:57 -07004589
4590/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004591 * iwl3945_print_event_log - Dump error event log to syslog
Zhu Yib481de92007-09-25 17:54:57 -07004592 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004593 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
Zhu Yib481de92007-09-25 17:54:57 -07004594 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004595static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
Zhu Yib481de92007-09-25 17:54:57 -07004596 u32 num_events, u32 mode)
4597{
4598 u32 i;
4599 u32 base; /* SRAM byte address of event log header */
4600 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4601 u32 ptr; /* SRAM byte address of log data */
4602 u32 ev, time, data; /* event log data */
4603
4604 if (num_events == 0)
4605 return;
4606
4607 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4608
4609 if (mode == 0)
4610 event_size = 2 * sizeof(u32);
4611 else
4612 event_size = 3 * sizeof(u32);
4613
4614 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4615
4616 /* "time" is actually "data" for mode 0 (no timestamp).
4617 * place event id # at far right for easier visual parsing. */
4618 for (i = 0; i < num_events; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004619 ev = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004620 ptr += sizeof(u32);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004621 time = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004622 ptr += sizeof(u32);
4623 if (mode == 0)
4624 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4625 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004626 data = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004627 ptr += sizeof(u32);
4628 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4629 }
4630 }
4631}
4632
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004633static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004634{
4635 int rc;
4636 u32 base; /* SRAM byte address of event log header */
4637 u32 capacity; /* event log capacity in # entries */
4638 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4639 u32 num_wraps; /* # times uCode wrapped to top of log */
4640 u32 next_entry; /* index of next entry to be written by uCode */
4641 u32 size; /* # entries that we'll print */
4642
4643 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004644 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004645 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4646 return;
4647 }
4648
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004649 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004650 if (rc) {
4651 IWL_WARNING("Can not read from adapter at this time.\n");
4652 return;
4653 }
4654
4655 /* event log header */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004656 capacity = iwl3945_read_targ_mem(priv, base);
4657 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4658 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4659 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
Zhu Yib481de92007-09-25 17:54:57 -07004660
4661 size = num_wraps ? capacity : next_entry;
4662
4663 /* bail out if nothing in log */
4664 if (size == 0) {
Zhu Yi583fab32007-09-27 11:27:30 +08004665 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004666 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004667 return;
4668 }
4669
Zhu Yi583fab32007-09-27 11:27:30 +08004670 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07004671 size, num_wraps);
4672
4673 /* if uCode has wrapped back to top of log, start at the oldest entry,
4674 * i.e the next one that uCode would fill. */
4675 if (num_wraps)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004676 iwl3945_print_event_log(priv, next_entry,
Zhu Yib481de92007-09-25 17:54:57 -07004677 capacity - next_entry, mode);
4678
4679 /* (then/else) start at top of log */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004680 iwl3945_print_event_log(priv, 0, next_entry, mode);
Zhu Yib481de92007-09-25 17:54:57 -07004681
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004682 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004683}
4684
4685/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004686 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
Zhu Yib481de92007-09-25 17:54:57 -07004687 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004688static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004689{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004690 /* Set the FW error flag -- cleared on iwl3945_down */
Zhu Yib481de92007-09-25 17:54:57 -07004691 set_bit(STATUS_FW_ERROR, &priv->status);
4692
4693 /* Cancel currently queued command. */
4694 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4695
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004696#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004697 if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4698 iwl3945_dump_nic_error_log(priv);
4699 iwl3945_dump_nic_event_log(priv);
4700 iwl3945_print_rx_config_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07004701 }
4702#endif
4703
4704 wake_up_interruptible(&priv->wait_command_queue);
4705
4706 /* Keep the restart process from trying to send host
4707 * commands by clearing the INIT status bit */
4708 clear_bit(STATUS_READY, &priv->status);
4709
4710 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4711 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4712 "Restarting adapter due to uCode error.\n");
4713
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004714 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07004715 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4716 sizeof(priv->recovery_rxon));
4717 priv->error_recovering = 1;
4718 }
4719 queue_work(priv->workqueue, &priv->restart);
4720 }
4721}
4722
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004723static void iwl3945_error_recovery(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004724{
4725 unsigned long flags;
4726
4727 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4728 sizeof(priv->staging_rxon));
4729 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004730 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004731
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004732 iwl3945_add_station(priv, priv->bssid, 1, 0);
Zhu Yib481de92007-09-25 17:54:57 -07004733
4734 spin_lock_irqsave(&priv->lock, flags);
4735 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4736 priv->error_recovering = 0;
4737 spin_unlock_irqrestore(&priv->lock, flags);
4738}
4739
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004740static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004741{
4742 u32 inta, handled = 0;
4743 u32 inta_fh;
4744 unsigned long flags;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004745#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07004746 u32 inta_mask;
4747#endif
4748
4749 spin_lock_irqsave(&priv->lock, flags);
4750
4751 /* Ack/clear/reset pending uCode interrupts.
4752 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4753 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004754 inta = iwl3945_read32(priv, CSR_INT);
4755 iwl3945_write32(priv, CSR_INT, inta);
Zhu Yib481de92007-09-25 17:54:57 -07004756
4757 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4758 * Any new interrupts that happen after this, either while we're
4759 * in this tasklet, or later, will show up in next ISR/tasklet. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004760 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4761 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
Zhu Yib481de92007-09-25 17:54:57 -07004762
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004763#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004764 if (iwl3945_debug_level & IWL_DL_ISR) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004765 /* just for debug */
4766 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004767 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4768 inta, inta_mask, inta_fh);
4769 }
4770#endif
4771
4772 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4773 * atomic, make sure that inta covers all the interrupts that
4774 * we've discovered, even if FH interrupt came in just after
4775 * reading CSR_INT. */
4776 if (inta_fh & CSR_FH_INT_RX_MASK)
4777 inta |= CSR_INT_BIT_FH_RX;
4778 if (inta_fh & CSR_FH_INT_TX_MASK)
4779 inta |= CSR_INT_BIT_FH_TX;
4780
4781 /* Now service all interrupt bits discovered above. */
4782 if (inta & CSR_INT_BIT_HW_ERR) {
4783 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4784
4785 /* Tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004786 iwl3945_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004787
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004788 iwl3945_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004789
4790 handled |= CSR_INT_BIT_HW_ERR;
4791
4792 spin_unlock_irqrestore(&priv->lock, flags);
4793
4794 return;
4795 }
4796
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004797#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004798 if (iwl3945_debug_level & (IWL_DL_ISR)) {
Zhu Yib481de92007-09-25 17:54:57 -07004799 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4800 if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
4801 IWL_DEBUG_ISR("Microcode started or stopped.\n");
4802
4803 /* Alive notification via Rx interrupt will do the real work */
4804 if (inta & CSR_INT_BIT_ALIVE)
4805 IWL_DEBUG_ISR("Alive interrupt\n");
4806 }
4807#endif
4808 /* Safely ignore these bits for debug checks below */
4809 inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
4810
4811 /* HW RF KILL switch toggled (4965 only) */
4812 if (inta & CSR_INT_BIT_RF_KILL) {
4813 int hw_rf_kill = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004814 if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
Zhu Yib481de92007-09-25 17:54:57 -07004815 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4816 hw_rf_kill = 1;
4817
4818 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4819 "RF_KILL bit toggled to %s.\n",
4820 hw_rf_kill ? "disable radio":"enable radio");
4821
4822 /* Queue restart only if RF_KILL switch was set to "kill"
4823 * when we loaded driver, and is now set to "enable".
4824 * After we're Alive, RF_KILL gets handled by
4825 * iwl_rx_card_state_notif() */
Zhu Yi53e49092007-12-06 16:08:44 +08004826 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4827 clear_bit(STATUS_RF_KILL_HW, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07004828 queue_work(priv->workqueue, &priv->restart);
Zhu Yi53e49092007-12-06 16:08:44 +08004829 }
Zhu Yib481de92007-09-25 17:54:57 -07004830
4831 handled |= CSR_INT_BIT_RF_KILL;
4832 }
4833
4834 /* Chip got too hot and stopped itself (4965 only) */
4835 if (inta & CSR_INT_BIT_CT_KILL) {
4836 IWL_ERROR("Microcode CT kill error detected.\n");
4837 handled |= CSR_INT_BIT_CT_KILL;
4838 }
4839
4840 /* Error detected by uCode */
4841 if (inta & CSR_INT_BIT_SW_ERR) {
4842 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4843 inta);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004844 iwl3945_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004845 handled |= CSR_INT_BIT_SW_ERR;
4846 }
4847
4848 /* uCode wakes up after power-down sleep */
4849 if (inta & CSR_INT_BIT_WAKEUP) {
4850 IWL_DEBUG_ISR("Wakeup interrupt\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004851 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4852 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4853 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4854 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4855 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4856 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4857 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
Zhu Yib481de92007-09-25 17:54:57 -07004858
4859 handled |= CSR_INT_BIT_WAKEUP;
4860 }
4861
4862 /* All uCode command responses, including Tx command responses,
4863 * Rx "responses" (frame-received notification), and other
4864 * notifications from uCode come through here*/
4865 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004866 iwl3945_rx_handle(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004867 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4868 }
4869
4870 if (inta & CSR_INT_BIT_FH_TX) {
4871 IWL_DEBUG_ISR("Tx interrupt\n");
4872
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004873 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4874 if (!iwl3945_grab_nic_access(priv)) {
4875 iwl3945_write_direct32(priv,
Zhu Yib481de92007-09-25 17:54:57 -07004876 FH_TCSR_CREDIT
4877 (ALM_FH_SRVC_CHNL), 0x0);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004878 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004879 }
4880 handled |= CSR_INT_BIT_FH_TX;
4881 }
4882
4883 if (inta & ~handled)
4884 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4885
4886 if (inta & ~CSR_INI_SET_MASK) {
4887 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4888 inta & ~CSR_INI_SET_MASK);
4889 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4890 }
4891
4892 /* Re-enable all interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004893 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004894
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004895#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004896 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4897 inta = iwl3945_read32(priv, CSR_INT);
4898 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4899 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07004900 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4901 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4902 }
4903#endif
4904 spin_unlock_irqrestore(&priv->lock, flags);
4905}
4906
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004907static irqreturn_t iwl3945_isr(int irq, void *data)
Zhu Yib481de92007-09-25 17:54:57 -07004908{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004909 struct iwl3945_priv *priv = data;
Zhu Yib481de92007-09-25 17:54:57 -07004910 u32 inta, inta_mask;
4911 u32 inta_fh;
4912 if (!priv)
4913 return IRQ_NONE;
4914
4915 spin_lock(&priv->lock);
4916
4917 /* Disable (but don't clear!) interrupts here to avoid
4918 * back-to-back ISRs and sporadic interrupts from our NIC.
4919 * If we have something to service, the tasklet will re-enable ints.
4920 * If we *don't* have something, we'll re-enable before leaving here. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004921 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4922 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004923
4924 /* Discover which interrupts are active/pending */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004925 inta = iwl3945_read32(priv, CSR_INT);
4926 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07004927
4928 /* Ignore interrupt if there's nothing in NIC to service.
4929 * This may be due to IRQ shared with another device,
4930 * or due to sporadic interrupts thrown from our NIC. */
4931 if (!inta && !inta_fh) {
4932 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4933 goto none;
4934 }
4935
4936 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4937 /* Hardware disappeared */
4938 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
Oliver Neukumcb4da1a2007-11-13 21:10:32 -08004939 goto unplugged;
Zhu Yib481de92007-09-25 17:54:57 -07004940 }
4941
4942 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4943 inta, inta_mask, inta_fh);
4944
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004945 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
Zhu Yib481de92007-09-25 17:54:57 -07004946 tasklet_schedule(&priv->irq_tasklet);
Oliver Neukumcb4da1a2007-11-13 21:10:32 -08004947unplugged:
Zhu Yib481de92007-09-25 17:54:57 -07004948 spin_unlock(&priv->lock);
4949
4950 return IRQ_HANDLED;
4951
4952 none:
4953 /* re-enable interrupts here since we don't have anything to service. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004954 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004955 spin_unlock(&priv->lock);
4956 return IRQ_NONE;
4957}
4958
4959/************************** EEPROM BANDS ****************************
4960 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004961 * The iwl3945_eeprom_band definitions below provide the mapping from the
Zhu Yib481de92007-09-25 17:54:57 -07004962 * EEPROM contents to the specific channel number supported for each
4963 * band.
4964 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004965 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
Zhu Yib481de92007-09-25 17:54:57 -07004966 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4967 * The specific geography and calibration information for that channel
4968 * is contained in the eeprom map itself.
4969 *
4970 * During init, we copy the eeprom information and channel map
4971 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4972 *
4973 * channel_map_24/52 provides the index in the channel_info array for a
4974 * given channel. We have to have two separate maps as there is channel
4975 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4976 * band_2
4977 *
4978 * A value of 0xff stored in the channel_map indicates that the channel
4979 * is not supported by the hardware at all.
4980 *
4981 * A value of 0xfe in the channel_map indicates that the channel is not
4982 * valid for Tx with the current hardware. This means that
4983 * while the system can tune and receive on a given channel, it may not
4984 * be able to associate or transmit any frames on that
4985 * channel. There is no corresponding channel information for that
4986 * entry.
4987 *
4988 *********************************************************************/
4989
4990/* 2.4 GHz */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004991static const u8 iwl3945_eeprom_band_1[14] = {
Zhu Yib481de92007-09-25 17:54:57 -07004992 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4993};
4994
4995/* 5.2 GHz bands */
Ben Cahill9fbab512007-11-29 11:09:47 +08004996static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004997 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4998};
4999
Ben Cahill9fbab512007-11-29 11:09:47 +08005000static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
Zhu Yib481de92007-09-25 17:54:57 -07005001 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
5002};
5003
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005004static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
Zhu Yib481de92007-09-25 17:54:57 -07005005 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
5006};
5007
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005008static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
Zhu Yib481de92007-09-25 17:54:57 -07005009 145, 149, 153, 157, 161, 165
5010};
5011
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005012static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
Zhu Yib481de92007-09-25 17:54:57 -07005013 int *eeprom_ch_count,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005014 const struct iwl3945_eeprom_channel
Zhu Yib481de92007-09-25 17:54:57 -07005015 **eeprom_ch_info,
5016 const u8 **eeprom_ch_index)
5017{
5018 switch (band) {
5019 case 1: /* 2.4GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005020 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
Zhu Yib481de92007-09-25 17:54:57 -07005021 *eeprom_ch_info = priv->eeprom.band_1_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005022 *eeprom_ch_index = iwl3945_eeprom_band_1;
Zhu Yib481de92007-09-25 17:54:57 -07005023 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08005024 case 2: /* 4.9GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005025 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
Zhu Yib481de92007-09-25 17:54:57 -07005026 *eeprom_ch_info = priv->eeprom.band_2_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005027 *eeprom_ch_index = iwl3945_eeprom_band_2;
Zhu Yib481de92007-09-25 17:54:57 -07005028 break;
5029 case 3: /* 5.2GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005030 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
Zhu Yib481de92007-09-25 17:54:57 -07005031 *eeprom_ch_info = priv->eeprom.band_3_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005032 *eeprom_ch_index = iwl3945_eeprom_band_3;
Zhu Yib481de92007-09-25 17:54:57 -07005033 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08005034 case 4: /* 5.5GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005035 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
Zhu Yib481de92007-09-25 17:54:57 -07005036 *eeprom_ch_info = priv->eeprom.band_4_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005037 *eeprom_ch_index = iwl3945_eeprom_band_4;
Zhu Yib481de92007-09-25 17:54:57 -07005038 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08005039 case 5: /* 5.7GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005040 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07005041 *eeprom_ch_info = priv->eeprom.band_5_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005042 *eeprom_ch_index = iwl3945_eeprom_band_5;
Zhu Yib481de92007-09-25 17:54:57 -07005043 break;
5044 default:
5045 BUG();
5046 return;
5047 }
5048}
5049
Cahill, Ben M6440adb2007-11-29 11:09:55 +08005050/**
5051 * iwl3945_get_channel_info - Find driver's private channel info
5052 *
5053 * Based on band and channel number.
5054 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005055const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07005056 int phymode, u16 channel)
5057{
5058 int i;
5059
5060 switch (phymode) {
5061 case MODE_IEEE80211A:
5062 for (i = 14; i < priv->channel_count; i++) {
5063 if (priv->channel_info[i].channel == channel)
5064 return &priv->channel_info[i];
5065 }
5066 break;
5067
5068 case MODE_IEEE80211B:
5069 case MODE_IEEE80211G:
5070 if (channel >= 1 && channel <= 14)
5071 return &priv->channel_info[channel - 1];
5072 break;
5073
5074 }
5075
5076 return NULL;
5077}
5078
5079#define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5080 ? # x " " : "")
5081
Cahill, Ben M6440adb2007-11-29 11:09:55 +08005082/**
5083 * iwl3945_init_channel_map - Set up driver's info for all possible channels
5084 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005085static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005086{
5087 int eeprom_ch_count = 0;
5088 const u8 *eeprom_ch_index = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005089 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07005090 int band, ch;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005091 struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07005092
5093 if (priv->channel_count) {
5094 IWL_DEBUG_INFO("Channel map already initialized.\n");
5095 return 0;
5096 }
5097
5098 if (priv->eeprom.version < 0x2f) {
5099 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5100 priv->eeprom.version);
5101 return -EINVAL;
5102 }
5103
5104 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5105
5106 priv->channel_count =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005107 ARRAY_SIZE(iwl3945_eeprom_band_1) +
5108 ARRAY_SIZE(iwl3945_eeprom_band_2) +
5109 ARRAY_SIZE(iwl3945_eeprom_band_3) +
5110 ARRAY_SIZE(iwl3945_eeprom_band_4) +
5111 ARRAY_SIZE(iwl3945_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07005112
5113 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5114
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005115 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
Zhu Yib481de92007-09-25 17:54:57 -07005116 priv->channel_count, GFP_KERNEL);
5117 if (!priv->channel_info) {
5118 IWL_ERROR("Could not allocate channel_info\n");
5119 priv->channel_count = 0;
5120 return -ENOMEM;
5121 }
5122
5123 ch_info = priv->channel_info;
5124
5125 /* Loop through the 5 EEPROM bands adding them in order to the
5126 * channel map we maintain (that contains additional information than
5127 * what just in the EEPROM) */
5128 for (band = 1; band <= 5; band++) {
5129
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005130 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
Zhu Yib481de92007-09-25 17:54:57 -07005131 &eeprom_ch_info, &eeprom_ch_index);
5132
5133 /* Loop through each band adding each of the channels */
5134 for (ch = 0; ch < eeprom_ch_count; ch++) {
5135 ch_info->channel = eeprom_ch_index[ch];
5136 ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
5137 MODE_IEEE80211A;
5138
5139 /* permanently store EEPROM's channel regulatory flags
5140 * and max power in channel info database. */
5141 ch_info->eeprom = eeprom_ch_info[ch];
5142
5143 /* Copy the run-time flags so they are there even on
5144 * invalid channels */
5145 ch_info->flags = eeprom_ch_info[ch].flags;
5146
5147 if (!(is_channel_valid(ch_info))) {
5148 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5149 "No traffic\n",
5150 ch_info->channel,
5151 ch_info->flags,
5152 is_channel_a_band(ch_info) ?
5153 "5.2" : "2.4");
5154 ch_info++;
5155 continue;
5156 }
5157
5158 /* Initialize regulatory-based run-time data */
5159 ch_info->max_power_avg = ch_info->curr_txpow =
5160 eeprom_ch_info[ch].max_power_avg;
5161 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5162 ch_info->min_power = 0;
5163
5164 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
5165 " %ddBm): Ad-Hoc %ssupported\n",
5166 ch_info->channel,
5167 is_channel_a_band(ch_info) ?
5168 "5.2" : "2.4",
5169 CHECK_AND_PRINT(IBSS),
5170 CHECK_AND_PRINT(ACTIVE),
5171 CHECK_AND_PRINT(RADAR),
5172 CHECK_AND_PRINT(WIDE),
5173 CHECK_AND_PRINT(NARROW),
5174 CHECK_AND_PRINT(DFS),
5175 eeprom_ch_info[ch].flags,
5176 eeprom_ch_info[ch].max_power_avg,
5177 ((eeprom_ch_info[ch].
5178 flags & EEPROM_CHANNEL_IBSS)
5179 && !(eeprom_ch_info[ch].
5180 flags & EEPROM_CHANNEL_RADAR))
5181 ? "" : "not ");
5182
5183 /* Set the user_txpower_limit to the highest power
5184 * supported by any channel */
5185 if (eeprom_ch_info[ch].max_power_avg >
5186 priv->user_txpower_limit)
5187 priv->user_txpower_limit =
5188 eeprom_ch_info[ch].max_power_avg;
5189
5190 ch_info++;
5191 }
5192 }
5193
Cahill, Ben M6440adb2007-11-29 11:09:55 +08005194 /* Set up txpower settings in driver for all channels */
Zhu Yib481de92007-09-25 17:54:57 -07005195 if (iwl3945_txpower_set_from_eeprom(priv))
5196 return -EIO;
5197
5198 return 0;
5199}
5200
5201/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5202 * sending probe req. This should be set long enough to hear probe responses
5203 * from more than one AP. */
5204#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5205#define IWL_ACTIVE_DWELL_TIME_52 (10)
5206
5207/* For faster active scanning, scan will move to the next channel if fewer than
5208 * PLCP_QUIET_THRESH packets are heard on this channel within
5209 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5210 * time if it's a quiet channel (nothing responded to our probe, and there's
5211 * no other traffic).
5212 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5213#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5214#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5215
5216/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5217 * Must be set longer than active dwell time.
5218 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5219#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5220#define IWL_PASSIVE_DWELL_TIME_52 (10)
5221#define IWL_PASSIVE_DWELL_BASE (100)
5222#define IWL_CHANNEL_TUNE_TIME 5
5223
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005224static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv, int phymode)
Zhu Yib481de92007-09-25 17:54:57 -07005225{
5226 if (phymode == MODE_IEEE80211A)
5227 return IWL_ACTIVE_DWELL_TIME_52;
5228 else
5229 return IWL_ACTIVE_DWELL_TIME_24;
5230}
5231
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005232static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv, int phymode)
Zhu Yib481de92007-09-25 17:54:57 -07005233{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005234 u16 active = iwl3945_get_active_dwell_time(priv, phymode);
Zhu Yib481de92007-09-25 17:54:57 -07005235 u16 passive = (phymode != MODE_IEEE80211A) ?
5236 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5237 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5238
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005239 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005240 /* If we're associated, we clamp the maximum passive
5241 * dwell time to be 98% of the beacon interval (minus
5242 * 2 * channel tune time) */
5243 passive = priv->beacon_int;
5244 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5245 passive = IWL_PASSIVE_DWELL_BASE;
5246 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5247 }
5248
5249 if (passive <= active)
5250 passive = active + 1;
5251
5252 return passive;
5253}
5254
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005255static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv, int phymode,
Zhu Yib481de92007-09-25 17:54:57 -07005256 u8 is_active, u8 direct_mask,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005257 struct iwl3945_scan_channel *scan_ch)
Zhu Yib481de92007-09-25 17:54:57 -07005258{
5259 const struct ieee80211_channel *channels = NULL;
5260 const struct ieee80211_hw_mode *hw_mode;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005261 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07005262 u16 passive_dwell = 0;
5263 u16 active_dwell = 0;
5264 int added, i;
5265
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005266 hw_mode = iwl3945_get_hw_mode(priv, phymode);
Zhu Yib481de92007-09-25 17:54:57 -07005267 if (!hw_mode)
5268 return 0;
5269
5270 channels = hw_mode->channels;
5271
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005272 active_dwell = iwl3945_get_active_dwell_time(priv, phymode);
5273 passive_dwell = iwl3945_get_passive_dwell_time(priv, phymode);
Zhu Yib481de92007-09-25 17:54:57 -07005274
5275 for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
5276 if (channels[i].chan ==
5277 le16_to_cpu(priv->active_rxon.channel)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005278 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005279 IWL_DEBUG_SCAN
5280 ("Skipping current channel %d\n",
5281 le16_to_cpu(priv->active_rxon.channel));
5282 continue;
5283 }
5284 } else if (priv->only_active_channel)
5285 continue;
5286
5287 scan_ch->channel = channels[i].chan;
5288
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005289 ch_info = iwl3945_get_channel_info(priv, phymode, scan_ch->channel);
Zhu Yib481de92007-09-25 17:54:57 -07005290 if (!is_channel_valid(ch_info)) {
5291 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5292 scan_ch->channel);
5293 continue;
5294 }
5295
5296 if (!is_active || is_channel_passive(ch_info) ||
5297 !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
5298 scan_ch->type = 0; /* passive */
5299 else
5300 scan_ch->type = 1; /* active */
5301
5302 if (scan_ch->type & 1)
5303 scan_ch->type |= (direct_mask << 1);
5304
5305 if (is_channel_narrow(ch_info))
5306 scan_ch->type |= (1 << 7);
5307
5308 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5309 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5310
Ben Cahill9fbab512007-11-29 11:09:47 +08005311 /* Set txpower levels to defaults */
Zhu Yib481de92007-09-25 17:54:57 -07005312 scan_ch->tpc.dsp_atten = 110;
5313 /* scan_pwr_info->tpc.dsp_atten; */
5314
5315 /*scan_pwr_info->tpc.tx_gain; */
5316 if (phymode == MODE_IEEE80211A)
5317 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5318 else {
5319 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5320 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
Ben Cahill9fbab512007-11-29 11:09:47 +08005321 * power level:
5322 * scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
Zhu Yib481de92007-09-25 17:54:57 -07005323 */
5324 }
5325
5326 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5327 scan_ch->channel,
5328 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5329 (scan_ch->type & 1) ?
5330 active_dwell : passive_dwell);
5331
5332 scan_ch++;
5333 added++;
5334 }
5335
5336 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5337 return added;
5338}
5339
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005340static void iwl3945_reset_channel_flag(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005341{
5342 int i, j;
5343 for (i = 0; i < 3; i++) {
5344 struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
5345 for (j = 0; j < hw_mode->num_channels; j++)
5346 hw_mode->channels[j].flag = hw_mode->channels[j].val;
5347 }
5348}
5349
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005350static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07005351 struct ieee80211_rate *rates)
5352{
5353 int i;
5354
5355 for (i = 0; i < IWL_RATE_COUNT; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005356 rates[i].rate = iwl3945_rates[i].ieee * 5;
Zhu Yib481de92007-09-25 17:54:57 -07005357 rates[i].val = i; /* Rate scaling will work on indexes */
5358 rates[i].val2 = i;
5359 rates[i].flags = IEEE80211_RATE_SUPPORTED;
5360 /* Only OFDM have the bits-per-symbol set */
5361 if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
5362 rates[i].flags |= IEEE80211_RATE_OFDM;
5363 else {
5364 /*
5365 * If CCK 1M then set rate flag to CCK else CCK_2
5366 * which is CCK | PREAMBLE2
5367 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005368 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
Zhu Yib481de92007-09-25 17:54:57 -07005369 IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
5370 }
5371
5372 /* Set up which ones are basic rates... */
5373 if (IWL_BASIC_RATES_MASK & (1 << i))
5374 rates[i].flags |= IEEE80211_RATE_BASIC;
5375 }
5376}
5377
5378/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005379 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07005380 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005381static int iwl3945_init_geos(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005382{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005383 struct iwl3945_channel_info *ch;
Zhu Yib481de92007-09-25 17:54:57 -07005384 struct ieee80211_hw_mode *modes;
5385 struct ieee80211_channel *channels;
5386 struct ieee80211_channel *geo_ch;
5387 struct ieee80211_rate *rates;
5388 int i = 0;
5389 enum {
5390 A = 0,
5391 B = 1,
5392 G = 2,
5393 };
5394 int mode_count = 3;
5395
5396 if (priv->modes) {
5397 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5398 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5399 return 0;
5400 }
5401
5402 modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
5403 GFP_KERNEL);
5404 if (!modes)
5405 return -ENOMEM;
5406
5407 channels = kzalloc(sizeof(struct ieee80211_channel) *
5408 priv->channel_count, GFP_KERNEL);
5409 if (!channels) {
5410 kfree(modes);
5411 return -ENOMEM;
5412 }
5413
5414 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
5415 GFP_KERNEL);
5416 if (!rates) {
5417 kfree(modes);
5418 kfree(channels);
5419 return -ENOMEM;
5420 }
5421
5422 /* 0 = 802.11a
5423 * 1 = 802.11b
5424 * 2 = 802.11g
5425 */
5426
5427 /* 5.2GHz channels start after the 2.4GHz channels */
5428 modes[A].mode = MODE_IEEE80211A;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005429 modes[A].channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
Mohamed Abbas14577f22007-11-12 11:37:42 +08005430 modes[A].rates = &rates[4];
Zhu Yib481de92007-09-25 17:54:57 -07005431 modes[A].num_rates = 8; /* just OFDM */
5432 modes[A].num_channels = 0;
5433
5434 modes[B].mode = MODE_IEEE80211B;
5435 modes[B].channels = channels;
Mohamed Abbas14577f22007-11-12 11:37:42 +08005436 modes[B].rates = rates;
Zhu Yib481de92007-09-25 17:54:57 -07005437 modes[B].num_rates = 4; /* just CCK */
5438 modes[B].num_channels = 0;
5439
5440 modes[G].mode = MODE_IEEE80211G;
5441 modes[G].channels = channels;
5442 modes[G].rates = rates;
5443 modes[G].num_rates = 12; /* OFDM & CCK */
5444 modes[G].num_channels = 0;
5445
5446 priv->ieee_channels = channels;
5447 priv->ieee_rates = rates;
5448
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005449 iwl3945_init_hw_rates(priv, rates);
Zhu Yib481de92007-09-25 17:54:57 -07005450
5451 for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
5452 ch = &priv->channel_info[i];
5453
5454 if (!is_channel_valid(ch)) {
5455 IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
5456 "skipping.\n",
5457 ch->channel, is_channel_a_band(ch) ?
5458 "5.2" : "2.4");
5459 continue;
5460 }
5461
5462 if (is_channel_a_band(ch))
5463 geo_ch = &modes[A].channels[modes[A].num_channels++];
5464 else {
5465 geo_ch = &modes[B].channels[modes[B].num_channels++];
5466 modes[G].num_channels++;
5467 }
5468
5469 geo_ch->freq = ieee80211chan2mhz(ch->channel);
5470 geo_ch->chan = ch->channel;
5471 geo_ch->power_level = ch->max_power_avg;
5472 geo_ch->antenna_max = 0xff;
5473
5474 if (is_channel_valid(ch)) {
5475 geo_ch->flag = IEEE80211_CHAN_W_SCAN;
5476 if (ch->flags & EEPROM_CHANNEL_IBSS)
5477 geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
5478
5479 if (ch->flags & EEPROM_CHANNEL_ACTIVE)
5480 geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
5481
5482 if (ch->flags & EEPROM_CHANNEL_RADAR)
5483 geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
5484
5485 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5486 priv->max_channel_txpower_limit =
5487 ch->max_power_avg;
5488 }
5489
5490 geo_ch->val = geo_ch->flag;
5491 }
5492
5493 if ((modes[A].num_channels == 0) && priv->is_abg) {
5494 printk(KERN_INFO DRV_NAME
5495 ": Incorrectly detected BG card as ABG. Please send "
5496 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5497 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5498 priv->is_abg = 0;
5499 }
5500
5501 printk(KERN_INFO DRV_NAME
5502 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5503 modes[G].num_channels, modes[A].num_channels);
5504
5505 /*
5506 * NOTE: We register these in preference of order -- the
5507 * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
5508 * a phymode based on rates or AP capabilities but seems to
5509 * configure it purely on if the channel being configured
5510 * is supported by a mode -- and the first match is taken
5511 */
5512
5513 if (modes[G].num_channels)
5514 ieee80211_register_hwmode(priv->hw, &modes[G]);
5515 if (modes[B].num_channels)
5516 ieee80211_register_hwmode(priv->hw, &modes[B]);
5517 if (modes[A].num_channels)
5518 ieee80211_register_hwmode(priv->hw, &modes[A]);
5519
5520 priv->modes = modes;
5521 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5522
5523 return 0;
5524}
5525
5526/******************************************************************************
5527 *
5528 * uCode download functions
5529 *
5530 ******************************************************************************/
5531
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005532static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005533{
5534 if (priv->ucode_code.v_addr != NULL) {
5535 pci_free_consistent(priv->pci_dev,
5536 priv->ucode_code.len,
5537 priv->ucode_code.v_addr,
5538 priv->ucode_code.p_addr);
5539 priv->ucode_code.v_addr = NULL;
5540 }
5541 if (priv->ucode_data.v_addr != NULL) {
5542 pci_free_consistent(priv->pci_dev,
5543 priv->ucode_data.len,
5544 priv->ucode_data.v_addr,
5545 priv->ucode_data.p_addr);
5546 priv->ucode_data.v_addr = NULL;
5547 }
5548 if (priv->ucode_data_backup.v_addr != NULL) {
5549 pci_free_consistent(priv->pci_dev,
5550 priv->ucode_data_backup.len,
5551 priv->ucode_data_backup.v_addr,
5552 priv->ucode_data_backup.p_addr);
5553 priv->ucode_data_backup.v_addr = NULL;
5554 }
5555 if (priv->ucode_init.v_addr != NULL) {
5556 pci_free_consistent(priv->pci_dev,
5557 priv->ucode_init.len,
5558 priv->ucode_init.v_addr,
5559 priv->ucode_init.p_addr);
5560 priv->ucode_init.v_addr = NULL;
5561 }
5562 if (priv->ucode_init_data.v_addr != NULL) {
5563 pci_free_consistent(priv->pci_dev,
5564 priv->ucode_init_data.len,
5565 priv->ucode_init_data.v_addr,
5566 priv->ucode_init_data.p_addr);
5567 priv->ucode_init_data.v_addr = NULL;
5568 }
5569 if (priv->ucode_boot.v_addr != NULL) {
5570 pci_free_consistent(priv->pci_dev,
5571 priv->ucode_boot.len,
5572 priv->ucode_boot.v_addr,
5573 priv->ucode_boot.p_addr);
5574 priv->ucode_boot.v_addr = NULL;
5575 }
5576}
5577
5578/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005579 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005580 * looking at all data.
5581 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005582static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 * image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005583{
5584 u32 val;
5585 u32 save_len = len;
5586 int rc = 0;
5587 u32 errcnt;
5588
5589 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5590
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005591 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005592 if (rc)
5593 return rc;
5594
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005595 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
Zhu Yib481de92007-09-25 17:54:57 -07005596
5597 errcnt = 0;
5598 for (; len > 0; len -= sizeof(u32), image++) {
5599 /* read data comes through single port, auto-incr addr */
5600 /* NOTE: Use the debugless read so we don't flood kernel log
5601 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005602 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005603 if (val != le32_to_cpu(*image)) {
5604 IWL_ERROR("uCode INST section is invalid at "
5605 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5606 save_len - len, val, le32_to_cpu(*image));
5607 rc = -EIO;
5608 errcnt++;
5609 if (errcnt >= 20)
5610 break;
5611 }
5612 }
5613
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005614 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005615
5616 if (!errcnt)
Ian Schrambc434dd2007-10-25 17:15:29 +08005617 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
Zhu Yib481de92007-09-25 17:54:57 -07005618
5619 return rc;
5620}
5621
5622
5623/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005624 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005625 * using sample data 100 bytes apart. If these sample points are good,
5626 * it's a pretty good bet that everything between them is good, too.
5627 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005628static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005629{
5630 u32 val;
5631 int rc = 0;
5632 u32 errcnt = 0;
5633 u32 i;
5634
5635 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5636
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005637 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005638 if (rc)
5639 return rc;
5640
5641 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5642 /* read data comes through single port, auto-incr addr */
5643 /* NOTE: Use the debugless read so we don't flood kernel log
5644 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005645 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
Zhu Yib481de92007-09-25 17:54:57 -07005646 i + RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005647 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005648 if (val != le32_to_cpu(*image)) {
5649#if 0 /* Enable this if you want to see details */
5650 IWL_ERROR("uCode INST section is invalid at "
5651 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5652 i, val, *image);
5653#endif
5654 rc = -EIO;
5655 errcnt++;
5656 if (errcnt >= 3)
5657 break;
5658 }
5659 }
5660
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005661 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005662
5663 return rc;
5664}
5665
5666
5667/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005668 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
Zhu Yib481de92007-09-25 17:54:57 -07005669 * and verify its contents
5670 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005671static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005672{
5673 __le32 *image;
5674 u32 len;
5675 int rc = 0;
5676
5677 /* Try bootstrap */
5678 image = (__le32 *)priv->ucode_boot.v_addr;
5679 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005680 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005681 if (rc == 0) {
5682 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5683 return 0;
5684 }
5685
5686 /* Try initialize */
5687 image = (__le32 *)priv->ucode_init.v_addr;
5688 len = priv->ucode_init.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005689 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005690 if (rc == 0) {
5691 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5692 return 0;
5693 }
5694
5695 /* Try runtime/protocol */
5696 image = (__le32 *)priv->ucode_code.v_addr;
5697 len = priv->ucode_code.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005698 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005699 if (rc == 0) {
5700 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5701 return 0;
5702 }
5703
5704 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5705
Ben Cahill9fbab512007-11-29 11:09:47 +08005706 /* Since nothing seems to match, show first several data entries in
5707 * instruction SRAM, so maybe visual inspection will give a clue.
5708 * Selection of bootstrap image (vs. other images) is arbitrary. */
Zhu Yib481de92007-09-25 17:54:57 -07005709 image = (__le32 *)priv->ucode_boot.v_addr;
5710 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005711 rc = iwl3945_verify_inst_full(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005712
5713 return rc;
5714}
5715
5716
5717/* check contents of special bootstrap uCode SRAM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005718static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005719{
5720 __le32 *image = priv->ucode_boot.v_addr;
5721 u32 len = priv->ucode_boot.len;
5722 u32 reg;
5723 u32 val;
5724
5725 IWL_DEBUG_INFO("Begin verify bsm\n");
5726
5727 /* verify BSM SRAM contents */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005728 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005729 for (reg = BSM_SRAM_LOWER_BOUND;
5730 reg < BSM_SRAM_LOWER_BOUND + len;
5731 reg += sizeof(u32), image ++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005732 val = iwl3945_read_prph(priv, reg);
Zhu Yib481de92007-09-25 17:54:57 -07005733 if (val != le32_to_cpu(*image)) {
5734 IWL_ERROR("BSM uCode verification failed at "
5735 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5736 BSM_SRAM_LOWER_BOUND,
5737 reg - BSM_SRAM_LOWER_BOUND, len,
5738 val, le32_to_cpu(*image));
5739 return -EIO;
5740 }
5741 }
5742
5743 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5744
5745 return 0;
5746}
5747
5748/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005749 * iwl3945_load_bsm - Load bootstrap instructions
Zhu Yib481de92007-09-25 17:54:57 -07005750 *
5751 * BSM operation:
5752 *
5753 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5754 * in special SRAM that does not power down during RFKILL. When powering back
5755 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5756 * the bootstrap program into the on-board processor, and starts it.
5757 *
5758 * The bootstrap program loads (via DMA) instructions and data for a new
5759 * program from host DRAM locations indicated by the host driver in the
5760 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5761 * automatically.
5762 *
5763 * When initializing the NIC, the host driver points the BSM to the
5764 * "initialize" uCode image. This uCode sets up some internal data, then
5765 * notifies host via "initialize alive" that it is complete.
5766 *
5767 * The host then replaces the BSM_DRAM_* pointer values to point to the
5768 * normal runtime uCode instructions and a backup uCode data cache buffer
5769 * (filled initially with starting data values for the on-board processor),
5770 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5771 * which begins normal operation.
5772 *
5773 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5774 * the backup data cache in DRAM before SRAM is powered down.
5775 *
5776 * When powering back up, the BSM loads the bootstrap program. This reloads
5777 * the runtime uCode instructions and the backup data cache into SRAM,
5778 * and re-launches the runtime uCode from where it left off.
5779 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005780static int iwl3945_load_bsm(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005781{
5782 __le32 *image = priv->ucode_boot.v_addr;
5783 u32 len = priv->ucode_boot.len;
5784 dma_addr_t pinst;
5785 dma_addr_t pdata;
5786 u32 inst_len;
5787 u32 data_len;
5788 int rc;
5789 int i;
5790 u32 done;
5791 u32 reg_offset;
5792
5793 IWL_DEBUG_INFO("Begin load bsm\n");
5794
5795 /* make sure bootstrap program is no larger than BSM's SRAM size */
5796 if (len > IWL_MAX_BSM_SIZE)
5797 return -EINVAL;
5798
5799 /* Tell bootstrap uCode where to find the "Initialize" uCode
Ben Cahill9fbab512007-11-29 11:09:47 +08005800 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005801 * NOTE: iwl3945_initialize_alive_start() will replace these values,
Zhu Yib481de92007-09-25 17:54:57 -07005802 * after the "initialize" uCode has run, to point to
5803 * runtime/protocol instructions and backup data cache. */
5804 pinst = priv->ucode_init.p_addr;
5805 pdata = priv->ucode_init_data.p_addr;
5806 inst_len = priv->ucode_init.len;
5807 data_len = priv->ucode_init_data.len;
5808
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005809 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005810 if (rc)
5811 return rc;
5812
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005813 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5814 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5815 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5816 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
Zhu Yib481de92007-09-25 17:54:57 -07005817
5818 /* Fill BSM memory with bootstrap instructions */
5819 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5820 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5821 reg_offset += sizeof(u32), image++)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005822 _iwl3945_write_prph(priv, reg_offset,
Zhu Yib481de92007-09-25 17:54:57 -07005823 le32_to_cpu(*image));
5824
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005825 rc = iwl3945_verify_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005826 if (rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005827 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005828 return rc;
5829 }
5830
5831 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005832 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5833 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005834 RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005835 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07005836
5837 /* Load bootstrap code into instruction SRAM now,
5838 * to prepare to load "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005839 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005840 BSM_WR_CTRL_REG_BIT_START);
5841
5842 /* Wait for load of bootstrap uCode to finish */
5843 for (i = 0; i < 100; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005844 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005845 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5846 break;
5847 udelay(10);
5848 }
5849 if (i < 100)
5850 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5851 else {
5852 IWL_ERROR("BSM write did not complete!\n");
5853 return -EIO;
5854 }
5855
5856 /* Enable future boot loads whenever power management unit triggers it
5857 * (e.g. when powering back up after power-save shutdown) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005858 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005859 BSM_WR_CTRL_REG_BIT_START_EN);
5860
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005861 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005862
5863 return 0;
5864}
5865
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005866static void iwl3945_nic_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005867{
5868 /* Remove all resets to allow NIC to operate */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005869 iwl3945_write32(priv, CSR_RESET, 0);
Zhu Yib481de92007-09-25 17:54:57 -07005870}
5871
Tomas Winkler90e759d2007-11-29 11:09:41 +08005872static int iwl3945_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
5873{
5874 desc->v_addr = pci_alloc_consistent(pci_dev, desc->len, &desc->p_addr);
5875 return (desc->v_addr != NULL) ? 0 : -ENOMEM;
5876}
5877
Zhu Yib481de92007-09-25 17:54:57 -07005878/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005879 * iwl3945_read_ucode - Read uCode images from disk file.
Zhu Yib481de92007-09-25 17:54:57 -07005880 *
5881 * Copy into buffers for card to fetch via bus-mastering
5882 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005883static int iwl3945_read_ucode(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005884{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005885 struct iwl3945_ucode *ucode;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005886 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07005887 const struct firmware *ucode_raw;
5888 /* firmware file name contains uCode/driver compatibility version */
5889 const char *name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode";
5890 u8 *src;
5891 size_t len;
5892 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5893
5894 /* Ask kernel firmware_class module to get the boot firmware off disk.
5895 * request_firmware() is synchronous, file is in memory on return. */
Tomas Winkler90e759d2007-11-29 11:09:41 +08005896 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5897 if (ret < 0) {
5898 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5899 name, ret);
Zhu Yib481de92007-09-25 17:54:57 -07005900 goto error;
5901 }
5902
5903 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5904 name, ucode_raw->size);
5905
5906 /* Make sure that we got at least our header! */
5907 if (ucode_raw->size < sizeof(*ucode)) {
5908 IWL_ERROR("File size way too small!\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08005909 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005910 goto err_release;
5911 }
5912
5913 /* Data from ucode file: header followed by uCode images */
5914 ucode = (void *)ucode_raw->data;
5915
5916 ver = le32_to_cpu(ucode->ver);
5917 inst_size = le32_to_cpu(ucode->inst_size);
5918 data_size = le32_to_cpu(ucode->data_size);
5919 init_size = le32_to_cpu(ucode->init_size);
5920 init_data_size = le32_to_cpu(ucode->init_data_size);
5921 boot_size = le32_to_cpu(ucode->boot_size);
5922
5923 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
Ian Schrambc434dd2007-10-25 17:15:29 +08005924 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5925 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5926 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5927 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5928 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
Zhu Yib481de92007-09-25 17:54:57 -07005929
5930 /* Verify size of file vs. image size info in file's header */
5931 if (ucode_raw->size < sizeof(*ucode) +
5932 inst_size + data_size + init_size +
5933 init_data_size + boot_size) {
5934
5935 IWL_DEBUG_INFO("uCode file size %d too small\n",
5936 (int)ucode_raw->size);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005937 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005938 goto err_release;
5939 }
5940
5941 /* Verify that uCode images will fit in card's SRAM */
5942 if (inst_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005943 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5944 inst_size);
5945 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005946 goto err_release;
5947 }
5948
5949 if (data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005950 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5951 data_size);
5952 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005953 goto err_release;
5954 }
5955 if (init_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005956 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5957 init_size);
5958 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005959 goto err_release;
5960 }
5961 if (init_data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005962 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5963 init_data_size);
5964 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005965 goto err_release;
5966 }
5967 if (boot_size > IWL_MAX_BSM_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005968 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5969 boot_size);
5970 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005971 goto err_release;
5972 }
5973
5974 /* Allocate ucode buffers for card's bus-master loading ... */
5975
5976 /* Runtime instructions and 2 copies of data:
5977 * 1) unmodified from disk
5978 * 2) backup cache for save/restore during power-downs */
5979 priv->ucode_code.len = inst_size;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005980 iwl3945_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
Zhu Yib481de92007-09-25 17:54:57 -07005981
5982 priv->ucode_data.len = data_size;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005983 iwl3945_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
Zhu Yib481de92007-09-25 17:54:57 -07005984
5985 priv->ucode_data_backup.len = data_size;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005986 iwl3945_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
Zhu Yib481de92007-09-25 17:54:57 -07005987
5988 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
Tomas Winkler90e759d2007-11-29 11:09:41 +08005989 !priv->ucode_data_backup.v_addr)
Zhu Yib481de92007-09-25 17:54:57 -07005990 goto err_pci_alloc;
5991
Tomas Winkler90e759d2007-11-29 11:09:41 +08005992 /* Initialization instructions and data */
5993 if (init_size && init_data_size) {
5994 priv->ucode_init.len = init_size;
5995 iwl3945_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5996
5997 priv->ucode_init_data.len = init_data_size;
5998 iwl3945_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5999
6000 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
6001 goto err_pci_alloc;
6002 }
6003
6004 /* Bootstrap (instructions only, no data) */
6005 if (boot_size) {
6006 priv->ucode_boot.len = boot_size;
6007 iwl3945_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
6008
6009 if (!priv->ucode_boot.v_addr)
6010 goto err_pci_alloc;
6011 }
6012
Zhu Yib481de92007-09-25 17:54:57 -07006013 /* Copy images into buffers for card's bus-master reads ... */
6014
6015 /* Runtime instructions (first block of data in file) */
6016 src = &ucode->data[0];
6017 len = priv->ucode_code.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08006018 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07006019 memcpy(priv->ucode_code.v_addr, src, len);
6020 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
6021 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
6022
6023 /* Runtime data (2nd block)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006024 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
Zhu Yib481de92007-09-25 17:54:57 -07006025 src = &ucode->data[inst_size];
6026 len = priv->ucode_data.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08006027 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07006028 memcpy(priv->ucode_data.v_addr, src, len);
6029 memcpy(priv->ucode_data_backup.v_addr, src, len);
6030
6031 /* Initialization instructions (3rd block) */
6032 if (init_size) {
6033 src = &ucode->data[inst_size + data_size];
6034 len = priv->ucode_init.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08006035 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
6036 len);
Zhu Yib481de92007-09-25 17:54:57 -07006037 memcpy(priv->ucode_init.v_addr, src, len);
6038 }
6039
6040 /* Initialization data (4th block) */
6041 if (init_data_size) {
6042 src = &ucode->data[inst_size + data_size + init_size];
6043 len = priv->ucode_init_data.len;
6044 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
6045 (int)len);
6046 memcpy(priv->ucode_init_data.v_addr, src, len);
6047 }
6048
6049 /* Bootstrap instructions (5th block) */
6050 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
6051 len = priv->ucode_boot.len;
6052 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
6053 (int)len);
6054 memcpy(priv->ucode_boot.v_addr, src, len);
6055
6056 /* We have our copies now, allow OS release its copies */
6057 release_firmware(ucode_raw);
6058 return 0;
6059
6060 err_pci_alloc:
6061 IWL_ERROR("failed to allocate pci memory\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08006062 ret = -ENOMEM;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006063 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006064
6065 err_release:
6066 release_firmware(ucode_raw);
6067
6068 error:
Tomas Winkler90e759d2007-11-29 11:09:41 +08006069 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07006070}
6071
6072
6073/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006074 * iwl3945_set_ucode_ptrs - Set uCode address location
Zhu Yib481de92007-09-25 17:54:57 -07006075 *
6076 * Tell initialization uCode where to find runtime uCode.
6077 *
6078 * BSM registers initially contain pointers to initialization uCode.
6079 * We need to replace them to load runtime uCode inst and data,
6080 * and to save runtime data when powering down.
6081 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006082static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006083{
6084 dma_addr_t pinst;
6085 dma_addr_t pdata;
6086 int rc = 0;
6087 unsigned long flags;
6088
6089 /* bits 31:0 for 3945 */
6090 pinst = priv->ucode_code.p_addr;
6091 pdata = priv->ucode_data_backup.p_addr;
6092
6093 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006094 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006095 if (rc) {
6096 spin_unlock_irqrestore(&priv->lock, flags);
6097 return rc;
6098 }
6099
6100 /* Tell bootstrap uCode where to find image to load */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006101 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6102 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6103 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07006104 priv->ucode_data.len);
6105
6106 /* Inst bytecount must be last to set up, bit 31 signals uCode
6107 * that all new ptr/size info is in place */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006108 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07006109 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
6110
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006111 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006112
6113 spin_unlock_irqrestore(&priv->lock, flags);
6114
6115 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6116
6117 return rc;
6118}
6119
6120/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006121 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07006122 *
6123 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6124 *
Zhu Yib481de92007-09-25 17:54:57 -07006125 * Tell "initialize" uCode to go ahead and load the runtime uCode.
Ben Cahill9fbab512007-11-29 11:09:47 +08006126 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006127static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006128{
6129 /* Check alive response for "valid" sign from uCode */
6130 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6131 /* We had an error bringing up the hardware, so take it
6132 * all the way back down so we can try again */
6133 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6134 goto restart;
6135 }
6136
6137 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6138 * This is a paranoid check, because we would not have gotten the
6139 * "initialize" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006140 if (iwl3945_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006141 /* Runtime instruction load was bad;
6142 * take it all the way back down so we can try again */
6143 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6144 goto restart;
6145 }
6146
6147 /* Send pointers to protocol/runtime uCode image ... init code will
6148 * load and launch runtime uCode, which will send us another "Alive"
6149 * notification. */
6150 IWL_DEBUG_INFO("Initialization Alive received.\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006151 if (iwl3945_set_ucode_ptrs(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006152 /* Runtime instruction load won't happen;
6153 * take it all the way back down so we can try again */
6154 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6155 goto restart;
6156 }
6157 return;
6158
6159 restart:
6160 queue_work(priv->workqueue, &priv->restart);
6161}
6162
6163
6164/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006165 * iwl3945_alive_start - called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07006166 * from protocol/runtime uCode (initialization uCode's
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006167 * Alive gets handled by iwl3945_init_alive_start()).
Zhu Yib481de92007-09-25 17:54:57 -07006168 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006169static void iwl3945_alive_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006170{
6171 int rc = 0;
6172 int thermal_spin = 0;
6173 u32 rfkill;
6174
6175 IWL_DEBUG_INFO("Runtime Alive received.\n");
6176
6177 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6178 /* We had an error bringing up the hardware, so take it
6179 * all the way back down so we can try again */
6180 IWL_DEBUG_INFO("Alive failed.\n");
6181 goto restart;
6182 }
6183
6184 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6185 * This is a paranoid check, because we would not have gotten the
6186 * "runtime" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006187 if (iwl3945_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006188 /* Runtime instruction load was bad;
6189 * take it all the way back down so we can try again */
6190 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6191 goto restart;
6192 }
6193
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006194 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006195
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006196 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006197 if (rc) {
6198 IWL_WARNING("Can not read rfkill status from adapter\n");
6199 return;
6200 }
6201
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006202 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07006203 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006204 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006205
6206 if (rfkill & 0x1) {
6207 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6208 /* if rfkill is not on, then wait for thermal
6209 * sensor in adapter to kick in */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006210 while (iwl3945_hw_get_temperature(priv) == 0) {
Zhu Yib481de92007-09-25 17:54:57 -07006211 thermal_spin++;
6212 udelay(10);
6213 }
6214
6215 if (thermal_spin)
6216 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
6217 thermal_spin * 10);
6218 } else
6219 set_bit(STATUS_RF_KILL_HW, &priv->status);
6220
Ben Cahill9fbab512007-11-29 11:09:47 +08006221 /* After the ALIVE response, we can send commands to 3945 uCode */
Zhu Yib481de92007-09-25 17:54:57 -07006222 set_bit(STATUS_ALIVE, &priv->status);
6223
6224 /* Clear out the uCode error bit if it is set */
6225 clear_bit(STATUS_FW_ERROR, &priv->status);
6226
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006227 rc = iwl3945_init_channel_map(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006228 if (rc) {
6229 IWL_ERROR("initializing regulatory failed: %d\n", rc);
6230 return;
6231 }
6232
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006233 iwl3945_init_geos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006234
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006235 if (iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -07006236 return;
6237
6238 if (!priv->mac80211_registered) {
6239 /* Unlock so any user space entry points can call back into
6240 * the driver without a deadlock... */
6241 mutex_unlock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006242 iwl3945_rate_control_register(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07006243 rc = ieee80211_register_hw(priv->hw);
6244 priv->hw->conf.beacon_int = 100;
6245 mutex_lock(&priv->mutex);
6246
6247 if (rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006248 iwl3945_rate_control_unregister(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07006249 IWL_ERROR("Failed to register network "
6250 "device (error %d)\n", rc);
6251 return;
6252 }
6253
6254 priv->mac80211_registered = 1;
6255
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006256 iwl3945_reset_channel_flag(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006257 } else
6258 ieee80211_start_queues(priv->hw);
6259
6260 priv->active_rate = priv->rates_mask;
6261 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6262
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006263 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
Zhu Yib481de92007-09-25 17:54:57 -07006264
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006265 if (iwl3945_is_associated(priv)) {
6266 struct iwl3945_rxon_cmd *active_rxon =
6267 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07006268
6269 memcpy(&priv->staging_rxon, &priv->active_rxon,
6270 sizeof(priv->staging_rxon));
6271 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6272 } else {
6273 /* Initialize our rx_config data */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006274 iwl3945_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006275 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6276 }
6277
Ben Cahill9fbab512007-11-29 11:09:47 +08006278 /* Configure Bluetooth device coexistence support */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006279 iwl3945_send_bt_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006280
6281 /* Configure the adapter for unassociated operation */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006282 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006283
6284 /* At this point, the NIC is initialized and operational */
6285 priv->notif_missed_beacons = 0;
6286 set_bit(STATUS_READY, &priv->status);
6287
6288 iwl3945_reg_txpower_periodic(priv);
6289
6290 IWL_DEBUG_INFO("ALIVE processing complete.\n");
6291
6292 if (priv->error_recovering)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006293 iwl3945_error_recovery(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006294
6295 return;
6296
6297 restart:
6298 queue_work(priv->workqueue, &priv->restart);
6299}
6300
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006301static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
Zhu Yib481de92007-09-25 17:54:57 -07006302
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006303static void __iwl3945_down(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006304{
6305 unsigned long flags;
6306 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6307 struct ieee80211_conf *conf = NULL;
6308
6309 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6310
6311 conf = ieee80211_get_hw_conf(priv->hw);
6312
6313 if (!exit_pending)
6314 set_bit(STATUS_EXIT_PENDING, &priv->status);
6315
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006316 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006317
6318 /* Unblock any waiting calls */
6319 wake_up_interruptible_all(&priv->wait_command_queue);
6320
Zhu Yib481de92007-09-25 17:54:57 -07006321 /* Wipe out the EXIT_PENDING status bit if we are not actually
6322 * exiting the module */
6323 if (!exit_pending)
6324 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6325
6326 /* stop and reset the on-board processor */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006327 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
Zhu Yib481de92007-09-25 17:54:57 -07006328
6329 /* tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006330 iwl3945_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006331
6332 if (priv->mac80211_registered)
6333 ieee80211_stop_queues(priv->hw);
6334
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006335 /* If we have not previously called iwl3945_init() then
Zhu Yib481de92007-09-25 17:54:57 -07006336 * clear all bits but the RF Kill and SUSPEND bits and return */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006337 if (!iwl3945_is_init(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006338 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6339 STATUS_RF_KILL_HW |
6340 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6341 STATUS_RF_KILL_SW |
6342 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6343 STATUS_IN_SUSPEND;
6344 goto exit;
6345 }
6346
6347 /* ...otherwise clear out all the status bits but the RF Kill and
6348 * SUSPEND bits and continue taking the NIC down. */
6349 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6350 STATUS_RF_KILL_HW |
6351 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6352 STATUS_RF_KILL_SW |
6353 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6354 STATUS_IN_SUSPEND |
6355 test_bit(STATUS_FW_ERROR, &priv->status) <<
6356 STATUS_FW_ERROR;
6357
6358 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006359 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
Zhu Yib481de92007-09-25 17:54:57 -07006360 spin_unlock_irqrestore(&priv->lock, flags);
6361
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006362 iwl3945_hw_txq_ctx_stop(priv);
6363 iwl3945_hw_rxq_stop(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006364
6365 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006366 if (!iwl3945_grab_nic_access(priv)) {
6367 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
Zhu Yib481de92007-09-25 17:54:57 -07006368 APMG_CLK_VAL_DMA_CLK_RQT);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006369 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006370 }
6371 spin_unlock_irqrestore(&priv->lock, flags);
6372
6373 udelay(5);
6374
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006375 iwl3945_hw_nic_stop_master(priv);
6376 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6377 iwl3945_hw_nic_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006378
6379 exit:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006380 memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07006381
6382 if (priv->ibss_beacon)
6383 dev_kfree_skb(priv->ibss_beacon);
6384 priv->ibss_beacon = NULL;
6385
6386 /* clear out any free frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006387 iwl3945_clear_free_frames(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006388}
6389
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006390static void iwl3945_down(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006391{
6392 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006393 __iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006394 mutex_unlock(&priv->mutex);
Zhu Yib24d22b2007-12-19 13:59:52 +08006395
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006396 iwl3945_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006397}
6398
6399#define MAX_HW_RESTARTS 5
6400
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006401static int __iwl3945_up(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006402{
Joe Perches0795af52007-10-03 17:59:30 -07006403 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006404 int rc, i;
6405
6406 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6407 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6408 return -EIO;
6409 }
6410
6411 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6412 IWL_WARNING("Radio disabled by SW RF kill (module "
6413 "parameter)\n");
6414 return 0;
6415 }
6416
Reinette Chatrea781cf92008-01-21 10:08:31 -08006417 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6418 IWL_ERROR("ucode not available for device bringup\n");
6419 return -EIO;
6420 }
6421
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006422 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
Zhu Yib481de92007-09-25 17:54:57 -07006423
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006424 rc = iwl3945_hw_nic_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006425 if (rc) {
6426 IWL_ERROR("Unable to int nic\n");
6427 return rc;
6428 }
6429
6430 /* make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006431 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6432 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
Zhu Yib481de92007-09-25 17:54:57 -07006433 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6434
6435 /* clear (again), then enable host interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006436 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6437 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006438
6439 /* really make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006440 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6441 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07006442
6443 /* Copy original ucode data image from disk into backup cache.
6444 * This will be used to initialize the on-board processor's
6445 * data SRAM for a clean start when the runtime program first loads. */
6446 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
6447 priv->ucode_data.len);
6448
6449 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6450
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006451 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006452
6453 /* load bootstrap state machine,
6454 * load bootstrap program into processor's memory,
6455 * prepare to load the "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006456 rc = iwl3945_load_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006457
6458 if (rc) {
6459 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6460 continue;
6461 }
6462
6463 /* start card; "initialize" will load runtime ucode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006464 iwl3945_nic_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006465
Ben Cahill9fbab512007-11-29 11:09:47 +08006466 /* MAC Address location in EEPROM is same for 3945/4965 */
Zhu Yib481de92007-09-25 17:54:57 -07006467 get_eeprom_mac(priv, priv->mac_addr);
Joe Perches0795af52007-10-03 17:59:30 -07006468 IWL_DEBUG_INFO("MAC address: %s\n",
6469 print_mac(mac, priv->mac_addr));
Zhu Yib481de92007-09-25 17:54:57 -07006470
6471 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
6472
6473 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6474
6475 return 0;
6476 }
6477
6478 set_bit(STATUS_EXIT_PENDING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006479 __iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006480
6481 /* tried to restart and config the device for as long as our
6482 * patience could withstand */
6483 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6484 return -EIO;
6485}
6486
6487
6488/*****************************************************************************
6489 *
6490 * Workqueue callbacks
6491 *
6492 *****************************************************************************/
6493
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006494static void iwl3945_bg_init_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006495{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006496 struct iwl3945_priv *priv =
6497 container_of(data, struct iwl3945_priv, init_alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006498
6499 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6500 return;
6501
6502 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006503 iwl3945_init_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006504 mutex_unlock(&priv->mutex);
6505}
6506
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006507static void iwl3945_bg_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006508{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006509 struct iwl3945_priv *priv =
6510 container_of(data, struct iwl3945_priv, alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006511
6512 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6513 return;
6514
6515 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006516 iwl3945_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006517 mutex_unlock(&priv->mutex);
6518}
6519
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006520static void iwl3945_bg_rf_kill(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006521{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006522 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
Zhu Yib481de92007-09-25 17:54:57 -07006523
6524 wake_up_interruptible(&priv->wait_command_queue);
6525
6526 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6527 return;
6528
6529 mutex_lock(&priv->mutex);
6530
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006531 if (!iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006532 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6533 "HW and/or SW RF Kill no longer active, restarting "
6534 "device\n");
6535 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6536 queue_work(priv->workqueue, &priv->restart);
6537 } else {
6538
6539 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6540 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6541 "disabled by SW switch\n");
6542 else
6543 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6544 "Kill switch must be turned off for "
6545 "wireless networking to work.\n");
6546 }
6547 mutex_unlock(&priv->mutex);
6548}
6549
6550#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6551
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006552static void iwl3945_bg_scan_check(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006553{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006554 struct iwl3945_priv *priv =
6555 container_of(data, struct iwl3945_priv, scan_check.work);
Zhu Yib481de92007-09-25 17:54:57 -07006556
6557 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6558 return;
6559
6560 mutex_lock(&priv->mutex);
6561 if (test_bit(STATUS_SCANNING, &priv->status) ||
6562 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6563 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6564 "Scan completion watchdog resetting adapter (%dms)\n",
6565 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006566
Zhu Yib481de92007-09-25 17:54:57 -07006567 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006568 iwl3945_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006569 }
6570 mutex_unlock(&priv->mutex);
6571}
6572
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006573static void iwl3945_bg_request_scan(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006574{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006575 struct iwl3945_priv *priv =
6576 container_of(data, struct iwl3945_priv, request_scan);
6577 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07006578 .id = REPLY_SCAN_CMD,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006579 .len = sizeof(struct iwl3945_scan_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07006580 .meta.flags = CMD_SIZE_HUGE,
6581 };
6582 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006583 struct iwl3945_scan_cmd *scan;
Zhu Yib481de92007-09-25 17:54:57 -07006584 struct ieee80211_conf *conf = NULL;
6585 u8 direct_mask;
6586 int phymode;
6587
6588 conf = ieee80211_get_hw_conf(priv->hw);
6589
6590 mutex_lock(&priv->mutex);
6591
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006592 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006593 IWL_WARNING("request scan called when driver not ready.\n");
6594 goto done;
6595 }
6596
6597 /* Make sure the scan wasn't cancelled before this queued work
6598 * was given the chance to run... */
6599 if (!test_bit(STATUS_SCANNING, &priv->status))
6600 goto done;
6601
6602 /* This should never be called or scheduled if there is currently
6603 * a scan active in the hardware. */
6604 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6605 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6606 "Ignoring second request.\n");
6607 rc = -EIO;
6608 goto done;
6609 }
6610
6611 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6612 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6613 goto done;
6614 }
6615
6616 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6617 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6618 goto done;
6619 }
6620
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006621 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006622 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6623 goto done;
6624 }
6625
6626 if (!test_bit(STATUS_READY, &priv->status)) {
6627 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6628 goto done;
6629 }
6630
6631 if (!priv->scan_bands) {
6632 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6633 goto done;
6634 }
6635
6636 if (!priv->scan) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006637 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
Zhu Yib481de92007-09-25 17:54:57 -07006638 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6639 if (!priv->scan) {
6640 rc = -ENOMEM;
6641 goto done;
6642 }
6643 }
6644 scan = priv->scan;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006645 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
Zhu Yib481de92007-09-25 17:54:57 -07006646
6647 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6648 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6649
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006650 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006651 u16 interval = 0;
6652 u32 extra;
6653 u32 suspend_time = 100;
6654 u32 scan_suspend_time = 100;
6655 unsigned long flags;
6656
6657 IWL_DEBUG_INFO("Scanning while associated...\n");
6658
6659 spin_lock_irqsave(&priv->lock, flags);
6660 interval = priv->beacon_int;
6661 spin_unlock_irqrestore(&priv->lock, flags);
6662
6663 scan->suspend_time = 0;
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006664 scan->max_out_time = cpu_to_le32(200 * 1024);
Zhu Yib481de92007-09-25 17:54:57 -07006665 if (!interval)
6666 interval = suspend_time;
6667 /*
6668 * suspend time format:
6669 * 0-19: beacon interval in usec (time before exec.)
6670 * 20-23: 0
6671 * 24-31: number of beacons (suspend between channels)
6672 */
6673
6674 extra = (suspend_time / interval) << 24;
6675 scan_suspend_time = 0xFF0FFFFF &
6676 (extra | ((suspend_time % interval) * 1024));
6677
6678 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6679 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6680 scan_suspend_time, interval);
6681 }
6682
6683 /* We should add the ability for user to lock to PASSIVE ONLY */
6684 if (priv->one_direct_scan) {
6685 IWL_DEBUG_SCAN
6686 ("Kicking off one direct scan for '%s'\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006687 iwl3945_escape_essid(priv->direct_ssid,
Zhu Yib481de92007-09-25 17:54:57 -07006688 priv->direct_ssid_len));
6689 scan->direct_scan[0].id = WLAN_EID_SSID;
6690 scan->direct_scan[0].len = priv->direct_ssid_len;
6691 memcpy(scan->direct_scan[0].ssid,
6692 priv->direct_ssid, priv->direct_ssid_len);
6693 direct_mask = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006694 } else if (!iwl3945_is_associated(priv) && priv->essid_len) {
Zhu Yib481de92007-09-25 17:54:57 -07006695 scan->direct_scan[0].id = WLAN_EID_SSID;
6696 scan->direct_scan[0].len = priv->essid_len;
6697 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6698 direct_mask = 1;
6699 } else
6700 direct_mask = 0;
6701
6702 /* We don't build a direct scan probe request; the uCode will do
6703 * that based on the direct_mask added to each channel entry */
6704 scan->tx_cmd.len = cpu_to_le16(
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006705 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
Zhu Yib481de92007-09-25 17:54:57 -07006706 IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
6707 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6708 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6709 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6710
6711 /* flags + rate selection */
6712
6713 switch (priv->scan_bands) {
6714 case 2:
6715 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6716 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6717 scan->good_CRC_th = 0;
6718 phymode = MODE_IEEE80211G;
6719 break;
6720
6721 case 1:
6722 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6723 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6724 phymode = MODE_IEEE80211A;
6725 break;
6726
6727 default:
6728 IWL_WARNING("Invalid scan band count\n");
6729 goto done;
6730 }
6731
6732 /* select Rx antennas */
6733 scan->flags |= iwl3945_get_antenna_flags(priv);
6734
6735 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6736 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6737
6738 if (direct_mask)
6739 IWL_DEBUG_SCAN
6740 ("Initiating direct scan for %s.\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006741 iwl3945_escape_essid(priv->essid, priv->essid_len));
Zhu Yib481de92007-09-25 17:54:57 -07006742 else
6743 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
6744
6745 scan->channel_count =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006746 iwl3945_get_channels_for_scan(
Zhu Yib481de92007-09-25 17:54:57 -07006747 priv, phymode, 1, /* active */
6748 direct_mask,
6749 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6750
6751 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006752 scan->channel_count * sizeof(struct iwl3945_scan_channel);
Zhu Yib481de92007-09-25 17:54:57 -07006753 cmd.data = scan;
6754 scan->len = cpu_to_le16(cmd.len);
6755
6756 set_bit(STATUS_SCAN_HW, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006757 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07006758 if (rc)
6759 goto done;
6760
6761 queue_delayed_work(priv->workqueue, &priv->scan_check,
6762 IWL_SCAN_CHECK_WATCHDOG);
6763
6764 mutex_unlock(&priv->mutex);
6765 return;
6766
6767 done:
Ian Schram01ebd062007-10-25 17:15:22 +08006768 /* inform mac80211 scan aborted */
Zhu Yib481de92007-09-25 17:54:57 -07006769 queue_work(priv->workqueue, &priv->scan_completed);
6770 mutex_unlock(&priv->mutex);
6771}
6772
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006773static void iwl3945_bg_up(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006774{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006775 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
Zhu Yib481de92007-09-25 17:54:57 -07006776
6777 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6778 return;
6779
6780 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006781 __iwl3945_up(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006782 mutex_unlock(&priv->mutex);
6783}
6784
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006785static void iwl3945_bg_restart(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006786{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006787 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
Zhu Yib481de92007-09-25 17:54:57 -07006788
6789 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6790 return;
6791
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006792 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006793 queue_work(priv->workqueue, &priv->up);
6794}
6795
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006796static void iwl3945_bg_rx_replenish(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006797{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006798 struct iwl3945_priv *priv =
6799 container_of(data, struct iwl3945_priv, rx_replenish);
Zhu Yib481de92007-09-25 17:54:57 -07006800
6801 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6802 return;
6803
6804 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006805 iwl3945_rx_replenish(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006806 mutex_unlock(&priv->mutex);
6807}
6808
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006809static void iwl3945_bg_post_associate(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006810{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006811 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv,
Zhu Yib481de92007-09-25 17:54:57 -07006812 post_associate.work);
6813
6814 int rc = 0;
6815 struct ieee80211_conf *conf = NULL;
Joe Perches0795af52007-10-03 17:59:30 -07006816 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006817
6818 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6819 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6820 return;
6821 }
6822
6823
Joe Perches0795af52007-10-03 17:59:30 -07006824 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6825 priv->assoc_id,
6826 print_mac(mac, priv->active_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07006827
6828 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6829 return;
6830
6831 mutex_lock(&priv->mutex);
6832
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006833 if (!priv->interface_id || !priv->is_open) {
6834 mutex_unlock(&priv->mutex);
6835 return;
6836 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006837 iwl3945_scan_cancel_timeout(priv, 200);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006838
Zhu Yib481de92007-09-25 17:54:57 -07006839 conf = ieee80211_get_hw_conf(priv->hw);
6840
6841 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006842 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006843
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006844 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6845 iwl3945_setup_rxon_timing(priv);
6846 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07006847 sizeof(priv->rxon_timing), &priv->rxon_timing);
6848 if (rc)
6849 IWL_WARNING("REPLY_RXON_TIMING failed - "
6850 "Attempting to continue.\n");
6851
6852 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6853
6854 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6855
6856 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6857 priv->assoc_id, priv->beacon_int);
6858
6859 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6860 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6861 else
6862 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6863
6864 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6865 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6866 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6867 else
6868 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6869
6870 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6871 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6872
6873 }
6874
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006875 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006876
6877 switch (priv->iw_mode) {
6878 case IEEE80211_IF_TYPE_STA:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006879 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07006880 break;
6881
6882 case IEEE80211_IF_TYPE_IBSS:
6883
6884 /* clear out the station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006885 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006886
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006887 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6888 iwl3945_add_station(priv, priv->bssid, 0, 0);
Zhu Yib481de92007-09-25 17:54:57 -07006889 iwl3945_sync_sta(priv, IWL_STA_ID,
6890 (priv->phymode == MODE_IEEE80211A)?
6891 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6892 CMD_ASYNC);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006893 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6894 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006895
6896 break;
6897
6898 default:
6899 IWL_ERROR("%s Should not be called in %d mode\n",
Ian Schrambc434dd2007-10-25 17:15:29 +08006900 __FUNCTION__, priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07006901 break;
6902 }
6903
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006904 iwl3945_sequence_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006905
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08006906#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006907 iwl3945_activate_qos(priv, 0);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08006908#endif /* CONFIG_IWL3945_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07006909 mutex_unlock(&priv->mutex);
6910}
6911
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006912static void iwl3945_bg_abort_scan(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006913{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006914 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
Zhu Yib481de92007-09-25 17:54:57 -07006915
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006916 if (!iwl3945_is_ready(priv))
Zhu Yib481de92007-09-25 17:54:57 -07006917 return;
6918
6919 mutex_lock(&priv->mutex);
6920
6921 set_bit(STATUS_SCAN_ABORTING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006922 iwl3945_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006923
6924 mutex_unlock(&priv->mutex);
6925}
6926
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006927static void iwl3945_bg_scan_completed(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006928{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006929 struct iwl3945_priv *priv =
6930 container_of(work, struct iwl3945_priv, scan_completed);
Zhu Yib481de92007-09-25 17:54:57 -07006931
6932 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6933
6934 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6935 return;
6936
6937 ieee80211_scan_completed(priv->hw);
6938
6939 /* Since setting the TXPOWER may have been deferred while
6940 * performing the scan, fire one off */
6941 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006942 iwl3945_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006943 mutex_unlock(&priv->mutex);
6944}
6945
6946/*****************************************************************************
6947 *
6948 * mac80211 entry point functions
6949 *
6950 *****************************************************************************/
6951
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006952static int iwl3945_mac_start(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07006953{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006954 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006955
6956 IWL_DEBUG_MAC80211("enter\n");
6957
6958 /* we should be verifying the device is ready to be opened */
6959 mutex_lock(&priv->mutex);
6960
6961 priv->is_open = 1;
6962
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006963 if (!iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -07006964 ieee80211_start_queues(priv->hw);
6965
6966 mutex_unlock(&priv->mutex);
6967 IWL_DEBUG_MAC80211("leave\n");
6968 return 0;
6969}
6970
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006971static void iwl3945_mac_stop(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07006972{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006973 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006974
6975 IWL_DEBUG_MAC80211("enter\n");
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006976
6977
6978 mutex_lock(&priv->mutex);
6979 /* stop mac, cancel any scan request and clear
6980 * RXON_FILTER_ASSOC_MSK BIT
6981 */
Zhu Yib481de92007-09-25 17:54:57 -07006982 priv->is_open = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006983 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006984 cancel_delayed_work(&priv->post_associate);
6985 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006986 iwl3945_commit_rxon(priv);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006987 mutex_unlock(&priv->mutex);
6988
Zhu Yib481de92007-09-25 17:54:57 -07006989 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07006990}
6991
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006992static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07006993 struct ieee80211_tx_control *ctl)
6994{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006995 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006996
6997 IWL_DEBUG_MAC80211("enter\n");
6998
6999 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
7000 IWL_DEBUG_MAC80211("leave - monitor\n");
7001 return -1;
7002 }
7003
7004 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
7005 ctl->tx_rate);
7006
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007007 if (iwl3945_tx_skb(priv, skb, ctl))
Zhu Yib481de92007-09-25 17:54:57 -07007008 dev_kfree_skb_any(skb);
7009
7010 IWL_DEBUG_MAC80211("leave\n");
7011 return 0;
7012}
7013
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007014static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007015 struct ieee80211_if_init_conf *conf)
7016{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007017 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007018 unsigned long flags;
Joe Perches0795af52007-10-03 17:59:30 -07007019 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07007020
7021 IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07007022
7023 if (priv->interface_id) {
7024 IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
Tomas Winkler864792e2007-11-27 21:00:52 +02007025 return -EOPNOTSUPP;
Zhu Yib481de92007-09-25 17:54:57 -07007026 }
7027
7028 spin_lock_irqsave(&priv->lock, flags);
7029 priv->interface_id = conf->if_id;
7030
7031 spin_unlock_irqrestore(&priv->lock, flags);
7032
7033 mutex_lock(&priv->mutex);
Tomas Winkler864792e2007-11-27 21:00:52 +02007034
7035 if (conf->mac_addr) {
7036 IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
7037 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
7038 }
7039
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007040 iwl3945_set_mode(priv, conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07007041
7042 IWL_DEBUG_MAC80211("leave\n");
7043 mutex_unlock(&priv->mutex);
7044
7045 return 0;
7046}
7047
7048/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007049 * iwl3945_mac_config - mac80211 config callback
Zhu Yib481de92007-09-25 17:54:57 -07007050 *
7051 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
7052 * be set inappropriately and the driver currently sets the hardware up to
7053 * use it whenever needed.
7054 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007055static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
Zhu Yib481de92007-09-25 17:54:57 -07007056{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007057 struct iwl3945_priv *priv = hw->priv;
7058 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07007059 unsigned long flags;
7060
7061 mutex_lock(&priv->mutex);
7062 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
7063
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007064 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007065 IWL_DEBUG_MAC80211("leave - not ready\n");
7066 mutex_unlock(&priv->mutex);
7067 return -EIO;
7068 }
7069
7070 /* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
Ian Schram01ebd062007-10-25 17:15:22 +08007071 * what is exposed through include/ declarations */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007072 if (unlikely(!iwl3945_param_disable_hw_scan &&
Zhu Yib481de92007-09-25 17:54:57 -07007073 test_bit(STATUS_SCANNING, &priv->status))) {
7074 IWL_DEBUG_MAC80211("leave - scanning\n");
7075 mutex_unlock(&priv->mutex);
7076 return 0;
7077 }
7078
7079 spin_lock_irqsave(&priv->lock, flags);
7080
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007081 ch_info = iwl3945_get_channel_info(priv, conf->phymode, conf->channel);
Zhu Yib481de92007-09-25 17:54:57 -07007082 if (!is_channel_valid(ch_info)) {
7083 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
7084 conf->channel, conf->phymode);
7085 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7086 spin_unlock_irqrestore(&priv->lock, flags);
7087 mutex_unlock(&priv->mutex);
7088 return -EINVAL;
7089 }
7090
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007091 iwl3945_set_rxon_channel(priv, conf->phymode, conf->channel);
Zhu Yib481de92007-09-25 17:54:57 -07007092
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007093 iwl3945_set_flags_for_phymode(priv, conf->phymode);
Zhu Yib481de92007-09-25 17:54:57 -07007094
7095 /* The list of supported rates and rate mask can be different
7096 * for each phymode; since the phymode may have changed, reset
7097 * the rate mask to what mac80211 lists */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007098 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007099
7100 spin_unlock_irqrestore(&priv->lock, flags);
7101
7102#ifdef IEEE80211_CONF_CHANNEL_SWITCH
7103 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007104 iwl3945_hw_channel_switch(priv, conf->channel);
Zhu Yib481de92007-09-25 17:54:57 -07007105 mutex_unlock(&priv->mutex);
7106 return 0;
7107 }
7108#endif
7109
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007110 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
Zhu Yib481de92007-09-25 17:54:57 -07007111
7112 if (!conf->radio_enabled) {
7113 IWL_DEBUG_MAC80211("leave - radio disabled\n");
7114 mutex_unlock(&priv->mutex);
7115 return 0;
7116 }
7117
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007118 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007119 IWL_DEBUG_MAC80211("leave - RF kill\n");
7120 mutex_unlock(&priv->mutex);
7121 return -EIO;
7122 }
7123
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007124 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007125
7126 if (memcmp(&priv->active_rxon,
7127 &priv->staging_rxon, sizeof(priv->staging_rxon)))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007128 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007129 else
7130 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7131
7132 IWL_DEBUG_MAC80211("leave\n");
7133
7134 mutex_unlock(&priv->mutex);
7135
7136 return 0;
7137}
7138
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007139static void iwl3945_config_ap(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07007140{
7141 int rc = 0;
7142
7143 if (priv->status & STATUS_EXIT_PENDING)
7144 return;
7145
7146 /* The following should be done only at AP bring up */
7147 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7148
7149 /* RXON - unassoc (to set timing command) */
7150 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007151 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007152
7153 /* RXON Timing */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007154 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
7155 iwl3945_setup_rxon_timing(priv);
7156 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07007157 sizeof(priv->rxon_timing), &priv->rxon_timing);
7158 if (rc)
7159 IWL_WARNING("REPLY_RXON_TIMING failed - "
7160 "Attempting to continue.\n");
7161
7162 /* FIXME: what should be the assoc_id for AP? */
7163 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7164 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7165 priv->staging_rxon.flags |=
7166 RXON_FLG_SHORT_PREAMBLE_MSK;
7167 else
7168 priv->staging_rxon.flags &=
7169 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7170
7171 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7172 if (priv->assoc_capability &
7173 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7174 priv->staging_rxon.flags |=
7175 RXON_FLG_SHORT_SLOT_MSK;
7176 else
7177 priv->staging_rxon.flags &=
7178 ~RXON_FLG_SHORT_SLOT_MSK;
7179
7180 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7181 priv->staging_rxon.flags &=
7182 ~RXON_FLG_SHORT_SLOT_MSK;
7183 }
7184 /* restore RXON assoc */
7185 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007186 iwl3945_commit_rxon(priv);
7187 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
Zhu Yi556f8db2007-09-27 11:27:33 +08007188 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007189 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007190
7191 /* FIXME - we need to add code here to detect a totally new
7192 * configuration, reset the AP, unassoc, rxon timing, assoc,
7193 * clear sta table, add BCAST sta... */
7194}
7195
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007196static int iwl3945_mac_config_interface(struct ieee80211_hw *hw, int if_id,
Zhu Yib481de92007-09-25 17:54:57 -07007197 struct ieee80211_if_conf *conf)
7198{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007199 struct iwl3945_priv *priv = hw->priv;
Joe Perches0795af52007-10-03 17:59:30 -07007200 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07007201 unsigned long flags;
7202 int rc;
7203
7204 if (conf == NULL)
7205 return -EIO;
7206
Johannes Berg4150c572007-09-17 01:29:23 -04007207 /* XXX: this MUST use conf->mac_addr */
7208
Zhu Yib481de92007-09-25 17:54:57 -07007209 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7210 (!conf->beacon || !conf->ssid_len)) {
7211 IWL_DEBUG_MAC80211
7212 ("Leaving in AP mode because HostAPD is not ready.\n");
7213 return 0;
7214 }
7215
7216 mutex_lock(&priv->mutex);
7217
7218 IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
7219 if (conf->bssid)
Joe Perches0795af52007-10-03 17:59:30 -07007220 IWL_DEBUG_MAC80211("bssid: %s\n",
7221 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07007222
Johannes Berg4150c572007-09-17 01:29:23 -04007223/*
7224 * very dubious code was here; the probe filtering flag is never set:
7225 *
Zhu Yib481de92007-09-25 17:54:57 -07007226 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7227 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
Johannes Berg4150c572007-09-17 01:29:23 -04007228 */
7229 if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
Zhu Yib481de92007-09-25 17:54:57 -07007230 IWL_DEBUG_MAC80211("leave - scanning\n");
7231 mutex_unlock(&priv->mutex);
7232 return 0;
7233 }
7234
7235 if (priv->interface_id != if_id) {
7236 IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
7237 mutex_unlock(&priv->mutex);
7238 return 0;
7239 }
7240
7241 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7242 if (!conf->bssid) {
7243 conf->bssid = priv->mac_addr;
7244 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
Joe Perches0795af52007-10-03 17:59:30 -07007245 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7246 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07007247 }
7248 if (priv->ibss_beacon)
7249 dev_kfree_skb(priv->ibss_beacon);
7250
7251 priv->ibss_beacon = conf->beacon;
7252 }
7253
7254 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7255 !is_multicast_ether_addr(conf->bssid)) {
7256 /* If there is currently a HW scan going on in the background
7257 * then we need to cancel it else the RXON below will fail. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007258 if (iwl3945_scan_cancel_timeout(priv, 100)) {
Zhu Yib481de92007-09-25 17:54:57 -07007259 IWL_WARNING("Aborted scan still in progress "
7260 "after 100ms\n");
7261 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7262 mutex_unlock(&priv->mutex);
7263 return -EAGAIN;
7264 }
7265 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7266
7267 /* TODO: Audit driver for usage of these members and see
7268 * if mac80211 deprecates them (priv->bssid looks like it
7269 * shouldn't be there, but I haven't scanned the IBSS code
7270 * to verify) - jpk */
7271 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7272
7273 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007274 iwl3945_config_ap(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007275 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007276 rc = iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007277 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007278 iwl3945_add_station(priv,
Zhu Yi556f8db2007-09-27 11:27:33 +08007279 priv->active_rxon.bssid_addr, 1, 0);
Zhu Yib481de92007-09-25 17:54:57 -07007280 }
7281
7282 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007283 iwl3945_scan_cancel_timeout(priv, 100);
Zhu Yib481de92007-09-25 17:54:57 -07007284 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007285 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007286 }
7287
7288 spin_lock_irqsave(&priv->lock, flags);
7289 if (!conf->ssid_len)
7290 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7291 else
7292 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7293
7294 priv->essid_len = conf->ssid_len;
7295 spin_unlock_irqrestore(&priv->lock, flags);
7296
7297 IWL_DEBUG_MAC80211("leave\n");
7298 mutex_unlock(&priv->mutex);
7299
7300 return 0;
7301}
7302
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007303static void iwl3945_configure_filter(struct ieee80211_hw *hw,
Johannes Berg4150c572007-09-17 01:29:23 -04007304 unsigned int changed_flags,
7305 unsigned int *total_flags,
7306 int mc_count, struct dev_addr_list *mc_list)
7307{
7308 /*
7309 * XXX: dummy
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007310 * see also iwl3945_connection_init_rx_config
Johannes Berg4150c572007-09-17 01:29:23 -04007311 */
7312 *total_flags = 0;
7313}
7314
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007315static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007316 struct ieee80211_if_init_conf *conf)
7317{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007318 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007319
7320 IWL_DEBUG_MAC80211("enter\n");
7321
7322 mutex_lock(&priv->mutex);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007323
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007324 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007325 cancel_delayed_work(&priv->post_associate);
7326 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007327 iwl3945_commit_rxon(priv);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007328
Zhu Yib481de92007-09-25 17:54:57 -07007329 if (priv->interface_id == conf->if_id) {
7330 priv->interface_id = 0;
7331 memset(priv->bssid, 0, ETH_ALEN);
7332 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7333 priv->essid_len = 0;
7334 }
7335 mutex_unlock(&priv->mutex);
7336
7337 IWL_DEBUG_MAC80211("leave\n");
7338
7339}
7340
7341#define IWL_DELAY_NEXT_SCAN (HZ*2)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007342static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
Zhu Yib481de92007-09-25 17:54:57 -07007343{
7344 int rc = 0;
7345 unsigned long flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007346 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007347
7348 IWL_DEBUG_MAC80211("enter\n");
7349
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007350 mutex_lock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007351 spin_lock_irqsave(&priv->lock, flags);
7352
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007353 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007354 rc = -EIO;
7355 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7356 goto out_unlock;
7357 }
7358
7359 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7360 rc = -EIO;
7361 IWL_ERROR("ERROR: APs don't scan\n");
7362 goto out_unlock;
7363 }
7364
7365 /* if we just finished scan ask for delay */
7366 if (priv->last_scan_jiffies &&
7367 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
7368 jiffies)) {
7369 rc = -EAGAIN;
7370 goto out_unlock;
7371 }
7372 if (len) {
7373 IWL_DEBUG_SCAN("direct scan for "
7374 "%s [%d]\n ",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007375 iwl3945_escape_essid(ssid, len), (int)len);
Zhu Yib481de92007-09-25 17:54:57 -07007376
7377 priv->one_direct_scan = 1;
7378 priv->direct_ssid_len = (u8)
7379 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7380 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007381 } else
7382 priv->one_direct_scan = 0;
Zhu Yib481de92007-09-25 17:54:57 -07007383
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007384 rc = iwl3945_scan_initiate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007385
7386 IWL_DEBUG_MAC80211("leave\n");
7387
7388out_unlock:
7389 spin_unlock_irqrestore(&priv->lock, flags);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007390 mutex_unlock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007391
7392 return rc;
7393}
7394
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007395static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
Zhu Yib481de92007-09-25 17:54:57 -07007396 const u8 *local_addr, const u8 *addr,
7397 struct ieee80211_key_conf *key)
7398{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007399 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007400 int rc = 0;
7401 u8 sta_id;
7402
7403 IWL_DEBUG_MAC80211("enter\n");
7404
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007405 if (!iwl3945_param_hwcrypto) {
Zhu Yib481de92007-09-25 17:54:57 -07007406 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7407 return -EOPNOTSUPP;
7408 }
7409
7410 if (is_zero_ether_addr(addr))
7411 /* only support pairwise keys */
7412 return -EOPNOTSUPP;
7413
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007414 sta_id = iwl3945_hw_find_station(priv, addr);
Zhu Yib481de92007-09-25 17:54:57 -07007415 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07007416 DECLARE_MAC_BUF(mac);
7417
7418 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7419 print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -07007420 return -EINVAL;
7421 }
7422
7423 mutex_lock(&priv->mutex);
7424
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007425 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007426
Zhu Yib481de92007-09-25 17:54:57 -07007427 switch (cmd) {
7428 case SET_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007429 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007430 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007431 iwl3945_set_rxon_hwcrypto(priv, 1);
7432 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007433 key->hw_key_idx = sta_id;
7434 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7435 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7436 }
7437 break;
7438 case DISABLE_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007439 rc = iwl3945_clear_sta_key_info(priv, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007440 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007441 iwl3945_set_rxon_hwcrypto(priv, 0);
7442 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007443 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7444 }
7445 break;
7446 default:
7447 rc = -EINVAL;
7448 }
7449
7450 IWL_DEBUG_MAC80211("leave\n");
7451 mutex_unlock(&priv->mutex);
7452
7453 return rc;
7454}
7455
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007456static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, int queue,
Zhu Yib481de92007-09-25 17:54:57 -07007457 const struct ieee80211_tx_queue_params *params)
7458{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007459 struct iwl3945_priv *priv = hw->priv;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007460#ifdef CONFIG_IWL3945_QOS
Zhu Yib481de92007-09-25 17:54:57 -07007461 unsigned long flags;
7462 int q;
Reinette Chatre0054b342007-11-29 11:09:42 +08007463#endif /* CONFIG_IWL3945_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07007464
7465 IWL_DEBUG_MAC80211("enter\n");
7466
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007467 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007468 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7469 return -EIO;
7470 }
7471
7472 if (queue >= AC_NUM) {
7473 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7474 return 0;
7475 }
7476
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007477#ifdef CONFIG_IWL3945_QOS
Zhu Yib481de92007-09-25 17:54:57 -07007478 if (!priv->qos_data.qos_enable) {
7479 priv->qos_data.qos_active = 0;
7480 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7481 return 0;
7482 }
7483 q = AC_NUM - 1 - queue;
7484
7485 spin_lock_irqsave(&priv->lock, flags);
7486
7487 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7488 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7489 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7490 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7491 cpu_to_le16((params->burst_time * 100));
7492
7493 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7494 priv->qos_data.qos_active = 1;
7495
7496 spin_unlock_irqrestore(&priv->lock, flags);
7497
7498 mutex_lock(&priv->mutex);
7499 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007500 iwl3945_activate_qos(priv, 1);
7501 else if (priv->assoc_id && iwl3945_is_associated(priv))
7502 iwl3945_activate_qos(priv, 0);
Zhu Yib481de92007-09-25 17:54:57 -07007503
7504 mutex_unlock(&priv->mutex);
7505
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007506#endif /*CONFIG_IWL3945_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07007507
7508 IWL_DEBUG_MAC80211("leave\n");
7509 return 0;
7510}
7511
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007512static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007513 struct ieee80211_tx_queue_stats *stats)
7514{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007515 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007516 int i, avail;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007517 struct iwl3945_tx_queue *txq;
7518 struct iwl3945_queue *q;
Zhu Yib481de92007-09-25 17:54:57 -07007519 unsigned long flags;
7520
7521 IWL_DEBUG_MAC80211("enter\n");
7522
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007523 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007524 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7525 return -EIO;
7526 }
7527
7528 spin_lock_irqsave(&priv->lock, flags);
7529
7530 for (i = 0; i < AC_NUM; i++) {
7531 txq = &priv->txq[i];
7532 q = &txq->q;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007533 avail = iwl3945_queue_space(q);
Zhu Yib481de92007-09-25 17:54:57 -07007534
7535 stats->data[i].len = q->n_window - avail;
7536 stats->data[i].limit = q->n_window - q->high_mark;
7537 stats->data[i].count = q->n_window;
7538
7539 }
7540 spin_unlock_irqrestore(&priv->lock, flags);
7541
7542 IWL_DEBUG_MAC80211("leave\n");
7543
7544 return 0;
7545}
7546
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007547static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007548 struct ieee80211_low_level_stats *stats)
7549{
7550 IWL_DEBUG_MAC80211("enter\n");
7551 IWL_DEBUG_MAC80211("leave\n");
7552
7553 return 0;
7554}
7555
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007556static u64 iwl3945_mac_get_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007557{
7558 IWL_DEBUG_MAC80211("enter\n");
7559 IWL_DEBUG_MAC80211("leave\n");
7560
7561 return 0;
7562}
7563
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007564static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007565{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007566 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007567 unsigned long flags;
7568
7569 mutex_lock(&priv->mutex);
7570 IWL_DEBUG_MAC80211("enter\n");
7571
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007572#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007573 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007574#endif
7575 cancel_delayed_work(&priv->post_associate);
7576
7577 spin_lock_irqsave(&priv->lock, flags);
7578 priv->assoc_id = 0;
7579 priv->assoc_capability = 0;
7580 priv->call_post_assoc_from_beacon = 0;
7581
7582 /* new association get rid of ibss beacon skb */
7583 if (priv->ibss_beacon)
7584 dev_kfree_skb(priv->ibss_beacon);
7585
7586 priv->ibss_beacon = NULL;
7587
7588 priv->beacon_int = priv->hw->conf.beacon_int;
7589 priv->timestamp1 = 0;
7590 priv->timestamp0 = 0;
7591 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7592 priv->beacon_int = 0;
7593
7594 spin_unlock_irqrestore(&priv->lock, flags);
7595
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007596 /* we are restarting association process
7597 * clear RXON_FILTER_ASSOC_MSK bit
7598 */
7599 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007600 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007601 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007602 iwl3945_commit_rxon(priv);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007603 }
7604
Zhu Yib481de92007-09-25 17:54:57 -07007605 /* Per mac80211.h: This is only used in IBSS mode... */
7606 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007607
Zhu Yib481de92007-09-25 17:54:57 -07007608 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7609 mutex_unlock(&priv->mutex);
7610 return;
7611 }
7612
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007613 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007614 IWL_DEBUG_MAC80211("leave - not ready\n");
7615 mutex_unlock(&priv->mutex);
7616 return;
7617 }
7618
7619 priv->only_active_channel = 0;
7620
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007621 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007622
7623 mutex_unlock(&priv->mutex);
7624
7625 IWL_DEBUG_MAC80211("leave\n");
7626
7627}
7628
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007629static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07007630 struct ieee80211_tx_control *control)
7631{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007632 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007633 unsigned long flags;
7634
7635 mutex_lock(&priv->mutex);
7636 IWL_DEBUG_MAC80211("enter\n");
7637
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007638 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007639 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7640 mutex_unlock(&priv->mutex);
7641 return -EIO;
7642 }
7643
7644 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7645 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7646 mutex_unlock(&priv->mutex);
7647 return -EIO;
7648 }
7649
7650 spin_lock_irqsave(&priv->lock, flags);
7651
7652 if (priv->ibss_beacon)
7653 dev_kfree_skb(priv->ibss_beacon);
7654
7655 priv->ibss_beacon = skb;
7656
7657 priv->assoc_id = 0;
7658
7659 IWL_DEBUG_MAC80211("leave\n");
7660 spin_unlock_irqrestore(&priv->lock, flags);
7661
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007662#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007663 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007664#endif
7665
7666 queue_work(priv->workqueue, &priv->post_associate.work);
7667
7668 mutex_unlock(&priv->mutex);
7669
7670 return 0;
7671}
7672
7673/*****************************************************************************
7674 *
7675 * sysfs attributes
7676 *
7677 *****************************************************************************/
7678
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007679#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07007680
7681/*
7682 * The following adds a new attribute to the sysfs representation
7683 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7684 * used for controlling the debug level.
7685 *
7686 * See the level definitions in iwl for details.
7687 */
7688
7689static ssize_t show_debug_level(struct device_driver *d, char *buf)
7690{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007691 return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07007692}
7693static ssize_t store_debug_level(struct device_driver *d,
7694 const char *buf, size_t count)
7695{
7696 char *p = (char *)buf;
7697 u32 val;
7698
7699 val = simple_strtoul(p, &p, 0);
7700 if (p == buf)
7701 printk(KERN_INFO DRV_NAME
7702 ": %s is not in hex or decimal form.\n", buf);
7703 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007704 iwl3945_debug_level = val;
Zhu Yib481de92007-09-25 17:54:57 -07007705
7706 return strnlen(buf, count);
7707}
7708
7709static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7710 show_debug_level, store_debug_level);
7711
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007712#endif /* CONFIG_IWL3945_DEBUG */
Zhu Yib481de92007-09-25 17:54:57 -07007713
7714static ssize_t show_rf_kill(struct device *d,
7715 struct device_attribute *attr, char *buf)
7716{
7717 /*
7718 * 0 - RF kill not enabled
7719 * 1 - SW based RF kill active (sysfs)
7720 * 2 - HW based RF kill active
7721 * 3 - Both HW and SW based RF kill active
7722 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007723 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007724 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7725 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7726
7727 return sprintf(buf, "%i\n", val);
7728}
7729
7730static ssize_t store_rf_kill(struct device *d,
7731 struct device_attribute *attr,
7732 const char *buf, size_t count)
7733{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007734 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007735
7736 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007737 iwl3945_radio_kill_sw(priv, buf[0] == '1');
Zhu Yib481de92007-09-25 17:54:57 -07007738 mutex_unlock(&priv->mutex);
7739
7740 return count;
7741}
7742
7743static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7744
7745static ssize_t show_temperature(struct device *d,
7746 struct device_attribute *attr, char *buf)
7747{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007748 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007749
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007750 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007751 return -EAGAIN;
7752
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007753 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
Zhu Yib481de92007-09-25 17:54:57 -07007754}
7755
7756static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7757
7758static ssize_t show_rs_window(struct device *d,
7759 struct device_attribute *attr,
7760 char *buf)
7761{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007762 struct iwl3945_priv *priv = d->driver_data;
7763 return iwl3945_fill_rs_info(priv->hw, buf, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07007764}
7765static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7766
7767static ssize_t show_tx_power(struct device *d,
7768 struct device_attribute *attr, char *buf)
7769{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007770 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007771 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7772}
7773
7774static ssize_t store_tx_power(struct device *d,
7775 struct device_attribute *attr,
7776 const char *buf, size_t count)
7777{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007778 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007779 char *p = (char *)buf;
7780 u32 val;
7781
7782 val = simple_strtoul(p, &p, 10);
7783 if (p == buf)
7784 printk(KERN_INFO DRV_NAME
7785 ": %s is not in decimal form.\n", buf);
7786 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007787 iwl3945_hw_reg_set_txpower(priv, val);
Zhu Yib481de92007-09-25 17:54:57 -07007788
7789 return count;
7790}
7791
7792static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7793
7794static ssize_t show_flags(struct device *d,
7795 struct device_attribute *attr, char *buf)
7796{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007797 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007798
7799 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7800}
7801
7802static ssize_t store_flags(struct device *d,
7803 struct device_attribute *attr,
7804 const char *buf, size_t count)
7805{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007806 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007807 u32 flags = simple_strtoul(buf, NULL, 0);
7808
7809 mutex_lock(&priv->mutex);
7810 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7811 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007812 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007813 IWL_WARNING("Could not cancel scan.\n");
7814 else {
7815 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7816 flags);
7817 priv->staging_rxon.flags = cpu_to_le32(flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007818 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007819 }
7820 }
7821 mutex_unlock(&priv->mutex);
7822
7823 return count;
7824}
7825
7826static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7827
7828static ssize_t show_filter_flags(struct device *d,
7829 struct device_attribute *attr, char *buf)
7830{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007831 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007832
7833 return sprintf(buf, "0x%04X\n",
7834 le32_to_cpu(priv->active_rxon.filter_flags));
7835}
7836
7837static ssize_t store_filter_flags(struct device *d,
7838 struct device_attribute *attr,
7839 const char *buf, size_t count)
7840{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007841 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007842 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7843
7844 mutex_lock(&priv->mutex);
7845 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7846 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007847 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007848 IWL_WARNING("Could not cancel scan.\n");
7849 else {
7850 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7851 "0x%04X\n", filter_flags);
7852 priv->staging_rxon.filter_flags =
7853 cpu_to_le32(filter_flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007854 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007855 }
7856 }
7857 mutex_unlock(&priv->mutex);
7858
7859 return count;
7860}
7861
7862static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7863 store_filter_flags);
7864
7865static ssize_t show_tune(struct device *d,
7866 struct device_attribute *attr, char *buf)
7867{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007868 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007869
7870 return sprintf(buf, "0x%04X\n",
7871 (priv->phymode << 8) |
7872 le16_to_cpu(priv->active_rxon.channel));
7873}
7874
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007875static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv, u8 phymode);
Zhu Yib481de92007-09-25 17:54:57 -07007876
7877static ssize_t store_tune(struct device *d,
7878 struct device_attribute *attr,
7879 const char *buf, size_t count)
7880{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007881 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007882 char *p = (char *)buf;
7883 u16 tune = simple_strtoul(p, &p, 0);
7884 u8 phymode = (tune >> 8) & 0xff;
7885 u16 channel = tune & 0xff;
7886
7887 IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
7888
7889 mutex_lock(&priv->mutex);
7890 if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
7891 (priv->phymode != phymode)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007892 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07007893
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007894 ch_info = iwl3945_get_channel_info(priv, phymode, channel);
Zhu Yib481de92007-09-25 17:54:57 -07007895 if (!ch_info) {
7896 IWL_WARNING("Requested invalid phymode/channel "
7897 "combination: %d %d\n", phymode, channel);
7898 mutex_unlock(&priv->mutex);
7899 return -EINVAL;
7900 }
7901
7902 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007903 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007904 IWL_WARNING("Could not cancel scan.\n");
7905 else {
7906 IWL_DEBUG_INFO("Committing phymode and "
7907 "rxon.channel = %d %d\n",
7908 phymode, channel);
7909
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007910 iwl3945_set_rxon_channel(priv, phymode, channel);
7911 iwl3945_set_flags_for_phymode(priv, phymode);
Zhu Yib481de92007-09-25 17:54:57 -07007912
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007913 iwl3945_set_rate(priv);
7914 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007915 }
7916 }
7917 mutex_unlock(&priv->mutex);
7918
7919 return count;
7920}
7921
7922static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
7923
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007924#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07007925
7926static ssize_t show_measurement(struct device *d,
7927 struct device_attribute *attr, char *buf)
7928{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007929 struct iwl3945_priv *priv = dev_get_drvdata(d);
7930 struct iwl3945_spectrum_notification measure_report;
Zhu Yib481de92007-09-25 17:54:57 -07007931 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7932 u8 *data = (u8 *) & measure_report;
7933 unsigned long flags;
7934
7935 spin_lock_irqsave(&priv->lock, flags);
7936 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7937 spin_unlock_irqrestore(&priv->lock, flags);
7938 return 0;
7939 }
7940 memcpy(&measure_report, &priv->measure_report, size);
7941 priv->measurement_status = 0;
7942 spin_unlock_irqrestore(&priv->lock, flags);
7943
7944 while (size && (PAGE_SIZE - len)) {
7945 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7946 PAGE_SIZE - len, 1);
7947 len = strlen(buf);
7948 if (PAGE_SIZE - len)
7949 buf[len++] = '\n';
7950
7951 ofs += 16;
7952 size -= min(size, 16U);
7953 }
7954
7955 return len;
7956}
7957
7958static ssize_t store_measurement(struct device *d,
7959 struct device_attribute *attr,
7960 const char *buf, size_t count)
7961{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007962 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007963 struct ieee80211_measurement_params params = {
7964 .channel = le16_to_cpu(priv->active_rxon.channel),
7965 .start_time = cpu_to_le64(priv->last_tsf),
7966 .duration = cpu_to_le16(1),
7967 };
7968 u8 type = IWL_MEASURE_BASIC;
7969 u8 buffer[32];
7970 u8 channel;
7971
7972 if (count) {
7973 char *p = buffer;
7974 strncpy(buffer, buf, min(sizeof(buffer), count));
7975 channel = simple_strtoul(p, NULL, 0);
7976 if (channel)
7977 params.channel = channel;
7978
7979 p = buffer;
7980 while (*p && *p != ' ')
7981 p++;
7982 if (*p)
7983 type = simple_strtoul(p + 1, NULL, 0);
7984 }
7985
7986 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7987 "channel %d (for '%s')\n", type, params.channel, buf);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007988 iwl3945_get_measurement(priv, &params, type);
Zhu Yib481de92007-09-25 17:54:57 -07007989
7990 return count;
7991}
7992
7993static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7994 show_measurement, store_measurement);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007995#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
Zhu Yib481de92007-09-25 17:54:57 -07007996
7997static ssize_t show_rate(struct device *d,
7998 struct device_attribute *attr, char *buf)
7999{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008000 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008001 unsigned long flags;
8002 int i;
8003
8004 spin_lock_irqsave(&priv->sta_lock, flags);
8005 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
8006 i = priv->stations[IWL_AP_ID].current_rate.s.rate;
8007 else
8008 i = priv->stations[IWL_STA_ID].current_rate.s.rate;
8009 spin_unlock_irqrestore(&priv->sta_lock, flags);
8010
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008011 i = iwl3945_rate_index_from_plcp(i);
Zhu Yib481de92007-09-25 17:54:57 -07008012 if (i == -1)
8013 return sprintf(buf, "0\n");
8014
8015 return sprintf(buf, "%d%s\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008016 (iwl3945_rates[i].ieee >> 1),
8017 (iwl3945_rates[i].ieee & 0x1) ? ".5" : "");
Zhu Yib481de92007-09-25 17:54:57 -07008018}
8019
8020static DEVICE_ATTR(rate, S_IRUSR, show_rate, NULL);
8021
8022static ssize_t store_retry_rate(struct device *d,
8023 struct device_attribute *attr,
8024 const char *buf, size_t count)
8025{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008026 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008027
8028 priv->retry_rate = simple_strtoul(buf, NULL, 0);
8029 if (priv->retry_rate <= 0)
8030 priv->retry_rate = 1;
8031
8032 return count;
8033}
8034
8035static ssize_t show_retry_rate(struct device *d,
8036 struct device_attribute *attr, char *buf)
8037{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008038 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008039 return sprintf(buf, "%d", priv->retry_rate);
8040}
8041
8042static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
8043 store_retry_rate);
8044
8045static ssize_t store_power_level(struct device *d,
8046 struct device_attribute *attr,
8047 const char *buf, size_t count)
8048{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008049 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008050 int rc;
8051 int mode;
8052
8053 mode = simple_strtoul(buf, NULL, 0);
8054 mutex_lock(&priv->mutex);
8055
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008056 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07008057 rc = -EAGAIN;
8058 goto out;
8059 }
8060
8061 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
8062 mode = IWL_POWER_AC;
8063 else
8064 mode |= IWL_POWER_ENABLED;
8065
8066 if (mode != priv->power_mode) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008067 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
Zhu Yib481de92007-09-25 17:54:57 -07008068 if (rc) {
8069 IWL_DEBUG_MAC80211("failed setting power mode.\n");
8070 goto out;
8071 }
8072 priv->power_mode = mode;
8073 }
8074
8075 rc = count;
8076
8077 out:
8078 mutex_unlock(&priv->mutex);
8079 return rc;
8080}
8081
8082#define MAX_WX_STRING 80
8083
8084/* Values are in microsecond */
8085static const s32 timeout_duration[] = {
8086 350000,
8087 250000,
8088 75000,
8089 37000,
8090 25000,
8091};
8092static const s32 period_duration[] = {
8093 400000,
8094 700000,
8095 1000000,
8096 1000000,
8097 1000000
8098};
8099
8100static ssize_t show_power_level(struct device *d,
8101 struct device_attribute *attr, char *buf)
8102{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008103 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008104 int level = IWL_POWER_LEVEL(priv->power_mode);
8105 char *p = buf;
8106
8107 p += sprintf(p, "%d ", level);
8108 switch (level) {
8109 case IWL_POWER_MODE_CAM:
8110 case IWL_POWER_AC:
8111 p += sprintf(p, "(AC)");
8112 break;
8113 case IWL_POWER_BATTERY:
8114 p += sprintf(p, "(BATTERY)");
8115 break;
8116 default:
8117 p += sprintf(p,
8118 "(Timeout %dms, Period %dms)",
8119 timeout_duration[level - 1] / 1000,
8120 period_duration[level - 1] / 1000);
8121 }
8122
8123 if (!(priv->power_mode & IWL_POWER_ENABLED))
8124 p += sprintf(p, " OFF\n");
8125 else
8126 p += sprintf(p, " \n");
8127
8128 return (p - buf + 1);
8129
8130}
8131
8132static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8133 store_power_level);
8134
8135static ssize_t show_channels(struct device *d,
8136 struct device_attribute *attr, char *buf)
8137{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008138 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008139 int len = 0, i;
8140 struct ieee80211_channel *channels = NULL;
8141 const struct ieee80211_hw_mode *hw_mode = NULL;
8142 int count = 0;
8143
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008144 if (!iwl3945_is_ready(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008145 return -EAGAIN;
8146
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008147 hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211G);
Zhu Yib481de92007-09-25 17:54:57 -07008148 if (!hw_mode)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008149 hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211B);
Zhu Yib481de92007-09-25 17:54:57 -07008150 if (hw_mode) {
8151 channels = hw_mode->channels;
8152 count = hw_mode->num_channels;
8153 }
8154
8155 len +=
8156 sprintf(&buf[len],
8157 "Displaying %d channels in 2.4GHz band "
8158 "(802.11bg):\n", count);
8159
8160 for (i = 0; i < count; i++)
8161 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8162 channels[i].chan,
8163 channels[i].power_level,
8164 channels[i].
8165 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8166 " (IEEE 802.11h required)" : "",
8167 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8168 || (channels[i].
8169 flag &
8170 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8171 ", IBSS",
8172 channels[i].
8173 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8174 "active/passive" : "passive only");
8175
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008176 hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211A);
Zhu Yib481de92007-09-25 17:54:57 -07008177 if (hw_mode) {
8178 channels = hw_mode->channels;
8179 count = hw_mode->num_channels;
8180 } else {
8181 channels = NULL;
8182 count = 0;
8183 }
8184
8185 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
8186 "(802.11a):\n", count);
8187
8188 for (i = 0; i < count; i++)
8189 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8190 channels[i].chan,
8191 channels[i].power_level,
8192 channels[i].
8193 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8194 " (IEEE 802.11h required)" : "",
8195 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8196 || (channels[i].
8197 flag &
8198 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8199 ", IBSS",
8200 channels[i].
8201 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8202 "active/passive" : "passive only");
8203
8204 return len;
8205}
8206
8207static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8208
8209static ssize_t show_statistics(struct device *d,
8210 struct device_attribute *attr, char *buf)
8211{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008212 struct iwl3945_priv *priv = dev_get_drvdata(d);
8213 u32 size = sizeof(struct iwl3945_notif_statistics);
Zhu Yib481de92007-09-25 17:54:57 -07008214 u32 len = 0, ofs = 0;
8215 u8 *data = (u8 *) & priv->statistics;
8216 int rc = 0;
8217
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008218 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008219 return -EAGAIN;
8220
8221 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008222 rc = iwl3945_send_statistics_request(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008223 mutex_unlock(&priv->mutex);
8224
8225 if (rc) {
8226 len = sprintf(buf,
8227 "Error sending statistics request: 0x%08X\n", rc);
8228 return len;
8229 }
8230
8231 while (size && (PAGE_SIZE - len)) {
8232 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8233 PAGE_SIZE - len, 1);
8234 len = strlen(buf);
8235 if (PAGE_SIZE - len)
8236 buf[len++] = '\n';
8237
8238 ofs += 16;
8239 size -= min(size, 16U);
8240 }
8241
8242 return len;
8243}
8244
8245static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8246
8247static ssize_t show_antenna(struct device *d,
8248 struct device_attribute *attr, char *buf)
8249{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008250 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008251
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008252 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008253 return -EAGAIN;
8254
8255 return sprintf(buf, "%d\n", priv->antenna);
8256}
8257
8258static ssize_t store_antenna(struct device *d,
8259 struct device_attribute *attr,
8260 const char *buf, size_t count)
8261{
8262 int ant;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008263 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008264
8265 if (count == 0)
8266 return 0;
8267
8268 if (sscanf(buf, "%1i", &ant) != 1) {
8269 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8270 return count;
8271 }
8272
8273 if ((ant >= 0) && (ant <= 2)) {
8274 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008275 priv->antenna = (enum iwl3945_antenna)ant;
Zhu Yib481de92007-09-25 17:54:57 -07008276 } else
8277 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8278
8279
8280 return count;
8281}
8282
8283static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8284
8285static ssize_t show_status(struct device *d,
8286 struct device_attribute *attr, char *buf)
8287{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008288 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
8289 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008290 return -EAGAIN;
8291 return sprintf(buf, "0x%08x\n", (int)priv->status);
8292}
8293
8294static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8295
8296static ssize_t dump_error_log(struct device *d,
8297 struct device_attribute *attr,
8298 const char *buf, size_t count)
8299{
8300 char *p = (char *)buf;
8301
8302 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008303 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07008304
8305 return strnlen(buf, count);
8306}
8307
8308static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8309
8310static ssize_t dump_event_log(struct device *d,
8311 struct device_attribute *attr,
8312 const char *buf, size_t count)
8313{
8314 char *p = (char *)buf;
8315
8316 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008317 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07008318
8319 return strnlen(buf, count);
8320}
8321
8322static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8323
8324/*****************************************************************************
8325 *
8326 * driver setup and teardown
8327 *
8328 *****************************************************************************/
8329
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008330static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07008331{
8332 priv->workqueue = create_workqueue(DRV_NAME);
8333
8334 init_waitqueue_head(&priv->wait_command_queue);
8335
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008336 INIT_WORK(&priv->up, iwl3945_bg_up);
8337 INIT_WORK(&priv->restart, iwl3945_bg_restart);
8338 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
8339 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
8340 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
8341 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
8342 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
8343 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
8344 INIT_DELAYED_WORK(&priv->post_associate, iwl3945_bg_post_associate);
8345 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
8346 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
8347 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
Zhu Yib481de92007-09-25 17:54:57 -07008348
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008349 iwl3945_hw_setup_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008350
8351 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008352 iwl3945_irq_tasklet, (unsigned long)priv);
Zhu Yib481de92007-09-25 17:54:57 -07008353}
8354
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008355static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07008356{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008357 iwl3945_hw_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008358
Joonwoo Parke47eb6a2007-11-29 10:42:49 +09008359 cancel_delayed_work_sync(&priv->init_alive_start);
Zhu Yib481de92007-09-25 17:54:57 -07008360 cancel_delayed_work(&priv->scan_check);
8361 cancel_delayed_work(&priv->alive_start);
8362 cancel_delayed_work(&priv->post_associate);
8363 cancel_work_sync(&priv->beacon_update);
8364}
8365
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008366static struct attribute *iwl3945_sysfs_entries[] = {
Zhu Yib481de92007-09-25 17:54:57 -07008367 &dev_attr_antenna.attr,
8368 &dev_attr_channels.attr,
8369 &dev_attr_dump_errors.attr,
8370 &dev_attr_dump_events.attr,
8371 &dev_attr_flags.attr,
8372 &dev_attr_filter_flags.attr,
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008373#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07008374 &dev_attr_measurement.attr,
8375#endif
8376 &dev_attr_power_level.attr,
8377 &dev_attr_rate.attr,
8378 &dev_attr_retry_rate.attr,
8379 &dev_attr_rf_kill.attr,
8380 &dev_attr_rs_window.attr,
8381 &dev_attr_statistics.attr,
8382 &dev_attr_status.attr,
8383 &dev_attr_temperature.attr,
8384 &dev_attr_tune.attr,
8385 &dev_attr_tx_power.attr,
8386
8387 NULL
8388};
8389
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008390static struct attribute_group iwl3945_attribute_group = {
Zhu Yib481de92007-09-25 17:54:57 -07008391 .name = NULL, /* put in device directory */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008392 .attrs = iwl3945_sysfs_entries,
Zhu Yib481de92007-09-25 17:54:57 -07008393};
8394
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008395static struct ieee80211_ops iwl3945_hw_ops = {
8396 .tx = iwl3945_mac_tx,
8397 .start = iwl3945_mac_start,
8398 .stop = iwl3945_mac_stop,
8399 .add_interface = iwl3945_mac_add_interface,
8400 .remove_interface = iwl3945_mac_remove_interface,
8401 .config = iwl3945_mac_config,
8402 .config_interface = iwl3945_mac_config_interface,
8403 .configure_filter = iwl3945_configure_filter,
8404 .set_key = iwl3945_mac_set_key,
8405 .get_stats = iwl3945_mac_get_stats,
8406 .get_tx_stats = iwl3945_mac_get_tx_stats,
8407 .conf_tx = iwl3945_mac_conf_tx,
8408 .get_tsf = iwl3945_mac_get_tsf,
8409 .reset_tsf = iwl3945_mac_reset_tsf,
8410 .beacon_update = iwl3945_mac_beacon_update,
8411 .hw_scan = iwl3945_mac_hw_scan
Zhu Yib481de92007-09-25 17:54:57 -07008412};
8413
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008414static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
Zhu Yib481de92007-09-25 17:54:57 -07008415{
8416 int err = 0;
8417 u32 pci_id;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008418 struct iwl3945_priv *priv;
Zhu Yib481de92007-09-25 17:54:57 -07008419 struct ieee80211_hw *hw;
8420 int i;
8421
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008422 /* Disabling hardware scan means that mac80211 will perform scans
8423 * "the hard way", rather than using device's scan. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008424 if (iwl3945_param_disable_hw_scan) {
Zhu Yib481de92007-09-25 17:54:57 -07008425 IWL_DEBUG_INFO("Disabling hw_scan\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008426 iwl3945_hw_ops.hw_scan = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07008427 }
8428
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008429 if ((iwl3945_param_queues_num > IWL_MAX_NUM_QUEUES) ||
8430 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
Zhu Yib481de92007-09-25 17:54:57 -07008431 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
8432 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
8433 err = -EINVAL;
8434 goto out;
8435 }
8436
8437 /* mac80211 allocates memory for this device instance, including
8438 * space for this driver's private structure */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008439 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
Zhu Yib481de92007-09-25 17:54:57 -07008440 if (hw == NULL) {
8441 IWL_ERROR("Can not allocate network device\n");
8442 err = -ENOMEM;
8443 goto out;
8444 }
8445 SET_IEEE80211_DEV(hw, &pdev->dev);
8446
Johannes Bergf51359a2007-10-28 14:53:36 +01008447 hw->rate_control_algorithm = "iwl-3945-rs";
8448
Zhu Yib481de92007-09-25 17:54:57 -07008449 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
8450 priv = hw->priv;
8451 priv->hw = hw;
8452
8453 priv->pci_dev = pdev;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008454
8455 /* Select antenna (may be helpful if only one antenna is connected) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008456 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008457#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008458 iwl3945_debug_level = iwl3945_param_debug;
Zhu Yib481de92007-09-25 17:54:57 -07008459 atomic_set(&priv->restrict_refcnt, 0);
8460#endif
8461 priv->retry_rate = 1;
8462
8463 priv->ibss_beacon = NULL;
8464
8465 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
8466 * the range of signal quality values that we'll provide.
8467 * Negative values for level/noise indicate that we'll provide dBm.
8468 * For WE, at least, non-0 values here *enable* display of values
8469 * in app (iwconfig). */
8470 hw->max_rssi = -20; /* signal level, negative indicates dBm */
8471 hw->max_noise = -20; /* noise level, negative indicates dBm */
8472 hw->max_signal = 100; /* link quality indication (%) */
8473
8474 /* Tell mac80211 our Tx characteristics */
8475 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
8476
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008477 /* 4 EDCA QOS priorities */
Zhu Yib481de92007-09-25 17:54:57 -07008478 hw->queues = 4;
8479
8480 spin_lock_init(&priv->lock);
8481 spin_lock_init(&priv->power_data.lock);
8482 spin_lock_init(&priv->sta_lock);
8483 spin_lock_init(&priv->hcmd_lock);
8484
8485 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8486 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8487
8488 INIT_LIST_HEAD(&priv->free_frames);
8489
8490 mutex_init(&priv->mutex);
8491 if (pci_enable_device(pdev)) {
8492 err = -ENODEV;
8493 goto out_ieee80211_free_hw;
8494 }
8495
8496 pci_set_master(pdev);
8497
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008498 /* Clear the driver's (not device's) station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008499 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008500
8501 priv->data_retry_limit = -1;
8502 priv->ieee_channels = NULL;
8503 priv->ieee_rates = NULL;
8504 priv->phymode = -1;
8505
8506 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8507 if (!err)
8508 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8509 if (err) {
8510 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8511 goto out_pci_disable_device;
8512 }
8513
8514 pci_set_drvdata(pdev, priv);
8515 err = pci_request_regions(pdev, DRV_NAME);
8516 if (err)
8517 goto out_pci_disable_device;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008518
Zhu Yib481de92007-09-25 17:54:57 -07008519 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8520 * PCI Tx retries from interfering with C3 CPU state */
8521 pci_write_config_byte(pdev, 0x41, 0x00);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008522
Zhu Yib481de92007-09-25 17:54:57 -07008523 priv->hw_base = pci_iomap(pdev, 0, 0);
8524 if (!priv->hw_base) {
8525 err = -ENODEV;
8526 goto out_pci_release_regions;
8527 }
8528
8529 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8530 (unsigned long long) pci_resource_len(pdev, 0));
8531 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8532
8533 /* Initialize module parameter values here */
8534
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008535 /* Disable radio (SW RF KILL) via parameter when loading driver */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008536 if (iwl3945_param_disable) {
Zhu Yib481de92007-09-25 17:54:57 -07008537 set_bit(STATUS_RF_KILL_SW, &priv->status);
8538 IWL_DEBUG_INFO("Radio disabled.\n");
8539 }
8540
8541 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8542
8543 pci_id =
8544 (priv->pci_dev->device << 16) | priv->pci_dev->subsystem_device;
8545
8546 switch (pci_id) {
8547 case 0x42221005: /* 0x4222 0x8086 0x1005 is BG SKU */
8548 case 0x42221034: /* 0x4222 0x8086 0x1034 is BG SKU */
8549 case 0x42271014: /* 0x4227 0x8086 0x1014 is BG SKU */
8550 case 0x42221044: /* 0x4222 0x8086 0x1044 is BG SKU */
8551 priv->is_abg = 0;
8552 break;
8553
8554 /*
8555 * Rest are assumed ABG SKU -- if this is not the
8556 * case then the card will get the wrong 'Detected'
8557 * line in the kernel log however the code that
8558 * initializes the GEO table will detect no A-band
8559 * channels and remove the is_abg mask.
8560 */
8561 default:
8562 priv->is_abg = 1;
8563 break;
8564 }
8565
8566 printk(KERN_INFO DRV_NAME
8567 ": Detected Intel PRO/Wireless 3945%sBG Network Connection\n",
8568 priv->is_abg ? "A" : "");
8569
8570 /* Device-specific setup */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008571 if (iwl3945_hw_set_hw_setting(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07008572 IWL_ERROR("failed to set hw settings\n");
8573 mutex_unlock(&priv->mutex);
8574 goto out_iounmap;
8575 }
8576
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008577#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008578 if (iwl3945_param_qos_enable)
Zhu Yib481de92007-09-25 17:54:57 -07008579 priv->qos_data.qos_enable = 1;
8580
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008581 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008582
8583 priv->qos_data.qos_active = 0;
8584 priv->qos_data.qos_cap.val = 0;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008585#endif /* CONFIG_IWL3945_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07008586
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008587 iwl3945_set_rxon_channel(priv, MODE_IEEE80211G, 6);
8588 iwl3945_setup_deferred_work(priv);
8589 iwl3945_setup_rx_handlers(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008590
8591 priv->rates_mask = IWL_RATES_MASK;
8592 /* If power management is turned on, default to AC mode */
8593 priv->power_mode = IWL_POWER_AC;
8594 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8595
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008596 iwl3945_disable_interrupts(priv);
Jes Sorensen49df2b32007-10-26 16:10:39 +02008597
Zhu Yib481de92007-09-25 17:54:57 -07008598 pci_enable_msi(pdev);
8599
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008600 err = request_irq(pdev->irq, iwl3945_isr, IRQF_SHARED, DRV_NAME, priv);
Zhu Yib481de92007-09-25 17:54:57 -07008601 if (err) {
8602 IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
8603 goto out_disable_msi;
8604 }
8605
8606 mutex_lock(&priv->mutex);
8607
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008608 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008609 if (err) {
8610 IWL_ERROR("failed to create sysfs device attributes\n");
8611 mutex_unlock(&priv->mutex);
8612 goto out_release_irq;
8613 }
8614
8615 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
8616 * ucode filename and max sizes are card-specific. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008617 err = iwl3945_read_ucode(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008618 if (err) {
8619 IWL_ERROR("Could not read microcode: %d\n", err);
8620 mutex_unlock(&priv->mutex);
8621 goto out_pci_alloc;
8622 }
8623
8624 mutex_unlock(&priv->mutex);
8625
Ian Schram01ebd062007-10-25 17:15:22 +08008626 IWL_DEBUG_INFO("Queueing UP work.\n");
Zhu Yib481de92007-09-25 17:54:57 -07008627
8628 queue_work(priv->workqueue, &priv->up);
8629
8630 return 0;
8631
8632 out_pci_alloc:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008633 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008634
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008635 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008636
8637 out_release_irq:
8638 free_irq(pdev->irq, priv);
8639
8640 out_disable_msi:
8641 pci_disable_msi(pdev);
8642 destroy_workqueue(priv->workqueue);
8643 priv->workqueue = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008644 iwl3945_unset_hw_setting(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008645
8646 out_iounmap:
8647 pci_iounmap(pdev, priv->hw_base);
8648 out_pci_release_regions:
8649 pci_release_regions(pdev);
8650 out_pci_disable_device:
8651 pci_disable_device(pdev);
8652 pci_set_drvdata(pdev, NULL);
8653 out_ieee80211_free_hw:
8654 ieee80211_free_hw(priv->hw);
8655 out:
8656 return err;
8657}
8658
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008659static void iwl3945_pci_remove(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07008660{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008661 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008662 struct list_head *p, *q;
8663 int i;
8664
8665 if (!priv)
8666 return;
8667
8668 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8669
Zhu Yib481de92007-09-25 17:54:57 -07008670 set_bit(STATUS_EXIT_PENDING, &priv->status);
Zhu Yib24d22b2007-12-19 13:59:52 +08008671
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008672 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008673
8674 /* Free MAC hash list for ADHOC */
8675 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8676 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8677 list_del(p);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008678 kfree(list_entry(p, struct iwl3945_ibss_seq, list));
Zhu Yib481de92007-09-25 17:54:57 -07008679 }
8680 }
8681
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008682 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008683
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008684 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008685
8686 if (priv->rxq.bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008687 iwl3945_rx_queue_free(priv, &priv->rxq);
8688 iwl3945_hw_txq_ctx_free(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008689
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008690 iwl3945_unset_hw_setting(priv);
8691 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008692
8693 if (priv->mac80211_registered) {
8694 ieee80211_unregister_hw(priv->hw);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008695 iwl3945_rate_control_unregister(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07008696 }
8697
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08008698 /*netif_stop_queue(dev); */
8699 flush_workqueue(priv->workqueue);
8700
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008701 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
Zhu Yib481de92007-09-25 17:54:57 -07008702 * priv->workqueue... so we can't take down the workqueue
8703 * until now... */
8704 destroy_workqueue(priv->workqueue);
8705 priv->workqueue = NULL;
8706
8707 free_irq(pdev->irq, priv);
8708 pci_disable_msi(pdev);
8709 pci_iounmap(pdev, priv->hw_base);
8710 pci_release_regions(pdev);
8711 pci_disable_device(pdev);
8712 pci_set_drvdata(pdev, NULL);
8713
8714 kfree(priv->channel_info);
8715
8716 kfree(priv->ieee_channels);
8717 kfree(priv->ieee_rates);
8718
8719 if (priv->ibss_beacon)
8720 dev_kfree_skb(priv->ibss_beacon);
8721
8722 ieee80211_free_hw(priv->hw);
8723}
8724
8725#ifdef CONFIG_PM
8726
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008727static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
Zhu Yib481de92007-09-25 17:54:57 -07008728{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008729 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008730
Zhu Yib481de92007-09-25 17:54:57 -07008731 set_bit(STATUS_IN_SUSPEND, &priv->status);
8732
8733 /* Take down the device; powers it off, etc. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008734 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008735
8736 if (priv->mac80211_registered)
8737 ieee80211_stop_queues(priv->hw);
8738
8739 pci_save_state(pdev);
8740 pci_disable_device(pdev);
8741 pci_set_power_state(pdev, PCI_D3hot);
8742
Zhu Yib481de92007-09-25 17:54:57 -07008743 return 0;
8744}
8745
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008746static void iwl3945_resume(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07008747{
8748 unsigned long flags;
8749
8750 /* The following it a temporary work around due to the
8751 * suspend / resume not fully initializing the NIC correctly.
8752 * Without all of the following, resume will not attempt to take
8753 * down the NIC (it shouldn't really need to) and will just try
8754 * and bring the NIC back up. However that fails during the
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008755 * ucode verification process. This then causes iwl3945_down to be
8756 * called *after* iwl3945_hw_nic_init() has succeeded -- which
Zhu Yib481de92007-09-25 17:54:57 -07008757 * then lets the next init sequence succeed. So, we've
8758 * replicated all of that NIC init code here... */
8759
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008760 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
Zhu Yib481de92007-09-25 17:54:57 -07008761
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008762 iwl3945_hw_nic_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008763
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008764 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
8765 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
Zhu Yib481de92007-09-25 17:54:57 -07008766 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008767 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
8768 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
8769 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07008770
8771 /* tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008772 iwl3945_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008773
8774 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008775 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
Zhu Yib481de92007-09-25 17:54:57 -07008776
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008777 if (!iwl3945_grab_nic_access(priv)) {
8778 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
Zhu Yib481de92007-09-25 17:54:57 -07008779 APMG_CLK_VAL_DMA_CLK_RQT);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008780 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008781 }
8782 spin_unlock_irqrestore(&priv->lock, flags);
8783
8784 udelay(5);
8785
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008786 iwl3945_hw_nic_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008787
8788 /* Bring the device back up */
8789 clear_bit(STATUS_IN_SUSPEND, &priv->status);
8790 queue_work(priv->workqueue, &priv->up);
8791}
8792
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008793static int iwl3945_pci_resume(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07008794{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008795 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008796 int err;
8797
8798 printk(KERN_INFO "Coming out of suspend...\n");
8799
Zhu Yib481de92007-09-25 17:54:57 -07008800 pci_set_power_state(pdev, PCI_D0);
8801 err = pci_enable_device(pdev);
8802 pci_restore_state(pdev);
8803
8804 /*
8805 * Suspend/Resume resets the PCI configuration space, so we have to
8806 * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
8807 * from interfering with C3 CPU state. pci_restore_state won't help
8808 * here since it only restores the first 64 bytes pci config header.
8809 */
8810 pci_write_config_byte(pdev, 0x41, 0x00);
8811
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008812 iwl3945_resume(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008813
8814 return 0;
8815}
8816
8817#endif /* CONFIG_PM */
8818
8819/*****************************************************************************
8820 *
8821 * driver and module entry point
8822 *
8823 *****************************************************************************/
8824
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008825static struct pci_driver iwl3945_driver = {
Zhu Yib481de92007-09-25 17:54:57 -07008826 .name = DRV_NAME,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008827 .id_table = iwl3945_hw_card_ids,
8828 .probe = iwl3945_pci_probe,
8829 .remove = __devexit_p(iwl3945_pci_remove),
Zhu Yib481de92007-09-25 17:54:57 -07008830#ifdef CONFIG_PM
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008831 .suspend = iwl3945_pci_suspend,
8832 .resume = iwl3945_pci_resume,
Zhu Yib481de92007-09-25 17:54:57 -07008833#endif
8834};
8835
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008836static int __init iwl3945_init(void)
Zhu Yib481de92007-09-25 17:54:57 -07008837{
8838
8839 int ret;
8840 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8841 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008842 ret = pci_register_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008843 if (ret) {
8844 IWL_ERROR("Unable to initialize PCI module\n");
8845 return ret;
8846 }
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008847#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008848 ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008849 if (ret) {
8850 IWL_ERROR("Unable to create driver sysfs file\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008851 pci_unregister_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008852 return ret;
8853 }
8854#endif
8855
8856 return ret;
8857}
8858
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008859static void __exit iwl3945_exit(void)
Zhu Yib481de92007-09-25 17:54:57 -07008860{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008861#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008862 driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008863#endif
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008864 pci_unregister_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008865}
8866
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008867module_param_named(antenna, iwl3945_param_antenna, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008868MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008869module_param_named(disable, iwl3945_param_disable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008870MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008871module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008872MODULE_PARM_DESC(hwcrypto,
8873 "using hardware crypto engine (default 0 [software])\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008874module_param_named(debug, iwl3945_param_debug, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008875MODULE_PARM_DESC(debug, "debug output mask");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008876module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008877MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8878
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008879module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008880MODULE_PARM_DESC(queues_num, "number of hw queues.");
8881
8882/* QoS */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008883module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008884MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8885
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008886module_exit(iwl3945_exit);
8887module_init(iwl3945_init);