[ARM] 3865/1: AT91RM9200 header updates
This is more preparation for adding support for the new Atmel AT91SAM9
processors.
Changes include:
- Replace AT91_BASE_* with AT91RM9200_BASE_*
- Replace AT91_ID_* with AT91RM9200_ID_*
- ROM, SRAM and UHP address definitions moved to at91rm9200.h.
- The raw AT91_P[ABCD]_* definitions are now depreciated in favour of
the GPIO API.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c
index cec199f..8476cb8 100644
--- a/arch/arm/mach-at91rm9200/gpio.c
+++ b/arch/arm/mach-at91rm9200/gpio.c
@@ -261,10 +261,10 @@
at91_sys_write(pio_controller_offset[i] + PIO_IER, wakeups[i]);
if (!wakeups[i]) {
- disable_irq_wake(AT91_ID_PIOA + i);
- at91_sys_write(AT91_PMC_PCDR, 1 << (AT91_ID_PIOA + i));
+ disable_irq_wake(AT91RM9200_ID_PIOA + i);
+ at91_sys_write(AT91_PMC_PCDR, 1 << (AT91RM9200_ID_PIOA + i));
} else {
- enable_irq_wake(AT91_ID_PIOA + i);
+ enable_irq_wake(AT91RM9200_ID_PIOA + i);
#ifdef CONFIG_PM_DEBUG
printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", "ABCD"[i], wakeups[i]);
#endif
@@ -282,10 +282,10 @@
}
at91_sys_write(AT91_PMC_PCER,
- (1 << AT91_ID_PIOA)
- | (1 << AT91_ID_PIOB)
- | (1 << AT91_ID_PIOC)
- | (1 << AT91_ID_PIOD));
+ (1 << AT91RM9200_ID_PIOA)
+ | (1 << AT91RM9200_ID_PIOB)
+ | (1 << AT91RM9200_ID_PIOC)
+ | (1 << AT91RM9200_ID_PIOD));
}
#else
@@ -384,7 +384,7 @@
if (banks > 4)
banks = 4;
- for (pioc = 0, pin = PIN_BASE, id = AT91_ID_PIOA;
+ for (pioc = 0, pin = PIN_BASE, id = AT91RM9200_ID_PIOA;
pioc < banks;
pioc++, id++) {
void __iomem *controller;