xhci: tegra: WAR for utmi bias pd bit
This is a workaround for utmi bias pad power down bit setting.
BIAS_PD bit of UTMIP_BIAS_CFG0 register has to be cleared if xusb
owns any of the utmi ports.
Bug 1167876
Change-Id: I0cfae12c516ec7bb10b3e13a8dc7c526c2294551
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/196024
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: Henry Lin <henryl@nvidia.com>
GVS: Gerrit_Virtual_Submit
1 file changed